rock64_rk3328_demo1_v20_

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1 ontent Indexing 0. Index 0. hange List 0. Pi- & Pi-+ 0. lock iagram 0. Power tree-rk System Power-PMI RK RK8 Power 08. RK8 OS/PLL/OTP/SR 09. RK8 R ontroler 0. RK8 emm ontroler/tf. RK8 US PHY/US PHY. RK8 SIO/URT/I/IS/IR. RK8 HMI PHY. RK8 V Interface. RK8 FEPHY 6. RM R x6bit 7. TF/S ard 8. Flash-eMM 9. US Port 0. HMI Out Port. V Out Port. RJ Port-0/00/000M(Ext PHY) ROK6 Note: omponent parameter description. NP stands for component not mounted temporarily. If Value or option is NP, which means the area is reserved without being mounted ROK6 Index ate: Tuesday, July 0, 07 V.0 Sheet: of

2 Version ate uthor hange Note pproved V Initial Release V Production Release ROK6 hange List ate: Tuesday, July 0, 07 V.0 Sheet: of

3 .K.LRK.SI.MLK V V V V_IO V_IO V_IO V_SYS I0_SL I0_S LKKOUT_M GPIO_ SPI_TX_M SPI_RX_M SPI_LK_M I_S_PMI I_SL_PMI SMM0_0 SMM0_ SMM0_/JTG_TK SMM0_/JTG_TMS SMM0_M SMM0_ET SMM0_LK SPI_SN0_M GPIO_7 GPIO_6 GPIO_ GPIO_ URT_RX URT_TX IS_SO IS_LRKTX IS_LRKRX IS_SO SPIF_TX_M0 R+ R- T- T+ IS_SO IS_SO IS_MLK IS_SI IS_SLK I0_S I0_SL SPI_SN_M0 GPIO0_0 Rev ate: Sheet of o Rev ate: Sheet of o Rev ate: Sheet of o uf 00 0V PI- Pi-P+US IE_H_P.V V GPIO_ GPIO_ GPIO_7 GPIO_ 6 GN0 7 GN 8 GPIO_0 9 GPIO_7 0 GPIO_ GPIO_ GPIO0_ GPIO_6 GN GN 6 NET_R+ 7 NET_R- 8 NET_TX+ 9 NET_TX- 0 NET_Speed NET_Link PI- Pi-_US IE_H_0P.V V GPIO_ V. GPIO_0 GN7 6 GPIO_ 7 GPIO_0 8 GN0 9 GPIO_ 0 GPIO_ GPIO_ GPIO0_0 GN6 GPIO_ GPIO_ 6.V. 7 GPIO_6 8 GPIO_ 9 GN 0 GPIO_ GPIO_7 GPIO_0 GPIO_0 GN GPIO_ 6 GPIO_ 7 GPIO_ 8 GPIO_6 9 GN 0 GPIO0_ GPIO_6 GPIO_0 GN GPIO_ GPIO_ 6 GPIO_ 7 GPIO_ 8 GN 9 GPIO_ 0 L0 LM8PG8SN R080 uf 00 0V ROK6 Pi- & Pi-+ V.0 Tuesday, July 0, 07

4 ate: Tuesday, July 0, 07 V.0 Sheet: of 0/00M US OTG.0 HMI OUT V OUT 0/00M US OTG.0 HMI OUT V OUT RJ- RJ- Transformer MHz US.0/US.0 Transformer MHz US.0/US.0 ata0-7 R 0*8it ata0-7 ata8- R/RL 6*6it ata8- R 0*8it Opt Opt S/PIF S/PIF ata6- R 0*8it TF ard SMM0 bit ata6- ata~ R/RL 6*6it TF ard SMM0 bit ata~ R 0*8it V to V RK80- Reset I0 Sleep Int 8bit URT ommand,ontrol, lock V to V RK80- Reset I0 Sleep Int 8bit URT ommand,ontrol, lock dapter WIFI Module emm IRM ebug URT SIO WIFI+URT T, TR R support G 00M Ethernet efault config dapter onfig WIFI Module emm IRM ebug URT SIO WIFI+URT T,TR R support up to G 00M Ethernet 0/00 /000M 0/00M US OTG.0 HMI OUT V OUT 0/00M US OTG.0 HMI OUT V OUT RJ- RJ- RJ- Transformer 000M PHY Module Opt S/PIF TF ard Transformer US WIFI Module SMM0 bit MHz US.0/US.0 ata0-7 ata8- ata6- ata~ R/RL 6*6it R/RL 6*6it R/RL 6*6it R/RL 6*6it Opt S/PIF TF ard Transformer SMM0 bit MHz US.0/US.0 ata0-7 ata8- ata6- ata~ R/RL 6*6it R/RL 6*6it R/RL 6*6it R/RL 6*6it V to V dapter RK80- RGMII Reset I0 Sleep Int 8bit emm IRM URT ebug URT US WIFI/T, R support up to G 00M+000M Ethernet ommand,ontrol, lock onfig V to V dapter onfig RK80- WIFI Module Reset I0 Sleep Int 8bit emm IRM URT ebug URT SIO WIFI+URT T, TR R support up to G 00M Ethernet ommand,ontrol, lock ROK6 lock iagram

5 V_IO option LO 00m V_0 RK8 PLL_V_V0,V_PMU RK8 US0_V_V0,US0_V_V0 RK8 HMI_V_V0 RK8 EPHY_V_V0 UK. UK. V_LOG V_RM RK8 Logic RK8 GPU RK8 RM ore Power Timing TYPE VOLT STEP PowerName UK.V V_LOG dapter V -> V V_SYS V/ UK. V_R RK8 R PHY R evice RK8 PLL_V_V8 UK UK UK LO.V F=0.8V.V.8V V_RM V_R V_IO V_8 RK8 US0_V_V8,US0_V_V8 LO.8V V8_eMM V_IO LO 00m V_8 RK8 HMI_V_V8,V_V_V8 RK8 OE_V_V8 LO.0V V_0 RK8 SR,OTP RK8 EPHY_V_V8 RK8 US_V_V RK8 VIO,VIO,VIO_PMU Poweromain UK. V_IO RK8 VIO,VIO6 Poweromain TF ard V_IO LO 00m V8_eMM emm V RK8 VIO Poweromain emm VQ RK80- V_IO Option V_8 WiFI Module VT RK8 VIO Poweromain IO Power VIO_PMU IO Voltage=.V IO Voltage=.8V.V Not Support S/PIF optical fiber Port udio Line river I VIO.V Not Support Infrared Receiver Module RESET System reset signal VIO VIO.V(efault).8V(efault) emm VIO.V(efault) WIFI:RTL87S urrent limiting I V US0 OTG VIO VIO6.V(efault).V(efault) urrent limiting I V US0 HOST HMI V(.8-.V) ROK6 Power tree-rk80- ate: Tuesday, July 0, 07 V.0 Sheet: of

6 6 7 8 V V_SYS E700 Z8-0F ES00 Operating Supply Vltage : PeakPulse urrent:>0(.v(.-6v) Surge lamping Voltage:< tp=8/0us) 6.V V_IO V_SYS R78 R79 J700 JK_POWER jack-9_x_6-pa V_ nF 6V 00 0R R00 NP R00 U70 ep LO 766 pf 0G 0V 00 7 uf 0V 00 V6 R8 0R R080 % 76 uf 0V 00 F700 N R06 70 ES6W-/TR SO_ V V_SYS 76 uf 0V 00 REFGN NP R70 0K R00 0 VREF 77 00nF 0V 00 % 9 XOUT NP XIN efault.v + M70 00uF/0V MTM- NP 0pF 00 0pF 00 NP Y KHz RY_6R90XR0XR0 7 OUT 0G 0V 0G 0V 707 0uF 0V 060 Standby nF 0V 00 V_SYS R706 NP R00 F UK OUT 00R V_SYS V_LOG IR Receiver IR_RX LE ISPLY Standby 默认高不亮 V_IR V_IO R7 79 R % nf R00 0V 00 LE70 LE_RE LE060 R7 6.8K R00 % R709 0K % R00 IR700 OQSS-R irm-68 IR G 00nF/N 0V 00 NP Vs 70 0pF/N 0V 0G 00 NP V_IR 7 00nF V_IO 0V 00 R70 R % R00 7 0uF 0V 060 V_SYS 7 00nF/N 00 0V NP 76 00nF 00 0V V_IO 78 uf 7 uf 080 0V V_R 080 L70.0uH RK80_KOUT IN_0 _R<60mohm 0V L70.0uH V_IO V_SYS SW LKK F SW V V RK80- QFN_R00XR00X0R90_T OUT F SW V V 6 PWR_LE V_LOG SW V_SYS R76 00R % R00 L70.0uH IN_0 _R<60mohm 79 uf L70.0uH 080 0V V_LOG 7 0uF V V_SYS V_RM 76 uf V nF 00 0V RK8 Power pin 00nF/N 0V 00 NP PWR_LE 默认高灯亮 V_IR LE70 LE_RE LE060 R78 6.8K R00 % PWR_LE 77 00nF 00 0V V_R P6 TEST efault:r=.v SW00 R RL R/LPR POWER V_R.7V.V.V E0 SW8 ESN R7 00K % 7K % K % ES00 R76 0K % 68K % 7 uf V 00K % IN_0 _R<60mohm 0G 7 0V 7pF 00 R7 K % R00 R76 00K % R00 SW F nF 0V 00 SW F PWRON V_SYS EN PMI_SLEEP SLEEP V_8 LO V V_IO LO INT V8_EMM SL S SW F RESET 9 0 SW V_RM 77 00nF 0V 00 V_IO IN_0 _R<60mohm R7 00R % R00 R78 0K % R00 V_IO 7 0uF V F UK R79.K % R00 OUT 00R R70.K % R00 7 uf V 79 00nF 00 0V V_RM RK8 Power pin SHIEL LE70 LE_GREEN LE060 SHIEL SHIEL 7 00nF/N 0V 00 NP SHIEL R77.K R00 % V_SYS 79.7uF 0V uf 0V uF 0V 060 RESET I_S_PMI I_SL_PMI PMI_INT ROK6 System Power-PMI RK80- ate: Tuesday, July 0, 07 V.0 Sheet: 6 of

7 >00Mil >00Mil V_RM V_LOG ate: RK8 Power V.0 ate: RK8 Power ate: RK8 Power RM GPU/Logic U800N RK8 G9_R00XR00XR V_LOGI N9 V_LOGI N0 V_LOGI N V_LOGI P9 V_LOGI P0 V_LOGI P V_LOGI R9 V_LOGI R0 V_LOGI R V_ORE P V_ORE P V_ORE R V_ORE R V_ORE T V_ORE T V_ORE T nF 00 0V 8 uf V 800 0nF 00 V 80 uf V 8 0uF V 80 00nF 00 0V 8 0uF V nF 00 0V U800Q RK8 G9_R00XR00XR M9 M0 M M M M N N7 N8 N N N N P P7 P8 P P R R R7 R8 R R T T T8 T9 T0 T T U U8 U9 U U U U V V8 V W W W W W7 W8 W9 80 uf V 80 00nF 00 0V 80 0uF V U800P RK8 G9_R00XR00XR G8 H H8 H9 H0 H H H H H H7 J J8 J9 J0 J J J J J7 J0 K K K8 K9 K0 K K K K K7 L L L6 L7 L8 L9 L0 L L L L L L6 L7 L M7 M nF 00 0V 806 0nF 00 V U800O RK8 G9_R00XR00XR E E E6 E7 E8 E9 E0 E E E E E E6 E7 E9 F F F6 F7 F8 F9 F7 F0 G G G G6 G7 G8 G9 G G G7 7 ROK6 Tuesday, July 0, 07

8 >Mil >Mil SR_IN0 OM Ver SR_IN P Ver Up Ohm own Ohm NP 0K 0K 0K 00K 0K 00K K 8K 6K 6K K K K Recover OM OM OM OM OM OM0 OM9 OM8 OM7 OM6 OM OM 6K K 8K 6K K 00K 0K 00K 0K 0K 0K NP REOVER REOVER SR_IN SR_IN VPLL/US0_V8 V_8 V_8 VPLL/US0_V0 V_0 V_8 V_8 ate: RK8 OS/PLL/OTP/SR V.0 ate: RK8 OS/PLL/OTP/SR ate: RK8 OS/PLL/OTP/SR R906 0K R00 % 900 ESN/N ES00 R9 0K/N R00 % NP OS PLL Power SR OTP/eFUSE U800 RK8 G9_R00XR00XR PLL_V_V0 H7 PLL_V_V8 H XOUTM T XINM R SR_IN0 M8 SR_IN M7 SR_V_V8 M6 OTP_V8 N6 EFUSE_VP P6 9 00nF 00 0V 909.7uF 00 6.V 908.7uF 00 6.V 90 pf 00 0G 0V R90 M R00 % Y900 MHz RY_R0XR0X0R80 XIN GN XOUT GN 90 00nF 00 0V 90.7uF 00 6.V 90 00nF 00 0V 900 pf 00 0G 0V L900 80R-00M L060 R9 R R00 % SW900 REOVER_key ts-0s 90.7uF 00 6.V nF 00 0V R908 0K/N R00 % NP R900 R R00 % L90 80R-00M L060 R909 0K R00 % ROK6 8 Tuesday, July 0, 07

9 R_6 R_7 R_9 R_ R_0 R_8 R_ R_ R_ R_ R_ R_7 R_ R_0 R_ R_M0 R_6 R_9 R_ R_ R_ R_8 R_0 R_ R_ R_M R_ R_7 R_9 R_6 R_ R_8 R_0 R_ R_M V_R R_ R_ R_6 R_0 R_ R_ R_ R_7 R_M0 R_M R_ R_ R_ R_ R_9 R_0 R_ R_8 R_ R_0 R_ R_ R_6 R_9 R_7 R_8 R_M R_0 R_8 R_ R_ R_6 R_7 R_9 R_ R_M R_QS0P R_M R_QSN R_QSN R_QSP R_QS0N R_QSP R_QSN R_QSP R_ R_ R_SN R_9 R_ R_ R_6 R_LKN R_ R_0 R_7 R_OT0 R_LKP R_KE0 R_8 R_S0N ate: RK8 R ontroler ROK6 V.0 ate: RK8 R ontroler ate: RK8 R ontroler 00 0uF 060 0V R/R U800M RK8 G9_R00XR00XR R_Q0 7 R_Q 7 R_Q R_Q R_Q 9 R_Q 7 R_Q6 7 R_Q7 R_Q8 R_Q9 8 R_Q0 R_Q 0 R_Q R_Q 0 R_Q R_Q 9 R_Q6 6 R_Q7 R_Q8 6 R_Q9 R_Q0 R_Q 0 R_Q 7 R_Q R_Q R_Q R_Q6 9 R_Q7 8 R_Q8 R_Q9 R_Q0 8 R_Q 7 R_QM0 6 R_QM R_QM R_QM 0 R_QS0_P R_QS0_N R_QS_P R_QS_N R_QS_P R_QS_N R_QS_P R_QS_N R_0/R_0 G9 R_/R_9 K8 R_/R_ H8 R_/R_6 E0 R_/R_ H R_/R_8 R_6/R_7 H0 R_7/R_ 0 R_8/R_ K9 R_9/R_0 F9 R_0/R_S0n K R_/R_ G0 R_/R_ J R_/R_ F8 R_/R_ G R_/R_OT0 J9 R_0/R_G0 R_/R_Sn/R_ K0 R_/R_0 E R_SN0/R_Tn 0 R_SN/R_SN L8 R_OT0/R_Wen/R_ E8 R_OT/R_OT L9 R_LKP/R_LKP 0 R_LKN/R_LKN 0 R_KE/R_RSn/R_6 L0 R_RSn/R_KE 9 R_Sn/R_ J8 R_WEn/R_G H9 R_RESETn/R_RESETN V_RIO F0 V_RIO F V_RIO F V_RIO F V_RIO G0 V_RIO G V_RIO G V_RIO G V_RIO H6 V_RIO J V_RIO J6 V_RIO K V_RIO K nF 00 0V 00 0uF 060 0V 000 0nF 00 V 00 00nF 00 0V 9 Tuesday, July 0, 07

10 SPI_TX_M SPI_LK_M SPI_RX_M SPI_SN0_M VIO_FLSH V_IO V_IO V_IO emm_6 emm_0 emm_ emm_ emm_ emm_ emm_ emm_7 emm_m emm_rst emm_lko SMM0_LK SMM0_M SMM0_ET SMM0_/JTG_TK SMM0_/JTG_TMS SMM0_ SMM0_0 GPIO_ SPI_TX_M SPI_RX_M SPI_LK_M SPI_SN0_M GPIO_7 GPIO_6 GPIO_ ate: RK8 emm ontroler/tf ROK6 V.0 ate: RK8 emm ontroler/tf ate: RK8 emm ontroler/tf R8 0K U800G RK8 G9_R00XR00XR GPIO_/TSP_LK/IF_LKIN/SMM0EXT_LK/SPI_RX_M/USPHY_EUG/IS_SI_M_d E GPIO_0/TSP_VLI/IF_VSYN/SMM0EXT_M/SPI_LK_M/USPHY_EUG/IS_SLK_M_u E GPIO_/TSP_FIL/IF_HREF/SMM0EXT_ET/SPI_TX_M/USPHY_EUG/IS_SO_M_u GPIO_/TSP_0/IF_0/SMM0EXT_0/URT_TX/USPHY_EUG_u E GPIO_/TSP_/IF_/SMM0EXT_/URT_RTSN/USPHY_EUG_u GPIO_6/TSP_/IF_/SMM0EXT_/URT_RX/USPHY_EUG6_u F GPIO_7/TSP_/IF_/SMM0EXT_/URT_TSN/USPHY_EUG7_u F GPIO_0/TSP_/IF_/SPI_SN0_M/IS_LRK_TX_M/USPHY_EUG8/IS_LRK_RX_M_d F VIO6 H6 R7 0K 06 00nF 00 0V R 0K U800 RK8 G9_R00XR00XR GPIO_0/SMM0_0/URT_TX_M0_u U0 GPIO_/SMM0_/URT_RX_M0_u W GPIO_/SMM0_/JTG_TK_u W GPIO_/SMM0_/JTG_TMS_u GPIO_/SMM0_M_u Y GPIO_/SMM0_ETN_u V0 GPIO_6/SMM0_LK/TEST_LK0_d W VIO U7 R 0K 0 00nF 00 0V 0.uF U800 RK8 G9_R00XR00XR GPIO0_7/EMM_0_u U9 GPIO_/EMM u U0 GPIO_/EMM u U GPIO_6/EMM u V9 GPIO_7/EMM u U8 GPIO_0/EMM u W GPIO_/EMM_6_u T8 GPIO_/EMM_7_u T9 GPIO_/EMM_M_u R0 GPIO_/EMM_LKOUT_u R GPIO_6/EMM_PWREN_d R9 VIO T7 R 0K U GQ8S /S O /WP GN IO LK 6 /HOL 7 V 8 R 0K 0 Tuesday, July 0, 07

11 V_IO V_8 V_0 US0/FEPHY_V8 US0/FEPHY_V0 V_IO V_IO VPLL/US0_V8 VPLL/US0_V0 V_IO V_LOG OTG0_M OTG0_P US0_P US0_M US0_RXN US0_RXP US0_TXP US0_TXN US0_HOST_M US0_HOST_P ate: RK8 US PHY/US PHY V.0 ate: RK8 US PHY/US PHY ate: RK8 US PHY/US PHY R0 K R00 % nF 00 0V R00 R R00 % 90 00nF 00 0V 0 00nF 00 0V 00 00nF 00 0V L0 80R-00M/N L060 NP 0.7uF 00 6.V US.0 U800K RK8 G9_R00XR00XR US0_M Y6 US0_P 6 US0_VUS T6 US_M Y7 US_P 7 US0_EXTR W6 US0_V_V T US0_V_V8 U US0_V_V0 V L0 80R-00M L060 L0 80R-00M L uF 00 6.V 0 00nF 00 0V US.0 U800L RK8 G9_R00XR00XR US0_RXP J US0_RXN J US0_TXP H US0_TXN H US0_VUS K7 US0_M K US0_P K US0_EXTR G US0_V_V J6 US0_V_V8 J US0_V_V0 J7 06.7uF 00 6.V 09 00nF 00 0V 07.7uF 00 6.V ROK6 Tuesday, July 0, 07

12 z GM_RXER/PM_RX RGMII no use T_WKE_HOST/LKOUT_GM VIO RESET WIFI_REG_ON/GM_RS WIFI_WKE_HOST/GM_MIO T_WKE_HOST/LKOUT_GM T_REG_ON/GM_LK GM_RXV/PM_LK GM_M/PM_SYN GM_RXER/PM_RX GM_TXEN/PM_TX URT0_RTSN/GM_RX URT0_TX/GM_TX0 URT0_RX/GM_TX SMM_LK/GM_TXLK URT0_TSN/GM_RX0 SMM_/GM_RX SMM_/GM_TX SMM_/GM_TX SMM_M/GM_RXLK SMM_0/GM_RX GM_M/PM_SYN WIFI_REG_ON/GM_RS URT0_TX/GM_TX0 URT0_RX/GM_TX WIFI_WKE_HOST/GM_MIO URT0_RTSN/GM_RX URT0_TSN/GM_RX0 SMM_LK/GM_TXLK SMM_0/GM_RX SMM_/GM_TX SMM_/GM_TX SMM_M/GM_RXLK GM_RXV/PM_LK SMM_/GM_RX SMM_0/GM_RX SMM_M/GM_RXLK SMM_LK/GM_TXLK WIFI_WKE_HOST/GM_MIO T_REG_ON/GM_LK T_WKE_HOST/LKOUT_GM URT0_RX/GM_TX GM_RXER/PM_RX GM_M/PM_SYN SMM_/GM_RX SMM_/GM_TX SMM_/GM_TX URT0_TSN/GM_RX0 URT0_RTSN/GM_RX URT0_TX/GM_TX0 WIFI_REG_ON/GM_RS GM_TXEN/PM_TX GM_RXV/PM_LK T_REG_ON/GM_LK GM_TXEN/PM_TX VIO VIO IS_LRKTX V_IO V_IO V_IO V0_HMI/PMU VIO_WL V_IO VIO_PHY RESET URT_RX URT_TX IR_RX PMI_SLEEP PMI_INT I_SL_PMI I_S_PMI HMI_SL HMI_S MUTE_TL HMI_HP HMI_E LKKOUT_M SMM0_PWREN IS_SLK SPIF_TX_M0 WIFI_REG_ON T_REG_ON T_WKE_HOST WIFI_WKE_HOST PM_LK PM_SYN PM_RX PM_TX URT0_TX URT0_RX URT0_TSN URT0_RTSN SMM_0 SMM_ SMM_M SMM_ SMM_LK SMM_ GM_M GM_TX0 GM_TX GM_MIO GM_RXLK EPHY_RST GM_RX GM_TXLK GM_LK GM_TXEN GM_RX GM_RX0 GM_RX GM_TX GM_TX GM_RXV IS_SO IS_SO IS_LRKRX IS_SO IS_SI US0_HOST_RV GPIO0_0 IS_LRKTX I0_S I0_SL GPIO_ IS_SO SPI_SN_M0 IS_MLK ate: RK8 SIO/URT/I/IS/IR V.0 ate: RK8 SIO/URT/I/IS/IR ate: RK8 SIO/URT/I/IS/IR 0 00nF 00 0V 0 ESN ES00 NP U800E RK8 G9_R00XR00XR GPIO_0/URT0_RX/GM_TX_M_u Y GPIO_/URT0_TX/GM_TX0_M_u GPIO_/URT0_RTSN/GM_RX_M_d W GPIO_/URT0_TSN/GM_RX0_M_d V GPIO_/SMM_LK/GM_TXLK_M_d 0 GPIO_/SMM_M/GM_RXLK_M_u Y0 GPIO_6/SMM_0/GM_RX_M_u W9 GPIO_7/SMM_/GM_RX_M_u W8 GPIO_0/SMM_/GM_TX_M_u 9 GPIO_/SMM_/GM_TX_M_u Y9 GPIO_/SMM_PWREN/GM_RS_M_d W0 GPIO_/SMM_ET/GM_MIO_M/PM_FSYN_M_u Y GPIO_/IS_MLK/GM_LK_M_d W GPIO_6/IS_SLK_M0/GM_RXV_M/PM_LK_M_u W6 GPIO_7/IS_LRK_TX_M0/GM_M_M/PM_SI0_M_d W7 GPIO_/IS_LRK_RX_M0/LKOUT_GM_M/PM_SI_M_d V GPIO_0/IS_SI_M0/GM_RXER_M/PM_SI_M_d 7 GPIO_/IS_SO_M0/GM_TXEN_M/PM_SI_M_d Y7 GPIO_/LKKOUT_M_d V VIO U 06 00nF 00 0V 00 00nF 00 0V U800 RK8 G9_R00XR00XR GPIO0_/LKOUT_GM_M0/SPIF_TX_M_d R GPIO_MUTE_d N GPIO0_0/LKOUT_WIFI_M0_d L GPIO0_/HMI_HP_d U HMI_E_u V I_SL/HMI_SL_od V I_S/HMI_S_od V VIO_PMU K6 GPIO0_/SPIF_TX_M0_d V9 GPIO0_6/FEPHY_LE_SPEE0/SMM0_PWREN_M_d W0 VIO T7 V_PMU M R8 0R/N R00 % NP RESET SW SW8 TP0 TP0 0 00nF 00 0V U800F RK8 G9_R00XR00XR GPIO_/US0_RV_d M0 GPIO_/I0_S/FEPHY_LE_T_M_u R7 GPIO_0/I0_SL/FEPHY_LE_LINK_M_u P7 GPIO_/EFUSE_PWREN/POWERSTTE_u U7 GPIO_/IS_SI/PM_SI0_M0/R_LK_M_u U6 GPIO_6/IS_SIO/PM_SI_M0/R_IO_M_u V6 GPIO_/IS_SIO/PM_SI_M0/R_ET_M_u V7 GPIO_/IS_SIO/PM_SI_M0/R_RST_M_u V8 GPIO_7/IS_SO/PM_FSYN_M0_u N7 GPIO_/IS_SLK/PM_LK_M0/TSP_7_M/IF_7_M_d R8 GPIO_0/IS_LRK_RX/TSP M/IF M_u V GPIO_/IS_LRK_TX/SPIF_TX_M/TSP_6_M/IF_6_M_u P8 GPIO_7/IS_MLK/TSP_SYN_M/IF_LKOUT_M_d N8 GPIO_/SPI_SN_M0/FLSH_VOL_SEL_u T6 GPIO_6/PWM_u M9 GPIO_/PWM/I_SL_u N0 GPIO_/PWM0/I_S_u N9 GPIO_/IR_RX/POWERSTTE_u M GPIO_/URT_RX_M/POWERSTTE_u P0 GPIO_0/URT_TX_M/POWERSTTE0_d P9 NPOR_u P TEST_d M VIO R6 R0 R R00 % 07 00nF 00 0V 0 00nF 00 0V ROK6 Tuesday, July 0, 07

13 U800I HMI.0 out HMI_TXLKN HMI_TXLKP HMI_TX0N HMI_TX0P HMI_TXN HMI_TXP HMI_TXN HMI_TXP W Y Y Y Y Y HMI_TXLKN HMI_TXLKP R8 0R L0 0R/MZ0H900LT0G RP_00 HMI_TX_- HMI_TX_+ R8 0R HMI_TX_0- HMI_TX_0+ HMI_TX_- HMI_TX_+ HMI_TX_- HMI_TX_+ HMI TMS trace 00 Ohm +-0% HMI_EXTR M R00 K % R00 V8_HMI/V HMI_V_V8 P6 V0_HMI/PMU >0Mil L0 80R-00M L060 V_8 HMI_V_V0 M6 RK8 G9_R00XR00XR 00 00nF 0V uF 6.V 00 0 nf 0V nF 0V 00 >Mil 0 uf 6.V 00 L0 R L060 V_0 ROK6 RK8 HMI PHY ate: Tuesday, July 0, 07 V.0 Sheet: of

14 U800H R/L out OE_VM T 00.7uF 6.V 00 OE_OL OE_OR P N OL OR V8_OE OE_V_V8 OE_ N R >Mil 0 00nF 0V uF 6.V 00 L0 80R-00M L060 V_8 VS out V_IOUT M V_OUT V_IREF P R0 K % R00 V_V_V8 N6 V8_HMI/V RK8 G9_R00XR00XR 0 00nF 0V 00 ROK6 RK8 V Interface ate: Tuesday, July 0, 07 V.0 Sheet: of

15 U800J 0/00M Ethernet PHY FEPHY_TXP FEPHY_TXN FEPHY_RXP FEPHY_RXN Y9 R8 9 R8 Y8 R80 8 R79 0R 0R 0R 0R T+ T- R+ R- FEPHY_EXTRES V7 R K % R00 US0/FEPHY_V8 FEPHY_V_V8 U6 FEPHY_V_V0 V6 RK8 G9_R00XR00XR nF 0V 00 US0/FEPHY_V0 Embed FEPHY 60 00nF 0V 00 ROK6 RK8 FEPHY ate: Tuesday, July 0, 07 V.0 Sheet: of

16 LPR >=600MHz R_7 R_6 R_0 R_ R_9 R_ R_8 R_QSN R_ R_M R_QSP R_RST R_SN R_KE0 R_RSN R_WEN R_ R_LKN R_ R_0 R_ R_ R_ R_7 R_ R_ R_LKP R_0 R_ R_8 R_9 R_0 R_ R_6 R_ R_ R_ R_ R_ R_7 R_ R_ R_0 R_6 R_M0 R_QS0N R_QS0P R_ R_9 R_8 R_ R_ R_ R_0 R_QSP R_QSN R_ R_M R_ R_9 R_7 R_8 R_ R_6 R_ R_0 R_QSN R_QSP R_M R_S0N R_OT0 VREF_R V_R VV8_R V_R V_R V_R VREF_R V_SYS VV8_R R_ R_ R_0 R_ R_6 R_ R_ R_0 R_9 R_7 R_8 R_ R_ R_ R_ R_ R_LKN R_0 R_LKP R_ R_RSN R_SN R_KE0 R_RST R_WEN R_6 R_ R_ R_ R_ R_ R_0 R_7 R_M0 R_QS0P R_QS0N R_QSP R_QSN R_M R_ R_ R_ R_ R_8 R_ R_0 R_9 R_ R_0 R_ R_9 R_6 R_ R_8 R_7 R_M R_QSN R_QSP R_0 R_ R_8 R_9 R_7 R_6 R_ R_ R_M R_QSP R_QSN R_OT0 R_S0N R_8 R_ R_ R_0 R_9 R_8 R_ R_ R_ R_0 R_9 R_7 R_6 R_QS0P R_ R_ R_ R_M0 R_QSN R_QSP R_QS0N R_ R_ R_0 R_M R_6 R_ R_ R_ R_6 R_ R_ R_7 R_0 R_9 R_8 R_7 R_QSN R_QSP R_OT0 R_ R_M R_M R_QSN R_QSP R_ R_ R_ R_KE0 R_6 R_0 R_ R_ R_LKN R_9 R_8 R_7 R_SN R_S0N R_LKP ate: RM R x6bit 6 V.0 ate: RM R x6bit ate: RM R x6bit 08 NP 00 R00 0R R00 % R000 0R R00 % R00 0K R00 % nF 00 0V 0.7uF 00 6.V 07 00nF 00 0V 06 00nF 00 0V 08 uf V 0 00nF 00 0V 00 uf V 00 00nF 00 0V 00 nf 00 X7R 0V U000 fbga78-0x KE8E0EE-EGE R_0 P9 R_ N9 R_ N0 R_ N R_ M8 R_ M9 R_6 M0 R_7 M R_8 F R_9 F0 R_0 F9 R_ F8 R_ E R_ E0 R_ E9 R_ 9 R_6/N T8 R_7/N T9 R_8/N T0 R_9/N T R_0/N R8 R_/N R9 R_/N R0 R_/N R R_/N R_/N 0 R_6/N 9 R_7/N 8 R_8/N R_9/N 0 R_0/N 9 R_/N 8 R_QS0 L0 R_QS0n L R_QS G0 R_QSn G R_QS P0 R_QSn P R_QS 0 R_QSn R_M0 L8 R_M G8 R_M/N P8 R_M/N 8 R_0 R R_ P R_ N R_ N R_ M R_ F R_6 E R_7 E R_8 R_9 R_LK J R_LKn J R_S0 L R_S L R_VREF H R_ZQ0 R_KE0 K R_KE K NU NU NU NU NU NU6 V_0 8 V_ V_ VQ_7 VQ_6 V_9 9 VQ_ E8 VQ_ E VQ_ G V_8 VQ_ H8 VQ_ H9 V_7 R_VREFQ J VQ_0 H VQ_9 J9 VQ_8 J0 V_6 6 VQ_7 K8 V_ VQ_6 K VQ_ L NU7 T V_ G V_ 6 NU8 T NU9 U NU0 U NU U NU U R_ZQ V_ 0 V_6 U V_7 U V_8 U V_9 U6 V_0 U0 VQ_ N8 VQ_ N VQ_ R VQ_ U V_8 K6 V_9 K V_0 J6 V_ J V_ H V_ H6 V_ H V_ U9 V_ U8 V_ P6 V_ P V_ P V_6 L V_7 K V M V L V H V G V F E E 6 F 7 H 8 J 9 K 0 L6 M N N R R 6 T 7 T 8 T 9 T Q 6 Q Q 6 Q Q E6 Q6 F6 Q7 F Q8 G6 Q9 G9 Q0 H0 Q K0 Q L9 Q M6 Q M Q N6 Q6 P Q7 R6 Q8 T6 Q9 T F G G 6 J 7 M 8 P R_OT J8 N N K9 N R 00 uf V U00 PT08EE-8 SOT IN GN EN P OUT R00 K R00 % 0 00nF 00 0V 0 00nF 00 0V nF 00 0V 07 00nF 00 0V 0 00nF 00 0V 06 00nF 00 0V 0 00nF 00 0V nF 00 0V 0 00nF 00 0V 0 00nF 00 0V 0 00nF 00 0V 0 00nF 00 0V 09 uf V 00 nf 00 X7R 0V nF 00 0V R00 K R00 % 09 NP 00 0 uf V 0 uf V 00 00nF 00 0V 0 00nF 00 0V 0 uf 00 0V 0 uf 00 0V 00 uf 00 0V ROK6 Tuesday, July 0, 07

17 V_IO V_S SMM0_0 SMM0_ SMM0_/JTG_TK SMM0_/JTG_TMS R00 0R % R00 SMM0_M SMM0_LK SMM0_ET SMM0_PWREN V_S SMM0_/JTG_TK SMM0_/JTG_TMS SMM0_M SMM0_LK SMM0_0 SMM0_ SMM0_ET R08 R % R00 R09 R % R00 R0 R % R G T /T M V LK T0 T J00 TF_S_SOKET TF-R-PUSH R06 R % R00 R0 R % R00 R0 R % R00 R07 R % R00 G G G 0 00nF 0V uF 0V ES7X ES00 0 ES7X ES00 0 ES7X ES00 0 ES7X ES00 0 ES7X ES00 06 ES7X ES00 07 ES7X ES00 0 TF ard lose to TF ROK6 TF/S ard ate: Tuesday, July 0, 07 V.0 Sheet: 7 of

18 Note: EMM SOKET VIO_FLSH VIO_FLSH emm_lko VIO_FLSH Note: R Resistor need to placed closer to PU 0 00nF 0V 00 V_IO R0 0K % R00 R6 0K % R00 R8 R % R00 R9 06.7uF 0V 060 NP TP00 TP0.7K/N % R00 emmlk Note: emm Update. emm_0 emm_m emmlk emm_rst Note: emm Jumper emmlk SW0 ON/OFF_key IE_H_P emm_ emm_ emm_0 emm_ emm_rst 7 J emm_6 emm_7 emm_ emm_ emm_m V_IO VIO_FLSH 00nF 0V 00.7uF 0V 060 R0 0R % R00 V8_EMM emm_0 emm_ emm_ emm_ emm_ emm_ emm_6 emm_7 emm_m emm_lko emm_rst FP00 ROK6 Flash-eMM ate: Tuesday, July 0, 07 V.0 Sheet: 8 of

19 V_SYS R87 0R/N % R080 V_OTG_V Note: US OTG OTG0_M OTG0_P US0_HOST_RV US0_HOST_M US0_HOST_P 8 US0_HOST uf 0V 00 R70 N R00 U0 SY680 IN VOUT GN EN O SOT R69.7K % R00 Note: Top - OTG, ottom - US HOST V_OTG_V US0_HOST_RV R7 0R R00 % 00 0V 00 uf US0_OTG V_HOST_V Note: V_SYS US.0 R86 0R/N % R080 U00 SY680 IN VOUT GN EN O SOT R07 R0 N.7K R00 % R00 0 SHELL SHELL SHELL 9 SHELL VUS - + GN VUS 6 P- 7 P+ 8 GN0 US00 US_F_U US_F_U US0M US0P 0 ESN ES ESN ES00 ESN ES00 09 ESN ES00 R00.R % R00 L00 N RP_00 R0.R % R00 R68.R % R00 L0 N RP_00 R67.R % R nF 0V 00 uf 0V 060 OTG0_M OTG0_P US0_HOST_M US0_HOST_P V_HOST_V 6 uf 0V nF 0V 00 uf 0V 060 uf 0V 060 V_HOST_V 0 PWR_LE V_SYS V_HOST_V R6 0R/N % R080 U0 SY680 uf 0V IN VOUT 00 GN EN O SOT R R N.7K R00 % R00 0 SHELL SHELL VUS - + GN RX- 6 RX+ GN 7 8 TX- 9 TX+ US0 US0_F_IP US_0_F_US0 0 ESN ES00 US0M US0P 0 ESN ES00 R0.R % R00 US0_M RP_00 N R.R L0% R00 US0_P US0RXN US0RXP US0TXN US0TXP 07 ESX ES00 R 0R % R00 L0 N RP_00 R6 0R % R nF uf uf 0V 0V 0V US0_RXN US0_RXP 07 00nF 0V R7 0R % R00 00 L0 US0_TXN 09 00nF 0V N 00 RP_00 US0_TXP R8 0R % R00 08 ESX ES00 US0_RXP US0_RXN US0_TXP US0_TXN US0_M US0_P PWR_LE 0 ESX ES00 06 ESX ES00 j<=0.pf ROK6 US Port ate: Tuesday, July 0, 07 V.0 Sheet: 9 of

20 V_SYS HMI_SL R60 R % R00 VV_HMI W SO_ R60.8K % R00 VV_HMI 600 uf 0V 00 _SL HMI_HP Q60 90 SOT_ R60 R60 K % R00 R606 0K % R00 K % R00 HMI_TX_0+ HMI_TX_0- HMIE _SL HMIHP E600 ES7X ES HMI OUT HMI_TX_+ HMI_TX_- HMI_TX_+ HMI_TX_- HMI_TX_+ HMI_TX_- _S VV_HMI J600 HMI_ HMI-_X_-P 60 00nF 0V 00 HMI_S R609 R % R00 R608.8K % R00 _S HMI_TX_+ HMI_TX_- HMI_TX_+ HMI_TX_- U600 IN IN GN IN IN OUT OUT 0 ES0 SON0_R0XR00X0R0 9 GN 8 OUT OUT 7 6 HMI_TX_+ HMI_TX_- HMI_TX_+ HMI_TX_- j<=0.pf R60 7K % R00 HMI_E V_IO V_SYS Q60 SK08 SOT_ HMIE HMI_TX_0+ HMI_TX_0- HMI_TX_+ HMI_TX_- U60 IN IN GN IN IN OUT OUT 0 ES0 SON0_R0XR00X0R0 9 GN 8 OUT OUT 7 6 HMI_TX_0+ HMI_TX_0- HMI_TX_+ HMI_TX_- j<=0.pf HMI_TX_+ HMI_TX_- HMI_TX_0+ HMI_TX_0- HMI_TX_+ HMI_TX_- HMI_TX_+ HMI_TX_- HMI_HP HMI_E HMI_S HMI_SL _SL _S HMIE E60 E60 E60 ESN ES00 ESN ES00 ESN ES00 ROK6 HMI OUT Port ate: Tuesday, July 0, 07 V.0 Sheet: 0 of

21 V_IO V_OUT 900 0pF pF 0G 0V 00 VS_OUT VS_OUT ROUT LOUT 90 NP ESN ES00 90 NP ESN ES00 90 NP ESN ES00 R900 0R % R00 L uH 0pF % 0G L060 0V TS SOT_ J900 SMT-PJ PJ-0-_SMTa V OUT OL 90.7uF 0V 060 OR 909.7uF 0V 060 -Vrms udio Line river R90.K % R00 R90.K % R00 R90 K % R00 90.nF 0V 00 TPF6=0R R9 K % R00 9.nF 0V 00 R90 K % R pF 0G 0V R K % 906 R00 nf 0V 00 U900 SGM89000YTSG /RV6PW/ioH /TPF6 TSSOP_R96XR0XR0 R9.6K % 9 R00 nf 0V 00 R9 K % R00 +INL -INL 9 7pF 0G 0V 00 OUTL N PGN 0 PV 9 P 8 +INR -INR OUTR SGN EN P N 6 7 V_MP R90 R % R00 R907.7K % R uf V_SYS 0V 00 电压改为 V_SYS 90 uf 0V 00 MUTE_TL R906.K % R00 R9 R % R00 96 nf/n 0V 00 NP LOUT 907 nf/n 0V 00 NP ROUT R9 0K % R00 R908 0K % R00 V_MP ate: 0 uf 0V 060 uf 0V 060 ROK6 V OUT Port Tuesday, July 0, 07 V_OUT OL OR L909 80R-00M L nF 0V 00 MUTE_TL V_IO V.0 Sheet: of

22 RJ & Transformer U _- _- 9 J8 - _+ J7 + J6 - _+ _- MI- 8 MI+ 6 MI- MI+ 7 MI- J - J + GM_TX0 GM_TX GM_TX GM_TX GM_TXEN GM_TXLK GM_RX0 GM_RX GM_RX GM_RX GM_RXV GM_RXLK GM_LK GM_MIO GM_M EPHY_RST % R00 R R00 R0 R R00 % R06 R R00 % R09 R R00 % R0 R % R00 R R % R00 lose to PU R.K R00 R 0R % R00 % PHY_TX0 PHY_TX PHY_TX PHY_TX PHY_TXEN PHY_TXLK 00 NP 00 VIO_PHY EPHY_RSTn PHYRST is.v IO R0.7K % R00 VIO_PHY R0.7K % R00 R07.7K % R00 R0.7K % R00 Y00 PHY_XTLOUT XIN GN PHY_XTLIN GNXOUT 0 pf 0G 0V 00 GM_LK R MHz 0 RY_R0XR0X0R80 pf 0G 0V 00 R % PHY_LKOUT R00 9 NP M <----- PHY 00 _- _+ _- _+ _- _+ _- _+ MI- R0 0R % R00 MI+ R06 0R % R00 MI- R 0R % R00 MI+ R 0R % R00 MI- R 0R % R00 MI+ R 0R % R00 MI0- R6 0R % R00 MI0+ R7 0R % R00 NP NP NP NP NP NP NP NP ESN ESN ESN ESN ES00 ES00 ES00 ES ESN ESN ESN ESN ES00 ES00 ES00 ES00 L0 LM8PG8SN L V 0.uF _+ MI+ _- MI0- _+ MI V TT 9 0nF 0 Earth LE/FG_LO0 G+ R8 0R% RGMII_GR- G- V_LN Y+ LE/FG_LO RGMII_YE- Y- R8 0R% 6 GN PGN HY90 J + J - J + Gap > mm High-tension area Low-tension area V0_EPHY V0_EPHY V_LN PHY_RX0/RXLY PHY_RX/TXLY PHY_RX/PLLOFF PHY_RX/PHY0 PHY_RXLK/PHY PHY_RXV/PHY R9.9K R00 V_LN U0 MI+ MI- MI+ MI- MI+ MI- MI0+ MI0- MI[0]+ MI[0]- V0 MI[]+ MI[]- MI[]+ MI[]- V0 MI[]+ MI[]- V_LN E_Pad R60 NP.7K % R00 V0_EPHY % RSET 0 V 9 RSET 8 V0 7 XTL_OUT/EXT_LK XTL_IN 6 PHY_XTLOUT PHY_XTLIN PHY_LKOUT LE/FG_LO LE/FG_LO0 LE0/FG_EXT V PHYRST M MIO TX TX TX TX0 TXTL TX EPHY_RSTn GM_M GM_MIO PHY_TX PHY_TX PHY_TX PHY_TX0 PHY_TXEN PHY_TXLK 8 00nF 0V 00 LKOUT LE/FG_LO LE/FG_LO0 LE0/FG_EXT INT/PME % R R R00 R R R00 % R6 R R00 % R7 R R00 % R8 R % R00 R9 R % R00 PHY_INT/PME 0 REG_OUT 9 V V_RG 8 7 RX/PHY 6 RXTL/PHY RX0/RXLY RX/TXLY RX/PLLOFF RX/PHY0 V0 RTL8F-G QFN0_X_0MM REG_OUT RTL8F-G(SW Mode) RTL8FI-G(SW Mode)Industrial GM_RX0 GM_RX GM_RX GM_RX GM_RXLK GM_RXV R0.7K R00 % PHY_RXLK/PHY PHY_RXV/PHY PHY_RX0/RXLY PHY_RX/TXLY PHY_RX/PLLOFF PHY_RX/PHY0 8 NP 00 V_LN V_LN VIO_PHY V0_EPHY R NP.7K % LE0/FG_EXT R6.7K % V_LN R00 R00 R7.7K % LE/FG_LO0 R00 R NP.7K % LE/FG_LO R.7K % R00 R00 VIO_PHY Voltage onfig PHY_RX/PHY0 R.7K % VIO_PHY R00 R7.7K % PHY_RXLK/PHY R00 R9.7K % PHY_RXV/PHY R00 PHY ddress PHY[:0] PHY ddress onfig (default) 'b00 R.7K % PHY_RX0/RXLY R NP.7K % VIO_PHY R00 R00 Pull-up for additional ns delay to RX for data latching R7.7K % PHY_RX/TXLY R8 NP.7K % VIO_PHY R00 R00 Pull-up for additional ns delay to TX for data latching PHY_RX/PLLOFF R9.7K % VIO_PHY R00 Pull-up to disable LPS mode close to PIN V0_EPHY REG_OUT L00.uH IN_0 0.7uF 0V close to PIN0 060 RTL8F-G(SW Mode) RTL8FI-G(SW Mode)Industrial 00nF 0V nF 0V 00 00nF 0V 00 00nF 0V 00 close to PIN,8,8 6 00nF 0V 00 RGMII Power Source External.V External.8V (default) FG_EXT 'b 'b FG_LO[:0] 'b00 'b0 Internal.8V 'b0 'b0 V_IO V_8 V_IO R6.7uF 0V 060 uf 0V 00 NP R 0K % R00 R R V_LN 0R % R00 VIO_PHY NP U0 IN GN EN OUT P PT08EE-8 SOT NP 0R R00 0R R00 % % 0 00nF 0V 00.7uF 0V uF 0V NP 00 close to PIN,0 00nF 0V 00 00nF 0V 00 close to PIN9 close to PIN8 7 00nF 0V 00 VIO_PHY uf 0V 00 lose to PHY ROK6 RJ Port-0/00/000M(Ext PHY) ate: Tuesday, July 0, 07 V.0 Sheet: of

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