aio_3399j_v10_ _a

Transcription

1 Modify note Version ate uthor hange Note pproved V LZZ First edictor Modify note IO_J reate ate: Monday, November, 0 Modify ate: Wednesday, November 0, 0 REV: V0

2 RK I MP Port Pin name omain us name Pull-up voltage Slave evice Slave ddr (MS its) Note Slave us apability I0 GPIO_/SPI_RX/I0_S GPIO_0/SPI_TX/I0_SL PMUIO VV0_IO I0_S_PMI I0_SL_PMI VV0 TT Rockchip RK0 0x,0X 0xb RT PMI I_S_PIE I_S_PIE VV_OE I GPIO_/I_S GPIO_/I_SL PIO VV_IO I_S_UIO I_SL_UIO I_S_M I_SL_M VV_OE L0 0xh udio codec VV_OE Omnivision OV0 0xc0,0x MIPI amera VV_OE SKEGX 0x VP amera Other pin function VV_OE I GPIO_0/VOP_0/IF_0/I_S GPIO_/VOP_/IF_/I_SL PIO VV_IO Other pin function VV_VP I GPIO_0/I_S/URT_RX GPIO_/I_SL/URT_TX PIO VV0_IO I_S_HMI I_SL_HMI V_V0 I_S_TYPE I_SL_TYPE V_V0 Fairchild FUS0 0x,0x US-Type Mux 00kHz,00KHz,MHz fast mode+ I GPIO_/I_S GPIO_/I_SL PMUIO VV0_IO I_S_TP I_SL_TP T_S T_SL V_V0 Silead GSL0 0x0 V_V0 T Touch panel Encryption Other pin function V_V0 I GPIO_/M_RXER/I_S GPIO_/M_LK/I_SL PIO VV_LN Other pin function VV_S I GPIO_/SPI_RX/IF_HREF/I_S GPIO_/SPI_TX/IF_LKIN/I_SL PIO VV_IO Other pin function VV_VP I GPIO_/VOP_/IF_/I_S GPIO_0/VOP_LK/IF_VSY/I_SL PIO VV_IO Other pin function I GPIO_/I_S GPIO_/I_SL PMUIO VV0_IO Other pin function I Map IO_J reate ate: Monday, November, 0 Modify ate: Wednesday, November 0, 0 REV: V0

3 RK Power omain Map Part Port omain Pin name in datasheet I/O type Power supply Power source Part PMUIO pmuio_gpio0ab.v only VV_PMUPLL RK0 VLO Part E PMUIO pmu0_gpioabcd.v(efault).0v V_V V_V0 RK0 VLO RK0 VLO Part I PIO gmac_gpioabc.v only VV_S RK0 VSW Part L PIO bt_gpioab.v(efault).0v VV_VP RK0 VLO Part G PIO wifi/bt_gpiocd.v only VV_S RK0 uck Part K PIO gpio0_gpiocd.v.0v(efault) V_V VV0_IO RK0 VLO RK0 VLO Part J PIO audio_gpiod_gpioa.v(efault).0v VV_OE RK0 VLO Part F SMM0 sdmmc_gpiob.v.0v(efault) V_SIO RK0 VLO Power omain Map IO_J reate ate: Monday, November, 0 Modify ate: Wednesday, November 0, 0 REV: V0

4 RK Power Tree V_SYS LP/SY0 UK,PWM,<u shutdown VV_SYS EN always ON SY0 UK,PWM,<u shutdown V_0V VV_SYS V0V_PMUPLL V of PMU PLL S0/S/OFF <.m/0u/t u TT_.V/00m <u shutdown POWER SWITH WNM0 N-MOSFET.,mR@.V mr@.v V0V_S ON VV_SYS OFF PMI_SLEEP V0V_L V0V_EMM V of EP phy V of EMM TRL ORE LL T m/0u/t u <.m/0u/t u OV of SI amera TT_.V/00m <u shutdown PT0EE- LO.V/00m <u shutdown PT0EE- LO.V/00m <u shutdown V_EFUSE EFUSE_VQPS_EN_H VV_S VV_L VV_ VV_PIE VV_IO VV_US VV_US V of EFUSE V of HMI phy V of SR V of PIE phy V of PLL V of US.0 phy V of TYPE phy User/OFF/OFF <m/0.u/0u V of SI amera onnector PMI RK0 VSW,00mohm T u shutdown VV_S VV_US VV_US VV_RGMII VV_IO VV_EMM V of US.0 phy V of US TYPE phy V/V of ethernet phy VIO of PIO ORE V of EMM FLSH S0/S/OFF S0/S/OFF S0/S/OFF S0/S/OFF S0/S/OFF T m/0.m/t u PMI RK0 VSW,00mohm VV_S0 T u shutdown SY0 UK,PWM V_LOG V of SO Logic S0/S/OFF <00m/m/0u,<u shutdown VV_SYS PMI RK0 UK V_ENTER,0.-.V V of SO center T u shutdown dapter V _V TPS00 UK V/,Vin=-V V_SYS V PMI RK0 UK,.-.V T u shutdown V_V MPS UK.V/,Vin=.-V SY UK.V/,Vin=.-V VV_G PIE_V G/G Module PIE Interface evice POWER SWITH WNM0 N-MOSFET.,mR@.V mr@.v TT0 LO J/00m 0.u shutdown VV_S ON VV_SYS OFF PMI_SLEEP V0V_S VV_S VV_L V of EP/MIPI TX phy VV_EMM V of EMM RTL VV_EMM VQ of EMM FLSH IO VV_IO_ VPST of PIO VV_IO_ V of PIO VV_WIFI VIO of WIFI+T module VV_US V of US TYPE phy VV_US V of US.0 phy V0V_L V of HMI phy V0V_PIE V of PIE phy V0V_R V of R PLL V0V_PMUPLL V of PMU PLL S0/S/OFF <.m/0u/t u m??/t u/t u m/0u/t u <0.m/<.m/T u POWER SWITH WNM0 P-MOSFET.,mR@.V mr@.v FN_V V of FN PMI RK0 LO 0m,0.-.V T u shutdown PMI RK0 UK.,.0-.V T u shutdown V_V V_R VPST of PIO/PMUIO V of R TRL V/V of xbit R S0/S/OFF S0/S/OFF <0m/<.m/T u onnector POWER SWITH WNM0 N-MOSFET.,mR@.V mr@.v V_R ON VV_SYS OFF PMI_SLEEP VQ of xbit R <m/0u/t u PMI RK0 UK,0.-.V T u shutdown V_PU_L V of Quard- <00m/T m/t u PMI RK0 UK,0.-.V T u shutdown PMI RK0 LO 00m,.-.V T u shutdown V_PU_ V_V0 V of ual- VV0_RK0_IO V of RK0_IO VV0_onector V of other VV0_IO V of PIO/PMUIO <00m/T m/t u RT0-0 LO VV0_S S/TF ard T m/0u/t u.0v/00m <u shutdown VV_SYS PMI RK0 LO 0m,.-.V T u shutdown V_SIO VIO of SMM0 PMI RK0 LO 00m,0.-.V T u shutdown VV_OE VIO/VPST of PIO VIO of OE S0/S/OFF S0/S/OFF <.m/0u/t u T m/0u/t u PMI RK0 LO VV_VP 0m,.-.V V/VIO of VP amera <.m/0u/t u T u shutdown onnectoe power amplifier US HU SY0 Switch VV0_TYPE0_EN VUS_TYPE SY0 Switch VV0_HOST_EN VV0_HOST SY0 Switch VV0_HOST_EN VV0_HOST SY0 Switch VV0_HOST_EN VV0_HOST0.V/00m <u shutdown TT- F_.V/00m <u shutdown TT- V_MIPI PMI RK0 LO 0m,.-.V T u shutdown PMI RK0 LO 00m,0.-.V T u shutdown PMI RK0 LO 00m,.-.V T u shutdown SYR UK T u shutdown VV_VP VV_PMUPLL VV0_OE V_GPU OV of VP amera V/VPST of PIO V of PMUIO V of PMU V of odec V of Mali T0MP S0/S/OFF S0/S/OFF <00m??/T m/t u <.m/<m/t u VUS US TYPE port VUS US HOST port VUS US HOST port VUS US HOST0 port FV of SI amera V of SI amera SYR UK T u shutdown PT0EE-.V/00m <u shutdown RT TT V V_PU_ MU_V V of ual- V of MU V_RT POWER SWITH WNM P-MOSFET VPP_OTP.,mR@.V mr@.v V of TT, RK0'S RT unit Power Tree IO_J REV: V0 reate ate: Monday, November, 0 Modify ate: Wednesday, November 0, 0

5 lock iagram HMI isplay PNEL TT I0 HMI ep MIPI TX I0 SPIF Opt OTP Reset Over- Temperature Protection IR IN POWER Manage SYSTEM POWER PIE PIE evice V/.KHz K LKIN &RESET IN URT URT EUG.KHz WIFI/T OS M SIO0 URT0 RK Type- US HOST Type- US HU US HOST MER MIPI RX &VP I US HOST0 G/G Module UIO OE IS I SMM0 TF ard GPIO HSI GM emm R0 R I I Touch Panel onnector RGMII PHY emm Flash R R PIE evice lock iagram IO_J reate ate: Monday, November, 0 Modify ate: Wednesday, November 0, 0 REV: V0

6 RT_T PWR_EN.V To V VIN=.V To V _IN V VIN=.V To V V Options _V _V V_SYS IN MU_VV V_RT _V _V US_V V_SYS PWR_EN_SYS PWR_EN PWR_EN_SYS EXT_EN VV0_HOST_EN REV: reate ate: Modify ate: _IN/RT_T _IN/RT_T _IN/RT_T _IN/RT_T IO_J IO_J IO_J IO_J Monday, November, 0 Wednesday, November 0, 0 REV: V0 reate ate: Modify ate: _IN/RT_T _IN/RT_T _IN/RT_T _IN/RT_T IO_J IO_J IO_J IO_J Monday, November, 0 Wednesday, November 0, 0 REV: V0 reate ate: Modify ate: _IN/RT_T _IN/RT_T _IN/RT_T _IN/RT_T IO_J IO_J IO_J IO_J Monday, November, 0 Wednesday, November 0, 0 V0 K /TEST K /TEST K /TEST K /TEST R 0K R00 R 00K R00 00nF 00 U0 /HOLE K /TEST 0 00nF 00 XR uf/v 00 XR 00nF 00 K /TEST M MRK MRK K0 /TEST uf/0v 00 XR R /00K R00 K /TEST K /TEST N SO_ M MRK MRK 0uF/V 00 XR K /TEST R /00K R00 K /TEST 00nF 00 XR K /TEST U TPS00 SOT VIN EN VF GN SW VST uf/0v 00 XR E /ESN E00 R 00K R00 M MRK MRK M MRK MRK TP uf/0v 00 XR K /TEST R0 00K R00 U0 /HOLE 0uF/V 00 XR M MRK MRK uf/v 00 XR E ESN E00 K /TEST R 0K/% R00 M MRK MRK 00nF 00 XR R /0R R00 N SO_ TP 0 uf/0v 00 XR 00nF 00 XR M MRK MRK K /TEST 0uF/V 00 XR K /TEST L MWS0-RMT/ IN-_X_ R K R00 K /TEST J ON R K/% R00 M MRK MRK R 0K R00 U0 /HOLE J ON-PIN- K /TEST K /TEST /N SO_ -0 J -0 K /TEST U TPS00 SOT VIN EN VF GN SW VST 0uF/V 00 XR L MWS0-RMT/ IN-_X_ U0 /HOLE R 0K/% R00 R /0R R00 R /00K R00 K /TEST K /TEST R K/% R00 uf/0v 00 XR R /00K R00 TP TP F MSM00/ MSM00 00nF 00 XR N SO_ TP K0 /TEST PWR_EN EXT_EN

7 MU _V 0uF/V XR 0V 00 R 00K 00nF R00 00 R MU_EN 00K R00 00nF 00 MU_VV U SY VIN EN VF 00nF 00 SOT GN IR_MU SW S U V P. P. P. 00nF 00 JL0-SOP L.uH/ IN_X MU_VV GN P0.0/INT0 P.0 P. R0 00K/% R00 R K/% R00 0uF/0V 00 R 0R R00 PWR_EN_SYS N SO_ PU_ET R 0K R00 % pf 00 R0 0KR00 MU_VV 00nF 00 IR Receiver IR_INT MU_VV IR_MU R 0K R00 R.K R00 V_V MU_VV T SOT R 00R R00 0 IR_V.uF 00 XR 00nF XR 00 IRRX J ON-0 ON-PIN-0 MU_EN PWR_EN_SYS PU_ET TF R VV_SYS.uF 00 XR 0V SPWR_EN SMM0_ SMM0_ SMM0_M SMM0_LK SMM0_0 SMM0_ SMM0_ET_L R 0K R00 % R R R00 % R0 R R00 % R R R00 % R R R00 % R R R00 % E ESXVU E00 U PT0EE-0 SOT IN GN EN R R R00 % E ESXVU E00 OUT E ESXVU E00 P E ESXVU E00 E ESXVU E00 00nF 00 XR V VV0_S E ESXVU E00 E ESXVU E00.uF 00 XR 0V VV0_S VV0_S 0 0uF 00 XR 0V T /T M V LK VSS T0 T G G G G J TF-KT0-00 hz_0_0 00nF 00 XR V Encryption T_RST I_S I_SL VV_SYS R /0K R00 % /0.uF 00 reate ate: Modify ate: VV_SYS IR/SPIF/TF R IO_J V P P P U /T VPP S SL U LPU- SOT VSS P0 P P Monday, November, 0 Wednesday, November 0, 0 V GN I_SL I_S REV: V0 0.uF 00 XR 0V

8 HOST PORT/US.0 VV0_HOST VV0_HOST J0 J0 ON HU_M HU_P R R 0R R00 HU_HOST_M 0R R00 HU_HOST_P uf/0v uf/0v 0.uF ON HU_M HU_P R R 0R R00 HU_HOST_M 0R R00 HU_HOST_P uf/0v uf/0v 0.uF E /ESN U0 /ES0F SOT E /ESN U /ES0F SOT VV0_HOST VV0_HOST J J0 ON HU_M HU_P E /ESN R R U0 /ES0F SOT 0R R00 HU_HOST_M 0R R00 HU_HOST_P uf/0v uf/0v 0.uF ON HU_M HU_P E /ESN R R U ES0F SOT 0R R00 HU_HOST_M 0R R00 HU_HOST_P uf/0v uf/0v 0.uF VV0_HOST J HOST POWER US_V 0uF/0V XR 0V 00 00nF 00 XR V VV0_HOST_EN U SY0 SOT IN VOUT GN EN O R.K/% R00 VV0_HOST 0uF/0V 00 XR 0V ON HU_M HU_P E /ESN R R U /ES0F SOT 0R R00 HU_HOST_M 0R R00 HU_HOST_P uf/0v uf/0v 0.uF US_V U SY0 SOT IN VOUT VV0_HOST J VV0_HOST 0uF/0V XR 0V 00 US_V 0 00nF 00 VV0_HOST_EN XR V GN EN O U SY0 SOT IN VOUT R0.K/% R00 0uF/0V 00 XR 0V VV0_HOST ON HU_M HU_P E /ESN R R U /ES0F SOT 0R R00 HU_HOST_M 0R R00 HU_HOST_P uf/0v uf/0v 0.uF uF/0V XR 0V 00 GN 00nF 00 VV0_HOST_EN EN O XR V U US_V SY0 SOT IN VOUT 0uF/0V XR 0V 00 GN 00nF 00 VV0_HOST_EN EN O XR V R.K/% R00 R.K/% R00 0uF/0V 00 XR 0V VV0_HOST 0 0uF/0V 00 XR 0V HU VV0_HOST_EN HOST_P HOST_M HU_HOST_P HU_HOST_M OVJ OVJ HU_VV 0 0.uF 00 VUSM R0 HU_VV 00K R00 HU_HOST_P HU_HOST_M HU_P HU_M HU_P HU_M R /0R R00 HOST_P R /0R R00 HOST_M R00 0R R00 HU_HOST_P R0 0R R00 HU_HOST_M R0 0R R00 HOST_P R0 0R R00 HOST_M ll 0.uF bypass caps close to I. HU_P HU_M U0 HU_VV US_V 0uF/0V 00nF XR 00 0V XR 00 V US_V 0 0uF/0V 00nF XR 00 0V XR 00 V VV0_HOST_EN VV0_HOST_EN HU_VV 00 RV V_ TESTJ P 0.uF LE M 00 LE P LE M 0.uF HU_VV V_SYS V_ FE_QFP V_ 00 00m / mm LE PU V MU V_O V_ U0 00m VV0_HOST VSS_ REXT SY0 M V SOT 0uF P V_O 0uF/0V IN VOUT 0 EN U0 SY0 SOT IN EN GN O VOUT GN O R.K/% R00 R.K/% R00 0uF/0V 00 XR 0V VV0_HOST 0uF/0V 00 XR 0V, close to V, and V_O pin. V_SYS R V_SYS R 0K R00 0K R00 R, close to Pin OVJ R, close to Pin OVJ 0nF 00 0nF 00 OVJ OVJ HU_HOST_M HU_HOST_P HU_VV LE LE LE OVJ PWRJ OVJ V_ VUSM XRSTJ VSS P M M P V_ M P M P V_ V_PLL XIN XOUT VS_PLL HU_HOST_M HU_HOST_P 0.uF 00 HU_HOST_M HU_HOST_P HU_HOST_M HU_HOST_P 0.uF 00 HU_VV 0.uF 00 VUSM R XIN Y 0.uF 0.uF 00 GNXOUT GN M-0ppm RY_ 00K R00 0uF 00 R 0.uF 00 R HU_VV 0.uF 00.K/% R00 0K R00 HU_HOST_P HU_HOST_M HU_P HU_M HU_VV 00m HU_VV 00m singnal only mil wide R0, and R close to VUSM pin. V_SYS HU_HOST_P HU_HOST_M US.0 Port IO_J REV: V0 reate ate: Monday, November, 0 Modify ate: Wednesday, November 0, 0

9 VV0_TYPE0_EN VV0_HOST_EN US_M US_P US_SSRXN US_SSRXP L0 /MF0H00MFR RP_00 NP RP_00 NP /MF0H00MFR L US_M_ US_P_ US_SSRXN_ US_SSRXP_ TYPE0_M_ TYPE0_P_ TYPE0_RXN_ TYPE0_RXP_ L TYPE0_M /MF0H00MFR RP_00 NP TYPE0_P TYPE0_RXN RP_00 NP /MF0H00MFR TYPE0_RXP L US.0 US_SSTXN US_SSTXP RP_00 NP /MF0H00MFR L US_SSTXN_ US_SSTXP_ TYPETXN TYPETXP L TYPE0_TXN /MF0H00MFR RP_00 NP TYPE0_TXP J V_SYS /0uF/0V /00nF XR 0V 00 XR VV0_HOST_EN 00 V U /SY0 SOT IN VOUT EN GN O R /.K/% R00 VV0_US 0 /0uF/0V 00 XR 0V US_M US_P US_SSRXN US_SSRXP US_SSTXN US_SSTXP /.R /.R /.R /.R /0.uF /0.uF R R R0 R US_M_ US_P_ US_SSRXN_ US_SSRXP_ US_SSTXN_ US_SSTXP_ US0_F_P US0_F_P_ VV0_US VUS - + GN RX- RX+ GN TX- TX+ 0 VUS - + GN RX- RX+ GN TX- TX+ 0 SHELL SHELL SHELL SHELL SHELL SHELL VUS_TYPE TYPE0_M_ TYPE0_P_ TYPE0_RXN_ TYPE0_RXP_.R.R.R.R R R R R TYPETXN 0V XR nF TYPETXP 0V XR 00 00nF TYPE0_M TYPE0_P TYPE0_RXN TYPE0_RXP TYPE0_TXN TYPE0_TXP VV0_US VV0_US VUS_TYPE VUS_TYPE TYPE0 /uf/0v /uf/0v /00nF 00 XR 0V 00 XR 0V 00 XR V E00 /ESN E 0 uf/0v 00 XR 0V 0 uf/0v 00 XR 0V 0 00nF 00 XR V E00 ESN E V_SYS 0uF/0V XR 0V 00 00nF 00 XR V VV0_TYPE0_EN U SY0 SOT IN EN VOUT GN O R.K/% R00 VUS_TYPE 0uF/0V 00 XR 0V 00 00nF 00 XR V US_P_ US_M_ U /ES0F SOT TYPE0_M_ TYPE0_P_ U ES0F SOT VUS_TYPE R 0K % R00 ZTV SO_ R K R00 % 00nF 00 XR V TYPE0_UVUSET US_SSTXP_ US_SSTXN_ US_SSRXP_ US_SSRXN_ 0 OUT OUT OUT OUT U /ES0 SLP0P GN GN IN IN IN IN US_SSTXP_ US_SSTXN_ US_SSRXP_ US_SSRXN_ TYPETXN TYPETXP TYPE0_RXP_ TYPE0_RXN_ IN IN IN IN GN GN OUT OUT OUT OUT 0 U ES0 SLP0P TYPETXN TYPETXP TYPE0_RXP_ TYPE0_RXN_ TYPE-0/US.0 Port IO_J reate ate: Thursday, May 0, 0 Modify ate: Wednesday, November 0, 0 REV: V0

10 HMI INPUT R V_HMIIN R00 00 U OUT Y Vcc OUT Y SOT R IN IN GN R00 U V_HMIIN K K0 0 H V_HMIIN G K V_HMIIN K HMI_RX+ HMI_RX- U NP IN IN OUT OUT 0 HMI_RX+ HMI_RX- HMIIN_V V_HMIIN HMIIN_V R V_HMIIN 00 R R R R R R00 L Y XIN GN GNXOUT RY- R00 R00 R00 R00 R00 L00 00 HMIIN S HMIIN SL HMIIN_E HMIIN_HP V_HMIIN Q SOT R R R R R00 R00 R00 R0 R00 R R00 00 R HMI_RX+ HMI_RX- HMI_RX0+ HMI_RX0- HMI_RX+ HMI_RX- HMI_RX+ HMI_RX- R00 R00 R R00 J E E F F J J H K J G REFLK HMI_P HMI_N HMI_0P HMI_0N HMI_P HMI_N HMI_P HMI_N _S _SL E HPI HPO REXT VPGM IS OUT PLKIN PFIL V V. V. V_MIPI V_PLL VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS E E E E F F F F G G G G J V. V. V V. VIO VIO RESETN TEST STY INT MIPI_P MIPI_N MIPI_0P MIPI_0N MIPI_P MIPI_N MIPI_P MIPI_N MIPI_P MIPI_N _SK _WFS _S0 _S _S _S _OSK I_S I_SL IR K G K J 0 F0 F E0 E 0 0 J H0 H J0 K K G0 K J J GPIO0 /HMIIN_RST R0 R00 R R00 V_HMIIN GPIO /HMIIN_INT MIPI_RX0_LKP MIPI_RX0_LKN MIPI_RX0_0P MIPI_RX0_0N MIPI_RX0_P MIPI_RX0_N MIPI_RX0_P MIPI_RX0_N MIPI_RX0_P MIPI_RX0_N R R00 HMI_UIOLK R R00 HMI_UIOLRK R R00 HMI_UIOSO R R00 HMI_UIOMLK I_S I_SL V_HMIIN R R00 GN GN HMI_RX+ IN OUT HMI_RX- IN OUT U NP HMI_RX0+ IN OUT HMI_RX0- IN OUT HMI_RX+ IN OUT HMI_RX- IN OUT GN GN U NP HMIIN_E IN OUT HMIIN SL IN OUT HMIIN S IN OUT HMIIN_HP IN OUT GN GN 0 0 HMI_RX+ HMI_RX- HMI_RX+ HMI_RX- HMI_RX0+ HMI_RX0- HMIIN_E HMIIN SL HMIIN_HP R HMIIN_V J0 0 0 HMI_US VV0_HOST HMI_RX+ HMI_RX- HMI_RX+ HMI_RX- HMI_RX0+ HMI_RX0- HMI_RX+ HMI_RX- HMIIN_E HMIIN SL HMIIN S HMIIN_HP HMIIN S HOST_M HOST_P 00 HMIIN_V E00 E R R GPIO /HMIIN_INT R R00 ROUT LOUT V_HMIIN V_HMIIN VV_SYS 00 R R00 U IN F/OUT GN SHN P SOT 0 XR 0V 00 V_HMIIN HMI_UIOSO HMI_UIOLK HMI_UIOLRK HMI_UIOMLK R U0 SIN EM/SLK LRK MLK VQ OUTR 0 V GN OUTL FILT+ ROUT LOUT 0 00 V_HMIIN R R Options VV0_HOST E ESN uf/0v uf/0v 0.uF VV_SYS U IN F/OUT V_HMIIN V_HMIIN 00 R R00 GN SHN SOT XR 0V 00 P :V :- :+ :GN US_JK US US.0 HOST_M HOST_P VV0_HOST U ES0F SOT R00 0R R HOST_M F0 HOST_P /FTG00E R00 0R R HU_HOST_M HU_HOST_P VV0_HOST_EN HU_HOST_M HU_HOST_P VV0_HOST_EN V_SYS V_HMIIN U IN F/OUT GPIO_/HMIIN_PWR_EN V_SYS 00 R0 R00 R R00 GN SHN SOT 00 P Options V_SYS 0uF/0V XR 0V 00 00nF 00 VV0_HOST_EN XR V U SY0 SOT IN VOUT GN EN O R.K/% R00 VV0_HOST 0uF/0V 00 XR 0V HMI Port IO_J REV: V0 reate ate: Monday, November, 0 0 Modify ate: Wednesday, November 0, 0

11 HMI OUT U ES0 SLP0P I_SL_HMI I_S_HMI V_V0 V_V0 R 0K % R00 HMI_E V_V0 R.K R00 % R.K R00 % Q WNM0-/TR SOT Q WNM00 SOT VV_SYS Q WNM0-/TR SOT V_SYS N SO_ R 0K % R00 PORT_E N SO_ R.K R00 % _SL R.K R00 % _S HMI_TX_P HMI_TX_N HMI_TX_P HMI_TX_N PORT_E _SL _S PORT_HP HMI_TXP HMI_TXN HMI_TXP HMI_TXN HMI_TX0P HMI_TX0N HMI_TXP HMI_TXN IN IN IN IN U ES0 SLP0P IN IN IN IN GN GN U0 ES0 SLP0P IN IN IN IN GN GN GN GN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT 0 0 R0 0R R00 RP_00 NP /MF0H00MFR R0 0R R00 L R0 0R R00 RP_00 NP /MF0H00MFR R0 0R L R00 0 PORT_E _SL _S PORT_HP HMI_TXP HMI_TXN HMI_TXP HMI_TXN HMI_TX0P HMI_TX0N HMI_TXP HMI_TXN HMI_TXP HMI_TXN HMI_TXP HMI_TXN HMI_TXP HMI_TXN HMI_TX0P HMI_TX0N PORT_E _SL PORT_HP HMI_TXP HMI_TXN HMI_TX0P HMI_TX0N PORT_E _SL PORT_HP J 0 J HMI_ HMI_ /HMI 0 hdmi-0d- HMI_E PORT_HP I_SL_HMI I_S_HMI HMI_TXP HMI_TXN HMI_TXP HMI_TXN _S 0.uF uf HMI_TXP HMI_TXN HMI_TXP HMI_TXN _S E V_SYS ESN E00 V_SYS Options HMI_TX_0P HMI_TX_0N R0 0R R00 RP_00 NP /MF0H00MFR R0 0R R00 L HMI_TX0P HMI_TX0N HMI_TX_P HMI_TX_N R0 0R R00 RP_00 NP /MF0H00MFR R 0R R00 L HMI_TXP HMI_TXN <Title> IO_J reate ate: Wednesday, September 0, 0 Modify ate: Wednesday, November 0, 0 REV: V0

12 OE V_SYS V_SPK VV0_OE VV_OE V_SPK V_REF V_OE VV_OE F 0R R00 0uF/0V 00 VV0_OE.uF 00 VV_OE 0uF 0.uF uF 00 0.uF 00 0.uF 00 0.uF 0uF/0V V_OE ROUT LOUT 0.uF 0.uF V_REF R 0R R00 0.uF 0uF 0.uF R R /0R R00 MI_INP /0R R00 MI_INN LINE_IN_L LINE_IN_R IS_LK R IS_SLK R IS_LRK_TX R IS_LRK_RX R IS_SO0 R IS_SI0 R T_PM_LK R T_PM_SYR T_PM_IN R T_PM_OUT R MIIS uf 00 uf 00 0 uf 00 0 uf 00.uF/0V 00.uF/0V R R00 00 R R00 R R00 R R00 R R00 R R00 R R00 R R00 R R00 R R00 0 U L0 MIIS INP/MI_T INN/MI_T/J INP INN/J VREF VREF MLK LK LRLK T T LK LRLK T T RFE 0 V MIV SPKVR SPKVL V V PV PP PN PP PN 0 PVEE PVPP HPO_L HPO_R HPOF SPO_LP SPO_LN SPO_RP SPO_RN MONON MONOP LOUTR LOUTL MI_SL GIPO/IRQ 0 LO_EN.uF 00 0.uF 00.uF 00.uF 00 HPO_L HPO_R SPK_LP SPK_LN SPK_RP SPK_RN 00 0.uF MI_INP 00 0.uF 0 LINE_OUT_R LINE_OUT_L LO_EN R 0K R00 R0 /0K R00 VV_OE IS_LK IS_SLK IS_LRK_RX IS_LRK_TX IS_SI0 IS_SO0 T_PM_LK T_PM_SY T_PM_OUT T_PM_IN I_S I_SL HP_ET ER_TL GN PGN PGN SL S I_SL_UIO I_S_UIO R 0R R00 R 0R R00 I_SL I_S MI0 J ON_0 con-pin-d0 R0 K R00 R00 K R0 00R MIIS R00 R00 0uF/0V 0.uF MI_INP 00pF 00 MI_INN 00pF 00pF E /ESN E00 E0 /ESN E00 HPO_R HPO_L ERPHONE E E + + R0 uf/.v T_ uf/.v T_ Q WNM0 SOT /0R R0 R00 Q WNM0 SOT ER_TL R 0K R00 R 0K R00 /0R R00 VV_S.uF 00 MIIS R R R00 R0 R0 R0 00K/% HP_ET R00 R0 00K/% R00 R0 R0 0R 0R 0.uF R00 R00 00 R 0 R00 E ESN E00 00nF 00 R00 R.K R R00 MI_INP ROUT LOUT E ESN E00 E ESN E00 E ESN E00 J PJ- LINEIN VV_S R0 LINE_IN_ET 00K R00 LINE_IN_L SPEKER SPK_LP SPK_LN F LMEG0SN L00 F LMEG0SN L00 0pF 00 0pF 00 E /ESN E00 SPK_LP SPK_LN E /ESN E00 J LINE_OUT LINE_OUT_R R 0R R00 LINE_OUT_L R 0R R00 ON J0 PJ- E ESN E00 E0 ESN E00 E ESN E00 R 0R R00 LINE_IN_R R 0R R00 SPK_RP SPK_RN F LMEG0SN L00 F LMEG0SN L00 0pF 00 0pF 00 SPK_RP SPK_RN ON E E J /ESN /ESN E00 E00 LINE_IN_ET E /ESN E00 E /ESN E00 udio odec-l0 IO_J REV: V0 reate ate: Monday, November, 0 Modify ate: Wednesday, November 0, 0

13 WIFI/T MOULE ual NT ual NT0 J 0000 wifi_ant GN NT GN J 0000 wifi_ant GN NT GN 0pF Ohm RF trace.g NT J 0000 wifi_ant GN NT U PS 0 NOTE: efault is P/PS/PS, If using PX, module pin is connected. T_PM_OUT T_PM_IN T_PM_LK T_PM_SY SIO0_0 SIO0_ SIO0_ SIO0_ SIO0_M SIO0_LK URT0_RTS URT0_TX URT0_RX URT0_TS RT_LKO_WIFI T_HOST_WKE_L T_WKE_L T_REG_ON_H WIFI_REG_ON_H WIFI_HOST_WKE_L R0 R R00 NOTE: L, rated current expectation specification. /pf 00 /pf 00 /pf 00 /pf 00 /pf 00 /pf 00 0 P_PU XTL_OUT XTL_IN WL_REG_ON WL_HOST_WKE SIO_T_M SIO_T_LK SIO_T_ SIO_T_ SIO_T_0 SIO_T_ GN0 VIN_LO GN GN WL_NT GN GN GN GN GN GN WL_NT0 GN VIN_LO_OUT PM_SY PM_IN PM_OUT PM_LK LPO GN /PIE_REFLK_N VIO /PIE_REFLK_P VT pF GN R 0R R00 0pF 00 Y GN XIN XOUTGN.MHz-0ppm RY_ P_PU R 0pF 00 /0R R00 WIFI_REG_ON_H WIFI_HOST_WKE_L SIO_M SIO_LK SIO_ SIO_ SIO_0 SIO_.uF 00 0.uF 00 L.uH IN_X SIO_0 SIO_ SIO_ SIO_ SIO_M SIO_LK R R R R R R T_PM_SY T_PM_IN T_PM_OUT T_PM_LK RT_LKO_WIFI R R00 R R00 R R00 R R00 R R00 R R00 00nF 00 00nF 00 SIO0_0 SIO0_ SIO0_ SIO0_ T_HOST_WKE 0 T_WKE T_NT PIE_TP/ PIE_TN/ PIE_RP/ PIE_RN/ URT_TS_N URT_RTS_N URT_RX URT_TX 0 GN T_REG_ON P_P.uF 00.uF 00 SIO0_M SIO0_LK L LMPGSN L00 Note:VT 电电电电.0V~.V, 供电电供供供 00m R 0R R00 V_V T_HOST_WKE_L T_WKE_L URT0_RTS URT0_TS URT0_TX URT0_RX T_REG_ON_H VV_SYS V_V R 0K R00 R 0K R00 R 0K R00 R0 0K R00 R 0K R00 V 0pF 0 L /.uf /.uh IN_X U /LMTL-. SW F GN V_SYS lock External uck Vout V or LO Vout V for PX NOTE: The output current limilt must be larger than 00m for internal P, if using PX. NOTE: efault is P/PS/PS, If using PX, block components is need. SIO0_ SIO0_0 SIO0_ SIO0_ SIO0_M.uF 00 V_V VIN EN MOE 00nF 00 P_PU VV_SYS.uF 00 /.uf 00 WIFI/T-PS IO_J reate ate: Monday, November, 0 Modify ate: Wednesday, November 0, 0 REV: V0

14 PHY_TX0 PHY_TX PHY_TX PHY_TX PHY_TXEN PHY_TXLK M_RX0 M_RX M_RX M_RX M_RXV M_RXLK M_LK M_M M_MIO TN_ TP_ TN_ TP_ TN_ TP_ TN_0 TP_0 R R R R R R R R 0R R00 0R R00 0R R00 0R R00 0R R00 0R R00 0R R00 0R R00 ESXVU E E00 E ESXVU E00 E ESXVU E00 E ESXVU E00 E ESXVU E00 E ESXVU E00 E ESXVU E00 E0 ESXVU TN TP TN TP TN TP TN0 TP0 E00 TN TP TN TP TN TP TN0 TP0 U0 T+ TX+ T- TX- TT TXT TT TXT T+ TX+ T- TX- T+ TX+ T- TX- 0 TT TXT TT TXT T+ TX+ T- TX- 0nF 00 SG0G R R% R00 R R R% R% R00 R00 R0 R% R00 J0 - + TX+ TX- - + RX+ RX TN TN - + RN RN RJS 0/KV GN GN PHY_RST LE_ LE YELLOW RGMII_GR-R 0R R00 % LE_00 0.uF 00 0.uF 00 PHY_PME_.V PHY_INT V_LN LE GREEN RGMII_YE- R0 0R R00 LE_00 % LE0_0 R K R00 PHY_RXV R R00 V_LN 00 pf 00 Y PHY_XTL XOUTGN V0_EPHY V_LN V0_EPHY GN XIN PHY_XTL MHz-0ppm RY_ TP_0 TN_0 TP_ TN_ TP_ TN_ TP_ TN_ 0 pf 00 U MI[0]+ MI[0]- V0 MI[]+ MI[]- VV MI[]+ MI[]- 0 V0 MI[]+ MI[]- REGOUT V_LN PHY_LKOUT VREG PHY_XTL PHY_XTL V0_EPHY RSET ENSWREG GN_EP REGOUT GN LK VREG VREG KXTL KXTL V 0 V0# RSET ENSWREG VV RXTL/PHY RX0/SELRGV V RX/TXLY RX/N0 RX/N RX INT V TX TX0 TX R V_LN PHY_RST VV0 LE/PHY LE0/PHY0 PME LE_RXLY MIO M 0 PHYRST V0 TXTL TX TX R.K% R00 0R R00 LE_ LE0_0 PHY_PME LE_RXLY M_MIO M_M PHYRST PHY_TXEN PHY_TX PHY_TX PHYRST V_LN V0_EPHY V0_EPHY R0 R00 0 0nF 00 R R R R K R00 R R00 R R00 R R00 PHY ddress=00(rtle) onfig for all capability K R00 K R00 R00 LE_ LE0_0 PHY_RX PHY_RX Without RX elay Without TX elay R R00 R K R00 R K R00 LE_RXLYR R00 PHY_RX ENSWREG R K R00 R R00 R 0R R00 onnect ENSWREG to V to enable Switching regulator or connect ENSWREG to GN to disable Switching regulator. V_LN V_LN V_LN V_LN V_LN R 0K R00 V_V PHY_PME_.V PHY_PME R K R00 PHY_INT M_LK R R00 R Q WNM0-/TR SOT R0 K R00 PHY_RX0 R R00 PHY_PME V_LN V_LN PHY_LKOUT R K R00 Pull down for.v RGMII(RTL/E) Pull up for.v RGMII (RTL/E) Pull up. /.V RGMII (RTLE-VL only) V_LN 0 Inductance close to PIN RTLE-V-G PHY_RXV PHY_RX0 PHY_RX PHY_RX PHY_RX PHY_RXLK PHY_INT PHY_TXLK PHY_TX0 PHY_TX REGOUT L.uH/ IN_X V0_EPHY 0uF 00 0.uF 00 0.uF 00 0.uF 00 0.uF 00 0.uF 00 0.uF 00 0.uF 00 V_LN 0 0.uF uF uF 00 0.uF uF uF uF uF 00 V_LN 00 PHY_RX0 PHY_RX PHY_RX PHY_RX PHY_RXLK PHY_RXV R R R R R0 R lose to PHY R R00 R R00 R R00 R R00 R R00 R R00 M_RX0 M_RX M_RX M_RX M_RXLK M_RXV VREG lose to PIN. V_LN 0.uF 00 0.uF 00 VV_S.uF 00 L0 LMPGSN L00.uF 00 V_LN 0.uF 00 RJ-000M-RTLE IO_J reate ate: Monday, November, 0 Modify ate: Wednesday, November 0, 0 REV: V0

15 FN PWR_EN_SYS L_EN _V 0.uF 00 R R0 0K R00 /0K R00 R 00K R00 R 00K R00 Q WPM0-/TR SOT R 0K R00 0uF 00 FN_V 0 N SO_ FN_INT R Q0 VV_S K/% 00 R00 SOT R 00K/% R00 E /ESN E00 N SO_ E R 0R R00 0uF 00 J ON-PIN- ON-PIN- /ESN E00 R 00K R00 FN_V KEY RESET_L MU_EN PE_RST OTP_RST R R R R PWR_KEY_L POWER_ON VV_S REOVER 00R R00 00R R00 00R R00 /00R R00 R R 0K% R00 N SO_ N SO_ N SO_ N SO_ N SO_ 0R R00 R nf 00 0R R00 RESET R R PWR_ONR R REOVER_KEY E ESN E00 0R RES R00 /0R PWR R00 /0R RES R00 0R PWR R00 KEY E ST_R ESN E00 KEY _IN0 J0 ON ST_R ON-d00 J ON_0 con-pin-d0 R 0K/% R00 REOVER_KEY PWR_ON PWR VV_S _IN0 E ESN E00 EUG LE URTG_TX R 00R R00 URT_TX VV_SYS Q WPM0-/TR SOT VV_SYS Q WPM0-/TR SOT ZTV SO_ 0 0.uF 00 R 00K R uF 00 R 00K R00 VV_SYS R0 0K R00 R0 00R R00 R00 0K R00 R0 00R R00 URTG_RX R0 0K R00 0 N SO_ URT_RX GPIO_/IY_LE R0 0K R00 R0 00K R00 Q 00 SOT LE LE R0 GPIO_/WORK_LE GREEN LE_00 0K R00 R0 00K R00 Q 00 SOT LE LE LUE LE_00 E ESN E00 E URT_TX URT_RX ESN E00 URT_TX URT_RX J ON-PIN- ON-PIN- LE LE J0 ON ON-0 KEY/LE/EUG/FN IO_J reate ate: Monday, November, 0 Modify ate: Wednesday, November 0, 0 REV: V0

16 MINI PIE-G/G M.NGFF _V VV_SYS GPIO_/G_PWR_EN uf/v 00 R0 /0KR00 R 0K R00 0.uF 00 R M 0.uF R0000 R 00K R00 R 0K R00 U MPS IN ST R0 0R R00 0.uF 00 EN SW V M F R K% R00 GN L.uH/ IN-X R0 0.K% R00 R K% R00 0 pf 00 uf 00 VV_G uf 00 0.uF 00 VV_SYS _V GPIO0_/PIE_PWR_EN R /0KR00 R 0K R00 0uF/V XR 0V 00 00nF 00 R M R00 U SY VIN EN VF SOT SW S GN 00nF 00 L.uH/ IN-X R 00K/% R00 R0.K/% R00 pf 00 PIE_V uf/0v nF 00 HOST0_P HOST0_M G_US_P G_US_M VV_G 0 VV_G J MINI_PIE_P_H GN GN GN0 0 GN GN GN GN V_V_ V_V_ GN PM_LK PM_OUT PM_IN PM_SY UIM_PWR UIM_T UIM_LK UIM_RST VV_G VV_G VV_G 0.uF 00 PE_RST 0.uF 00 RT_LK_OUT PIE_WKE PIE_LKREQ PIE_RST PIE_V PIE_V PIE_V PIE_V R 0K R00 PIE_V PIE_V PIE_V PIE_V PIE_V PIE_V J M._NGFF_M_KEY V# V# V# SUSLK/KHZ PEWKE# LKREQ# PERST# EVSLP 0 V# V# V# V# S/SS# V# V# GN GN GN -PIE/GN-ST PIE M. NGFF M-KEY SOKET GN REFLKP REFLKN GN PETP0 PETn0 GN PERP0 PERn0 GN PETp PETn GN PERp PERn GN PETp PETn GN0 PERp PERn GN PETp PETn GN PERp PERn GN GN 0.uF00 0.uF00 0.uF00 0.uF uF00 0.uF 0.uF PIE_REF_LKP PIE_REF_LKN PIE_TX0P PIE_TX0N PIE_RX0_P PIE_RX0_N PIE_TXP PIE_TXN PIE_RX_P PIE_RX_N PIE_TXP PIE_TXN PIE_RX_P PIE_RX_N PIE_TXP PIE_TXN PIE_RX_P PIE_RX_N uf 00 uf 00 uf 00 UIM_PWR G G G G G G G 0 MINI_PIE_P GN GN.V_UX GN UIM_PWR UIM_T 0 UIM_LK UIM_RESET GN W_ISLE_N 0 PERST# GN 0 0 GN US_- US_+ 0 GN LE_WWN 0 GN V_V_ PE_RST G_US_M G_US_P uf 00 R 0K R00 0.uF 00 uf 00 S/SS 00 0.uF00 UIM_RST UIM_LK UIM_T pf 00 pf 00 pf 00 E R /K R00 ESN E00 E ESN E00 E0 R /K R00 ESN 0uF 00 E00 0.uF 00 R K R00 J V GN RST VPP LK I/O MIRO-SIM-PIN MIRO-SIM-PIN GN GN GN GN S/SS R0 0K R00 R K R00 PIE_V R 0K R00 Q 00 SOT R K PIE_V R00 R 0R R00 LE LUE LE_00 Q 00 SOT uf XR _V 00 PIE_V PIE_V PIE_V 00nF XR _V 00 0 uf XR _V 00 00nF XR _V 00 00nF XR _V 00 G-G-MOULE/M.NGFF-PIE IO_J reate ate: Monday, November, 0 Modify ate: Wednesday, November 0, 0 00nF XR _V 00 REV: V0

17 MIPI RX MER MIPI MER J Front-amera V_SYS 0uF/0V 00 0.uF 00 V_SYS IF_PWR VP_PWR GPIO_/VP_PN_H MIPI_RX0_P MIPI_RX0_N MIPI_RX0_P MIPI_RX0_N MIPI_RX0_LKP MIPI_RX0_LKN MIPI_RX0_P MIPI_RX0_N MIPI_RX0_0P MIPI_RX0_0N I_S_M I_SL_M MIPI_RST MIPI_MLK0 J Front-amera FP_PIN_0 GN SIO_ V SIO_ RESET VSY PWN 0 HREF V OV Y XLK Y GN Y PLK Y 0 Y Y Y Y Y Y0 GN GN R0 /0K R00 OE GN V_SYS 0uF/0V 00 X V OUT VV_VP /SOSHF-MHZ-.V RY_0 0.uF 00 /0.0uF 00 R /R R00 % MIPI_MLK0 /pf/0v 00 0G V_SYS IF_PWR VP_PWR GPIO_0/VP_PN0_H MIPI_TX/RX_P MIPI_TX/RX_N MIPI_TX/RX_P MIPI_TX/RX_N MIPI_TX/RX_LKP MIPI_TX/RX_LKN MIPI_TX/RX_P MIPI_TX/RX_N MIPI_TX/RX_0P MIPI_TX/RX_0N I_S_M I_SL_M MIPI_RST MIPI_MLK0 FP_PIN_0 GN SIO_ V SIO_ RESET VSY PWN 0 HREF V OV Y XLK Y GN Y PLK Y 0 Y Y Y Y Y Y0 GN GN I_SL I_S R 0R R00I_SL_M R 0R R00I_S_M GPIO_/SPI_LK R /R R00 % MIPI_MLK0 /pf 00 0G 0V MIPI_TX VP_PWR IF_PWR MIPI_RST I_SL I_S I_SL I_S I_SL_TP I_S_TP V_SYS V_SYS V_V0 /0uF/0V 00 /0uF/0V 00 /0uF/0V 00 /0.uF 00 /0.uF 00 /0.uF 00 I_I R /0K R00 V_SYS V_SYS V_SYS V_V0 L_EN TP_INT L_EN L_L_PWM L_RST TP_RST MIPI_TX0_0P MIPI_TX0_0N MIPI_TX0_P MIPI_TX0_N MIPI_TX0_LKP MIPI_TX0_LKN MIPI_TX0_P MIPI_TX0_N MIPI_TX0_P MIPI_TX0_N I_S_TP I_SL_TP J I_SL I_S R 0R R00 R 0R R00 I_SL_TP I_S_TP /FP-0PIN-0 VP/MIPI Interface IO_J reate ate: Monday, November, 0 Modify ate: Wednesday, November 0, 0 REV: V0

18 onnector R 0R R00 IS0_LK IS_LK IS0_LRK_TX IS0_LRK_RX IS0_SI0 IS0_SLK IS0_SLK IS0_LRK_TX IS0_SO0 IS0_SO J 0 ON-XPIN-0 0 IS0_LK IS0_LRK_RX IS0_SI0 IS0_SO IS0_SO.0V 电电 VV_SYS 0 0uF/0V 00 00nF 00 V_SYS 0uF/0V 00 00nF 00 IS0_SO IS0_SO IS0_SO IS0_SO0 I_S I_SL TP_RST_.V L_RST I_SL_TP I_S_TP ON J I_S I_SL VV_SYS VV_SYS 0uF/0V 00 00nF 00 ON J VV_SYS ON J V_SYS ep V_SYS 0uF/0V 00 00nF 00 V_V0 TP_INT TP_RST I_SL_TP I_S_TP ON_0 J TP_INT R 0K R00 V_V0 V_V V_V0 J _V L_EN L_L_PWM0 V_L V_V0 0uF/0V 00 00nF 00 EP_TX0N EP_TXN EP_TXN EP_TXN EP_UXN V_V0 V_L JP V V GN GN GN GN UX- UX+ GN GN V HP 0 0PINX-.0mm dip0x-d0 V_L EP_TX0P EP_TXP EP_TXP EP_TXP EP_UXP L_HP R 0K R00 TP_RST_.V Q WNM0-/TR SOT R /0R R00 R 0K R00 TP_RST ON_0 0uF/0V 00 00nF 00 L_EN GPIO_/IF_ R0 0R R00 R /0R R00 L_HP ep Interface/onnector IO_J reate ate: Monday, November, 0 Modify ate: Wednesday, November 0, 0 REV: V0

19 V_SYS J V_SYS_ V_SYS_ V_SYS_ V_SYS_ V_SYS_ V_SYS_ V_SYS_ V_SYS_ V_SYS_ GN_ GN_ GN_ GN_ 0 GN_ GN_ GN_ GN_ GN_ M_LK M_LK PHY_RST PHY_RST PHY_PME_.V PHY_PME_.V M_MIO M_MIO M_M M_M PHY_INT PHY_INT PHY_TXEN PHY_TXEN PHY_TX PHY_TX PHY_TX PHY_TX PHY_TX PHY_TX PHY_TX0 PHY_TX0 PHY_TXLK PHY_TXLK M_RXV M_RXV M_RX0 M_RX0 M_RX M_RX M_RX M_RX M_RX M_RX M_RXLK M_RXLK GPIO_/SPI_Sn0 T_RST GPIO_/VP_PN_H GPIO_/IY_LE GPIO_/HMIIN_PWR_EN GPIO_/URT_PWR_EN GPIO_/IF_ GPIO_/G_PWR_EN GPIO_/WORK_LE GPIO_/SPI_RX GPIO_0/VP_PN0_H GPIO_/SPI_TX GPIO_/SPI_LK VV_VP VV_VP TP SPI_RX/URT_RX SPI_TX/URT_TX SPI_LK/GPIO U SPI_Sn0/GPIO U PIE_REF_LKP PIE_REF_LKP PIE_REF_LKN PIE_REF_LKN PIE_TX0N PIE_TX0N PIE_TX0P PIE_TX0P PIE_RX0_N PIE_RX0_N PIE_RX0_P PIE_RX0_P PIE_TXN PIE_TXN PIE_TXP PIE_TXP PIE_RX_N PIE_RX_N PIE_RX_P PIE_RX_P PIE_TXN PIE_TXN PIE_TXP PIE_TXP PIE_RX_N PIE_RX_N PIE_RX_P PIE_RX_P PIE_TXN PIE_TXN PIE_TXP PIE_TXP PIE_RX_N PIE_RX_N PIE_RX_P PIE_RX_P WK_RST SPWR_EN I_S I_S I_SL I_SL PWR_EN PWR_EN POWER_ON POWER_ON PU_ET PU_ET IR_INT IR_INT GPIO0_/PIE_PWR_EN RESET_L RESET_L GPIO0 /HMIIN_RST MIPI_RST MIPI_RST PWR_KEY_L PWR_KEY_L GPIO_/RESX HMI_E HMI_E PORT_HP PORT_HP I_SL_HMI I_SL_HMI I_S_HMI I_S_HMI WK_INT RT_LK_OUT RT_LK_OUT T_HOST_WKE_L T_HOST_WKE_L T_WKE_L T_WKE_L URT0_RTS URT0_RTS URT0_TS URT0_TS URT0_TX URT0_TX URT0_RX URT0_RX T_REG_ON_H T_REG_ON_H SIO0_ SIO0_ SIO0_0 SIO0_0 SIO0_ SIO0_ SIO0_ SIO0_ SIO0_LK SIO0_LK SIO0_M SIO0_M WIFI_HOST_WKE_L WIFI_HOST_WKE_L WIFI_REG_ON_H WIFI_REG_ON_H RT_LKO_WIFI RT_LKO_WIFI EXT_EN EXT_EN OTP_RST OTP_RST TP TYPE_I TP TYPE0_I TP_INT TP_INT L_RST L_RST URTG_TX URTG_TX URTG_RX URTG_RX TP_INT PIE_LKREQ PIE_LKREQ PIE_RST PIE_RST PIE_WKE PIE_WKE L_L_PWM L_L_PWM L_L_PWM0 L_L_PWM0 VV0_OE VV_OE IS0_SLK IS0_SLK IS0_LRK_RX IS0_LRK_RX IS0_LRK_TX IS0_LRK_TX IS0_SI0 IS0_SI0 IS0_SO IS0_SO IS0_SO IS0_SO IS0_SO IS0_SO IS0_SO0 IS0_SO0 IS_LK IS_LK IS_SLK IS_SLK IS_LRK_RX IS_LRK_RX IS_LRK_TX IS_LRK_TX IS_SI0 IS_SI0 IS_SO0 IS_SO0 I_S I_S I_SL I_SL ER_TL ER_TL GN_ VV_SYS_ GPIO_/M_LK/I_SL_U.V VV_SYS_ GPIO_/M_RS/IF_LKOUT/URT_TX_U VV_SYS_ GPIO0_/RIO_PWROFF/TP EN_U.V VV_S_ GPIO_/M_MIO/URT_TX_U VV_S_.V 0 GPIO_0/M_M/SPI0_SN_U VV_S_ GPIO_/M_RXER/I_S_U GN_0 GN_ V_V0_ GPIO_/M_TXEN/URT_RX_U V_V0_ GPIO_/M_TX/SPI_TX_ V_V_ 0 GPIO_0/M_TX/SPI_RX_.V V_V_ GPIO_/M_TX/SPI0_TX_ V_RT GPIO_/M_TX0/SPI0_RX_ VV_S GPIO_/M_TXLK/URT_RTSN_U GN_ GN_ EP_UXN GPIO_/M_RXV_ EP_UXP 0 GPIO_/M_RX0/SPI0_LK_U GN_ GPIO_/M_RX/SPI0_SN0_U.V EP_TX0N GPIO_/M_RX/SPI_LK_U EP_TX0P GPIO_/M_RX/SPI_SN0_U GN_ GPIO_/M_RXLK/URT_RX_U EP_TXN 0 GN_ EP_TXP GPIO_/SPI_SN0_U GN_ GPIO_0/VOP_0/IF_0/I_S_U EP_TXN GPIO_/VOP_/IF_/I_SL_U EP_TXP 0 GPIO_/VOP_/IF GN_ GPIO_/VOP_/IF EP_TXN GPIO_/VOP_/IF.V EP_TXP GPIO_/VOP_/IF GN_ GPIO_/VOP_/IF.V GPIO_0/M_OL/URT_TSN/SPIF_TX_U 0 GPIO_/VOP_/IF_/I_S_U GN_ GPIO_/SPI_RX/IF_HREF/I_S_U.V GPIO0_/TP_VUS_IS_ GPIO_0/VOP_LK/IF_VSY/I_SL_U GPIO0_/SMM0_ET_U GN_ GPIO_/SMM0_/PJTG_TK_U GPIO_/SPI_TX/IF_LKIN/I_SL_U.V GPIO_/SMM0_/PJTG_TMS_U GPIO_/SPI_LK/VOP_EN/IF_LKOUT_U GPIO_/SMM0_M/MUJTG_TMS_U 0.V &.0V GN_ GPIO_/SMM0_LKOUT/MUJTG_TK_ VV_VP GPIO_0/SMM0_0/URT_RX_U VV_VP GPIO_/SMM0_/URT_TX_U V(V-V) GPIO_/ISP0_SHUTTER_TRIG/ISP_SHUTTER_TRIG/TP_0_VONN_EN_ GPIO_/SPI_RX/URT_RX_U GPIO_/ISP0_PRELIGHT_TRIG/ISP_PRELIGHT_TRIG_ 00.0V GPIO_0/SPI_TX/URT_TX_U.0V GPIO_/ISP0_FLSHTRIGOUT/ISP_FLSHTRIGOUT_ 0 GPIO_/SPI_LK/PMU_JTG_TK_U GPIO_0/ISP0_SHUTTER_EN/ISP_SHUTTER_EN/TP_VUS_SINK_EN_ 0 0 GPIO_/SPI_SN0/PMU_JTG_TMS_U TYPE0_UVUSET 0 GN_ TYPE_UVUSET PIE_RLK_00M_P GPIO_/TP_VUS_SOURE0_ 0.0V PIE_RLK_00M_N GPIO_/TP_VUS_SOURE_ GN_.V GPIO_/SIO0_KPWR_ PIE_TX0_N _IN PIE_TX0_P _IN 0 GN_.V _IN0 PIE_RX0_N _IN PIE_RX0_P _IN GN_0 GN_ PIE_TX_N HOST_M PIE_TX_P HOST_P 0 GN_ GN_ PIE_RX_N HOST0_M PIE_RX_P HOST0_P GN_ GN_ PIE_TX_N TYPE_UXP 0 PIE_TX_P TYPE_UXM GN_ GN_0 PIE_RX_N TYPE_TXM PIE_RX_P TYPE_TXP 0 GN_ GN_ PIE_TX_N TYPE_RXP PIE_TX_P TYPE_RXM GN_ GN_ PIE_RX_N TYPE_UXP_P_PU PIE_RX_P TYPE_UXM_PU_P 0 GN_ TYPE_RXM GPIO_/SPI_LK_ TYPE_RXP GPIO_/I_S_U.0V TYPE_TXP GPIO_/I_S_U TYPE_TXM GPIO_/I_SL_U TYPE_P 0 PWR_EN TYPE_M POWER_ON TYPE0_TXM GPIO_0/TP_VUS_SOURE_.0V TYPE0_TXP GPIO0_/PWM_IR_.V TYPE0_RXP GPIO0_/TP_VUS_FIS/TP_VUS_SOURE_ TYPE0_RXM 0 NPOR_U TYPE0_M GPIO0_/WIFI_MHZ_ TYPE0_P GPIO0_0/SMM0_WRPT/TEST_LKOUT_U.V TYPE0_TXM GPIO0_/EMM_PWRON_U TYPE0_TXP GPIO_/SIO0_PWREN_ TYPE0_RXP 0 GPIO_/HMI_EINOUT/EP_HOTPLUG_U.0V TYPE0_RXM PORT_HP TYPE0_UXP GPIO_/I_SL/URT_TX_U TYPE0_UXM GPIO_0/I_S/URT_RX_U.V TYPE0_UXM_PU_P GPIO_/ISP0_FLSHTRIGIN/ISP_FLSHTRIGIN/TP VONN_EN_ TYPE0_UXP_P_PU 00 0 RT_LK_OUT GN_ GN_ HMI_TXP 0 GPIO0_/SIO0_INTN_ HMI_TXN 0 GPIO_/SIO0_ETN/PIE_LKREQN_U HMI_TXP 0 GPIO_/URT0_RTSN_U HMI_TXN 0 GPIO_/URT0_TSN_U HMI_TX0P GPIO_/URT0_TX_U HMI_TX0N GPIO_0/URT0_RX_U HMI_TP GPIO0_/PMUIO_VOLSEL_.V HMI_TN 0 GPIO_/SIO0_/SPI_TX_U GN_ GPIO_/SIO0_0/SPI_RX_U MIPI_TX0_0P GPIO_/SIO0_/SPI_LK_U MIPI_TX0_0N GPIO_/SIO0_/SPI_SN0_U GN_ GPIO_/SIO0_LKOUT/TEST_LKOUT_U MIPI_TX0_P GPIO_0/SIO0_M_U MIPI_TX0_N 0 GPIO0_/SIO0_WRPT_ GN_ GPIO0 MIPI_TX0_LKP GN_ MIPI_TX0_LKN RT_LKO_WIFI GN_ EXT_EN MIPI_TX0_P 0 OTP_RST MIPI_TX0_N TYPE_I GN_ TYPE0_I MIPI_TX0_P GPIO MIPI_TX0_N 0 GPIO GN_ GPIO_/URT_TX_U MIPI_RX0_0P GPIO_/URT_RX_U MIPI_RX0_0N GPIO GN_0 GPIO_0/PIE_LKREQN_U.0V MIPI_RX0_P GPIO_/P_HOTPLUG_ MIPI_RX0_N 0 GPIO GN_ GPIO_/PWM_ MIPI_RX0_LKP GPIO_/PWM0/VOP0_PWM/VOP_PWM_ MIPI_RX0_LKN VV0_OE_ GN_ VV0_OE_ MIPI_RX0_P 0 VV_OE_ MIPI_RX0_N VV_OE_ GN_ GN_ MIPI_RX0_P GPIO_0/IS0_SLK_ MIPI_RX0_N 0 GPIO_/IS0_LRK_RX_ GN_ GPIO_/IS0_LRK_TX_ MIPI_TX/RX_P GPIO_/IS0_SI0_ MIPI_TX/RX_N GPIO_/IS0_SISO_ GN_ GPIO_/IS0_SISO_ MIPI_TX/RX_P GPIO_/IS0_SISO_.V MIPI_TX/RX_N 0 GPIO_/IS0_SO0_ GN_ GPIO_0/IS_LK_ MIPI_TX/RX_LKP GPIO_/IS_SLK_ MIPI_TX/RX_LKN GPIO_/IS_LRK_RX_ GN_ GPIO_/IS_LRK_TX_ MIPI_TX/RX_P 00 GPIO_/IS_SI0_ MIPI_TX/RX_N 0 0 GPIO_/IS_SO0_ GN_ GN_0 MIPI_TX/RX_0P 0 GPIO_/I_S_U.V MIPI_TX/RX_0N 0 GPIO_/I_SL_U GPIO_/SPIF_TX_.0V GN_ GN_0 GN_ GN_ GN_ GN_ VV_SYS VV_S V_V0 V_V V_RT VV_S EP_UXN EP_UXN EP_UXP EP_UXP EP_TX0N EP_TX0N EP_TX0P EP_TX0P EP_TXN EP_TXN EP_TXP EP_TXP EP_TXN EP_TXN EP_TXP EP_TXP EP_TXN EP_TXN EP_TXP EP_TXP MIPI_PWR_EN TP_RST_.V TP_RST_.V SMM0_ET_L SMM0_ET_L SMM0_ SMM0_ SMM0_ SMM0_ SMM0_M SMM0_M SMM0_LK SMM0_LK SMM0_0 SMM0_0 SMM0_ SMM0_ L_EN L_EN L_EN L_EN VV0_TYPE0_EN VV0_TYPE0_EN VV0_HOST_EN VV0_HOST_EN TYPE0_UVUSET TYPE0_UVUSET TYPE_UVUSET IF_PWR IF_PWR VP_PWR VP_PWR GPIO /HMIIN_INT HP_ET HP_ET FN_INT FN_INT _IN0 _IN0 REOVER REOVER LINE_IN_ET HOST_M HOST_M HOST_P HOST_P HOST0_M HOST0_M HOST0_P HOST0_P TYPE_SU TYPE_SU TYPE_TXN TYPE_TXP TYPE_RXP TYPE_RXN TYPE_SU_ TYPE_SU_ US_SSTXN US_SSTXN US_SSTXP US_SSTXP US_SSRXP US_SSRXP US_SSRXN US_SSRXN US_P US_P US_M US_M TYPE0_TXN TYPE0_TXN TYPE0_TXP TYPE0_TXP TYPE0_RXP TYPE0_RXP TYPE0_RXN TYPE0_RXN TYPE0_M TYPE0_M TYPE0_P TYPE0_P TYPE0_TXN TYPE0_TXN TYPE0_TXP TYPE0_TXP TYPE0_RXP TYPE0_RXP TYPE0_RXN TYPE0_RXN TYPE0_SU TYPE0_SU TYPE0_SU TYPE0_SU TYPE0_SU_ TYPE0_SU_ TYPE0_SU_ TYPE0_SU_ HMI_TX_P HMI_TX_N HMI_TX_P HMI_TX_N HMI_TX_0P HMI_TX_0N HMI_TX_P HMI_TX_N MIPI_TX0_0P MIPI_TX0_0P MIPI_TX0_0N MIPI_TX0_0N MIPI_TX0_P MIPI_TX0_P MIPI_TX0_N MIPI_TX0_N MIPI_TX0_LKP MIPI_TX0_LKP MIPI_TX0_LKN MIPI_TX0_LKN MIPI_TX0_P MIPI_TX0_P MIPI_TX0_N MIPI_TX0_N MIPI_TX0_P MIPI_TX0_P MIPI_TX0_N MIPI_TX0_N MIPI_RX0_0P MIPI_RX0_0P MIPI_RX0_0N MIPI_RX0_0N MIPI_RX0_P MIPI_RX0_P MIPI_RX0_N MIPI_RX0_N MIPI_RX0_LKP MIPI_RX0_LKP MIPI_RX0_LKN MIPI_RX0_LKN MIPI_RX0_P MIPI_RX0_P MIPI_RX0_N MIPI_RX0_N MIPI_RX0_P MIPI_RX0_P MIPI_RX0_N MIPI_RX0_N MIPI_TX/RX_P MIPI_TX/RX_P MIPI_TX/RX_N MIPI_TX/RX_N MIPI_TX/RX_P MIPI_TX/RX_P MIPI_TX/RX_N MIPI_TX/RX_N MIPI_TX/RX_LKP MIPI_TX/RX_LKP MIPI_TX/RX_LKN MIPI_TX/RX_LKN MIPI_TX/RX_P MIPI_TX/RX_P MIPI_TX/RX_N MIPI_TX/RX_N MIPI_TX/RX_0P MIPI_TX/RX_0P MIPI_TX/RX_0N MIPI_TX/RX_0N V_SYS 0 0uF/0V 00 XR VV_SYS VV_S V_V0 0uF/0V 00 XR 0uF/0V 00 XR 00nF 00 XR V_V VV_S VV_VP 0 0uF/0V 00 XR 00nF 00 XR 0uF/0V 00 XR VV_VP VV_OE VV0_OE 0uF/0V 00 XR 00nF 00 XR 00nF 00 XR 0uF/0V 00 XR 0 0uF/0V 00 XR 00nF 00 XR 00nF 00 XR 00nF 00 XR 00nF 00 XR 0uF/0V 00 XR 0uF/0V 00 XR 0uF/0V 00 XR 00nF 00 XR 00nF 00 XR 00nF 00 XR ORE_RK 0 S0-S-H_ MXM onnector IO_J reate ate: Wednesday, October, 0 Modify ate: Wednesday, November 0, 0 REV: V0

20 MIPI Panel V_SYS MIPI_PWR_EN 00 0uF 00 R00 R /K 0K U IN LX EN PS0 SOT GN F L00 R.uH-. IN_X K% R0 K% R0 R Vout = 0.V * (+R/R) POWER-V uF 00 V-ORE GN GN GN GN V-ORE 0.uF uF 00 V-ORE V_V GN 0 0.uF 00 V_V 0.uF uF 00 GN.V-.V VV_SYS /0.uF 00 R /0K R00 OE X00 VV_SYS V R /0R R00 REFK VV_SYS GN 0 0.uF 00 V-ORE 0.uF 00 GN GN 0.uF uF 00 GN 0.0uF 00.V.V 0.0uF 00 GN GN 0.0uF uF uF 00 V-ORE ON_ V_L V_L V_L _V V_SYS VV_SYS GN GN OUT /K0.000E00 晶晶默默晶贴 GN MIPI_TX0_0P MIPI_TX0_0N MIPI_TX0_P MIPI_TX0_N MIPI_TX0_LKP MIPI_TX0_LKN MIPI_TX0_P MIPI_TX0_N MIPI_TX0_P MIPI_TX0_N R /0R R00 GPIO_/RESX REFLK I_SL I_S VV_SYS R GN /0K R00 REFLK R R 0R R00 R 0R R00 R 0R R00 R 0R R00 R 0R R00 R 0R R00 R 0R R00 R 0R R00 R 0R R00 R 0R R00 R 0K R00 R00 GN SRX0P SRX0M SRXP SRXM SRXP SRXM SRXP SRXM SRXP SRXM VV_SYS R0 / R00 R R00 R R00 R R 0k R00 00 R00 E G H G H G H G H G H G H U0 STY PWM0 GPIO GPIO GPIO0 RESX EXTLK I_SL I_S TM SRX0P SRX0M SRXP SRXM SRXP SRXM SRXP SRXM SRXP SRXM V_MIPI F TXG/ TXG L-L/ L-LP SI NTL PWR G ORIENTTION LVS LVS LVTXP LVTXN LVTXP LVTXN LVTXP LVTXN LVTXP LVTXN LVTXEP LVTXEN E E F F G G LVTXPR R00 LVTXN R R00 LVTXP R R00 LVTXN R R00 LVTXP R R00 LVTXN R R00 LVTXP R R00 LVTXN R R00 LVTXEP R R00 LVTXEN R R00 LVTXP R R00 LVTXNR R00 LVTXP R R00 LVTXNR0 R00 LVTXPR R00 LVTXNR R00 LVTXPR R00 LVTXNR R00 LVTXEP R0 R00 LVTXEN R R00 First Link O ata (VES) V_L uF 0.uF J0 con-d0_ V V V GN LVS_0N GNGN LVS_N LVS_N LVS_LK0N GNGN LVS_N - + LVS_N LVS_N 0-0+ LVS_N LVS_LKN GNGN LVS_N ON0 pxpx.0mm GN GN GN GN GN GN GN GN GN GN0 GN GN V_MIPI F V_L_ V_L_ H V_L_ V_L_ V_L_ V_L_ VIO VIO F V E V E LVTXP LVTXN LVTXP LVTXN LVTXP LVTXN LVTXP LVTXN LVTXEP LVTXEN LVS_P LVS_N LVS_P LVS_N LVS_P LVS_N LVS_LKP LVS_LKN LVS_P LVS_N LVS_0P LVS_0N LVS_P LVS_N LVS_P LVS_N LVS_LK0P LVS_LK0N LVS_P LVS_N LVS_0P LVS_P LVS_P LVS_LK0P LVS_P LVS_P LVS_P LVS_P LVS_LKP LVS_P TXG E E E F F F H GN MXM onnector IO_J reate ate: Wednesday, May, 0 REV: V0 0 Modify ate: Wednesday, November 0, 0

21 SPI TO URT GN U0 GN WK/VK/GM OSO 0 Y GNXOUT XIN GN.0MHz-0ppm RY_0 pf 00 R M R00 _V V_SYS GPIO_/URT_PWR_EN uf/v 0.uF R /00K R00 R 00K R00 R R0 00K 0.uF M R00 00 R00 R 0K R00 R 0 U 0R 0.uF MPS R00 00 IN ST EN SW V M F R K% R00 GN L.uH/ IN-X R 0.K% R00 R K% R00 pf 00 uf 00 VV_URT uf 0.uF SPI_Sn0/GPIO U SS OSI VV_URT pf SPI_LK/GPIO U SLK V V 00 ON SPI_TX/URT_TX SIN RX RX VV_URT VV_URT RX_ TX_ VV_URT R.K R00 WK_RST pf 00 VV_URT SPI_RX/URT_RX RX TX VV_URT WK_INT R SOUT RX TX RST V 0 IRQ SSOP0 TX RX TX GN RX TX TX RX TX RX TX VV_URT 0.0uF 0uF close I 0 0.0uF uF 00 RX TX R 0R R00 R 0R R00 R R /0R R00 /0R R00 默默 J0 输输 TTL 串串电电 RX_ TX_ RX_ TX_ J0 输输 TTL 电电, 贴 R,R 输输 RS 电电, 贴 R,R,R,R E0 /ESR E00 E /ESR E E00 E /ESR E E00 VV_URT RX TX J0 ON J0 WK_INT SPI_Sn0/GPIO U SPI_LK/GPIO U SPI_RX/URT_RX SPI_TX/URT_TX R R /0R R00 /0R R00 RX TX.K R00 贴 R,R 时 J0 直直直直直直输输 TTL 电电 (URT) /ESR E00 /ESR E00 URT TO RS VV_URT U MX 0.uF V GN 0.uF 00 E0 E RS_RX RS_TX VV_URT ON + V+ 0.uF 00 J TX RX TX_ 0.uF TIN ROUT TIN V- TOUT RIN TOUT 0 0.uF 00 RS_RX RS_TX RS_RX R /0R R00 RX_ /ESR E00 /ESR E00 RX_ ROUT SOP RIN RS_TX R /0R R00 TX_ SPI PORT URT TO RS R0 VV_URT 0.uF 00 E E RS_ RS_ VV_URT ON VV_SYS 0 0uF/0V nF 00 GPIO_/SPI_LK GPIO_/SPI_Sn0 GPIO_/SPI_RX GPIO_/SPI_TX VV_SYS ON_0 J RX TX R K R00.K R00 Q 00 SOT U MX V RX RE TE GN TX SOI R 0K R00 R 0K R00 RS_ R 0R R00 RS_ /ESR E00 /ESR E00 J udio odec-l0 IO_J REV: V0 reate ate: Monday, July, 0 Modify ate: Wednesday, November 0, 0