rm-mpeg-187g ver1.0-3(1)

Transcription

1 PU UG UG GXM_S9 LI VER:0-0- V_HPLL HPLL_EXT VSS_HPLL VIO_H GPIOH_0 (HMI_HP_O V) GPIOH_ (HMI_S_O V) GPIOH_ (HMI_SL_O V) GPIOH_ (GPIO_O V) GPIOH_ (SPIF_OUT // SPIF_IN) GPIOH_ GPIOH_ (JTG_TK // IS_M_LK) GPIOH_ (JTG_TMS // IS_O_LK_OUT) GPIOH_ (JTG_TI // IS_LR_LK_OUT) GPIOH_9 (JTG_TO // ISOUT_H0) V0V9_HMITX V0V9_HMITX V_HMITX V_HMITX HMI_EXT HMI_REXT J0 VIO_O 9 uf_.v HPLL_EXT 9 uf_.v N0 F E E F M M9 M M N N G9 H0 F0 0 HMI_HP HMI_S HMI_SL V_EE V.V 9 uf_.v 9 lose to PIN G9 VIO_O HMI_V_ [] SPIF [0] MUTE [0] TK [] TMS [] TI [] TO [] 99 uf_.v 9R K_% V_HMI 9 0.uF HMI output Layout 叠放 HMI_TXN HMI_TXP HMI_TXN HMI_TXP Layout 叠放 HMI_TX0N HMI_TX0P HMI_TXN HMI_TXP 9R 9R9 L N/MEP900F M00-P 9R 9R9 L L N/MEP900F M00-P 9R 9R N/MEP900F M00-P L N/MEP900F M00-P TXN TXP TXN TXP TX0N TX0P TXN TXP TXN TXP TXN TXP 9U 0 9 S S S S G G S S S S RST0P TVS-SLP0P 9U TXN 0 TXP 9 S S S S TX0N G G TX0P S S S S RST0P TVS-SLP0P 9U E 0 HMI_SLK 9 S S S S HMI_ST G G HP S S S S RST0P TVS-SLP0P HMI_PW E HMI_SLK HMI_ST HP TXP TXN TXP TXN TX0P TX0N TXP TXN Type 9J HMI-IP-TYPE--9P HMI-OTT TX+ TXS TX- TX+ TXS TX- TX0+ 9 TX0S TX0-0 TX+ TXS TX- E RSV SL S _ 9 +V HP 90 uf_.v _0 _ 0 Type VSS_HMITX VSS_HMITX VSS_HMITX VSS_HMITX VSS_HMITX G0 H 9R 9R HMITX_KP HMITX_KN HMITX_0P HMITX_0N HMITX_P HMITX_N HMITX_P HMITX_N V_VS VS_OMP VS_VREF VS_RSET VS_IOUT VSS_VS HMI_TXP HMI_TXN HMI_TX0P HMI_TX0N HMI_TXP HMI_TXN HMI_TXP HMI_TXN VIO_O L K0 VS_OMP uf_.v uf_.v 0uF_.V K 9 0.uF L 9R R_% 9R9 R_% L L0 VS Tracy >0mils lose to PU PIN VS [0] HMI_S 9R 0 HMI_PW 9R K_% HMI_ST HMI_PW [] HMI_E VIO_O.V O_V 9R K_% S 9Q WNM00 SOT- G E HMI(power)Spec. +.V < PV < +.V 叠放 VV N/N9 SO 9R R00 9Q N/MT0 SOT- G S HMI_PW G_0P HMI_SL 9R 0 9R K_% HMI_SLK HMI_HP HP Spec. +.V < HP < +.V 9R K HP [] HMIPWR_ 9R N/K 9R 00K 9 nf 9R N/K SHZH GIE ELETRONIS O.,LT HMI&VS Size ocument Number Rev RM-MPEG-G 0. ate: Sheet 0 of

2 S card VIO_O.V VIO_O.V PU UE UE GXM_S9 ard Power LI VER:0-0- V_US_ N9 V_US F V_US_ U0 V_US E US_ is only available in S9 Not available in S90 USOTG VUS 9 USOTG M USOTG P USOTG I US_TXRTUNE E US_VUS USHOST M USHOST P US_TXRTUNE F USHOST M V USHOST P V US_TXRTUNE V9 V.V R9 K US_I US_TXRTR V.V US_TXRT R US_TXRT R uf_.v USOTG M [] USOTG P [] R0 0_% USHOST M [] USHOST P [] 0_% USHOST M [] USHOST P [] 0_% uf_.v VV S_0 S_0_ S S S S_M_ R ET S_LK_ N/Z-0F ES00 S_ lose to PU N/Z-0F ES00 R N /0K R 0K R.K R R N/0pF_NPO S_ S_0 S_ S_ S_ S_M S_ S_LK lose to S R N/Z-0F ES00 S_ uf_.v S_ S_ S_M S_LK S_0 S_ S_ N/Z-0F ES00 J TFWF-EF-X0X TF-KT0-009 T /T M V LK VSS T0 9 T 0 G G G G S_M N/Z-0F ES00 S_LK N/Z-0F ES00 R ET N/nF VSS VSS VSS VSS9 T T9 VIO_O.V VIO_R E 9 R_ (SR_0 // JTG_TO) 0 R_0 (SR_ // JTG_TI) R_ (SR_ // URT_RX_O_) R_ (SR_ // URT_TX_O_) 9 R_ (SR_LK // JTG_LK) R_ (SR_M // JTG_TMS) E R_ G_0P [] PWR_KEY_ET [] KEY H0 Update utton S9(SR_H0) close to PU N/nF R.K R N/K S_0_ S S S S_LK_ S_M_ R ET US V.V [] USOTG M R.K_% SW Update utton T-X-W [] USOTG P [] USHOST M [] USHOST P VV USOTG M USOTG P F FUSE-00m FUSE-00 R R L VV USHOST M USHOST P M0-P N F FUSE-00m FUSE-00 R L R USOTG V USOTG_M USOTG_P US N M0-P 00 uf_.v I/O I/O I/O I/O V RSTVR0 sot- USHOST V USHOST_M USHOST_P 00 uf_.v I/O I/O I/O I/O V RSTVR0 sot- J US/Type/H USHOST VUS - + S S USHOST M USHOST P J US/Type/H USHOST VUS - + S S VV F FUSE-00m FUSE-00 R USHOST M L USHOST P R US US_V 9 00 uf_.v USHOST_M N M0-P USHOST_P I/O I/O I/O I/O V RSTVR0 sot- SHZH GIE ELETRONIS O.,LT US&R&KEY Size ocument Number Rev RM-MPEG-G 0. J US/Type/H USHOST VUS - + S S ate: Friday, ecember,th, 0 Sheet 0 of

3 9 V.V ETH_VIO V.V ETH_V V.V R N/ R00 R _00 R00 R _00 R00 0uF_.V.uF_.V U GXM_S9 G_0P LI VER: ET_TXP ET_TXN 9 0 ET_RXP ET_RXN 0 G ET_TEST_TP E R.9K_% ET_EXTRES F V0V9_ET V0V9_ET V_ET VIO_O R _00 V_ET H 0.uF V0V9_ET V_EE VSS_ET.uF_.V R _00 ETH_VIO P0 00nF uf_.v VIO_Z V RMII_MIO GPIOZ_0 (ETH_MIO // VP_VS // IS_O_LK_IN // TSin VLI_) RMII_MIO V0 RMII_M GPIOZ_ (ETH_M // VP_HS // IS_LR_LK_IN //TSin_SOP_) RMII_M U RMII_LK_IN RMII_LK0 GPIOZ_ (ETH_RMII_0MIN-RGMII_RXLK // ISIN_H // TSin_0_) U RMII_RXV GPIOZ_ (ETH_RX_V // VP_LK // ISIN_H // TSin_LK_) RMII_RXV T9 RMII_RX0 GPIOZ_ (ETH_RX0 // VP_ // ISIN_H // Tsin_fail_) RMII_RX0 T0 RMII_RX GPIOZ_ (ETH_RX // VP_ // ISOUT_H) RMII_RX T RGMII_RX GPIOZ_ (ETH_RX // VP_ // ISO_LK // ISOUT_H) RGMII_RX T RGMII_RX GPIOZ_ (ETH_RX // VP_ // ISO_T // ISOUT_H) RGMII_RX T RGMII_TX_LK GPIOZ_ (ETH_RGMII_TX_LK // VP_ // SPI_SS // MI_IN) RGMII_TX_LK R0 RMII_TX GPIOZ_9 (ETH_TX_ // VP_ // SPI_SS // MI_LK_OUT) RMII_TX R RMII_TX0 GPIOZ_0 (ETH_TX0 // VP_ // SPI_SS0) RMII_TX0 R RMII_TX GPIOZ_ (ETH_TX // VP_9 // SPI_SLK ) RMII_TX R RGMII_TX GPIOZ_ (ETH_TX // SPI_MISO) RGMII_TX P RGMII_TX GPIOZ_ (ETH_TX // SPI_MOSI) RGMII_TX P GPIOZ_ (SPIF_IN // ETH_LINK_LE) RMII_RST# N GPIOZ_ (PWM_ // ETH_T_LE) RMII_INTR [] REGOUT ETH_V0 ecouple Pin ETH_V0 ecouple Pins,, ETH_V ETH_V F 00MHz0ohmecouple Pins,0 F00.uF_.V 9 00nF 00nF [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] RMII_TX RGMII_TX_LK RMII_TX0 RMII_TX RGMII_TX RGMII_TX RMII_M RMII_MIO RMII_INTR RMII_RXV RMII_LK0 RMII_RX0 RMII_RX RGMII_RX RGMII_RX RMII_RST# 00nF 00nF 9 00nF 00nF ETH_VIO ETH_V lose to PU R N/0pF R R R R R lose to PHY R R R R R R R R R.K R0 R R R R 0 00nF 0 00nF R R R R R TX TXLK TX0 TX TX TX M MIO INT_PME RXTL_PHY RXLK_PHY RX0_RXLY RX_TXLY RX_PLLOFF RX_PHY0 RGMII_RST# RGMII (0/00/000Mbps) ETH_V.uF_.V 9.uF_.V REGOUT ETH_V0 R.K L.uH_ L00 R<0mohm 00nF SW_REG 0 RXLK_PHY RXTL_PHY RX0_RXLY RX_TXLY RX_PLLOFF RX_PHY0 INT_PME TXLK TX TX0 TX TX TX MIO M LE_FG_LO LE_FG_LO0 LE0_FG_EXT Phy address 'b00(default) ETH_VIO R R9 R0 9 TP 0pF_%_NPO LKOUT TP00 REG_OUT(O) V(P) V_RG(P) V0(P) ETH_VIO RX/PHY(O/LI/P) RXTL/PHY(O/LI/P) RX0/RXLY(O/LI/PU) RX/TXLY(O/LI/P) RX/PLLOFF(O/LI/P) RX/PHY0(O/LI/PU) 0 INT/PME(O/O) N/.KRXTL_PHY N/.KRXLK_PHY N/.KRX_PHY0 ata from PHY to M 0pF_%_NPO GXTL_IN LKOUT ata from M to PHY TX(I) 9 LE0/FG_EXT(O/LI/P) TXTL(I) R LE/FG_LO0(O/LI/PU) TX0(I) LE/FG_LO(O/LI/P) GXTL_O R _00 GXTL_OUT RTLF-G(SW Mode) RTLF-G(LO Mode) RTLFI-G(SW Mode)Industrial RTLFI-G(LO Mode)Industrial 0-Pin QFN TX(I) Y M/0pF/0ppm LKOUT(O) TX(I) K XTL_IN(I) TX(I) XTL_OUT/EXT_LK(O) MIO(IO/PU) V0[](P) M(I) 9 RSET(O) PHY_RST(I) R.9K_% ETH_V 0 V[](P) V[](P) ETH_V ETH_V ETHPHY_RST# nf E(G) R9 0K RGMII_RST# ETH_VIO TX/RX elay onfig ETH_V0 U RTLF-G QFN0-PT0-Xmm MIP[0](IO) MIN[0](IO) V0[](P) MIP[](IO) MIN[](IO) MIP[](IO) MIN[](IO) V0[](P) MIP[](IO) MIN[](IO) R N/K R K 9 0 ETH_VIO Q PMT90 SOT- MI-I_P_TXP MI-I_N_TXN MI-I_P_RXP MI-I_N_RXN MI-I_P MI-I_N MI-I_P MI-I_N ETH_VIO->.V:R->N ETH_VIO->.V:Q,R,R9->N External.V(default) ETH_V R.K R9.K R.K Internal P MI-I_P_TXP MI-I_N_TXN MI-I_P_RXP MI-I_N_RXN MI-I_P MI-I_N MI-I_P MI-I_N The transformer center tap must be short together M-I_P_TXP M-I_N_TXN M-I_P_RXP M-I_P M-I_N M-I_N_RXN M-I_P M-I_N LE_FG_LO0 LE_FG_LO N/00pF LE0_FG_EXT LE_FG_LO0 LE_FG_LO PJ TX+ RX+ 0 LE+ LE_FG_LO ETH_VIO(V_RG) Voltage onfig ETH_VIO Green LE ETH_V N/00pF USE External.V USE External.V(default) Yellow LE RJ(-P-x-LE) HUXIN RJ-LE 00nF R0 R J GT00 P0 0 9 TX- RX- LE- LE- LE+ LE N/LE R R 9 0 R R00 F 00MHz0ohm R0 _00 R0 R00 R R00 R R00 R,R/R9.K,R R/R/R N M-I_P_TXP M-I_N_TXN R_% M-I_P_RXP M-I_N_RXN R_% M-I_P M-I_N R_% M-I_P M-I_N R_% nf_kv 0 R N/ R,R/R9/R.K,R R/R N R9.K RX0_RXLY PLL Mode(Enable/isable) ETH_VIO R.K RX_PLLOFF R N/.K RX_TXLY Pin Name LE Settings Logical LE IO activelink/linking(tx/rx) Pull-up to disable LPS mode. Pull-up for additional ns delay to TX/RX for data latching LE/FG_LO0 'b0 LE/FG_LO 'b LE[] H LE[] L 00Mbps 000Mbps SHZH GIE ELETRONIS O.,LT Ethernet Size ocument Number Rev RM-MPEG-G 0. Friday, ecember,th, 0 ate: Sheet of 0

4 UH GXM_S9 LI VER:0-0- LORP LORN LOLP LOLN K K R_H_N J H L_H_N VIO_O udio nalog output Vrms to Vrms djustable Gain UVP>.V 00nF R.K R K VV R R 9 uf_.v 0uF_.V [9] VS []LE_G R N/ VL.uH L00 VSO V V ES00 pf_%_npo V V 00pF_%_NPO 00pF_%_NPO N/Z-0F G_0P V_UIO VSS_UIO VSS_UIO G G REFP REFP H J uf_.v uf_.v L_H_N _LH_N 0uF_.V VMI H VMI U TPF 0nF TSSOP--PT0.uF_.V R_H_N _RH_N 0uF_.V R.K_% 0 0PF R0 0PF.K_% R K_% R K_% R K_% +INL +INR R9 K_% PF -INL -INR OUTL OUTR PF UVP UVP S P 0 PV 9 PVSS P N R uf_.v R ML_H MR_H MR_H ML_H [] IR_IN R0 N/ V V ES00 ES00 R R N/0K.nF N/0K N/Z-0F N/Z-0F.nF J V V-OTT VIO_O.V TO PU PIN GPIOH_ [] MUTE MUTE >.V =Enable 0=isable(Mute) R K R.K VRMS=Vpp/ Output.Vp-p(default ) Optical output VV [] SPIF SPIF R N/0K 00nF R R J OPTIL S-PIF IN V N N R9 N/.R N/0uF_.V ES00 SHZH GIE ELETRONIS O.,LT udio Size ocument Number Rev RM-MPEG-G 0. ate: Friday, ecember,th, 0 Sheet 0 of

5 P/RTL9ETV WIFI ONLY P/RTLS WIFI+T P0 WIFI+T+FM P/ WIFI+T+FM (SIO.0) Q9 WIFI+T (SIO.0) UF GXM_S9 LI VER:0-0- MPK WIFI: R,R N RTL WIFI: R N,R VIO_X GPIOX_0 (SIO_0) GPIOX_ (SIO_) GPIOX_ (SIO_) GPIOX_ (SIO_) GPIOX_ (SIO_LK) GPIOX_ (SIO_M) GPIOX_ (PWM_) GPIOX_ (SIO_IRQ // PWM_F) GPIOX_ (PM_OUT_ // URT_TX_ // TSin_SOP_) GPIOX_9 (PM_IN_ // URT_RX_ // TSin VLI_) GPIOX_0 (PM_FS_ // URT_TS_ // I_S_ // TSin_0_) GPIOX_ (PM_LK_ // URT_RTS_ // I_SK_ // TSin_LK_) GPIOX_ (URT_TX_ // SLIP_URT_TX) GPIOX_ (URT_RX_ // SLIP_URT_RX ) GPIOX_ (URT_TS_ // SLIP_URT_TS) GPIOX_ (URT_RTS_ // SLIP_URT_RTS ) GPIOX_ (PWM_E ) GPIOX_ GPIOX_ NOTE: P/ OS use.mhz s MPK OS use MH RTL WIFI/Q9 OS N uf_.v WIFI_K VIO_X VIO_O.V N/ R R WIFI_S_0 [] WIFI_S_ [] WIFI_S_ [] WIFI_S_ [] WIFI_S_LK [] WIFI_S_M [] WIFI_PWR [] WIFI_WKE_HOST [] TPM_OUT [] TPM_IN [] TPM_SYN [] TPM_LK [] URT TX [] URT RX [] URT TS_N [] URT RTS_N [] WIFI_K [] T_ [] T_WKE_HOST [] [] WIFI_PWR [] WIFI_WKE_HOST VIO_O WIFI_PWR Note:.uH@R<0mΩ N FOR RTL WIFI Q9 WIFI_WKE_HOST VIO_X VIO_X [] T_WKE_HOST WIFI_ WIFI_ WIFI_M WIFI_LK WIFI_0 [] WIFI_K [] TPM_IN [] TPM_LK [] TPM_OUT [] TPM_SYN WIFI_VT.uF_.V WXTL_IN Y WXTL_OUT R R Part Name = TZ00.MHz_pF_0ppm U Y-SMP P 0 SOP 0pF_%_NPO 0pF_%_NPO N/.pF_NPO R 0K WL_REG_ON WL_HOST_WKE SIO_T_ SIO_T_ SIO_T_M SIO_T_LK SIO_T_0 WIFI_ 9 SIO_T_ 0 _LO_OUT 0.uF VIO L.uH R<=0mohm L00 XTL_OUT _LO WIFI_K R0 0 TPM_IN TPM_LK TPM_OUT TPM_SYN N R FOR Q9 XTL_IN 0 LPO 9 VT PM_OUT T_VIO/N_HOST_WKE PM_LK T_HOST_WKE PM_IN TWKE T_WKE PM_SYN 9 N_WKE V_TXO 0 FM_RX TXO_IN WL_T_NT GPS_RF 0 ohm impedance RF trace WIFI_NTM N_VSWP_IN TP TP N_VSWP_OUT N_VSWPIO TP URT_TS_N URT_RX URT_TX URT_RTS_N 0 TX 9 TX N_REG_PU N_I_SL N_I_S T_RST_N T_URT_TS T_RX T_TX T_URT_RTS N T_ WIFI_NT N URT TX [] URT RX [] T_ [] WiFi NT FEE G URT RTS_N [] URT TS_N [] G G J -0---S J-MS- G_0P VIO_X R P//0/: N/ R N P: R R N/0K R N/0K VIO_O.V R R00 WIFI_VT lose to WIFI PIN 9 0.uF 0uF_.V [] WIFI_S_ [] WIFI_S_ [] WIFI_S_ [] WIFI_S_0 [] WIFI_S_M [] WIFI_S_LK R lose to PU WIFI_ WIFI_ WIFI_ WIFI_0 WIFI_M WIFI_LK SHZH GIE ELETRONIS O.,LT WIFI&T Size ocument Number Rev RM-MPEG-G 0. ate: Friday, ecember,th, 0 Sheet 0 of

6 lock diagram MX lock iagram R G emmc G Ethernet (crystal:mhz) 000M P(crystal:.MHZ).G:MHZ~MHZ G:.GHz~.GHz,.GHz~.GHz,.GHz~.GHz,.GHz~.GHz EM SIO R US Memory Interface Input/Output US NN/eMM/iNN /ts/spi NOR S9- G.GHZ (crystal:mhz) Interface US Video Output Unit udio Output Unit HMI VS HMI SPIF IS Stereo PM HMI OUT LE OUT IR OUT IR OUT US WIFI US OTG US HOST SHZH GIE ELETRONIS O.,LT lock diagram MX Size ocument Number Rev RM-MPEG-G 0. ate: Friday, ecember,th, 0 Sheet 0 of

7 Power On Sequence : Page index 00 lock diagram of MX 0 Power lock iagram P0 POWER P0 PU P0 R P0 FLSH P0 Ethernet P0 US&R&KEY P0 WIFI&T P0 HMI&VS P09 udio V_EE V.V VIO_O.V T>0.mS T>0 V.V VIO_O T>0mS PU_RST Power Tree <MOS> Max V V _IN O_V - <UK> Max V_EE Mali GPU + EE - <UK> Max VPU- ore Voltage - <UK> Max VPU- ore Voltage - <UK> Max R_.V - <UK> Max VIO_O.V V.V LO Max 00m VIO_O LO Max 00m V.V SHZH GIE ELETRONIS O.,LT Power lock iagram Size ocument Number Rev RM-MPEG-G 0. ate: Friday, ecember,th, 0 Sheet 0 of

8 PU U GXM_S9 LI VER:0-0- U T VIO_OOT U OOT_9 (NN_E // (EMM_Reset GPIO)) W OOT_ (NN_QS // EMM_S // NOR_S) W OOT_ (NN_R_WR) W OOT_ (NN_W_LK // NOR_) V OOT_ (NN_LE // NOR_Q) V OOT_ (NN_LE // NOR_ ) 0 0.uF NN_LE VIO_OOT inn_rst R inn_qs R0 N/0K Power ON onfig NN_LE boot from NN/eMM 0 boot from SPI NN_LE R N OOT_0 (NN_R0 // EMM_M) OOT_ (NN_E0 // EMM_LK) OOT_0 (EMM_NN_0) OOT_ (EMM_NN_) OOT_ (EMM_NN_) OOT_ (EMM_NN_) OOT_ (EMM_NN_) OOT_ (EMM_NN_) OOT_ (EMM_NN_) OOT_ (EMM_NN_) V U R R R P R T T U R9 NN_0 NN_ NN_ NN_ NN_ NN_ NN_ NN_ inn_m inn_lk VIO_OOT 0K R inn_m N/0K R N/0K R inn_lk inn_rst G_0P V.V 存储器件类型 NN emm emm_vq R R N/ VIO_OOT VIO_OOT=.V VIO_OOT=.V VIO_OOT VIO_OOT.uF_.V 必须确认所使用 emm Flash 的 VQ RMS 消耗电流值当前 LO 供电只能满足 RMS 电流 <0m 如 emm VQ 电流超过上述值,eMM VQ 要改为使用 - 来供电 inn P ecal:9pin balls Type(G) V =. -.V U emm_flsh G9-INN emm V. 0.uF uf_.v M VQ V N Y VQ V T0 W VQ V U9 K VQ V K VQ VI U U R0 VSS RST_n LK W P VSS M W M VSS J VSS T J K T J Y VSSQ T J Y VSSQ T J VSSQ T H VSSQ T H VSSQ T H H T0 T VSS R VSS ata_strobe TP T H M TP T 0 RFU VFS M9 TP T U0 VFS VFS M0 TP T P0 VFS VFS N0 VFS VFS Hynix:M/M9/M0 Toshiba:M9/M0/N0 Sandisk:M9/M0/N0/U0 uf_.v inn_rst inn_lk inn_m NN_ NN_ NN_ NN_ NN_ NN_ NN_ NN_0 T T0 T T uf_.v 0.uF inn_qs inn_lk TP TP TP TP V.V N K Y 9 H H H0 H H H H J J J0 J J J J K K K0 K K N N N N N N N N N N N9 N N N N N N N9 N N N N N N N N N9 N N N N N N U emm_flsh G9-INN L H H H G G E E K N0 N9 N N N N N N N N N0 N9 N N N emm V. 9 Y Y Y Y Y0 Y9 Y Y Y Y L M N N N N N N0 N9 N N N N N N N N0 N9 emm N PIN FOR LLEGRO N N N N N N M M M N N N N0 N N N N N N N N P P P K K J N9 N N N N N9 N0 N N N N N N N N9 N N N N N N P P P R R R R R R T T T T T T U U U N N N0 N09 N0 N0 N0 N0 N0 N0 N0 N0 N00 N99 N9 N9 N9 N9 N9 N9 N9 N9 N9 N N N N N N N N L L W W W W W0 W9 W W W W W V V V V V V U U U U U M M M L L L H inn_rst N/nF 使用说明 : NN FLSH 时 N; inn 使用 FOR ES SHZH GIE ELETRONIS O.,LT FLSH Size ocument Number Rev RM-MPEG-G 0. ate: Friday, ecember,th, 0 Sheet 0 of

9 V_EE uf_.v PU U Power 0uF_.V nf 0.uF uf_.v.uf_.v 9 uf_.v uf_.v uf_.v uf_.v ES00 N/Z-0F VIO_O.V U F V_EE V U9 U U U U U T T R9 R R N N M0 M M L J J H G VPU_ VPU_ G G G0 G9 F F F0 F9 K J H H G G G G F T R R R R R R R R R0 R9 R R P9 P P P P P P P P P0 P9 P P P N N VPU_ 0 uf_.v VPU_ uf_.v ES00 N/Z-0F PU Reset VIO_O.V 0 0.uF 0uF_.V For Linux ebug J 0WV-P IP/PIN_.0 V RX TX VIO_O.V uf_.v 0uF_.V U MX09R/RS09R SOT- RESET_n 0.uF uf_.v PU_RST [] R N/00K ES00 N/Z-0F nf R.K Linux_RX Linux_TX R _% mark signal name on P ES00 N/Z-0F R N/ R00 0.uF nf [] SYS_LE [9] HMI_E [] IR_IN VPU_ VIO_O [] VPU-_ON [] VPU-_PWM_ PWR_KEY_ET VIO_O R M_% [] PU_RST [] VPU-_ON [] VPU-_PWM_F VIO_O.V uf_.v uf_.v PWR_KEY_ET Linux_RX Linux_TX V.V T TP0 RESET_N uf_.v SYS_OSIN Y MHz/0pF/0ppm -SM-S 0.uF E R SYS_OSOUT R VO_0V9 VIO_O F GPIOO_9 (REMOTE_OUTPUT // PWM_O_ // ISOUT_H // SPIF_OUT) GPIOO_ (O_E // EE_E // ISOUT_H // PWM_O_) GPIOO_ (REMOTE_INPUT // REMOTE_OUTPUT) GPIOO_ (LK_K_IN // IS_IN_0 // SPIF_OUT // PWM_O_) F GPIOO_ (I_S_O // I_SLVE_S_O // URT_RX_O_) E GPIOO_ (I_SK_O // I_SLVE_SK_O // URT_TX_O_) GPIOO_ (URT_RTS_O_ // URT_RTS_O_ // PWM_O_) GPIOO_ (URT_TS_O_ // URT_TS_O_) GPIOO_ (URT_RX_O_ // URT_RX_O_) GPIOO_0 (URT_TX_O_ // URT_TX_O_) E TEST_N (ISOUT_H) E VSS0 close to PU pin VSS F RESET_N (RESET_N) E VIO_LK F E GPIOLK_0 (LK // LK // LKOUT) GPIOLK_ (LK // PWM_F // LKOUT) IOVREF_ EXT_PLL EXT_PLL VSS_PLL V_XTL SYS_OSIN SYS_OSOUT VEE_0V9- VEE_0V9- VEE_0V9-0 VEE_0V9-9 VEE_0V9- VEE_0V9- VEE_0V9- VEE_0V9- VEE_0V9- VEE_0V9- VEE_0V9- VEE_0V9- VEE_0V9-0 VEE_0V9-9 VEE_0V9- VEE_0V9- VEE_0V9- VEE_0V9- VEE_0V9- VEE_0V9- VEE_0V9- VEE_0V9- VPU_- VPU_- VPU_- VPU_- VPU_- VPU_- VPU_- VPU_- VPU_-9 VPU_- VPU_- VPU_- VPU_- VPU_- VPU_- VPU_- VPU_- LI VER:0-0- VSS VSS VSS VSS VSS0 VSS09 VSS0 VSS0 VSS0 VSS0 VSS0 VSS0 VSS0 VSS0 VSS00 VSS99 VSS9 VSS9 VSS9 VSS9 VSS9 VSS9 VSS9 VSS9 VSS90 VSS9 VSS VSS VSS VIO_V GPIOV_0 (L_R0 // _0 // trace_data0 // TSin_0_ // TON_VOM) GPIOV_ (L_R // _ // trace_data // TSin ) GPIOV_ (L_R // _ // trace_data // TSin ) GPIOV_ (L_R // _ // trace_data // TSin ) GPIOV_ (L_R // _ // trace_data // TSin ) GPIOV_ (L_R // _ // trace_data // TSin ) GPIOV_ (L_R // _ // trace_data // TSin ) GPIOV_ (L_R // _ // trace_data // TSin ) GPIOV_ (L_G0 // _ // trace_data // TSin_LK_) GPIOV_9 (L_G // _9 // trace_data9 // TSin_SOP_) GPIOV_0 (L_G // _0 // trace_data0 // TSin VLI_) GPIOV_ (L_G // _ // trace_data // TSin_FIL_) GPIOV_ (L_G // _ // trace_data // TSout_FIL) GPIOV_ (L_G // _ // trace_data // TSout VLI) GPIOV_ (L_G // _ // trace_data // TSout_SOP) GPIOV_ (L_G // _ // trace_data // TSout_LK) GPIOV_ (L_0 // trace_clk // TSout_0 // TON_OEV) GPIOV_ (L_ // trace_ctl // TSout_ // TON_PV) GPIOV_ (L_ // TSout_ // I_S_) GPIOV_9 (L_ // TSout_ // I_SK_) GPIOV_0 (L_ // TSout_) GPIOV_ (L_ // TSout_) GPIOV_ (L_ // TSout_ // ISO_LK) GPIOV_ (L_ // TSout_ // ISO_T) GPIOV_ (L_VS // TON_STV // URT_TX_ // I_S_ // MI_IN) GPIOV_ (L_HS // TON_STH // URT_RX_ // I_SK_ // MI_LK_OUT) GPIOV_ (TON_PH // URT_TS_ // I_S_) GPIOV_ (TON_OEH // TON_VOM // URT_RTS_ // I_SK_) GPIOV_ (PWM_ // I_S_ // REMOTE_INPUT) GPIOV_9 (PWM_ // PWM_VS // I_SK_) V EFUSE SR_H0 SR_H SR_H SR_H SR_OUT VSS VSS VSS VSS VSS VSS VSS VSS VSS9 VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS9 VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS9 VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS9 VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS9 VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS9 VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS9 VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS9 9 9 E E9 E0 F F F9 G G G G G H H H H0 H H H H H J J J0 J J J J J J J K K K K0 K K K K K K K L L L9 L0 L L L L L L L L M M M M9 M0 M M M M M M M N N N N9 N0 VSS VSS VSS VSS VSS VSS0 N N N N N N L E E E F F F G G G H H J J J J K K L L L L M M N M N N P P P 0 E9 9 E0 0.uF V.V NET_LE [] VEE_PWM_ [] V.V KEY H0 [] HW_I 9 pf_%_npo 0 pf_%_npo GXM_S9 G_0P RM JTG ebug VIO_O.V Remote control receiver UN/IRM-N IP-IR O.V TP T TP T TMS TP T TK TP T TO TP T TI TP T TMS TK TO TI TMS [9] TK [9] TO [9] TI [9] IR V VIO_O.V R.R V.V [] IR_IN IR 9 nf R N/.K 0 0uF_.V R K HW_I SR_H R K HW I Reserve HW_VS Value pull-up pull-down K K K K K K 9K K K K.K00K.KK K K 9K K K K K K 9K X SHZH GIE ELETRONIS O.,LT PU Size ocument Number Rev RM-MPEG-G 0. ate: Sheet 0 of

10 GXM Top Layer ottom Layer R signal R yte Lane, R yte Lane 0, to bottom layer to top layer to bottom layer to top layer PS x bit R Layer Toplogy 注意 :G yte 容量选择时,Rank0 必须 G yte, Rank G yte 配置 Rank 0 Rank U U U U M yte M yte M yte M yte M yte M yte G yte G yte Gyte Gyte R 容量选择表原理图 R 默认为配置为 G yte 容量 Friday, ecember,th, 0 SHZH GIE ELETRONIS O.,LT R_ R_ R_ R_ R_0 R_ R_ R_0 R_ R_ R_QSn R_QSp R_ R_ R_9 R_QM R_QM0 R_ R_QSp0 R_ R_ R_QSn0 R_ R_ R_LKn R_T_n R_LKp R_OT R_9 R_ R_ R_ R_0 R_0 R_ R_ R_ R_ R_ R_ R_ R_ R_KE MR_RST R_0 R_G0 R_nS R_ R_0 R_ R_0 R_ R_ R_ R_ R_QSn R_QSp R_ R_ R_ R_ R_9 R_QM R_QM0 R_ R_QSn0 R_QSp0 R_ R_ R_ R_ R_LKn R_T_n R_OT R_ R_9 R_0 R_ R_ R_ R_0 R_ R_ R_ R_ R_ R_ R_ R_KE MR_RST R_LKp R_LKn R_T_n R_LKp R_OT0 R_9 R_ R_ R_ R_0 R_0 R_ R_ R_ R_ R_ R_ R_nS R_ R_ R_KE0 R_G0 R_0 R_ MR_RST R_nS0 R_0 R_G0 R_ R_ R_9 R_ R_ R_ R_QSp R_QSn R_QM R_QM R_0 R_ R_ R_ R_ R_ R_QSp R_QSn R_0 R_ R_9 R_LKn R_T_n R_OT0 R_ R_9 R_0 R_ R_ R_ R_0 R_ R_ R_ R_ R_ R_ R_ R_KE0 MR_RST R_LKp R_ R_ R_ R_ R_ R_nS0 R_G0 R_0 R_ R_ R_ R_ R_ R_9 R_ R_ R_ R_QSp R_QSn R_QM R_QM R_0 R_ R_ R_QSp R_QSn R_0 R_ R_9 R_ R_ R_ R_ R_ R_ R_ R_ R_ R_ R_ R_nS0 R_KE0 R_OT0 PU_PZQ R_nS R_KE R_OT R_0 R_ R_ R_ MR_RST R_ R_9 R_0 R_ R_ R_ R_ R_ R_ R_ R_0 R_ R_ R_ R_0 R_ R_9 R_ R_ R_ R_ R_ R_ R_0 R_ R_QSp R_QSn R_9 R_ R_QM0 R_QM R_QM R_QM R_0 R_LKn R_LKp R_ R_ R_ R_ R_9 R_QSp R_QSn R_ R_ R_ R_ R_ R_QSp0 R_QSn0 R_ R_ R_ R_ R_QSn R_QSp MR_RST R_0 R_ R_G0 R_T_n R_VREF R_VREF R_.V R_.V R_.V R_.V R_.V R_VREF R_.V R_.V R_.V R_.V R_VREF R_.V R_VREF0 R_.V R_.V R_.V R_.V R_.V R_VREF R_.V R_.V R_.V VIO_O R_.V R_.V R_.V R_.V R_.V VIO_O.V R_.V R_.V Size ocument Number Rev ate: Sheet of RM-MPEG-G 0. R 0 Size ocument Number Rev ate: Sheet of RM-MPEG-G 0. R 0 Size ocument Number Rev ate: Sheet of RM-MPEG-G 0. R pF_%_NPO 00pF_%_NPO 9 0.uF uf_.v 0uF_.V R _% 0 0.uF 0 0pF_%_NPO uf_.v 0.uF 0 uf_.v 0uF_.V uf_.v R9 N.uF_.V GW-P U G9-0PMM_R OT K K_t K WE_n/ L QSL_t G QL J T QSU_t T_n L N P S_n L 9 R N PR T 0 P 0 N P P R R T R G0 M N 0/P M QL J VSS ML_n/IL_n E VSSQ E QL F VQ F VQ F QL H QL H QL0 G QL H QSL_c F V J V V L9 V L /_n M VSS K QU QU QU QU QU QSU_c VSSQ QU QU0 QU V R VSS VQ 9 T N9 V G VSS N KE K VPP R9 K_c VSSQ VSSQ F QL H VSSQ 9 VSSQ VQ0 VSS E9 VSSQ VQ9 S_n/ M VSSQ H VQ 9 RESET_n P VSS E VQ J LERT_n P9 VSS T VSS G VSS9 M9 V T9 VQ J VREF M V VPP V9 9 VQ G VQ G9 VSSQ9 V0 VSSQ0 E MU_n/IU_n E ZQ F9 RS_n/ L N T R _% uf_.v 0.uF R N 0uF_.V 00nF uf_.v uf_.v 0 00pF_%_NPO R K_% 0.uF R0 N 0 0.uF R K 0.uF 00nF R K_% 0.uF 0.uF 0.uF uf_.v R K_% LI VER:0-0- GXM_S9 U G_0P V_PLL E PVREF V PVREF Y Q Y Q Y Q0 Q QSN QSP QM Q W9 Q Q Q9 W Q0 W QM Y Q Y Q W Q QSP QSN Q9 Y Q Q Q Q W0 Q W Q9 Y Q QSN QSP QM W Q W Q0 Q Q Q0 Y Q Q 9 Q 9 QM0 0 QSP0 QSN0 Q 0 Q Y Q Q PZQ W Y S_N /T_N Y KE W K K_N KE0 RST_N W 0 WE_N /G Y /(S_n) W0 _ 9 9 RS_N /(RS_n) W /(WE_n) 0 9 W9 OT0 Y _ /G0 Y0 OT S_N W S0_N Y _0 Y VQ- U9 VQ- U0 VQ- U VQ- U VQ- U VQ- V VQ- V0 VSS 9 VSS VSS VSS VSS0 VSS9 VSS VSS 0 VSS VSS Y9 VSS Y9 VSS W VSS W VSS W VSS0 W VSS9 W VSS V VSS V VSS V VSS V VSS V VSS V VSS V9 VSS V VSS0 V VSS9 U VSS U VSS U VSS U VSS U VSS T VSS T VSS T VSS T VSS0 T VSS9 T VSS T VSS T0 V_PLL T VSS VSS VQ- V VSS 0.uF 0uF_.V 0.uF 0.uF 0.uF 0 0.uF 0uF_.V uf_.v 0.uF uf_.v R _% 9 0uF_.V 9 pf_%_npo pf_%_npo uf_.v 0pF_%_NPO R _% 0.uF uf_.v 9 0uF_.V 9 0.uF 0 0.uF R K_% 0.uF R _% 0.uF 0.uF 0 0uF_.V 0.uF HNGNFR-UH (00Mbps) U G9-0PMM_R OT K K_t K WE_n/ L QSL_t G QL J T QSU_t T_n L N P S_n L 9 R N PR T 0 P 0 N P P R R T R G0 M N 0/P M QL J VSS ML_n/IL_n E VSSQ E QL F VQ F VQ F QL H QL H QL0 G QL H QSL_c F V J V V L9 V L /_n M VSS K QU QU QU QU QU QSU_c VSSQ QU QU0 QU V R VSS VQ 9 T N9 V G VSS N KE K VPP R9 K_c VSSQ VSSQ F QL H VSSQ 9 VSSQ VQ0 VSS E9 VSSQ VQ9 S_n/ M VSSQ H VQ 9 RESET_n P VSS E VQ J LERT_n P9 VSS T VSS G VSS9 M9 V T9 VQ J VREF M V VPP V9 9 VQ G VQ G9 VSSQ9 V0 VSSQ0 E MU_n/IU_n E ZQ F9 RS_n/ L N T R K_% R K_% uf_.v GW-P U G9-0PMM_R OT K K_t K WE_n/ L QSL_t G QL J T QSU_t T_n L N P S_n L 9 R N PR T 0 P 0 N P P R R T R G0 M N 0/P M QL J VSS ML_n/IL_n E VSSQ E QL F VQ F VQ F QL H QL H QL0 G QL H QSL_c F V J V V L9 V L /_n M VSS K QU QU QU QU QU QSU_c VSSQ QU QU0 QU V R VSS VQ 9 T N9 V G VSS N KE K VPP R9 K_c VSSQ VSSQ F QL H VSSQ 9 VSSQ VQ0 VSS E9 VSSQ VQ9 S_n/ M VSSQ H VQ 9 RESET_n P VSS E VQ J LERT_n P9 VSS T VSS G VSS9 M9 V T9 VQ J VREF M V VPP V9 9 VQ G VQ G9 VSSQ9 V0 VSSQ0 E MU_n/IU_n E ZQ F9 RS_n/ L N T 0.uF 0.uF R K_% 0.uF.uF_.V HNGNFR-UH (00Mbps) U G9-0PMM_R OT K K_t K WE_n/ L QSL_t G QL J T QSU_t T_n L N P S_n L 9 R N PR T 0 P 0 N P P R R T R G0 M N 0/P M QL J VSS ML_n/IL_n E VSSQ E QL F VQ F VQ F QL H QL H QL0 G QL H QSL_c F V J V V L9 V L /_n M VSS K QU QU QU QU QU QSU_c VSSQ QU QU0 QU V R VSS VQ 9 T N9 V G VSS N KE K VPP R9 K_c VSSQ VSSQ F QL H VSSQ 9 VSSQ VQ0 VSS E9 VSSQ VQ9 S_n/ M VSSQ H VQ 9 RESET_n P VSS E VQ J LERT_n P9 VSS T VSS G VSS9 M9 V T9 VQ J VREF M V VPP V9 9 VQ G VQ G9 VSSQ9 V0 VSSQ0 E MU_n/IU_n E ZQ F9 RS_n/ L N T 0.uF 0.uF 0uF_.V uf_.v 0.uF R K_% pf_%_npo 0 0.uF U L99 SOT- ON/OFF N VOUT 0.uF pf 0.uF pf_%_npo 0 00pF_%_NPO uf_.v 0.uF 0uF_.V 9 0.uF 0.uF

11 9 Input/V== IN IN OUT _V_IN -OTT 00nF 0uF_0V 0uF_0V J + E 00uF_V E-(I) _V_IN R O_V Option for EMI R0 IN 0uF_V 00 lose to U_ R0 0K IN R N/ R0 R0 N/0k R N/ R0 J x/n VOUT FLG VOUT IP/P. U WS0 FNX- IN OUT V_EE U O_V SY0 FN-0 uf_.v uf_.v R R 00K 00K 0 P R 9 P S PG uf_.v LX LX LX F SS L L00.0uH R<=mohm F=0.V 00nF pf_%_npo R 00K_% uf_.v esign Max: uf_.v 9 uf_.v V_EE 0.uF_.V R olse to U! 0K V_EE R R VEE_PWM_ [] M_% 00K_% R GPIOV_9(P) 0K_% nf Value is only for:.v VIO_PU 0.V F -.V.uF 0.uF_.V VIO_O.V 00nF VIO_O.V 00nF U U VOUT L99 SOT-- VOUT L99 SOT-- J/N J/N esign Max: 00m VIO_O.uF_.V 09.uF_.V V.V 00nF emm_vq 00nF VPU_ O_V uf_.v 00nF U9 XL009 SOT- R 0K 9 N/nF F/OUT LX N VIO_O.V VPU-_ON [] L.uH_. L00 uf_.v uf_.v esign Max: nf_npo VPU_ R 00K_% olse to - R 0K R9 M_% R 00K_% VPU-_PWM_[] GPIOO_ R 0K_% Value is only for: nf.v VIO_PU 0.V F - 00nF VPU_ R_.V O_V 9 uf_.v 00 00nF R0 K U XL009 SOT- F/OUT LX N VIO_O.V L.uH_. L00 9 uf_.v esign Max: R_.V 99 9 uf_.v 00nF pf_%_npo 9 R9 00K_% R 00K_% V ontrol O_V R VV N/ R00 S 00nF R K R G Q uf_.v MT0/N SOT- R 00K HMIPWR_ [] SOT- N/T HMI_V_ HMI_V_ [] VPU_ O_V 00nF uf_.v 9 N/nF U XL009 SOT- R 0K F/OUT LX N VIO_O.V VPU-_ON [] L9.uH_. L00 olse to - R 0K_% uf_.v esign Max: nf_npo R 00K_% R M_% 0 nf uf_.v VPU_ 00nF R 00K_% R0 0K VPU_ VPU-_PWM_F[] GPIOLK_(P) Value is only for:.v VIO_PU 0.V F - VIO_O.V/V.V O_V U LX 0 uf_.v 0 N 00nF F/OUT O_V R 0K 0 0pF XL009 SOT- R K esign Max: L.uH_. VIO_O.V V.V L00 0 uf_.v nF uf_.v pf_%_npo 0 R 00K_% R K_% J HMI V ypass with RES: N,R HMI V ontrol by 9Q: T,R N N-.0P-P- 0WV-P/N IR V RE OV GRE R R /N R IR_IN [9] IR_IN [] R00 R R00 R0 /N R9 N /N /NLE_R LE_G VIO_O.V O_V System LE Shield System LE VIO_O.V Logic SYS_LE= Logic NET_LE= NET_LE=0 LE function System running: RE LE R R K SYS_LE=0 LE off Q GPIOO_9(PU) N90 SOT- Q R [] SYS_LE N90 R NET_LE [] K SOT- K GPIOV_ R LE_G LE_R [9] LE_G NET LE N/OULE_OLOR_LE LE function LE_P lue Red R NET running: lue LE NET off HF N HF N HF N HF N HF N N-OVER N-OVER N-OVER N-OVER N-OVER HF N HF N HF N HF9 N HF0 N N-OVER N-OVER N-OVER N-OVER N-OVER M M M M MRK MRK MRK MRK SHZH GIE ELETRONIS O.,LT POWER Size ocument Number Rev RM-MPEG-G 0. Friday, ecember,th, 0 ate: Sheet of 0