rd4780_grus_debug_v1.0_end

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1 J Ethernet on J US ON S S S S S S S S R_N WE_N ETHERNET_INT ETHERNET_S_N ETHERNET_RST ETHERNET_M RST_N TO_TX TRST_N TK TMS TI_RX US_PWEN P M LKK T-V.V WiFi_IO.V T-V WiFi_IO.V J WIFI&GPS.V T_WKE GPS_OS_EN IL IR T_RST_N T_REG_ON URT_TX URT_RX URT_TS_N URT_RTS_N GPS_PWR_EN WL_REG_ON I_S T_INT WLN_PW_EN WIPER SSI_LK SSI_T SSI_E_N I_SK SIO WiFi SIO WiFi SIO WiFi SIO WiFi SIO_LK_WiFi PM_O SIO_M_WiFi PM_I PM_SYN PM_LK WL_WKE GPS_RF_LK GPS_RF_SGN GPS_RF_MG GPS_RX_EN V F. uf US._HOST J V_US V - _US SHEL F US_PORT pf F URT_RX URT_TX V.uF harging ircuit.uf uf uf.uf U MR R R uf FOREOFF# V - V - V- FOREON INVLI# EN# R_OUT R_IN R_OUT R_IN T_IN T_OUT T_IN T_OUT M P F F L U LX Vout R OM_RX OM_TX VTT SP.uF.uF R.V P uh SHN R k.uf.v IO IO Q ESVUF.uF uf uf US_PWEN IO V/ IO J M V T-V ONNETOR OM_RX OM_TX MX uf.uf uf.uf uf.uf uf.uf TI_RX TO_TX R R R R URT_RX URT_TX JZ_TI JZ_TO URT/RS R_N WE_N ETHERNET_INT ETHERNET_S_N S[:] ETHERNET_RST ETHERNET_M IL, IR, I_SK I_S PM_I PM_O PM_SYN PM_LK T_WKE WL_WKE WL_REG_ON, T_REG_ON T_INT, T_RST_N WLN_PW_EN URT_RX, URT_TX, URT_TS_N, URT_RTS_N, WIPER SSI_T SSI_LK SSI_E_N GPS_RX_EN GPS_OS_EN GPS_RF_MG GPS_RF_SGN GPS_RF_LK GPS_PWR_EN SIO WiFi, SIO WiFi, SIO WiFi, SIO WiFi, SIO_M_WiFi, SIO_LK_WiFi LKK J KEY.V HEERXLM R JTG R R TRST_N JZ_TI JZ_TO TMS TK RST_N H H H INGENI SEMIONUTOR O.,LT R_GRUS_EUG H Size ocument Number Rev US._HOST/URT/JTG. ate: Friday, September, Sheet of

2 GPS RF Receiver core RF Microstrip Z= ohm Must be placed into RF shielding case For good grounding, put vias under RF I die ground pad Pin. GRV R GPS_RX_EN K GRV.uF R K R GRV GPS_OS_EN K TP Opreation Mode escription: RX_EN OS_EN Mode ll stand by Oscillator only Full active (external referee) Full active (internal oscillator) RF interface To GPS ntenna. J NTENN ONNETOR.pF L U GL I O.nH IS V PON pf VSS L nh GRV nf pf (MHz) SW pf pf In Out (EPOS) G G G.pF L nh.uf GRV LN_in ie VG G_IS VSSN.uF RX_EN U HV/-QFN VN V LK_out R SIGN R RVI MG R OS_EN Fref VTUNE VQ XTL XTL Fref Fref R R K.uF OUT V K() pf GRV.uF GRV.uF Y.MHz TXO.ppm R P() R R K() GRV R R R WIPER SSI_E_N SSI_LK SSI_T R GPS_RF_LK igital IF Frequey:.MHz GPS_RF_SGN GPS_RF_MG R R R :efault :R&R&R,R&R&R R,R&R&R K T-V.uF L nh GPS_PWR_EN GPS Power.uF U.uF.uF GRV INPUT VOUT.V L nh EN byp GRV R SGM-.YNG/TR K.uF TP WIPER SSI_T SSI_LK SSI_E_N GPS_RX_EN GPS_OS_EN GPS_RF_MG GPS_RF_SGN GPS_RF_LK GPS_PWR_EN INGENI SEMIONUTOR O.,LT R_GRUS_EUG Size ocument Number Rev GPS. ate: Friday, September, Sheet of

3 U.V VNET.V pf pf R R VNET.V VNET.V R_N WE_N k EES ETHERNET_S_N ETHERNET_RST ETHERNET_M ETHERNET_INT Y MHZ IOR# IOW# EEK EES EEIO S# PWRST# TEST S M INT X X RXV TXV V V V G RX RX TX S S S S S S S S LE LE R.k/% R R.uF. %. % pf VNET.V R R. %. % pf pf.uf pf pf.uf HST-SR MT SH SH S S S S S S S S S/GP S/GP S/GP S/GP S/GP S/GP S/LE S/WKE LE LE GRES U T T- T R R- R R (%) R (%) VNET.V R R (%) T- T R- R T T- R R- J RJ PORT.uF/KV LE LE.uF M VNET.V VNET.V uf.uf uf.uf.uf.uf R_N WE_N ETHERNET_INT ETHERNET_S_N S[:] ETHERNET_RST ETHERNET_M INGENI SEMIONUTOR O.,LT R_GRUS_EUG Size ocument Number Rev ETHERNET. ate: Friday, September, Sheet of

4 T_INT RF Microstrip Z= ohm Please note the input/output direction of URT interface, IW's input should connet to the output of host, and IW's output should connect to input of host. URT_RX URT_TX URT_TS_N URT_RTS_N R R R R R R T_WKE omponent select in IW & IW Part Number IW IW value, uf uf L.uH.uH Q MI Q MMTL RN OHM R K OHM R,R OHM R,R,R, R,R,R OHM R K OHM R K OHM R OHM U MURT PF OHM LFGL Y.MHz,/-ppm MHz,/-ppm 备注使用 IW, 电压调整为.V, 同时系统的.V 也调整为.V 清单内无标识的物料为共用料, 请按原理图标识值进行选择器件编号 IW IW Y.MHz /- ppm MHz /- ppm R, R uf.uf R L.uH.uH ead pf P R,R R J RF_R_JK 请根据产品要求, 满足 RF 天线匹配, 微调,R,,L,,R 的元件值 L R, SIO WiFi, SIO WiFi, SIO WiFi, SIO WiFi, SIO_M_WiFi SIO_LK_WiFi LKK PM_I PM_O PM_SYN PM_LK WL_WKE, WL_REG_ON T_REG_ON T_WKE, T_INT T_RST_N, URT_RX, URT_TX, URT_TS_N, URT_RTS_N WLN_PW_EN, IL, IR I_S I_SK WIFI_NT FM_NT LK WiFi_S_LK PM_I PM_O PM_SYN PM_LK I_S I_SK 请根据晶体要求, 满足实际测试 /-PPM 误差范围, 微调, 的元件值, Layout 时晶振下方不能走线 IN U R() OUT Please note the input/output direction of PM interface, IW's input should connet to the output of host, and IW's output should connect to input of host. T-V WLN_PW_EN /- PPM pf Y OUT IN.M_PPM pf R R R WL_WKE R I_S R I_SK R R R R R R uf R k R R k WIFI Power WIFI_NT I_S k SIO WiFi k SIO WiFi k SIO WiFi k SIO WiFi k SIO_M_WiFi I_SK Q PM_I PM_LK PM_O PM_SYN (WPM) Q MMTL U NT_OUT JTG_TRST_L JTG_TO JTG_TI JTG_TK JTG_TMS OSIN OSOUT WL_GPIO_HOST_WKE RF_SW_TRL_ RF_SW_TRL_ RN PM_I PM_LK WiFi_VT T_PM_OUT T_PM_LK T_PM_IN T_PM_SY PM_O PM_SYN WRF_GPIO_OUT.uF VIO URT_TS_N URT_RTS_N URT_RX URT_TX EXT_SLEEP_LK LK SIO_T_ SIO_T_/SPI_MISO SIO_T_LK/SPI_LK SIO_T_M/SPI_MOSI SIO_T_/SPI_IRQ SIO_T_/SPI_S_N SIO WiFi SIO WiFi WiFi_S_LK SIO_M_WiFi SIO WiFi SIO WiFi R SIO_LK_WiFi R T_IS_I T_IS_O T_GPIO_IS_WS T_GPIO_IS_SK T_RST_N T_REG_ON WL_REG_ON/WL_RST_N VIN_LO (pf) LKK WL_GPIO_SIO_SPI_HSI_SEL IW&IW T_GPIO_HOSTWKE T_GPIO_TWKE UIO_L UIO_R T_LK_REQ_OUT TP FM_RXPN VT SR_VLX.uH L R R_GRUS_EUG FM_NT F R R MX m uf T_RST_N T_REG_ON WL_REG_ON EXT_SLEEP_LK mv Vp-p to avoid additional current consumption and degradation in FM SNR..V Vp-p maximum. F uf R F uf IL IR NTENN ONNETOR J WiFi_VT WiFi_VT () L (nh) INGENI SEMIONUTOR O.,LT Size ocument Number Rev WIFI_IW/IW/IW. ate: Friday, September, Sheet of

5 WiFi_VT VT VIO SIO WiFi SIO WiFi SIO_M_WiFi WiFi_S_LK SIO WiFi SIO WiFi VT V S_ S_ S_M S_LK S_ S_ LKK LK I_S I_S I_SK TP XEN_OUT PM_SYN IW(RPcod)/MT FM_NT I_SK XEN_OUT FM_OUTL FM_OUTR URT_TX URT_RTS_N PM_SY URT_TS_N PM_LK PM_LK U HOSTWKE/FSOURE URT_RX WIFI_NT /SYSRST_T SIO_INTN/WIFI_EN PM_I PM_O T_INT WL_REG_ON PM_O PM_I WIFI_NT VT, SIO WiFi, SIO WiFi, SIO WiFi, SIO WiFi, SIO_M_WiFi WiFi_S_LK LK, WL_REG_ON, T_INT, URT_RX, URT_TX, URT_TS_N, URT_RTS_N, IL, IR WIFI_NT FM_NT PM_I PM_O PM_SYN PM_LK I_S I_SK VIO FM_NT IL IR URT_RX URT_TS_N URT_RTS_N URT_TX uf.uf.uf INGENI SEMIONUTOR O.,LT R_GRUS_EUG Size ocument Number Rev WIFI_IW/MT. ate: Friday, September, Sheet of

6 ata Revision hange Sep Rev.. First released Revision INGENI SEMIONUTOR O.,LT R_GRUS_EUG Size ocument Number Rev REVISION_HISTORY. ate: Thursday, September, Sheet of

ci20_jz4780_v1.0

ci20_jz4780_v1.0 R The trace R_VREF is mils wide at least. R Power ecoupling apacitors MEM Power ecoupling apacitors Place near The Power Pins as lose as Possible Layout 时请尽量靠近 R 布局, 并保证 R 每个电源管脚放置一个去耦电容. 请尽量靠近 PU 布局 PU-