mrt v1.0

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1 XTLO XTLI XTLI XTLO URT_TX URT_RX TP_SEL TRST_N TMS TI TO TK TMS TRST_N TK TP_SEL TI TO NN_LE VINETI_RST# I_T SPI_SS SPI_MISO SPI_MOSI SPI_SLK GN_PLL GN_PLL GN_P I_LK GN_PLL GN_P GN_PLL EMI_OE# ETH-PHY_TX ETH-PHY_TX ETH-PHY_RX ETH-PHY_TX ETH-PHY_RX ETH-PHY_RX ETH-PHY_RX ETH-PHY_TXEN ETH-PHY_TXLK ETH-PHY_RXLK ETH-PHY_RXV ETH-PHY_OL ETH-PHY_RS ETH-PHY_RXER ETH-PHY_TX NN_LE S_INSERT run alarm alarm run.v.v.v.v.v-pll.v.v.v-pll_p.v-pll.v-pll_p.v-pll.v.v.v.v.v.v EMI_OE# [:] NN_LE NN_LE SRM_S# RS# S# QM QM KE# QM QM [:] NR_S# SRM_LK _RST URT_RX URT_TX TMS TRST_N TK TP_SEL TI TO I_T I_LK VINETI_RST# VINETI_S# US-INT _IN _ITLK _OUT _SYN _RST SPI_MOSI SPI_MISO SPI_SLK SPI_SS ETH-PHY_TX ETH-PHY_TX ETH-PHY_TX ETH-PHY_TXEN ETH-PHY_RXLK ETH-PHY_RXV ETH-PHY_RX ETH-PHY_RX ETH-PHY_RX ETH-PHY_RX ETH-PHY_OL ETH-PHY_RS ETH-PHY_RXER ETH-PHY_TXLK ETH-PHY_TX ETH-M (PGE-) ETH-MIO (PGE-) ETH-SW_TX ETH-SW_TX ETH-SW_TX ETH-SW_TX ETH-SW_TXEN ETH-SW_RXLK ETH-SW_TXLK ETH-SW_RX ETH-SW_RX ETH-SW_RX ETH-SW_RS ETH-SW_RXER ETH-SW_RX ETH-SW_OL ETH-SW_RXV VINETI_RY# NN_RY NN_S WIFI_SPI_SS INT S_INSERT SPI_RESET Size ocument Number Rev ate: Sheet of <oc> <Revode> <> Monday, March, Size ocument Number Rev ate: Sheet of <oc> <Revode> <> Monday, March, Size ocument Number Rev ate: Sheet of <oc> <Revode> <> Monday, March, //: SYS LK Setting HPI_RST/NN_LE/EMI_OE: PU LK Setting NN_LE: Nor Flash :bit :bit cpu/sys 时钟配置 HPI_RY 增加上拉电阻 NN_RY 增加上拉电阻, 在 Nand 所在页.uF.uF.uF.uF R.K R.K R K R K.uF.uF.uF.uF F OHM/MHz-. F OHM/MHz-. R K R K uf uf.uf.uf GW-mod GW_mod-QFP U GW-mod GW_mod-QFP U GPIO/N-R GPIO/N-T GPIO/N-R GPIO/N-T GPIO GPIO GPIO GPIO GPIO/INT-HPI GPIO/INT GPIO/INT GPIO/INT GPIO GPIO GPIO GPIO PF PF RUN GREEN RUN GREEN R R.uF.uF PF PF R.K R.K.uF.uF F OHM/MHz-. F OHM/MHz-..uF.uF R.M R.M GW-mod GW_mod-QFP U GW-mod GW_mod-QFP U SLK _QM _QM _QM _QM EMI_WE_ S_ RS_ S_S_ EMI_OE_ NR_S_ NN_LE NN_LE NN_RY NN_S_.uF.uF.uF.uF R K R K.uF.uF GW-mod GW_mod-QFP U GW-mod GW_mod-QFP U M_RXV M_RXLK M_RX M_RX M_RX M_RX M_RS M_OLL M_TXEN M_TX M_TX M_TX M_TXLK M_TX M_IO URT_RX M_ URT_TX MOSI XI XO SS MISO SLK JRST_ JTO JTI JTMS JTK TP_SEL SYS_RST_ M_RX M_RX M_RXV M_RXERR M_ M_IO M_RXERR HPI_S_ HPI_RY HPI_RST_ M_RS M_TXEN M_RXLK M_RX M_RX M_OL M_TX M_TX M_TXLK M_TX M_TX I_S I_SL IT_LK_I RESET_O SYN_O ST_OUT ST_IN.uF.uF.uF.uF R K R K R R R K R K R K R K.uF.uF R K R K F OHM/MHz-. F OHM/MHz-..uF.uF R K R K.uF.uF R K R K.uF.uF.uF.uF F OHM/MHz-. F OHM/MHz-. R K R K.uF.uF Y MHZ Y MHZ R K R K uf uf.uf.uf.uf.uf R K R K R K R K R R R R.uF.uF.uF.uF.uF.uF.uF.uF.uF.uF R K R K R K R K.uF.uF.uF.uF.uF.uF.uF.uF.uF.uF LRM RE LRM RE R K R K GW-mod.V 模拟电源.V IO 电源.V core GW_mod-QFP U GW-mod.V 模拟电源.V IO 电源.V core GW_mod-QFP U VIO VIO VINST VIO VINST VIO VIO VIO VIO V_ VSS_ VSS_P V_P V_ VSS_ VINST VIO VINST VIO VINST VIO VIO VINST VIO VIO VINST VIO VINST VIO VIO VINST VIO VINST VIO.uF.uF

2 VS_JK E + R K UF/V,E.UF R.UF K PU V EN OSET F P OUTPUT OUTPUT VSS VSS L uh/ uh/ SM.V + E UF/.V,E.UF R.K,% R.K,% F F F F FMRKS FMRKS FMRKS FMRKS TH TH TH TH V.UF PU Vin + E UF/V, GN MS-.v Vout.V + E.UF UF/V, HOLE TH_NL HOLE TH_NL HOLE TH_NL HOLE TH_NL.V R.K LE.V-LE R R R R R R SW.V R R PF POWERP FUSE_ F OHM/MHz- SM F. OHM/MHz- GN_JK_ UF OUT IN IN V-IN VS_JK Reset Reset R R R K NE.UF NE V U MR RST GN.UF NE MX NE _RST (PGE-,,,) R R R R R R XP GN_JK_ TRST_N TI TO TMS TK RESET TP_SEL.V JTG.V TRST_N TI TRST_N TI For ist test TI R K R K TO TMS TK TP_SEL TO TMS TK TP_SEL.V.V.V.V R R R K K K TRST_N TK TMS TP_SEL R K R K R K R K R K VS_JK E + R K,% UF/V,E.UF R.UF K,% PU V EN OSET F P OUTPUT OUTPUT VSS VSS L uh/ uh/ SM V + E UF/.V,E.UF R.K,% R.K,% <> Size ocument Number Rev <oc> <Revode> Monday, March, ate: Sheet of

3 NOTE NOTE U PIN # U PIN # F.UF OHM/MHz-..UF UF V-ETH.UF F.UF OHM/MHz-. V-ETH.UF PWFIN PWFOUT R.K V-ETH V-ETH V-ETH (PGE-) (PGE-) V-ETH V-ETH ETH-M ETH-MIO R.K change to atctive low R R R R R [-] [-, R-] [R-] K K K NOTE K K ETH-PHY_TX ETH-PHY_TX ETH-PHY_TX ETH-PHY_TX ETH-PHY_TXEN ETH-PHY_TXLK R ETH-PHY_RXV ETH-PHY_RX ETH-PHY_RX ETH-PHY_RX ETH-PHY_RX ETH-PHY_RXLK R ETH-PHY_OL ETH-PHY_RS ETH-PHY_RXER ETH-LNK ETH-FULL-X ETH-LNK-T ETH-LNK-T LE-ETH-OLn U M MIO TX TX TX TX TXEN TX RXV RX RX RX RX RX OL RS RXER X X V V PWFIN LE/PHY LE/PHY LE/PHY LE/PHY LE/PHY GN GN GN RTLL GN GN PWFOUT V MII-ISO R. R. _TXP _TXN _RXP _RXN ETH-PHY_TX ETH-PHY_TX ETH-PHY_TX ETH-PHY_TX ETH-PHY_TX ETH-PHY_TX ETH-PHY_TX ETH-PHY_TX ETH-PHY_TXEN ETH-PHY_TXEN PHY Signal For MII port test ETH-PHY_TXLK ETH-PHY_TXLK ETH-PHY_RXLK ETH-PHY_RXLK ETH-PHY_RXV ETH-PHY_RXV ETH-PHY_RX ETH-PHY_RX ETH-PHY_RX ETH-PHY_RX ETH-PHY_RX ETH-PHY_RX ETH-PHY_RX ETH-PHY_RX ETH-PHY_OL ETH-PHY_OL ETH-PHY_RS ETH-PHY_RS ETH-PHY_RXER ETH-PHY_RXER _RST RESETn.V V-ETH.V GN N RTSET ISOLTE REPT SPEE UPLEX NE LPS MII/SNI RESET.UF R. R..UF R.K _RXP _RXN _TXP _TXN.UF.UF RJ TX+ TX- RX+ I_+ I_- RX- I_+ I_- RJ F R N OHM/MHz-. U T+ TX+ F T- TX- R+ RX+ F R- RX- N N N N HNL RJ_TXP RJ_TXP RJ_TXN RJ_RXP RJ_TXN RJ_RXN RJ_RXP RJ_RXN R R R R R R pf [U-, -] R R TPTX+ TPTX- TPRX+ TPRX- ETHERNET RYSTL (PGE-,,) RESETn R.K R.K R.K R.K R.K R.K V-ETH PF ETH-XTLI R.K Y MHz TEST ONLY LES PF ETH-XTLO NOTE R LE ETH-LNK-T ETH-LNK-T R K LE-R K LE-R LE LE LE V-ETH R K LE ETH-FULL-X -LNK-LE <> Size ocument Number Rev <oc> <Revode> Monday, March, ate: Sheet of

4 下载路由器产品不需 Nand Flash, 该部分器件不焊接如机壳空间限制可以考虑删除该部分电路.V [:] VSS VSS.V V V.V U IO IO IO IO IO IO IO IO WP WE LE LE E RE RY/ R K NN_LE NN_LE NN_S EMI_OE# TP_IST NE.V R K NN_RY KFG <> Size ocument Number Rev <oc> <Revode> ate: Monday, March, Sheet of

5 U.V J ON RX_ TX_ UF UF TX_ RX_ Tout Rin Tout Rin V V+ V- GN Tin Rout Tin Rout SPE UF UF URT_TX URT_RX.UF URT_TX URT_RX URT <> Size ocument Number Rev <oc> <Revode> ate: Monday, March, Sheet of

6 ate: Monday, March, Sheet of PF..V V OHM/MHz-. USx ONN EMI_OE# R.K R.K F US_V uf.uf US-- US-+ V - + GN US_V R R.V SHELL R K R K.uF.V.uF.uF.V GN VINETI_S#.V US-+ US-- U N N WR S M V + - GN N N N SLHS SLHS US-RST INT N N N R RQ K V M/S N N N N V LK/X X RST INTRQ GN N N N N N N GN N N F OHM/MHz-. VINETI_RST# US-INT R R US-RST INT PF M R X MHz.V PF [:] [:] Size ocument Number Rev

7 [:] U [:] Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q RY/Y WP K R.V.V EMI_OE# NR_S# R K N RST OE WE E V GN GN.V.uF SSTVF/TSOP Size ocument Number Rev <oc>. ate: Monday, March, Sheet of

8 RV F F UF OHM/MHz-. OHM/MHz-. _V () () () () () () () () () () () () () () () ().K, % R.uF _LE_UP _LE_T _LE_SP _LE_UP _LE_T _LE_SP _LE_UP _LE_T _LE_SP _LE_UP _LE_T _LE_SP _LE_UP _LE_T _LE_SP VTRL RN RP.uF V.uF.uF.uF.uF.uF.uF TEST LE_UP[]/PNEG LE_T[]/GXNEG LE_SP[]/GYNEG V LE_UP[]/GXSP LE_T[]/GYSP LE_SP[]/GXFULL LE_UP[]/GYFULL LE_T[]/ENFORWR GN LE_SP[]/INROP V LE_UP[]/MX LE_T[]/RESERVE LE_SP[]/ENEFER LE_UP[]/PSS LE_T[]/ISRP LE_SP[]/ISLEKY VTRL GN GN IREF RV V RX-[] RX+[].uF PMOE GXMOE ISVLN LOOPLE GN TEST# V LE_[]/GYMOE PMOE[] PMOE[] LE_[]/GXMOE LE_[]/SETGROUP GN LE_[]/ISVLN LE_[]/ISFUTOOFF LOOPLE#/ISTGPRI EN_RST_LNK ISPRI ISPRI QWEIGHT ISRTRL Option For EMI test ENKPRS GYENF GXENF S_MIO SL_M ENEEPROM RESERVE KMOUT ENUXOVER TX TX LE_LNK_TIME ISPORTPRI[] V ISPORTPRI[] ISPORTPRI[] ISPORTPRI[] ISPORTPRI[] QWEIGHT[] QWEIGHT[] ISRTRL GN ENNEG_KPRS GYENF GXENF S_MIO SL_M ENEEPROM RESERVE KMOUT V EN_UTOXOVER SELMIIM#/ISSPRI MRX[]/PTX[] MRX[]/PTX[] GN RGN TGN TX+[] TX-[] TV TV TX-[] TX+[] TGN RGN RX+[] RX-[] RV RV RX-[] RX+[] RGN TGN TX+[] TX-[] TV TV TX-[] TX+[] TGN RGN RX+[] RX-[] RV RV RX-[] RX+[] RGN TGN TX+[] TX-[] TV MV R.K,% U GN MRX[]/PTX[] V MRX[]/PTX[] MRXV/PTXEN MRX/PTX MOL/POL MTX[]/PRX[]/PIRTG[] MTX[]/PRX[]/PIRTG[] MTX[]/PRX[]/LEMOE[] MTX[]/PRX[]/LEMOE[] V MTXEN/PRXV MTX/PRX MGN PLNKST# PUPST/PFULL PSPST/PSP PFLTRL/PENF X X V RTT RTT RESET# GN RTLS _V TX TX TXEN TX OL RX RX RX RX RS RXV PRX PLNKST# PENF RTT RTT UF <- -> _X () _X () NRESET () Mark on board ENEEPROM ENKPRS GXENF GYENF PENF ENUXOVER TEST ddtional Reset RESERVE QWEIGHT ISPRI ISPRI ISTGPRI ISRTRL ISVLN R NE-K ENEEPROM R NE-K ENKPRS R NE-K GXENF R NE-K GYENF R NE-K PENF R N R N R NE-K ENUXOVER TEST RESERVE R NE-K QWEIGHT R NE-K ISPRI R NE-K ISPRI R NE-K LOOPLE R NE-K ISRTRL R N ISVLN Layout Note: oth IP and SM Lay on board U GN For Internal Test V WP SLK S Serial EEPROM Flow control auto cross over Qos priority for Port, roadcast storm "" For disable, internal pull up! keep floating Option VIN for.v or.v EEPROM WP R K R SL_M K S_MIO R K R R V TP () TN () RP () RN () RN () RP () TP () TN () TN () TP () RP () RN () RN () RP () TP () TN () TN () TP () RN () RP () LOOPLE () RV RTT RTT UF RV.uF.uF.uF.uF.uF TP TN TN TP RP RN RN RP TP TN TN TP RP RN RN RP TP TN V E UF.uF.uF.uF.uF.uF.uF N,UF Layout Note: For future use Lay on solder N,UF N,.uF N,UF N,.uF R.K R N R.K PLNKST# GXMOE PMOE For port FX (Port) port / UTP (Port,,) port PHY mode MII (Port) <-- Set UTP mode <-- Set PHY mode P link-state : link Pmode[:] : UTP/M mode MII : base-fx :Phy mode MII :Phy mode SNI ISPRI ETH-SW_TXLK R PRX ETH-SW_RS R RS ETH-SW_TXEN R RXV.V R R V ETH-SW_TX R RX R R ETH-SW_TX R RX ETH-SW_RS ETH-SW_RXER R N R K ETH-SW_TX ETH-SW_TX ETH-SW_RXLK ETH-SW_RXV R R R R RX RX TX TXEN <- S hip ETH-SW_RX ETH-SW_RX R R TX TX -> ETH-SW_RX R TX ETH-SW_RX ETH-SW_OL R R TX OL PU/Processer Route Engine.V.V GN <> Size ocument Number Rev <oc> <Revode> Monday, March, ate: Sheet of

9 .V Place a.uf cap by each power pin. Place a.uf cap for each bank..uf.uf.uf.uf.uf.uf.uf.uf.uf.uf.uf.uf.uf.uf RS# S# RS# S#.V SRM_S# SRM_S# uf uf [:] QM QM S# RS# SRM_S#.V U.V V Q VQ Q Q VSSQ Q Q VQ Q Q VSSQ Q V QML WE_N S_N RS_N S_N V VSS Q VSSQ Q Q VQ Q Q VSSQ Q Q VQ Q VSS N QMH LK KE VSS QM SM_LK_ KE# QM KE# SRM_LK QM QM S# RS# SRM_S#.V U V Q VQ Q Q VSSQ Q Q VQ Q Q VSSQ Q V QML WE_N S_N RS_N S_N V VSS Q VSSQ Q Q VQ Q Q VSSQ Q Q VQ Q VSS N QMH LK KE VSS.V QM SM_LK_ KE# QM KE# SRM_LK SRM Mb SRM Mb [:] NK [:] [:] Size ocument Number Rev <oc>. Monday, March, ate: Sheet of

10 LE () () () () () () () () () () _LE_SP _LE_UP SP _LE_SP T _LE_T _LE_UP _LE_SP _LE_T _LE_UP _LE_SP _LE_T Mark on board ENEFER Mark on board UP R K RL NE-R _V R K P_SP N_SP () _LE_UP Mark on board LE Port P_UP LE LE P_SP LE LE P_T LE Port P_UP LE LE P_SP LE LE P_T LE P_UP LE LE P_SP LE LE P_T Mark on board Pass _V RL NE-R Port R K P_LOOP NETV NET_V NET R K P_UP N_UP _V P_UP RN P_SP P_T K,% P_UP P_UP RN P_SP P_UP K,% P_SP P_T RN P_T P_T K,% P_T RN K,% _V V.uF.uF.uF.uF.uF.uF.uF.uF R.R, % R.R, % RP RN TT TT TT TT TT () TP () TN () RP () RN () RP () RN () TP () TN pf UTO MIX TF PM-K F R.R, % TN R.R, % TP R R TT R R R.R, % RP R.R, % RN TF () TP WTXP R R R.R, % RP () TN T+ TX+ WTXN T- TX- R.R, % TP () RP T TT WRXP TN () RN R+ RX+ R.R, % WRXN R.R, % TN R- RX- R.R, % RN R.R, % TP R R TT R R () RP WRXP R.R, % RP () RN R+ RX+ WRXN RN R- RX- R.R, % R R () TP T TT WTXP () TN T+ TX+ WTXN TN T- TX- R.R, % R.R, % TP PM-K T+ T- T R+ R- R+ R- T T+ T- TX+ TX- TT RX+ RX- RX+ RX- TT TX+ TX- OHM/MHz-. R R WTXP WTXN R TT WRXP WRXN WRXP WRXN R TT WTXP WTXN R R R R R R R R XS RJX () () () () _LE_UP N_SP _LE_T N_UP _LE_SP _LE_T LE Port P_UP LE LE P_SP LE LE P_T LE Port P_UP LE R K LE P_SP LE LE P_T _V F OHM/MHz-. LE () LOOPLE R R N_LOOP LE LE LE LE LE LE P_LOOP NETV NET_V Mark on board LOOP.V.V <> Size ocument Number Rev <oc> <Revode> ate: Monday, March, Sheet of

11 LOK () _X Y MHz PF _X () PF.V Power Layout Note: For RTLS Lay on solder Layout Note: lose to RTLS () VTRL R R V F F N N RV RESET _V SK (SM) Q R R R R UF N R K Layout Note: For RTLS UF NRESET () <> Size ocument Number Rev <oc> <Revode> ate: Monday, March, Sheet of

12 .V.V K R K R SPI_MISO SPI_MOSI.V.V GN uf SPI_MISO SPI_SLK SPI_MOSI SPI_SS SPI_MISO GN SPI_SLK.V GN SPI_MOSI SPI_SS U T ata Out VSS LK V VSS ata In RSV/S T S Shell S G MM/S S S S_INSERT S_INSERT K R <> Size ocument Number Rev <oc> <Revode> ate: Monday, March, Sheet of

stm32_mini_v2

stm32_mini_v2 US Mirco S SIO US Power:V Power:.V STMF0VET GPIO TFT SPI URT RJ ENJ0SS SPI Flash lock iagram Size ocument Number Rev STM-Lite-V.0 Ver.0 ate: Friday, June 0, 0 Sheet of 0.0uF R M V - + S J MP-0 V_PWR R