P.1
P.2 1. 2. IC 3. 4. IC 5.
P.3 (Interconnection)..
P.4 (Wafer) (Chip) (MCM)
P.5 電子構裝之主要功能 電源供應層 1.有效供應電源 信號分佈層 2.提供信號傳輸 協助散熱 保護元件 3.協助排除耗熱 4.保護電子組件 5.建構人機介面 Images 3D Graphics 建構人機介面
P.6 DIP Dual In-Line Package SOP Small Outline Package SOJ Small Outline J-Lead PLCC Plastic Leaded Chip Carrier PGA QFP Quad Flat Pack Pin Grid Array PBGA Plastic ball Grid Array
P.7
P.8 (Epoxy Molding Compound) (Chip) (Gold Wire) (Lead) (Die Pad) (Silver Epoxy)
Ball Grid Array (BGA) P.9
P.10 1. / 2. 3. 4. 5. 6. 7. SMT 1. 2.
(Chip Interconnection) P.11 1. (Wire Bonding) 2. (Flip Chip Bonding) ( ) 3. (TAB Tape Automatic Bonding)
P.12 Flip Chip Bonding TAB Wire Bonding 1 10 100 1000 10000 /
P.13 PTH SMT Area Array Fine Pitch Area Array Direct Chip Attach on Board Chip Scale Pacage BGA PGA QFP TCP TO DIP 1970 1980 1990 2000 2010
P.14 1. 2. IC 3. 4. IC 5.
IC - P.15 (Chip) (Leadframe) Wafer Backside Grinding Wafer Sawing Die Bonding Wire Bonding 1. 2. 1
IC - P.16 Transfer Molding Solder Plating Trimming & Forming 1. 1~4 2. 90% 10% 3.Trimming Trimming 4.
IC P.17 4 11 9 7 1 8 1. (Delamination) 2. 3. 4. (lifted bond) 5. (Wire sweep) 6. 7. 8. 9. 10. (Passivation) 11. (Mold void) 3 5 2 6 (Die) 10
(Popcorn effect) P.18 (Solder Reflow)
IC Package P.19
P.20 1. 2. IC 3. 4. IC 5.
P.21 (Laminated PCB) (Flexible PCB) (Cofired Ceramics) Thin film on silicon (Deposited Thin Film) Thin film on ceramics Thin film on metal
P.22 1. S 2. S S 3. S S P P S 4. S P S S P
PCB P.23 1 2 3 4 5 6 7 8 1 oz B stage(prepreg)
P.24 1. 2. IC 3. 4. IC 5.
CSP (Chip Scale Package) P.25 Definition : chip scale package (CSP) is a package whose package-tosilicon area ratio less than 120 percent. CSP is derived from existing packages, that is, it can be any type of packages. Silicon (Flip Chip ) I/O Chip Scale Surface Mount Package area Silicon area < 1.2
CSP P.26 1. (Rigid Substrate Interposer) 2. (Leadframe Type) 3. (Flex circuit Interposer) 4. (Transfer Molding) 5. (Wafer-Level)
Flip Chip P.27
Flip Chip P.28 fccsp Super FC fcpbga
Multi Chip Module P.29 Definition : Multi chip module (MCM) is a module or package which usually contains a high density interconnect substrate, several active and passive components, and a package which can be connected to the next level of interconnection. Chip Chip Chip Chip Chip Single Chip Module Multi Chip Module (MCM)
What is KGD? P.30 Known Good Die (KGD) is a die which has been manufactured and delivered in a bare, or minimally packaged die format, which has quality and reliability comparable to its functionally equivalent packaged component, can be interconnected to its next level of packaging by wirebond, tape automated bonding, or flip -chip.
MCM Yield as Function of Die Yield P.31 Source : TechSearch International, Inc.
P.32 1. 2. IC 3. 4. IC 5.
P.33 A. B. Flip Chip SIP Build-up C.High Tg D. High Dk IC A. MEMS&3D B.SIP(SOP) C.DCA COB SMT
System in Package P.34 Integral Substrate O-E Package / EOCB Built-in R Vcc Built-in Active Built-in C System-in-a-Package 3D Package O-E Device Wave guide Z-connection Built-in L GND MEMS / 3D Package Green Packaging
P.35 3D Packages Wire Bonding Wireless Bonding (FCB, others) COC (Chip on Chip) CIB (Chip In Board) Through Hole Source:JEITA
CiSP Chip in Substrate Package P.36 Source: from ITRI ( )
Ultra Thin Wafer P.37 Source:IZM
P.38 Lead Free Flip Chip Lead Free SMT BGA on Board Alloy: Sn/Ag/Cu Halogen Free Laminate Material Phosphorous Base Epoxy