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倬资扈
5 years ago
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1 S[:0] SQ[:0] SQM[:0] SK# SK S[:0] S[:0] SQ[:0] SQS[:0] R 0-% SQM[:0] SK# SK S[:0] SVREF SQS[:0],,,, SKE0 SS SRS SS0 S SQ0 SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ0 SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ0 SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ0 SQ SVREF SQS0# SQS# SQS# SQS# SRST SOT0 SQS0 SQS0# SQS SQS# SQS SQS# SQS SQS# SQM0 SQM SQM SQM SKE0 S0 S S S S S S S S S S0 S S S S S0 S S SS SRS SS0 SRST SOT0 0,,,,,,,,, U SQ0 SQ SQ SQ SQ SQ SQ SQ Y SQ SQ Y SQ0 SQ SQ W SQ SQ N SQ T SQ N SQ U SQ U SQ P SQ0 T SQ M SQ L SQ H SQ L SQ H SQ J SQ M SQ G SQ K SQ0 H SQ H SVREF0 Y SVREF SVREF SVREF SQS0 SQS0# SQS R SQS# P SQS K SQS# J SQS SQS# W SQM0 R SQM G SQM V SQM V SK# N SK J SKE0 W SK R S0 U S M S Y S N S V S M S S P S L S W S0 P S Y S R S K S L S0 K S T S U T SS V SRS SS0 S SZQ P SRST R SG0 N SG G J OT SK# G-0 FG-0.MM RM V-V NWE#/SPI0_MOSI/P0 NLE/SPI0_MISO/P LE/SPI0_LK/P E/P E0/P NRE#/P NR0/S_M/P NR/S_LK/P NQ0/S_0/P NQ/S_/P NQ/S_/P0 NQ/S_/P NN NQ/P NQ/P NQ/P NQ/P NWP/P E/P E/P E/SPI_S0/P E/SPI_LK/P0 E/SPI_MOSI/P E/SPI_MISO/P SPI0_S0/P NQS/P NN_V0 NN_V TS0_LK/SI0_PLK/PE0 TS0_ERR/SI0_MLK/PE TS0_SY/SI0_HSY/PE TS0_VL/SI0_VSY/PE TS0/SI0 TS0_0/SI0_0/PE TS0_/SI0_/PE TS0_/SI0_/PE TS0_/SI0_/PE TS0_/SI0_/PE TS0_/SI0_/PE TS0_/SI0_/PE0 TS0_/SI0_/PE TS_LK/SI_PLK/S_M/PG0 TS_ERR/SI_MLK/S_LK/PG TS_SY/SI_HSY/S_0/PG TS_VL/SI_VSY/S_/PG TS_0/SI_0/S_/SI0_/PG TS_/SI_/S_/SI0_/PG TS_/SI_/URT_TX/SI0_0/PG TS_/SI_/URT_RX/SI0_/PG TS_/SI_/URT_RTS/SI0_/PG TS/SI TS_/SI_/URT_TS/SI0_/PG TS_/SI_/URT_TX/SI0_/PG0 TS_/SI_/URT_RX/SI0_/PG V-V 0,,,,,,,, M M L L K K J J H H G G H H0 G G0 M F F L K J J0 G F H J E E F0 E E0 0 E 0 N0 N N N N N N N NWE# NLE LE E# E0# NRE# NR0# NR# V-V N[:0] SPI-S0 SPI-LK SPI-MOSI SPI-MISO NQS SI-PLK SI-MLK SI-HSY SI-VSY SI-0 SI- SI- SI- SI- SI- SI- SI- N[:0] V-V RM-V LL -PU LL V-V SQ SQ SQ SQ SQ SQ SQ0 SQ SQ SQ0 SQ SQ SQ SQ SQ SQ U G H V0_RM L V_RM M V_RM R V_RM T V_RM W V_RM W V_RM W V_RM Y V_RM M V_RM N 0_LL P _LL _LL H H 0_PU H _PU H _PU J _PU J _PU _PU J J 0_INT K _INT K0 _INT K _INT L _INT L _INT R _INT R0 _INT T _INT _INT N V_R W W V0_LVS W V_LVS V_LVS F E V_SI0 V_SI H H V0 H0 V H V J V J V J0 V J V V G-0 FG-0.MM SQ SQ SQ SQ SQ SQ SQ0 SQ SQ SQ0 SQ SQ SQ SQ SQ SQ SQ0 SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ0 SQ0 SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ0 0_RM G _RM G _RM J _RM K _RM N _RM P _RM U _RM V _RM Y _RM Y M 0_LL N0 _LL P0 _LL J 0 K K K L0 L L M0 M M M 0 N N P P R R T T 0_LVS W _LVS W0 _LVS W SQS SQS# SQS SQS# SQM SQM SQS0 SQS0# SQS SQS# SQM0 SQM 0-cubieboard SQS SQS#, SQS SQS#, SQM SQM SQS0 SQS0#, SQS SQS#, SQM0 SQM <oc> V.0 ate: Sheet of

2 0 ERX 0 ERX 0 ERX 0 ERX0 0 ETX 0 ETX 0 ETX 0 ETX0 0 ERXLK 0 ERXV 0 EM 0 EMIO 0 ETX 0 EGTXLK 0 EGLKIN 0 EPHY-RST-N TWI0-SK TWI0-S, TWI-SK, TWI-S TWI-SK TWI-S LK-K PS-SK PS-S URT0-TX URT0-RX IR-TX, IR-RX SPI0-S SPI0-LK SPI0-MOSI SPI0-MISO JTG-SEL UOOT NMI#,, # LKK-IN LKK-OUT OSMI OSMO RT V-V PLLV PLLVREG VR VR VRP V VR VR VRP E E E E E 0 E0 E E 0 0 H T0 W T F F F N N K T R P T R P T U W0 V0 W U EM ERX/SPI_S0/P0 ERX/SPI_LK/P ERX/SPI_MOSI/P ERX0/SPI_MISO/P ETX/SPI_S/P ETX/SPI_S0/P ETX/SPI_LK/P ETX0/SPI_MOSI/P ERXK/SPI_MISO/P ERXERR/SPI_S/P ERXV/URT_TX/P0 EM/URT_RX/P EMIO/URT_TX/URT_RTS/P ETX/URT_RX/URT_TS/P ETXK/URT_TX/URT_TR/P ERS/URT_RX/URT_SR/P EOL/N_TX/URT_/P ETXERR/N_RX/URT_RING/P TWI TWI0_SK/P0 TWI0_S/P TWI_SK/P TWI_S/P TWI_SK/P0 TWI_S/P SPI SPI0_S0/URT_TX/EINT/PI0 SPI0_LK/URT_RX/EINT/PI SPI0_MOSI/URT_TX/EINT/PI SPI0_MISO/URT_RX/EINT/PI PS PS_SK/TLKIN0/EINT/SPI0_S/PI PS_S/TLKIN/EINT/SPI_S/PI URT URT0_TX/IR_TX/P URT0_RX/IR_RX/P IR IR0_TX/SPIF_MLK/STNYWFI/P IR0_RX/P TEST JTG_MS0/SPI_S0/P JTG_K0/SPI_LK/P JTG_O0/SPI_MOSI/P JTG_I0/SPI_MISO/P TEST JTG_SEL UOOT_SEL SYS EFUSE_Q NMI# # LKK_IN LKK_OUT LKM_IN LKM_OUT RT_ PLLTEST PLLREGIO PLLVP PLLV PLLVREG PLL V VR VR VRP R0 R EINT UIO INT UIO OE US M0 S0_/JTG_MS/PF0 M S0_0/JTG_I/PF L0 S0_LK/URT0_TX/PF L S0_M/JTG_O/PF K0 S0_/URT0_RX/PF K S0_/JTG_K/PF S_M/PI S_LK/PI S_0/PI S_/PI S_/PI S_/PI EINT/SPI_S0/URT_RTS/PI E EINT/SPI_LK/URT_TS/PI E EINT0/SPI_MOSI/URT_TX/PI E EINT/SPI_MISO/URT_RX/PI IS_MLK/_MLK/P IS_LK/_LK/P IS_LRK/_SY/P IS_O0/_O/P IS_O/P IS_O/P0 0 IS_O/P IS_I/_I/SPIF_I/P SPI_S/SPIF_O/P MIOUTN MIOUTP Y0 FMINL FMINR Y VMI 0 MIIN MIIN 0 LINEINL LINEINR HPOUTR W HP V HPOM HPOMF 0 HPVIN HPV Y HPOUTL N0 M0 N P0 P0 M P P R0 M R P UV_ L U_ L L UV_T L U_T UL K UL K S0- S0-0 S0-LK S0-M S0- S0- S-M S-LK S-0 S- S- S- T-RTS T-TS T-TX T-RX IS-MLK T-PM-LK, T-PM-SY, T-PM-OUT, IS-O IS-O IS-O T-PM-IN, SPIF-O FMINL FMINR VMI MIIN MIIN LINEIN-L LINEIN-R HPR HPOM HPOMF V-V HPV HPL SO-M0 SO-P0 SO-M SO-P SO-M SO-P V-V LL TVIN0 TVIN TVIN TVIN VRP-TVIN VRN-TVIN VG-G VG- VG-R VS V-V TXP-ST TXN-ST RXP-ST RXN-ST REXT-ST LL HTX0P HTX0N HTXP HTXN HTXP HTXN HTXP HTXN HVP HSL HS HHP HE PWM0 PWM PS-SK0 PS-S0 XP XN YP YN HVP U TV TVIN0 TVIN Y TVIN W TVIN Y _TVOUT W _TVIN _TVIN _TVIN Y VRP_TVIN VRN_TVIN TVOUT0 TVOUT TVOUT W TVOUT W V_TVOUT V_TVIN T0 ST T TXP_ST U TXM_ST U0 RXP_ST V RXM_ST R REXT_ST P LKP_ST N LKM_ST N _0_ST M ST M _0_ST M ST N 0_ST N _ST _ST V HMI V TX0P_HMI U TX0N_HMI U TXP_HMI T TXN_HMI T TXP_HMI W TXN_HMI W TXP_HMI T TXN_HMI P VP_HMI P 0_HMI R _HMI T _HMI R VREGIO_HMI R VREGIO_HMI R SL_HMI P S_HMI P HP_HMI E_HMI 0 GPS 0 GPS_LK/PI0 GPS_SIGN/PI GPS_MG/PI PWM PWM0/P PWM/PI E E HSL/URT_TX/PS_SK0/PI0 HS/URT_RX/PS_S0/PI Y TP XP_TP Y XN_TP YP_TP YN_TP G-0 FG-0.MM L0 LR0 LR L0_0/LVS0_VP0/P0 L0_/LVS0_VN0/P L0_/LVS0_VP/P L0_/LVS0_VN/P L0_/LVS0_VP/P L0_/LVS0_VN/P L0_/LVS0_VP/P L0_/LVS0_V/P L0_/LVS0_VP/P L0_/LVS0_VN/P L0_0/LVS_VP0/P0 L0_/LVS_VN0/P L0_/LVS_VP/P L0_/LVS_VN/P L0_/LVS_VP/P L0_/LVS_VN/P L0_/LVS_VP/P L0_/LVS_V/P L0_/LVS_VP/P L0_/LVS_VN/P L0_0/SI_MLK/P0 L0_/SM_VPP/P L0_/SM_VPPPP/P L0_/SM_ET/P L0_LK/SM_V/P L0_E/SM_RST/P L0_HSY/SM_SLK/P L0_VSY/SM_S/P L L_0/T0/URT_TX/EINT0/SI_0/PH0 L_/T/URT_RX/EINT/SI_/PH L_/T/URT_RTS/EINT/SI_/PH L_/TIRQ/URT_TS/EINT/SI_/PH L_/T0/URT_TX/EINT/SI_/PH L_/T/URT_RX/EINT/SI_/PH L_/T/URT_TX/MS_S/EINT/SI_/PH L_/T/URT_RX/MS_LK/EINT/SI_ /PH L_/T/KP_IN0/MS_0/EINT/SI_/PH L_/T/KP_IN/MS_/EINT/SI_/PH L_0/T/KP_IN/MS_/EINT0/SI_0/PH0 L_/T/KP_IN/MS_/EINT/SI_/PH L_/T/PS_SK/EINT/SI_/PH L_/T/PS_S/SM_RST/EINT/SI_/PH L_/T0/KP_IN/SM_VPP/EINT/SI_/PH L_/T/KP_IN/SM_VPPPP/EINT/SI_/PH L_/T/KP_IN/SM_ET/EINT/SI_/PH L_/T/KP_IN/SM_V/EINT/SI_/PH L_/T/KP_OUT0/SM_SLK/EINT/SI_/PH L_/T/KP_OUT/SM_S/EINT/SI_/PH L_0/TOE/N_TX/EINT0/SI_0/PH0 L_/TREQ/N_RX/EINT/SI_/PH L_/TK/KP_OUT/S_M/SI_/PH L_/TS0/KP_OUT/S_LK/SI_/PH L_LK/TS/KP_OUT/S_0/SI_PLK/PH L_E/TIORY/KP_OUT/S_/SI_FIEL/PH L_HSY/TIOR/KP_OUT/S_/SI_HSY/PH L_VSY/TIOW/KP_OUT/S_/SI_VSY/PH Y Y Y Y Y Y Y E E E E F F LR0, LR L0-HSY L0-VSY S-ET# S0-ET# RVUS US-RV STTUS-LE WIFI-SHN WIFI-HOST-WKE STTUS-LE ST-PWR- EINT EINT US0-RV, T-REST US0-IET STTUS-LE STTUS-LE US0-VUSET T-WKE T-HOST-WKE G-0 FG-0.MM,0,,,,,,,, V-V V-V,0,,,,,,, 0-cubieboard <oc> V.0 ate: Sheet of

3 RYSTL PLL-NN HMI ORE PIO-INTFE UIO-LR RM-LL OTHERS US-TV-SI PU place close to SO pin OPTIONL -RT ST TVIN 不去掉, 兼容 0 和 0 V-P VRP VR VR VR VR VRP V-V V-V V-V V-V HVP LL -PU LL V-V V-V V-V LL V-V V-V RT V-V V-V V-V V RM-V TWI-S, TWI-SK, VRP VR VR PLLV PLLVREG #,, OSMI OSMO HPV LKK-IN LKK-OUT,0,,,,,,,, V-V,0,,,,,,, VRP-TVIN VRN-TVIN ate: Sheet of <oc> V.0 0-cubieboard ate: Sheet of <oc> V.0 0-cubieboard ate: Sheet of <oc> V.0 0-cubieboard R k R k 0 uf 0 uf R R uF 0uF X F--K F- X F--K F- uf uf 0UF 0UF uF.uF 0 0 R k R k uf 0 uf.uf.uf.uf.uf 0 pf-% 0 pf-% uf uf 0 0.uF.uF 0uF 0uF.uF.uF 0 0 uf uf R 0M R 0M.uF.uF N SO- N SO uF 0uF 0 0uF 0 0uF 0uF 0uF 0 0.uF.uF uf uf 0uF 0uF X M_.pF_0ppm SM- X M_.pF_0ppm SM- XIN XOUT pf-% pf-% pf-% pf-% uf uf.uf.uf pf-% pf-% uf uf.uf.uf u u R 00K-% R 00K-% uF.uF.uF.uF 0 0.uF.uF.uF.uF

4 R bit x pcs R 封装为 TFG Equilong US Z0= 0 ohm KG0E 此两电容均匀放在主控的 SVREF0 SVREF SVREF SVREF 脚, 靠近主控 KG0E KG0E ifferential pairs Z0= 00 ohm KG0E S S S S S SK# SQ SQ SQ SQ SQ0 SQ SQ SQ SQ SQ SQ0 SQ SQ SQ SQ SQ SQ SQ SQ0 SQ SQ SQ SQ SQ SRST SQS# SRS SS SRST SQS# SRS SS SS0 S[:0] S SQS[:0] SRST S S S S S S S S S S0 SOT0 S[:0] S S0 SS0 SRS SS SQS0# S[:0] S S0 S S0 S S S[:0] S SRST S SKE0 SK# SK SOT0 SKE0 SOT0 S S S S S S S S0 S S S S S[:0] S S S0 S SS0 S SOT0 SS0 SKE0 S SRST SS SRS S[:0] S S0 S S0 S S S[:0] SQM[:0] RM-REF SKE0 RM-V RM-V SQ SQ SQ SQ0 SQ SQ SQ SQ SKE0 SK SK# SK# SK SK SOT0 SQS0# SQS0 SQM0 SS0 SRS SS S S S S S S S0 S S SQS SQM S SQS# S S0 S RM-REF S S S S S S S S S S S[:0] S S0 S0 S SQS# SQS SQM RM-REF SQM SQS# SQS RM-REF SQ[:0] S[:0] RM-REF SK# SK SQS# S[:0] SVREF SVREF V-V RM-V RM-V RM-V RM-V RM-V RM-V RM-V RM-V RM-V RM-V,0,,,,,,,, V-V,0,,,,,,,, S SQS# SQS# SS SRS SS0 S[:0] SQS[:0] SQS0# SVREF SKE0 SOT0 SQM[:0] SK SK# SQ[:0] SRST SQS# S[:0] ate: Sheet of <oc> V.0 0-cubieboard ate: Sheet of <oc> V.0 0-cubieboard ate: Sheet of <oc> V.0 0-cubieboard uF 0uF uF.uF TP 0V TP 0V.uF.uF.uF.uF R K-% R K-% R -% R -%.uf.uf R -% R -% R -% R -% R R R R R -% R -% U HTQGFR U HTQGFR M/TQS NF/TQS N QS Q QS Q E Q Q0 Q E Q Q Q E VREFQ E K F KE G0 WE H K G S H 0/P H L L 0 K G K L M L M M M N /# K N Q 0 Q Q 0 Q Q G 0 OT G Q 0 Q Q E Q E0 0 J K J S G RS F N VREF J K K0 M M0 ZQ H N F F J J0 L L0 N H0 H F0 F N0 N J R R U HTQGFR U HTQGFR M/TQS NF/TQS N QS Q QS Q E Q Q0 Q E Q Q Q E VREFQ E K F KE G0 WE H K G S H 0/P H L L 0 K G K L M L M M M N /# K N Q 0 Q Q 0 Q Q G 0 OT G Q 0 Q Q E Q E0 0 J K J S G RS F N VREF J K K0 M M0 ZQ H N F F J J0 L L0 N H0 H F0 F N0 N J R K-% R K-% U HTQGFR U HTQGFR M/TQS NF/TQS N QS Q QS Q E Q Q0 Q E Q Q Q E VREFQ E K F KE G0 WE H K G S H 0/P H L L 0 K G K L M L M M M N /# K N Q 0 Q Q 0 Q Q G 0 OT G Q 0 Q Q E Q E0 0 J K J S G RS F N VREF J K K0 M M0 ZQ H N F F J J0 L L0 N H0 H F0 F N0 N J pf pf R K-% R K-% R0 K-% R0 K-% 0 0 U HTQGFR U HTQGFR M/TQS NF/TQS N QS Q QS Q E Q Q0 Q E Q Q Q E VREFQ E K F KE G0 WE H K G S H 0/P H L L 0 K G K L M L M M M N /# K N Q 0 Q Q 0 Q Q G 0 OT G Q 0 Q Q E Q E0 0 J K J S G RS F N VREF J K K0 M M0 ZQ H N F F J J0 L L0 N H0 H F0 F N0 N J 0 0

5 R0 R (option with NN flash) S0- R R S- S0-0 R0 R S-0 S- S0-LK S-LK N R R R S-0 S0-M S-M N0 R R R S-LK S0- S-, NR# R R R S-M S0- S-, NR0# R R R N R S- N R0 S- V-V V-V S0-ET# 0 0 S0-M R K R K R K R K R K S0-ET# S0-0 S0- S0- S0- R K S-ET# 0 V-V 0 0 V-V R K NR0# R R K K R0 R K K S-ET# N0 N N N R K R V-V R S- V-V S- T S- S-M T N0 S- T M S- S- S-M T S-M S-LK M S-LK 0 S-0 0uF LK S- S0-ET# S-LK S-0 LK S- T0 S-0 T 0 ON x.0mm 0uF ONZ_.0 S- T0 T 0 S0-ET# # S-ET# # MIRO_S_SLOT MIRO_S /MIRO_S_SLOT MIRO_S NN & TS V-V U RES# TS0 TS V-V 0 TS R 0K NR# R# N, NR# NR# R# IO N, NR0# NR0# R# IO N NRE# NR# R# IO N E0# TSLK V-V NR0# E0# RE# IO 0 R 0K E# E# 0 E# E# VPS V-V V V NQS NQS E# V-V V-V V-V LE LE E# TSM NLE NLE LE N NWE# NWE# LE IO N NN-WP# WE# IO 0 N 0 WP# IO N0 V-V R R IO0 0K / N[:0] N[:0] TS V-V NN-WP# VPS 0 0 R TS/KGG0U0 0 / TSOP 0uF 0 - NR# NR0# TSLK TSM N N N N0 TS TS TS TS0,0,,,,,,,, V-V V-V,0,,,,,,, 0-cubieboard <oc> V.0 ate: Sheet of

6 ST ST-PWR- REXT-ST R R-% OOST-V ST-PWR- 0 ST-V R / R00 R 0K R0 0K R.K Q N0 SOT ST-V-V Q TS0 SOT 0 uf 0 0 N SIP-.MM-PWR SIP-P-.-VERTIL TXP-ST TXN-ST RXN-ST RXP-ST N SIP-.MM SIP-P-.- P TXP TXN RXN RXP ST-TNN-SM ST-T-SM V- O O uf-v 0-V 0 ST-PWR- OR K OU S R S 0K S G NS SOI- OQ NPN_MMT0 SOT- O uf-v 0 0-V V-ST N SIP-.MM SIP-P-.-VERTIL, T-PM-OUT, T-PM-IN, T-PM-SY, T-PM-LK T-TS T-RTS T-TX T-RX S-0 S- S- S- S-M S-LK WIFI-T T-REST T-WKE T-HOST-WKE WIFI-SHN WIFI-HOST-WKE LK-K T-PM-OUT T-PM-IN T-PM-SY T-PM-LK T-URT-RTS T-URT-TS T-URT-RX T-URT-TX SIO-0 R SIO- K SIO- SIO- SIO-M SIO-LK R R T-REST V-V T-WKE T-HOST-WKE WIFI-SHN WIFI-HOST-WKE LK-K V-V R K L, rated current 00m expectation specification. V-V L.uH 00 WIFI-SHN WIFI-HOST-WKE SIO- SIO- SIO-M SIO-LK SIO-0 SIO- 0 0.uF U PXXX MO-P0 WL_REG_ON WL_HOST_WKE SIO_T_ SIO_T_ SIO_T_M SIO_T_LK SIO_T_0 SIO_T_ VIN_LO_OUT IO V-V.uF 0 XTL-OUT XTL-IN XTL_OUT XTL_IN 0 VT T_VIO/N_HOST_WKE T-HOST-WKE T-WKE T_HOST_WKE T_WKE N_WKE FM_RX WL_T_NT VIN_LO LPO PM_OUT PM_LK PM_IN PM_SY _TXO TXO_IN GPS_RF 0 WiFi NT NT UNITRON0 SM0 L 代替 L00 N_SWP_IN N_SWP_OUT N_SWPIO URT_TS_N URT_RX URT_TX URT_RTS_N 0 TX TX N_REG_PU N_I_SL N_I_S T_RST_N TP T-URT-TS T-URT-RX T-URT-TX T-URT-RTS T-REST 0 Ohm RF trace 还需要增加 FM 天线 P0 需要框内和部分,R,R 就 P,P0 只需要框内部分 MLK-IN XTL-IN V-V R R / R 0 pf U NLWZU0 SOT- OUT Y Vcc OUT Y X MHz-pF SM- IN IN R 0K pf R0 / XTL-OUT 0.uF 0 LK-K T-PM-IN T-PM-LK T-PM-OUT T-PM-SY V-V R / MLK-IN P0 接上此电阻,P 和 P0 不接,0,,,,,,,, V-V V-V,0,,,,,,, 0-cubieboard <oc> V.0 ate: Sheet of

7 ST-V.V for IO Vout=0.Vx(+R/R) 0.x(+.k/0k)=.0V Vout=0.Vx(+R/R)=.V.V.V FOR R -IN & - PMU Solder option with -JK,coreboard can be powered from extended board through it in other embeded system app. -ST 还需要考虑电池的情况 EXT V TWI0-S LO # LOSET LO TWI0-SK TWI0-S TWI0-SK EXT LO V LO V-V PWRON UKUP UKUP TT-V -V T PWRON -V T V-V -V V-V RM-V -V V-V -PU LL V-V V-V SI-IO-V RT V-V V-V V-V V V UKUP UKUP USVUS ST-V T T OOST-IN -V VT-H VT-H T VT-H OOST-V OOST-IN #,, NMI# TWI0-SK TWI0-S US0-RV, V-V,,,0,,,,,,,, V-V,0,,,,,,, ate: Sheet of <oc> V.0 0-cubieboard ate: Sheet of <oc> V.0 0-cubieboard ate: Sheet of <oc> V.0 0-cubieboard uF 0uF FUSE -V F0 FUSE -V F0 uf uf K PWRON SW-P-0 K PWRON SW-P-0 U SY0 QFNX-0 U SY0 QFNX-0 IN LX LI P S F 0 PVOUT SVOUT LO 0uF 0uF TP V0 TP V0 R 0 R SS O- SS O- R 0K R 0K R 0.0K-% R 0.0K-% R0 K R0 K uf uf L.u-. H- L.u-. H- R K R K + uf 0 + uf uF 00 0uF R 00K R 00K K SW-P-0 K SW-P-0 SS O- SS O- pf-% pf-% N SO- N SO- R 0-%-/W R00 R 0-%-/W R00.uF.uF R.K-% R.K-%.uF.uF 0 0 L.uH-. H- L.uH-. H- uf uf R R uf uf R.K R.K.uF.uF 0uF 0uF R0 0K R0 0K 0uF 0uF.uF.uF R / R00- R / R00- N SIP-.MM SIP-P-.- N SIP-.MM SIP-P-.- 0uF 0uF U TS SOT- U TS SOT- LX VIN F uf uf 0 00pF 00pF 0uF 0uF uF 0 0uF R K R K 0uF 0uF N /ONZ-MM ONZ--.0 N /ONZ-MM ONZ--.0 R R R R Q O SOT- Q O SOT- U TS SOT- U TS SOT- LX VIN F 0uF 0uF uf 0 uf 0 TP V TP V 0 0uF 0 0uF R 0 R 0 R 00K R 00K R K R K Q O SOT- Q O SOT- L.uH- H0 L.uH- H0 pf-% pf-% 0uF 0uF TP V TP V 0uF 0uF L.u- H- L.u- H- R K R K 0uF 0uF U XP0 QFNE U XP0 QFNE S SK GPIO N_OE GPIO VIN LX P 0 LO LO LOIN VIN LX P GPIO GPIO0/LO EXT 0 PS IS VREF PWROK VINT LOSET LO SET KUP 0 VUS IN IN PS PS HGLE/GPO TS T T LOIN 0 LO TSSE HSSE VIN LX P PWRON IRQ N_VUS THERML + 0uF E + 0uF E + uf 0 + uf 0 R0 0.0K-% R0 0.0K-% 0uF 0uF TP V TP V R 00K-% R 00K-% 0uF 0uF 0uF 0uF 0 0 L.uH-. H- L.uH-. H- uf 00 uf 00 N /ON-MM-K SIP0-MM N /ON-MM-K SIP0-MM 0uF 0uF N/ SO- N/ SO-.uF.uF 0 uf 00 0 uf 00 L.uH-. H- L.uH-. H- uf uf P -JK -00 P -JK -00 R K R K 0 0 R K R K TP0 V TP0 V TP V TP V 0uF 0uF 0uF 0uF J /ON-MM ONZ--.0 J /ON-MM ONZ--.0 0uF 0uF + T LithiumRecharge_V MSFE-IP + T LithiumRecharge_V MSFE-IP U0 TS0-V SOT U0 TS0-V SOT VOUT YP VIN R.0K-% R.0K-% 0uF 0uF uf uf J /ON-MM ONZ--.0 J /ON-MM ONZ--.0 TP V TP V

8 HMI IR MOULE EUG VG SPIF HMI-S HMI-SL HMI-TXP HMI-S HMI-TXN HMI-TXP HMI-TXN HMI-TX0N HMI-TX0P HMI-SL HMI-SL HMI-TXN HMI-HP HMI-E HMI-E HMI-TXP HMI-S HMI-TXN HMI-TX0N HMI-TX0P HMI-TXP HMI-TXN HMI-TXN HMI-TXP HMI-TXP HMI-HP URT0-RX URT0-TX URT0-RX URT0-RX URT0-TX VG-G VG-R VG- VG-G VG- VG-R LK VG-SL T VG-S T LK VG-S VG-SL V-V V-V V-V V-V V-V V-V V OOST-V V-V V-V V-V V-V V-V V-V HTXP HTXN HTXP HTXN HTX0P HTX0N HTXP HTXN HSL HS HHP HE IR-RX, LR0, JTG-SEL URT0-RX URT0-TX UOOT L0-VSY L0-HSY VG-R VG-G VG-,0,,,,,,,, V-V,0,,,,,,, V-V,, TWI-S TWI-SK SPIF-O ate: Sheet of <oc> V.0 0-cubieboard ate: Sheet of <oc> V.0 0-cubieboard ate: Sheet of <oc> V.0 0-cubieboard R / - R / - R 0K R 0K TS SOT TS SOT R R-% R R-% R0 R R0 R ESTVSin-SEFN0V SLP0P- ESTVSin-SEFN0V SLP0P- IN IN IN IN OUT 0 OUT OUT OUT P -F - P -F - 0 0uF 0uF TS SOT TS SOT ES TVSin-SEFN0V SLP0P- ES TVSin-SEFN0V SLP0P- IN IN IN IN OUT 0 OUT OUT OUT pf pf N ON0 SIP N ON0 SIP K u-oot SW-P-0 K u-oot SW-P-0 R 0K R 0K TP SPIF TP SPIF 0 0 TS SOT TS SOT pf pf R0 R R0 R J /ON-MM ONZ--.0 J /ON-MM ONZ--.0 R0 K R0 K R K R K IR Receiver emodulator U HS00 IR Receiver emodulator U HS00 OUT P HMI_plug type HMI_IP P HMI_plug type HMI_IP P G_ N P G_ N 0P G_0 0N LKP 0 G_LK LKN E SL S G_/E +V HOT_PLUG_ET SHIEL 0 SHIEL SHIEL SHIEL R K R K R K R K R R-% R R-% R / - R / - J0 FIER OPTIL J0 FIER OPTIL V IN Q SN0 SOT- Q SN0 SOT- ES ULE000FR ES ULE000FR R / - R / R 0K R 0K R 00K R 00K pf pf ES ULE000FR ES ULE000FR R K R K R0 0K R0 0K Q0 SN0 SOT- Q0 SN0 SOT- N SO- N SO- ES TVSin-SEFN0V SLP0P- ES TVSin-SEFN0V SLP0P- IN IN IN IN OUT 0 OUT OUT OUT R R-% R R-% pf pf R / - R / - R0 / R0 / R R R R

9 OTG US HOST x 如加 ES 器件, 取消该电阻, 直接短接还需要分配 GPIO US_HOST_V SO-M SO-P US_HOST_V SO-M SO-P SO-M SO-P SO-P0 SO-M0 SO-M SO-P SO-P SO-M US0-IET SO-P0 SO-M0 US0-RV USVUS US0-VUSET US0-VUSET US0-IET US0-RV US_HOST_V US_HOST_V SO-M SO-M SO-P SO-P OTG-I SO-P0 OTG-I SO-M0 US_HOST_V US_HOST_V OOST-V US_HOST_V OOST-V US_HOST_V V-V V-V OOST-V USVUS V-V USVUS SO-M SO-P RVUS US-RV SO-P0 SO-M0 HOST_M HOST_P SO-P SO-M,0,,,,,,,, V-V,0,,,,,,, US0-IET US0-RV, US0-VUSET V-V,, ate: Sheet of <oc> V.0 0-cubieboard ate: Sheet of <oc> V.0 0-cubieboard ate: Sheet of <oc> V.0 0-cubieboard R.K R.K N /ONx_.0mm ONZ--.0 N /ONx_.0mm ONZ--.0 R K R K ES ULE000FR ES00 ES ULE000FR ES00 N SO- N SO- R0 0K R0 0K R0 0K R0 0K ES0 ULE000FR ES00 ES0 ULE000FR ES00 R 00K R 00K ES ULE000FR ES00 ES ULE000FR ES ES ULE000FR ES00 ES ULE000FR ES00 R K R K ES ULE000FR ES ULE000FR R K-% R K-% R0 K-% R0 K-% ES ULE000FR ES ULE000FR 0uF 0uF 0 0 ES ULE000FR ES ULE000FR R0 0K R0 0K uf 0 uf 0 USx-H P US--ULE US--ULE-H USx-H P US--ULE US--ULE-H VUS VUS S S S S 0 R 0K R 0K ES ULE000FR ES ULE000FR P US-MINI-SOKET US-PORT-I P US-MINI-SOKET US-PORT-I VUS - + I SHIEL SHIEL SHIEL SHIEL + uf 0 + uf 0 R 0K R 0K N /ON x.0mm ONZ_.0 N /ON x.0mm ONZ_.0 U TS0 SOT- U TS0 SOT- ISET OUT IN U TS0 SOT- U TS0 SOT- ISET OUT IN R 0K R 0K OU TS0 SOT-- OU TS0 SOT-- ISET OUT IN + uf 0 + uf 0

10 GM ETX0 ETX ETX ETX ETX EGTXLK ERX0 ERX ERX ERX ERXLK ERXV EM EMIO EPHY-RST-N EGLKIN ETX0 ETX ETX ETX ETX EGTXLK ERX0 ERX ERX ERX ERXLK ERXV EM EMIO EPHY-RST-N ELKIN V-V V-V>00m > m pin 0 pin, 0 pin, 0 EPHY- 0 EPHY- EPHY- Note : The Trace length between L and PHY's Pin must be within 0. cm. (uf) and (0.uF) to L must be within 0.cm. uf 0 REG 0 REGOUT L.uH-00m uf 0 0 pin,,0 0 R0 R00 Reserve for EMI 0 pin, 0 KXTL KXTL R K-% PHYRST EPHY- R 0K R / M-RST - 0 PME R K EPHY- EPHY- INT R K Place filter network close to LK. Reserved for EMI ELKIN 0 pf/ Place filter network close to RX_LK. Reserved for EMI ERXLK EGTXLK ERXV ERX0 ERX ERX ERX ETX ETX0 ETX ETX ETX R R 0 /pf - R RXLK TXLK 0 pf/ - RXTL- RX0-SELRGV RX-TXLY RX-N0 RX-N TXTL TX0 TX TX TX LK R R Note : The Trace length from (uf), (0.uF) to Pin,(REG) must be within 0. cm. The trace width from to Pin, should>0mils K K PHY ddress=00(rtle) R0 /K - Pull down for.v RGMII(RTL/E) R /K - R /K - onfig for all capability R /K - R /K - dd TX/RX elay EMIO EM EPHY-RST-N R K LE0-0 LE- RXTL- RX0-SELRGV RX-N0 RX-N RX-TXLY LE-RXLY R K R K R K R K R K R0 K EPHY- MIO M M-RST EPHY- EPHY- EPHY- MI0+ MI0- MI[0]+ 0 MI[0]- MI+ 0 MI- MI[]+ EPHY- MI[]- MI+ MI- MI[]+ 0 MI[]- MI+ 0 0 MI- MI[]+ MI[]- U RTLE-V-G QFN-E REGOUT (EP) REGOUT LK REG REG LK REG EPHY- 0 RSET REG KXTL KXTL 0 RTLE EPHY- 0 RSET SWREG RXTL/PHY RX0/SELRGV RX/TXLY RX/N0 RX/N RX INT TX TX0 TX 0 RXTL- RX0-SELRGV EPHY- RX-TXLY RX-N0 RX-N RXLK INT EPHY- TXLK TX0 TX 0 LE/PHY LE0/PHY0 PME LE_RXLY MIO M 0 PHYRST 0 TXTL TX TX 0 LE- LE0-0 PME LE-RXLY MIO M PHYRST 0 TXTL TX TX MI- MI+ MI0- MI0+ MI- MI+ MI- MI+ U MI- MI+ MI- MI+ MI- MI+ MI0- MI0+ 0/00/000 MGNETIS && RJ GRE+ GRE- 变压器是否需要供电?? YELLOW------LEO LINKING = transmiting GRE E=LINK,0=LINK UP,=LINK OWN R LE- 0 0/ KXTL M_pf XIN XOUT X SM- KXTL R pf-% pf-% TRM-TR - R /R-% - R /R-% - R /R-% - R /R-% - R /R-% - R /R-% - R /R-% - R0 /R-% HS /0 /0 /0 /0 0uF-0V YELLOW- 0 HS YELLOW+ HR0 HY0-IP 0-KV 0-KV HS LE / R EPHY- V-V R TRM-TR R00 V-V,,,,,,,,, V-V,,,,,,,, 0-cubieboard <oc> V.0 ate: Sheet 0 of

11 Extention interface V-V V-V,, V-V V-V V SPI-S0 SPI-LK SPI0-S SPI0-LK PSSK0-FMINL PSS0-FMINR PWM PWM0, TWI-SK, TWI-S VS FMINL PS-SK0 FMINR PS-S0 V-V R - PSSK0-FMINL R R0 - PSS0-FMINR R N ONZx-mm ONZ-0-.0 V-V #,, SPI-MOSI SPI-MISO SPI0-MOSI SPI0-MISO PSSK-EINT PSS-EINT IRRX-VMI IR-TX LINEINL-MIIN LINEINR-MIIN LR0, LR - R R TVIN-TPMSY - R R TVIN-TPMOUT - R PSSK-EINT R - R PSS-EINT R - R IRRX-VMI R - R0 LINEINL-MIIN R - R LINEINR-MIIN R EINT PS-SK EINT PS-S VMI IR-RX, MIIN LINEIN-L MIIN LINEIN-R IS-O XP IS-O XN IS-O YP, T-PM-IN YN - R R - R R - R R0 XP-ISO XN-ISO YP-ISO YN-T-PM-IN SI-PLK SI-HSY SI-0 SI- SI- SI- XP-ISO XN-ISO YP-ISO YN-T-PM-IN IS-MLK TVIN0, T-PM-LK TVIN, T-PM-SY TVIN, T-PM-OUT TVIN N ON-x-mm ONZ R R - R R TVIN0-ISMLK - R R TVIN-TPMLK TVIN0-ISMLK TVIN-TPMLK TVIN-TPMSY TVIN-TPMOUT SI-VSY SI-MLK SI- SI- SI- SI- 还需要分配 GPIO IS,I,SPI,VS,LR0 x,urt,ps,pwmx TS/SI,IR, x LINEIN LE_00 LE-WHITE Q R K STTUS-LE N0 STTUS-LE SOT R0 K V-V R R K R K R Q N0 SOT V-V LE_00LE-GRE V,.V, LEs POWER LE R LE-RE LE_00 V-V Head Phone & Speaker HPOM HPOMF HPL HPR HPOM HPOM-F HPL HPR STTUS-LE STTUS-LE V-V R 0 STTUS LE LE_00 LE-LUE F 0-00M L00 R K Q HPL HPL-OUT N0 F 0-00M L00 SOT HPR HPR-OUT F 0-00M L00 HPOM HPOM-OUT R K HPOM-F R R R R R R R N HPL-OUT V-V /ONZ-MM R00 ONZ--.0 STTUS LE Q LE-YELLOW R0 K N0 LE_00 SOT R0 K P HP-JK PJ-F HPR-OUT HPOM-OUT TP M-via TP M-via TP M-via TP M-via,0,,,,,,,, V-V V-V V-V,0,,,,,,, 问题 : G 的问题, 用什么 R? 扩展口的问题 0-cubieboard <oc> V.0 ate: Sheet of

cm-a20

cm-a20 INEX Schematics Index: REVISION HISTORY 0 Index 0 PU 0 PU 0 R bit x pcs 0 ESIE PU 0 POWER 0 NN+eMM 0 EM 0 INTERFE Rev escription ate rawn hecked M-0/0 V.0 Used to replace the old Marsoard 0-- Thomas Thomas