cm-a20

Size: px

Start display at page:

Download "cm-a20"

浓褚
5 years ago
Views:

Modified PHY LE output high valid 0-0-0 Thomas Thomas M-0/0 V.

1 INEX Schematics Index: REVISION HISTORY 0 Index 0 PU 0 PU 0 R bit x pcs 0 ESIE PU 0 POWER 0 NN+eMM 0 EM 0 INTERFE Rev escription ate rawn hecked M-0/0 V.0 Used to replace the old Marsoard 0-- Thomas Thomas M-0/0 V. Modified PHY LE output high valid Thomas Thomas M-0/0 V.0 Use x bit R,support Max G memory 0-0- Thomas Thomas pproved M-0/0 esigned by HOYU Electronics HOYU Electronics M-0/0 INEX.0 reate ate: Wednesday, ecember, 0 Modify ate: Monday, pril, 0

2 PU U- SQ[:0] SQS[:0] SQS[:0] SQM[:0] S[:0] S[:0] SQ[:0] SQS[:0] SQS[:0] SQM[:0] S[:0] S[:0] PU-REF SK-N SK SKE SS SRS SS SOT SQ0 SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ0 SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ0 SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ0 SQ SQS0 SQS0 SQS SQS SQS SQS SQS SQS SQM0 SQM SQM SQM S0 S S S S S S S S S S0 S S S S S S0 S S R 0R-% R00 SQ0 SQ SQ SQ SQ SQ SQ SQ SQ Y SQ SQ0 SQ W SQ SQ Y SQ T SQ N SQ U SQ P SQ T SQ U SQ0 N SQ M SQ J SQ L SQ H SQ K SQ L SQ G SQ M SQ H SQ0 H SQ H SVREF0 Y SVREF SVREF SVREF SQS0 SQS0# SQS R SQS# P SQS K SQS# J SQS SQS# W SQM0 R SQM G SQM V SQM V SK# N SK J SKE J SK# W SK R S0 U S M S Y S N S V S M S S P S L S W S0 P S Y S R S S K S L S0 K S T S U T SS V SRS SS0 OT P SZQ R SG0 N SG SG 0 FG0PX RM NWE#/SPI0_MOSI/P0 NLE/SPI0_MISO/P NLE/SPI0_LK/P NE/P NE0/P NRE#/P NR0/S_M/P NR/S_LK/P NQ0/S_0/P NQ/S_/P NQ/S_/P0 NQ/S_/P NN NQ/P NQ/P NQ/P NQ/P NWP/P NE/P NE/P NE/SPI_S0/P NE/SPI_LK/P0 NE/SPI_MOSI/P NE/SPI_MISO/P SPI0_S0/P NQS/P TS0_LK/SI0_PLK/PE0 TS0_ERR/SI0_MLK/PE TS0_SYN/SI0_HSYN/PE TS0_VL/SI0_VSYN/PE TS0/SI0 TS0_0/SI0_0/PE TS0_/SI0_/PE TS0_/SI0_/PE TS0_/SI0_/PE TS0_/SI0_/PE TS0_/SI0_/PE TS0_/SI0_/PE0 TS0_/SI0_/PE TS/SI TS_LK/SI_PLK/S_M/PG0 TS_ERR/SI_MLK/S_LK/PG TS_SYN/SI_HSYN/S_0/PG TS_VL/SI_VSYN/S_/PG TS_0/SI_0/S_/SI0_/PG TS_/SI_/S_/SI0_/PG TS_/SI_/URT_TX/SI0_0/PG TS_/SI_/URT_RX/SI0_/PG TS_/SI_/URT_RTS/SI0_/PG TS_/SI_/URT_TS/SI0_/PG TS_/SI_/URT_TX/SI0_/PG0 TS_/SI_/URT_RX/SI0_/PG M M L L K K J J H H G G H H0 G G0 M F F L K J J0 G F E E F0 E E0 0 E 0 N0 N N N N N N N NWE# NLE NLE NE# NE0# NRE# NR0# NR# N0 N N N N N N N NWP P P P P0 P P P NQS SI0-PLK SI0-MLK SI0-HSYN SI0-VSYN SI0-0 SI0- SI0- SI0- SI0- SI0- SI0- SI0- SI-PLK SI-MLK SI-HSYN SI-VSYN SI-0 SI- SI- SI- SI- SI- SI- SI- U- RM-V G H V0-RM L V-RM M V-RM R V-RM T V-RM W V-RM W V-RM W V-RM Y V-RM PUV V-RM H H V0-PU H V-PU H V-PU J V-PU J V-PU INTV V-PU J J V0-SYS K V-SYS K0 V-SYS K V-SYS L V-SYS L V-SYS R V-SYS R0 V-SYS T V-SYS INTV V-SYS M N V0-LL P V-LL V-V V-LL W W V-LVS W V-LVS V0-LVS H H V0 H V J V J V J V V-P V H0 V-P J0 V0-P H V-P R-V J V0-P SI0-V N V-P SI-V F V-PF E V-PE V-PG VV-TV V-V W W V-TVOUT W V-TVIN V-TVIN UV L ULV L V0-US K V-US V-US 0 V-0-ST V--ST V-0-ST V--ST V-HMI TVIN -TVIN N N0 V-ST N N V-ST M M HVP T G G J K N P U V Y Y M N0 P0 J K K K L0 L L M0 M M M N N P P R R T T W W0 W K L L M N N R P P Y W R R M-0/0 PU.0 reate ate: Wednesday, ecember, 0 Modify ate: Monday, pril, 0

3 R-ITX SK-N SK SK-N SK S0 S S S S S S S S S S0 S S S S S REF SQ SQ SQ SQ SQ0 SQ SQ SQ SQ SQ SQ0 SQ SQ SQ SQ SQ SQ[:0] S[:0] S[:0] SQM[:0] SQS[:0] SQS[:0] SQ SQ SQ SQ SQ0 SQ SQ SQ SQ SQ SQ SQ SQ SQ SQ0 SQ SS SRS SS SKE REF SK-N SK SS SRS SS SKE REF SK-N SK SS SRS SS SKE REF SK-N SK SQM0 SQS0 SQS0 SOT S0 S SS SRS S SS SKE REF SQM SQS SQS SOT SQM SQS SQS SOT SQM SQS SQS SOT S0 S S S S S S S S S S0 S S S S S S0 S S S S S S S S S S0 S S S S S S0 S S S S S S S S S S0 S S S S S REF S0 S S S0 S S REF S0 S S REF REF SK-N SK RM-V RM-V RM-V RM-V RM-V RM-V RM-V RM-V RM-V RM-V PU-REF SQ[:0] S[:0] S[:0] SQM[:0] SQS[:0] SQS[:0] SK SKE SK-N SS SRS SS SOT reate ate: Modify ate: M-0/0 R bit x pcs Sunday, pril, 0 Monday, pril, reate ate: Modify ate: M-0/0 R bit x pcs Sunday, pril, 0 Monday, pril, reate ate: Modify ate: M-0/0 R bit x pcs Sunday, pril, 0 Monday, pril, 0.0 R 0R-% R00 U Rx J M/TQS NF/TQS QS Q QS Q E Q Q0 Q E Q Q Q E VREFQ E K F KE G WE H K G S H 0/P H L L 0 K V G K L M L M M M N /# K N VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSS V V G V V OT G VQ VQ VQ E VQ E 0 J K J S G RS F N VREF J V K V K V M V M ZQ H RESET N VSS F VSS F VSS J VSS J VSS L VSS0 L VSS N N H N H N F N F N VSS N N-0pF R 0R-% R00 R 0R-% R00 uf U Rx J M/TQS NF/TQS QS Q QS Q E Q Q0 Q E Q Q Q E VREFQ E K F KE G WE H K G S H 0/P H L L 0 K V G K L M L M M M N /# K N VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSS V V G V V OT G VQ VQ VQ E VQ E 0 J K J S G RS F N VREF J V K V K V M V M ZQ H RESET N VSS F VSS F VSS J VSS J VSS L VSS0 L VSS N N H N H N F N F N VSS N R K-% R00 R 0R-% R00 R K-% R00 uf 0 U Rx J M/TQS NF/TQS QS Q QS Q E Q Q0 Q E Q Q Q E VREFQ E K F KE G WE H K G S H 0/P H L L 0 K V G K L M L M M M N /# K N VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSS V V G V V OT G VQ VQ VQ E VQ E 0 J K J S G RS F N VREF J V K V K V M V M ZQ H RESET N VSS F VSS F VSS J VSS J VSS L VSS0 L VSS N N H N H N F N F N VSS N R R R00 uf R R R00 U Rx J M/TQS NF/TQS QS Q QS Q E Q Q0 Q E Q Q Q E VREFQ E K F KE G WE H K G S H 0/P H L L 0 K V G K L M L M M M N /# K N VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSS V V G V V OT G VQ VQ VQ E VQ E 0 J K J S G RS F N VREF J V K V K V M V M ZQ H RESET N VSS F VSS F VSS J VSS J VSS L VSS0 L VSS N N H N H N F N F N VSS N 0 0uF 00 uf uf

4 PU,,,,,,,, ERX ERX ERX ERX0 ETX ETX ETX ETX0 ERXK ERXERR ERXV EM EMIO ETXEN ETXK ERS EOL ETXERR PMU-SK PMU-S TWI-SK TWI-S TWI-SK TWI-S TWI-SK TWI-S TWI-SK TWI-S SPI0-S0 SPI0-LK SPI0-MOSI SPI0-MISO PI PI URT0-TX URT0-RX IR-TX IR-RX JTG-MS JTG-K JTG-O JTG-I UOOT JTG-SEL NMI# RESET# LKK-IN LKK-OUT OSMI OSMO PLLVP RTV E E E E E 0 E0 E E W T0 F T H F F N N T T R P K P U- MIS R0 RX/SPI_S0/URT_RTS/P0 RX/SPI_LK/URT_TS/P RX/SPI_MOSI/URT_TX/P RX0/SPI_MISO/URT_RX/P TX/SPI_S/P TX/SPI_S0/P R TX/SPI_LK/P TX0/SPI_MOSI/P RXK/SPI_MISO/P ERXERR/SPI_S/IS_MLK/P ERXV/GRXTL/URT_TX/P0 M/URT_RX/P MIO/URT_TX/URT_RTS/P ETXEN/GTXTL/URT_RX/URT_TS/P EINT ETXK/URT_TX/URT_TR/IS_LK/P ERS/GTXK/URT_RX/URT_SR/IS_LRK/P EOL/GLKIN/N_TX/URT_/IS_O/P ETXERR/N_RX/URT_RING/IS_I/P TWI TWI0_SK/P0 TWI0_S/P TWI_SK/P TWI_S/P TWI_SK/P0 TWI_S/P UIO INT TWI_SK/PI0 TWI_S/PI TWI_SK/PI PWM/TWI_S/PI SPI SPI0_S0/URT_TX/EINT/PI0 SPI0_LK/URT_RX/EINT/PI SPI0_MOSI/URT_TX/LK_OUT_/EINT/PI SPI0_MISO/URT_RX/LK_OUT_/EINT/PI PS UIO OE PS_SK/TLKIN0/EINT/SPI0_S/PI PS_S/TLKIN/EINT/SPI_S/PI URT URT0_TX/IR_TX/P URT0_RX/IR_RX/P IR IR0_TX/SPIF_MLK/STNYWFI/P IR0_RX/P SYS trl JTG_MS0/SPI_S0/P JTG_K0/SPI_LK/P JTG_O0/SPI_MOSI/P JTG_I0/SPI_MISO/P UOOT_SEL JTG_SEL NMI# RESET# VQE TEST LK SR XKI XKO XMI XMO US PLLTEST PLLV PLLVREG V-PLL V-RT PLL S0_/JTG_MS/PF0 S0_0/JTG_I/PF S0_LK/URT0_TX/PF S0_M/JTG_O/PF S0_/URT0_RX/PF S0_/JTG_K/PF S_M/PI S_LK/PI S_0/PI S_/PI S_/PI S_/PI EINT/SPI_S0/URT_RTS/PI EINT/SPI_LK/URT_TS/PI EINT0/SPI_MOSI/URT_TX/PI EINT/SPI_MISO/URT_RX/PI IS_MLK/_MLK/P IS_LK/_LK/P IS_LRK/_SYN/P IS_O0/_O/P IS_O/P IS_O/P0 IS_O/P IS_I/_I/SPIF_I/P SPI_S/SPIF_O/P PHOUTN PHOUTP FMINL FMINR VMI MIIN MIIN LINEINL LINEINR HPOUTR HPOM HPOMF V-HP HPP HPOUTL HP V VRP VR VR M0 P0 M P M P M0 M L0 L K0 K E E E 0 Y0 Y 0 0 W 0 Y V T W V0 W0 U S0- S0-0 S0-LK S0-M S0- S0- S-M S-LK S-0 S- S- S- URT-RTS URT-TS URT-TX URT-RX IS-MLK IS-LK IS-LRK IS-O0 IS-O IS-O IS-O IS-I SPIF-O VMI MIIN MIIN LINEINL LINEINR HPR HPOM HPOM-F HPVIN HPP HPL V VRP VR VR N0 M0 N P0 P0 M P P R0 M R P, TV-IN0 TV-IN TV-IN TV-IN VRP-TVIN VRN-TVIN TV-OUT0 TV-OUT TV-OUT TV-OUT TXP-ST TXN-ST RXP-ST RXN-ST REXT-ST HTX0P HTX0N HTXP HTXN HTXP HTXN HTXP HTXN HSL HS HHP HE PWM0 PI0 PI LR0 LR TPX TPX TPY TPY U- TVIN0 TVIN Y TVIN TVIN Y VRP_TVIN VRN_TVIN TVOUT0 TVOUT TVOUT TVOUT T0 T TXP_ST U TXM_ST U0 RXP_ST V RXM_ST R REXT_ST P LKP_ST LKM_ST V V TX0P_HMI U TX0N_HMI U TXP_HMI T TXN_HMI T TXP_HMI W TXN_HMI W TXP_HMI T TXN_HMI R VREG_HMI R SL_HMI P S_HMI P HP_HMI E_HMI PWM0/P E E HSL/URT_TX/PS_SK0/PI0 HS/URT_RX/PS_S0/PI LR0 LR Y X_TP Y X_TP Y_TP Y_TP 0 TV ST HMI PWM TP L0 L0_0/LVS0_VP0/P0 L0_/LVS0_VN0/P L0_/LVS0_VP/P L0_/LVS0_VN/P L0_/LVS0_VP/P L0_/LVS0_VN/P L0_/LVS0_VP/P L0_/LVS0_VN/P L0_/LVS0_VP/P L0_/LVS0_VN/P L0_0/LVS_VP0/P0 L0_/LVS_VN0/P L0_/LVS_VP/P L0_/LVS_VN/P L0_/LVS_VP/P L0_/LVS_VN/P L0_/LVS_VP/P L0_/LVS_VN/P L0_/LVS_VP/P L0_/LVS_VN/P L0_0/SI_MLK/P0 L0_/SM_VPPEN/P L0_/SM_VPPPP/P L0_/SM_ET/P L0_LK/SM_VEN/P L0_E/SM_RST/P L0_HSYN/SM_SLK/P L0_VSYN/SM_S/P L L_0/URT_TX/EINT0/SI_0/PH0 L_/URT_RX/EINT/SI_/PH L_/URT_RTS/EINT/SI_/PH L_/URT_TS/EINT/SI_/PH L_/URT_TX/EINT/SI_/PH L_/URT_RX/EINT/SI_/PH L_/URT_TX/MS_S/EINT/SI_/PH L_/URT_RX/MS_LK/EINT/SI_ /PH L_/ERX/KP_IN0/MS_0/EINT/SI_/PH L_/ERX/KP_IN/MS_/EINT/SI_/PH L_0/ERX/KP_IN/MS_/EINT0/SI_0/PH0 L_/ERX0/KP_IN/MS_/EINT/SI_/PH L_/PS_SK/EINT/SI_/PH L_/PS_S/SM_RST/EINT/SI_/PH L_/ETX/KP_IN/SM_VPPEN/EINT/SI_/PH L_/ETX/KP_IN/SM_VPPPP/EINT/SI_/PH L_/ETX/KP_IN/SM_ET/EINT/SI_/PH L_/ETX0/KP_IN/SM_VEN/EINT/SI_/PH L_/ERXK/KP_OUT0/SM_SLK/EINT/SI_/PH L_/ERXERR/KP_OUT/SM_S/EINT/SI_/PH L_0/ERXV/N_TX/EINT0/SI_0/PH0 L_/EM/N_RX/EINT/SI_/PH L_/EMIO/KP_OUT/S_M/SI_/PH L_/ETXEN/KP_OUT/S_LK/SI_/PH L_LK/ETXK/KP_OUT/S_0/SI_PLK/PH L_E/ERS/KP_OUT/S_/SI_FIEL/PH L_HSYN/EOL/KP_OUT/S_/SI_HSYN/PH L_VSYN/ETXERR/KP_OUT/S_/SI_VSYN/PH Y Y Y Y Y Y Y E E E E F F L0-0 L0- L0- L0- L0- L0- L0- L0- L0- L0- L0-0 L0- L0- L0- L0- L0- L0- L0- L0- L0- L0-0 L0- L0- L0- L0-LK L0-E L0-HSYN L0-VSYN PH0 PH PH PH PH PH PH PH PH PH PH0 PH PH PH PH PH PH PH PH PH PH0 PH PH PH PH PH PH PH 0 PU M-0/0 reate ate: Wednesday, ecember, 0 Modify ate: Monday, pril, 0 HOYU Electronics.0

5 ESIE PU RM Near the LLV pin foot placement. The device cannot be modified or deleted, otherwise cause system instability! PLL V-V PLLVP HMI V-V HVP INTV 0.uF 00 LLV RM-V.uF 00 uf uf LYOUT:lose to the P. rystal OSMI OSMO X XIN XOUT M_0pF_0PPM SM R 0R R00 pf-% pf-% LKK-IN RY_M X LKK-OUT R0 0M-% R00 0 pf-% pf-% ORE 0uF 00 INTV uf uf uf LYOUT:lose to the P. uf UIO&SYS PIO-INTFE, RESET#,, LR0 0 VR VRP 0uF 00.uF 00 R 00K-% R00 VR MIM 0 uf R 0R-% V-V 0uF 00 uf uf 0 V-V NN-V FOR NN-V PIN V-V R-V R00 V-V HPVIN HPVIN HPP 0uF 00 0uF 00 RTV 0 V-V R N R00 Ra If no camera Ra = 0R. SI0-V V-V R N R00 Rb If no camera Rb = 0R. SI-V V-V.uF 00 V-P US PU TV INTV ULV V-V UV PUV VRP-TVIN VRN-TVIN V-V VV-TV 0uF 00 uf uf uf uf 0.uF 00 LYOUT:lose to the P. ST TWI-PULLUP V-V REXT-ST R R-% R00 INTV.uF 00 V-ST V-V.uF 00 Note layout :apacitor close to the SO. V-ST,,,,,, PMU-SK PMU-S TWI-SK TWI-S R K R00 R K R00 R K R00 R0 K R00 M-0/0 ESIE PU reate ate: Wednesday, ecember, 0 Modify ate: Monday, pril, 0 HOYU Electronics.0

6 POWER -V 0 V-V RESET# NMI# TWI0-SK TWI0-S PWR-ON# Power Supply: Name Vout Imax XP0 XP0 XP0 LO.V 0m RT XP0 LO XP0 LO XP0 LO SY00 RESET#,, NMI# PMU-SK, PMU-S, -V PWR-ON# uf/v 00.V V.V.V 00m 00m 00m 00m PMU-XP0 靠近 LOIN 放置 0uF 00.uF 00 Placed close to the VIN. Must increase R circuit. PWR-ON# R K R00 PU.V 00m ORE.V RT-T.uF 00 00m V SI0-IO SI-IO RM Use 00.uF NMI# LO R K R00 R 00R N SO V-V 0uF 00 TWI0-S TWI0-SK HGLE/GPO TS T 0 T LOIN LO TSENSE HSENSE VIN LX P PWRON IRQ THERML PS PS IN IN RT-T U XP0 QFN 0 0uF 00 LO uf 00 VUS KUP 0 SET LO LOSET VINT PWROK S SK GPIO N_OE GPIO N_VUSEN VIN LX P LO LO 0 R K R00 L.uH uf 00 VREF IS PS EXTEN 0 GPIO0/LO GPIO P LX VIN LOIN layout 注意 : 此处需良好接地, 直接过孔到地平面 EXTEN RESET# 00 V 0.uF 00 LO 0.uF 00 layout 注意 : 电源反馈线可以走细线, 以保证电感路径走粗线 R K R00 R 0uF PUV uf uF 00 00K-% R00 L.uH TP V TP_SM 0 0 INTV 0 0uF 00 TP V TP_SM 0 0 LO lways.v 0m for RT LO.~.V 00mV/Setp 00m LO 0.~.V mv/setp 00m LO.~.V 00mV/Setp 00m V Layout 注意 : 要求在平面层做电源切割优先级 :PUV>RM-V>INTV>V-V 按电源线规范走线, 保证线宽 PUV V-V INTV LO LO LO PUV V-V INTV RTV V V-V V-V SY00.V 00m IO/NN/EM X0 LO.V 00m ST/TVIN/TVOUT X0 LO.V 00m EMM RM-V V TP V RM-V TP_SM 0uF 00 Vout = 0.*(+R/R)=.0V L.uH 0 pf R R00 R U EN 0K-% LX SY0 SOT- F IN R R00 R 0uF 00 00K-% -V V-V TP V V-V TP_SM 0uF 00 V-V Vout = 0.*(+R/R) EXTEN L.uH pf R R00 R U EN F K-% LX SY0 SOT- IN R0 R00 0uF 00 R 0K-% -V V-V uf 00 V-V M-0/0 U V-V VIN VOUT uf 00 E F X0-V SOT- POWER reate ate: Wednesday, ecember, 0 Modify ate: Monday, pril, 0 TP V TP_SM

7 NN+eMM NR0# NR# NQS N0 N N N N N N N NR0# NR# NQS N0 N N N N N N N emm-m emm-lk emm-rst emm-0 emm- emm- emm- NRE# NE0# NE# NN-V NLE NLE NWE# NN-V NR# NR0# NR# NE0# NE# 0 NLE NLE NWE# NN-WP# 0 NN-V U0 RES# N N N N N0 R# N R# IO R# IO R# IO RE# IO E# N E# N N VSS V V VSS VSS E# N E# N LE N LE IO WE# IO WP# IO N IO0 N N N N N N N N0 NN FLSH X Gb TSOP- 0 0 NN-V N N N N VPS NQS N N N N0 NN-V NN-V NWP NN-V 0 NN-V NSR 0K NR# NR0# NN-V NSR 0R/N R00 R00 NWP NN-WP# VPS R N NSR R00 R 0K R00 R 0K R00 N/0R R00 If paste Intel Toshiba Samsung xnm TSOP Nand, NSR=OR,NSR=N;Other NSR=N,NSR=0R. emm-0 H emm- H T0 emm- H T emm- J T J T J T J T J T emm-m W T emm-lk R 0R R00 W M emm-rst U LKM RSTN uf V-P R 0K R00 K emm-m U VI U R0 VSSM P VSSM M VSSM VSSM emm-g EMM_G NN-V emm NN M VM N VM T0 VM U VM K VQM W VQM Y VQM VQM VQM K VSSQM Y VSSQM Y VSSQM VSSQM VSSQM V-P V-P option: uf 00 NN-V GU INPUT VOUT EN X0-V SOT- YPSS NN-V uf 00 NN-V =.V NN-V =.V NN-V NN-V R =0R =N:Use nand flash or.vio emm. =N =0R:Use.vIO emm. R 0R R00 N/0R R00 V-P Note layout :Put the emm in TSOP, producing two choose one.. M-0/0 NN+eMM reate ate: Wednesday, ecember, 0 Modify ate: Monday, pril, 0 HOYU Electronics.0

8 EM 0/00 MII Ethernet PHY ERX ERX ERX ERX0 ETX ETX ETX ETX0 ERXK ERXERR ERXV EM EMIO ETXEN ETXK ERS EOL ETXERR EM-MII ERX ERX ERX ERX0 ETX ETX ETX ETX0 ERXK ERXERR ERXV EM EMIO ETXEN ETXK ERS EOL ETXERR U V-V 0 V 0 WP TWI-SK SL TWI-S n S T TSSOP EEPROM use for storing the M address, M addresses can also be burned in the NN. V-V R 0K R00 R 0K R00 R 0K R00 R 0K R00 R 0K R00 R 0K R00 R 0K R00 PHY-RX PHY-RXK PHY-RXER PHY-RX PHY-RX0 PHY-RX PHY-OL PHY[0:] = 000b RMIISEL = 0; MII MOE MOE[0:]:b LL capable,uto-negotiation enabled REGOFF=0:Internal +.V regulator ON nintsel=0:txer/tx is selected for operation on the nint/txer/tx pin. LE/REGOFF LE/nINTSEL R0 YE+ GR+ R 0K R00 YE- LINK&T R GR- SPEE 00 R 0K R00 0R R00 0R R00,, TWI-SK,, TWI-S TWI-SK TWI-S V-ETH V-ETH PHY-RX PHY-RX PHY-RX PHY-RX0 PHY-RXV PHY-RXER PHY-RXK PHY-RS U RX/PHY 0 RX/RMIISEL RX/MOE RX0/MOE0 RXV RXER/RX/PHY0 RXLK/PHY RS V V TXP TXN TXP-ETH TXN-ETH GR+ GR+ R R% R00 R0 R% R00 TXP-ETH R R% R00 R R% R00 TXP-ETH ERX ERX ERX ERX0 ERXV ERXERR ERXK ERS ETX ETX ETX ETX0 EOL ETXERR ETXK ETXEN R R00 R R00 R R00 R R00 R R00 R0 R00 R R00 R R00 R R00 R R00 R R00 R R00 R R00 R0 R00 R R00 R R00 R R R R R R R R R R R R R R R R PHY-RX PHY-RX PHY-RX PHY-RX0 PHY-RXV PHY-RXER PHY-RXK PHY-RS PHY-TX PHY-TX PHY-TX PHY-TX0 PHY-OL PHY-TXER PHY-TXK PHY-TXEN PHY-TX RXP PHY-TX TX PHY-TX TX RXN 0 PHY-TX0 TX V-V PHY-OL TX0 PHY-TXER OL/RS_V/MOE PHY-TXK LE/REGOFF 0 nint/txer/tx R PHY-TXEN TXLK EMIO TXEN LE/nINTSEL 00K R00 EM MIO M LN0_RST RIS V-V nrst uf XTL/LKIN VR VIO XTL uf 0P LN0 LN0 P R M R00 RXP-ETH RXN-ETH LE/REGOFF LE/nINTSEL R.K-% R00 X XIN XOUT M R SM 0R R00 0pF 0pF GR- GR- YE- YE- YE+ YE+ TXN-ETH RXP-ETH RXN-ETH NOTE: Place. ohm resistors(00) near LN0. TXN-ETH RXP-ETH RXN-ETH V-V R R00 K EMIO V-V.uF 00 V-ETH L LMPGSN L00.uF 00 0 LN0 POWER M-0/0 EM.0 reate ate: Wednesday, ecember, 0 Modify ate: Monday, pril, 0

9 INTERFE J J V-V V-V V-V V RT-T 0 HE HHP HSL HS HTXP HTXP HTXN 0 HTXN HTX0P HTXP HTX0N HTXN S0-0 S0- S0-LK S0-M S0- S0-0 P P0 M 0 M0 P RXP-ST M RXN-ST TXN-ST TXP-ST, LR0 0 LR VMI MIIN MIM MIIN LINEINR LINEINL HPOM-F HPR HPL 0 HPOM TV-IN0 TV-IN TV-IN TV-IN TV-OUT TV-OUT TV-OUT 0 TV-OUT0 L0-0 L0- L0- L0- L0- L0- L0- L0-0 L0- L0-0 L0- L0- L0- L0- L0- L0- L0- L0-0 L0- L0-0 L0- L0- L0- L0-LK L0- L0-HSYN L0-E UOOT 00 L0-VSYN -V RXP-ETH GR+ RXN-ETH GR- V-ETH 0 TXP-ETH YE+ TXN-ETH YE-,, RESET# PWR-ON# SI0-V SI0-PLK 0 SI0-MLK SI0-HSYN SI0-VSYN SI0-0 SI0- SI0- SI0- SI0- SI0- SI0-0 SI0- TWI-SK TWI-S TWI-SK TWI-S S-M S-LK S-0 S- S- 0 S- SPI0-S0 SPI0-LK SPI0-MOSI SPI0-MISO PI PI URT-RTS URT-TS URT-TX 0 URT-RX PI0 PI PWM0 IR-TX IR-RX IS-MLK IS-LK IS-LRK 0 IS-O0 IS-O IS-O IS-O IS-I SPIF-O TWI-S,,,, TWI-SK TWI-S TWI-SK 0 URT0-TX URT0-TX URT0-RX URT0-RX PH0 PH PH PH PH PH PH 0 PH PH PH PH0 PH PH PH PH PH PH 0 PH PH PH PH0 PH PH PH PH PH PH 00 PH JTG-SEL J TPY TPX TPY TPX P 0 P P P0 P P P SI-V SI-V SI-PLK 0 SI-MLK SI-HSYN SI-VSYN SI-0 SI- SI- SI- SI- SI- SI- 0 SI- JTG-MS JTG-K JTG-O JTG-I V-V 0 V-V ONN RPT 0x SM0X-.MM R 0R/N R00 ONN RPT 0x SM0X-.MM ONN RPT 0x SM0X-.MM URT0-RX R 0K R00 V-V Indicator POWER Indicator TX Indicator use for ebug T T T T MRK MRK MRK MRK V-V R K R00 LE Green LE00 V-V R 0K R00 R K R00 LE lue LE00 URT0-TX M-0/0 INTERFE reate ate: Wednesday, ecember, 0 Modify ate: Monday, pril, 0 HOYU Electronics.0

a20_banana_pi_v1_4

a20_banana_pi_v1_4 LOK Ext Port N PWM0 TWI EEPROM TWI EEPROM SPI0, IR-OUT Ext Port URT,,, URT0 0 SI0/TS L TWI amera L(RG/LVS) Ext Port URT GPIO MIN HIP 0 G-PIN HMI TWI TP HMI OUT US EVIE US0 TVOUT VS US HOST US US GM Ethernet