Microsoft PowerPoint 輸入輸出裝置(I_O Devices).pptx

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1 作業系統 Operating Systems 靜宜大學資訊傳播工程學系劉國有助理教授輸入 / 輸出裝置 (I/O Devices) 裝置控制器 (Device Controllers) I/O Devices I/O devices can be roughly divided into two categories: Block devices: stores information in fixed-size blocks. All transfers are in units of one or more entire blocks. Ex: Hard disks, CD-ROMs, and USB sticks Character devices: delivers or accepts a stream of characters, without regard to any block structure. Ex: Printers, network interfaces and mice 1

2 Device Controllers I/O units consist of a mechanical component ( 機械元件, device itself) and an electronic component ( 電子元件, device controller or adapter). Controller s job (ex: reading a disk): Convert the serial bit stream into a block of bytes Perform any error correction necessary Make available to main memory (copy data to main memory) How the CPU communicates with controller? Each controller has a few registers that are used for communicating with the CPU. By writing into these registers, the OS can command the device to perform some actions. (ex, deliver data) By reading from these registers, the OS can learn what the device s state is, whether it is prepared to accept a new command. In addition to the control registers, many devices have a data buffer that the OS can read and write. (ex. video RAM) 2

3 How the CPU communicates with the control registers and the device data buffers? (1) Each control register is assigned an I/O port number (8 or 16 bit integer). The CPU uses special I/O instructions to read in or write to a control register. (ex, IN REG, PORT OUT PORT, REG) The address spaces for memory and I/O are different. How the CPU communicates with the control registers and the device data buffers? (2) I/O registers are part of the regular memory address space (memory-mapped I/O). Each control register is assigned a unique memory address (usually at the top of the address space) to which no memory is assigned. (3) A hybrid scheme, with memory mapped I/O data buffers and separate I/O ports for the control registers. 3

4 Polling I/O (busy waiting I/O, 輪詢式 I/O) Controller registers have one or more status bits. A CPU can execute a loop, testing a status bit each time until a device is ready to accept or provide new data. Ex: ( 工程師 (CPU) 泡咖啡 (PA) 看電視 (PB)) (1)Process A 發 I/O request (system call) 給 CPU ( 需熱開水 ) (2)CPU 設定 I/O command 給 I/O device controller ( 準備水壺裝滿水 ) (3)Controller 檢查設定值, 啟動對應 I/O 運作 ( 開始燒開水 ) (4)Process A waits for I/O complete ( 等待開水燒完 ) (5)CPU 切換給 Process B 執行 ( 工程師跑去看電視 ) (6)CPU 仍須不斷 polling I/O device, 了解 ( 監督 )I/O request 處理之狀態 ( 燒開水過程, 工程師要不斷到廚房看水燒開了沒 ) 缺點 : 耗費 CPU 時間於 Polling I/O devices, 對於 Process 的執行無太多幫助, 故 CPU utilization 及 throughput 均下降 4

5 Interrupt I/O ( 中斷式 I/O) Controllers use interrupts to tell the CPU when they are ready to have their registers read or written. Ex: ( 水壺具有嗶聲裝置 ) (1) ~ (5) 同 polling I/O (6) 當 I/O 運作完成,controller 會發出 I/O complete interrupt 通知 CPU ( 水燒開發出嗶聲 ) (7)CPU 暫停目前 process 之執行 ( 停止看電視 ) (8)O.S 查閱 Interrupt Vector ( 中斷向量表 ), 找出對應的 Interrupt Service Routine (ISR) 起始位置 ( 找尋聲音來源及處理方式 ) (9) 啟動 ISR 執行 (i.e. Buffer <-> memory) ( 將燒開的水倒入保溫瓶 ) (10)ISR 完成, 控制權交回 O.S (11) 經由 CPU 排程器選擇下一個行程 (or 繼續原先中斷前行程之執行 ) ( 選擇泡咖啡或是看電視或做其他事 ) 優點 :CPU 無須耗費 CPU time 於 I/O device 之 polling, 可全力用於 Process execution, 提高 CPU utilization 及 throughput, 增加 performance 缺點 :CPU 仍須耗費時間於 I/O device 與 memory 之間的資料傳輸 5

6 DMA (Direct Memory Access) DMA controller 負責 I/O device 與 memory 之間的資料傳輸, 中間過程完全不須 CPU 參與監督, 所以 CPU 有更多時間用在 process execution Ex: ( 僱外庸 ) (1)Process A 發 I/O request (system call) 給 CPU ( 需熱開水 ) (2)CPU 設定 I/O command 給 DMA controller ( 叫外庸燒熱水 ) (3)Process A waits for I/O complete ( 等待開水燒完 ) (4)CPU 切換給 Process B 執行 ( 工程師跑去看電視 ) (5)DMA controller 設定 I/O command 給 I/O device controller ( 開始燒開水 ) (6) 當 I/O 運作完成,I/O controller 會發出 Acknowledgement 通知 DMA ( 水燒開發出嗶聲 ) (7) 啟動資料傳輸 (i.e. Buffer <-> memory) ( 將燒開的水倒入保溫瓶 ) 若尚有資料需讀取, 則繼續 (4)~(6) (8)DMA controller 發出 complete 中斷通知 O.S( 外庸通知工程師熱水準備好了 ) (9)CPU 暫停目前 process 之執行 ( 停止看電視 ) (10) 由 CPU 排程器選擇下一個行程 (or 繼續原先中斷前的行程 ) (3) P A wait O.S (10) Scheduler 挑選行程 P A P B (4) (1) 發出 I/O request CPU (2) 設定 I/O command (5) 設定 I/O command DMA controller Disk Controller buffer Memory P B ready (9) (8) I/O complete (6) Ack Bus (7) Data transferred 6

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