Xilinx Training Catalog
... 2... 3-7 FPGA ISE... 8 FPGA... 9 FPGA... 10 FPGA... 11 Spartan-6... 12 Virtex-6... 13 7 FPGA... 14 PlanAhead... 15 PlanAhead... 16 ChipScope Pro... 17... 18... 19... 20 LogiCORE Endpoint PCI Express... 21 I/O... 22 DSP DSP... 23 FPGA DSP... 24 System Generator DSP... 25... 26... 27... 28... 29 MicroBlaze Linux... 30 Zynq EPP... 31 Zynq EPP... 32 Zynq EPP... 33 Verilog... 34 VHDL... 35 VHDL... 36 1
FPGA FPGA 2
FPGA 3
FPGA 4
5
DSP 6
7
ISE v12 FPGA FPGA FPGA FPGA FPGA Project Navigator 1 (0 TC) FPGA ISE 12.1 FPGA REL* Basic FPGA Architecture : Slice and I/O Resources Basic FPGA Architecture : Memory and Clocking Resources VHDL Verilog ISE Design Suite : Logic Edition System Edition 12.1 : Spartan -6 Virtex -6 FPGA** : ** Project Navigator 1 : Project Navigator HDL XST 2 : XST I/O Planner 3 : I/O ISim 4 : ISim 1 : Project Navigator ISE HDL 2 : XST 3 : I/O PinAhead I/O * REL = e- ( ) ** Spartan-6 (ATP) ISE Project Navigator Xilinx Synthesis Technology (XST) I/O Planner Constraints Editor ISim 4 : ISim Project Navigator HDL ISim 8
FPGA v12 ISE FPGA Architecture WizardI/O Planner Constraint Editor ISE 12.1 FPGA FPGA 1 (0 TC) FPGA HDL (VHDL Verilog) REL* Architecture Wizard and I/O Planning REL HDL (VHDL Verilog) REL Basic HDL Coding Techniques REL* ( 1 2) Virtex-6 and Spartan-6 FPGA HDL Coding Techniques REL* ( 1 2) ISE Design Suite : Logic Edition System Edition 12.1 : Spartan -6 FPGA** : Spartan-6 FPGA SP605 ** * REL = e- ( ) ** Spartan-6 (ATP) FPGA 1 : 2 : Clocking Wizard 3 : PlanAhead I/O 4 : 1 : ISE Project Navigator ISim Spartan-6 FPGA SP605 2 : Clocking Wizard Clocking Wizard DCM PlanAhead ISE Project Navigator 3 : PlanAhead I/O PinAhead I/O (DRC) I/O 4 : Constraints Editor MAP Spartan-6 FPGA Project Navigator FPGA Clocking Wizard DCM I/O Planner Constraints Editor 9
FPGA v12 FPGA 2 70,000 (5 TC) HDL ISE FPGA REL* Basic HDL Coding Techniques REL ( 1 2) Virtex-6 & Spartan-6 FPGA HDL Coding Techniques REL ( 1 2) Power Estimation REL FPGA FPGA Constraints Editor FPGA FPGA HDL (VHDL Verilog) ISE Design Suite: Logic Edition System Edition 12.1 : Spartan -6 Virtex-6 -FPGA** : Spartan-6 FPGA SP605 ** * : Spartan-6 Virtex-6 (ATP) Virtex-6 Spartan-6 FPGA CORE Generator Virtex-6 Spartan-6 FPGA Timing Analyzer 1 FPGA FPGA CORE Generator FPGA Virtex-6 Spartan-FPGA 1 : FPGA FPGA 2 : 2 3 : Part 1 Part 2 4 : 5 : 6 : FPGA Editor () ChipScope Pro () 7 : ChipScope Pro () 1 : FPGA CORE Generator RAM FPGA 2 : ( ) 3 : Constraint Editor 4 : 5 : SmartXplorer 6 : FPGA Editor () FPGA Editor 7 : ChipScope Pro () Analyzer 10
FPGA v12 ISE Design Suite 2 7 XST FPGA FPGA FPGA Verilog VHDL ISE Virtex -6 Spartan -6 FPGA 2 70,000 (5 TC) FPGA FPGA FPGA VHDL Verilog FPGA ISE Design Suite: Logic Edition System Edition 12.1 : Virtex-6 Spartan-6 FPGA* : Spartan-6 FPGA SP605 * * Virtex-6 Spartan-6 (ATP) (UCF) I/O I/O Tcl SmartGuide PlanAhead FPGA Editor ChipScope Pro 1 : UCF 2 : UCF I/O 3 : I/O Tcl 4 : Tcl SmartCompile 5 : SmartGuide 6 : FPGA Editor: 7 : FPGA Editor : ISE 12.1 1 : Constraint Editor 2 : UCF UCF 3 : I/O I/O 4 : Tcl Tcl ISE Project Navigator Tcl 5 : SmartGuide SmartGuide 6 : 7 : FPGA Editor FPGA Editor /ChipScope Pro 11
Spartan-6 v12 Spartan -6 FPGA FPGA FPGA FPGA Spartan-6 CLB DCM PLL I/O DSP (PCI Express GTP ) FPGA HDL 2 70,000 (5 TC) FPGA FPGA () VHDL Verilog ISE Design Suite : Logic Edition System Edition 12.1 : Spartan-6 FPGA* : Spartan-6 FPGA SP605 * Spartan-6 (ATP) Spartan-6 FPGA 6 LUT CLB Spartan-6 FPGA CLB Spartan-6 FPGA RAM DSP I/O SERDES DCMPLL Spartan-6 FPGA HDL Spartan-6 1 Spartan-6 FPGA CLB HDL 1 : CLB DSP 2 : DSP I/O Spartan-6 FPGA I/O 3 : I/O 2 Spartan-6 FPGA 4 : 5 : 1 : CLB XST 32 RTL FPGA Editor 2 : DSP - XST 17x17 MAC FPGA Editor CORE Generator FPGA Editor 3 : I/O - ISE SERDES FPGA Editor Spartan-6 FPGA 4 : - Clocking Wizard PLLDCM FPGA Editor 5 : Memory Interface Generator Spartan-6 FPGA (MCB) DDR3 ChipScope Pro 12
Virtex-6 v12 Virtex -6 FPGA FPGA FPGA FPGA Viretex-6 CLB MMCM I/O FIFO DSP (EMACPCI Express GTP ) FPGA HDL 2 70,000 (5 TC) FPGA FPGA () VHDL Verilog ISE Design Suite : Logic Edition System Edition 12.1 : Virtex-6 FPGA* : Spartan-6 FPGA SP605 * Virtex-6 (ATP) Virtex-6 FPGA 6 LUT CLB Virtex-6 FPGA CLB Virtex-6 FPGA RAMFIFO DSP I/O SERDES MMCM Virtex-6 FPGA Virtex-6 FPGA HDL Virtex-6 1 Virtex-6 FPGA CLB HDL 1 : CLB DSP 2 : DSP I/O Virtex-6 FPGA I/O 3 : I/O 2 Virtex-6 FPGA 4 : 5 : 1 : CLB XST 32 RTL FPGA Editor 2 : DSP - XST 24x17 MAC FPGA Editor CORE Generator FPGA Editor 3 : I/O - ISE SERDES FPGA Editor Virtex-6 FPGA 4 : - Clocking Wizard MMCM FPGA Editor 13
7 v13 7 FPGA FPGA (FPGA ) 7 FPGA CLB MMCM PLL I/O FIFO DSP (PCI Express / ) HDL FPGA 2 70,000 (5 TC) FPGA FPGA VHDL Verilog ISE Design Suite : Logic System Edition 13.1 : Artix -7Kintex -7Virtex -7 FPGA : * 7 FPGA (ATP) 7 FPGA 6 LUT CLB 7 FPGA CLB 7 FPGA RAMFIFODSP I/O SERDES MMCMPLL DDR3 7 7 FPGA HDL 1 7 FPGA CLB 1 : CLB 2 : DSP 3 : DSP 2 I/O 4 : I/O 5 : 1 : CLB XST 32 XST RTL FPGA Editor 2 : RAM RTL RTL FPGA Editor WRITE_FIRST RAM RTL 3 : DSP XST 24x17 MAC FPGA Editor CORE Generator FPGA Editor 4 : I/O CORE Generator I/O Interface Wizard FPGA Editor 7 FPGA 5 : Clocking Wizard MMCM FPGA Editor 14
PlanAhead v13 PlanAhead I/O DRC ( ) SSN ( ) / PlanAhead : PlanAhead 1 42,000 (3 TC) FPGA FPGA FPGA ISE FPGA () ISE Design Suite : Logic Edition System Edition 13 : Virtex -6 FPGA* : * PlanAhead PlanAhead Project Manager 1 : PlanAhead I/O 2 : I/O CORE Generator 3 : PlanAhead Project Navigator PlanAhead : PlanAhead 1: PlanAhead RTL PlanAhead PlanAhead 2 : I/O I/O PlanAhead I/O / I/O DRC SSN * Virtex-6 PlanAhead PlanAhead I/O DRC SSN PlanAhead IP HDL RTL ISE Project Navigator PlanAhead 3 : PlanAhead CORE Generator IP 15
PlanAhead v13 PlanAhead Pblock ChipScope Pro : PlanAhead * Virtex-6 (APT) 2 70,000 (5 TC) FPGA FPGA FPGA ISE PlanAhead PlanAhead FPGA () ISE Design Suite : Logic Edition System Edition 13 : Virtex -6 FPGA* : PlanAhead Pblock HDL RTL ChipScope Pro 1 PlanAhead 1 : PlanAhead RTL 2 : RTL 3 : Pblock 2 4 : 5 : ChipScope Pro 6 : ChipScope Pro : PlanAhead 1 : PlanAhead HDL PlanAhead PlanAhead 2 : RTL RTL RTL RTL RTL RTL (DRC) 3 : SSN 4 : PlanAhead FPGA PlanAhead 5 : 6 : ChipScope Pro PlanAhead ChipScope Pro Set Up ChipScope 16
ChipScope Pro v12 FPGA ChipScope Pro 2 ChipScope Pro 2 70,000 (5 TC) 2 : Designing with VHDL VHDL Designing with Verilog Verilog 1 : FPGA FPGA 2 : FPGA FPGA ChipScope Pro e- () http:///index.htm ISE Design Suite : Logic Edition System Edition 12.1 ChipScope Pro 12.1 : N/A* : Spartan-6 FPGA SP605 * * (ATP) ChipScope Pro ChipScope Pro Analyzer CORE Generator Core Inserter PlanAhead ChipScope Pro ChipScope Pro 1 ChipScope Pro Inserter : Core Inserter PlanAhead 1a : Project Navigator Inserter 1b : PlanAhead Inserter CORE Generator 2 : Project Navigator CORE Generator ChipScope Pro Analyzer 3 : Analyzer 2 4 : 5 : FPGA Editor ChipScope Pro ()* 6 : VIO Tcl ()* ()* 7 : ()* 1a 1b : Project Navigator Inserter ( 1a) PlanAhead Inserter ( 1b) ICON ILA 2 : Project Navigator CORE Generator VIO ChipScope Pro Analyzer 3 : Analyzer ChipScope Pro Analyzer 4 : () 5 : FPGA Editor ChipScope Pro ILA 6 : VIO Tcl - 7 : - ChipScope Pro Analyzer FPGA 17
v13 ISE PlanAhead (EDK) (PR) FPGA PR PR PR 2 PR PR 2 70,000 (5 TC) HDL (VHDL Verilog) FPGA FPGA FPGA HDL (VHDL Verilog) PlanAhead ISE Design Suite : PR Logic Edition System Edition 13.1 1 1 : : FPGA 2 : HDL ICAP 2 3 : (EDK) 4 : EDK PCIe 1 : PlanAhead JTAG ML605 2 : HDL ICAP Platform Flash HDL PlanAhead PR Platform Flash System ACE RAMIOB MGT PR JTAG HDL 3 : TPSYNC 4 : EDK MicroBlaze ICAP PR System ACE 18
v13 FPGA PCIe MAC IBERT 1 3 TC FPGA VHDL/Verilog VHDL /Verilog FPGA FPGA I/O ISE Design Suite : Logic System Edition 13.1 : Spartan-6 Virtex-6 FPGA* : Spartan-6 SP605 Virtex-6 FPGA ML605* * Spartan-6 Virtex-6 FPGA (ATP) IP IP IBERT 1 1 : GTP GTX PCI Express 2 : PCIe 3 : MAC 4 : TEMAC AXI IP 5 : IBERT 1 : GTP GTX GTP/GTX Transceiver Wizard 2 : PCIe CORE Generator Spartan-6 Virtex-6 FPGA PCIe 3 : MIG (Memory Interface Generator) DDR3 4 : TEMAC CORE Generator MAC 5 : IBERT ChipScope Pro IBERT Spartan-6 SP605 GTP Virtex-6 ML605 GTX 19
FPGA I/O I/O Spartan- 6 Virtex-6 DDRDDR2DDR3RLDRAMLPDDR QDR QDR Spartan-6 SP601 DDR2Virtex-6 ML605 DDR3 1 3TC FPGA VHDL Verilog Verilog / VHDL : / FPGA I/O I/O ISE Design Suite : Logic System Edition 13.1 Mentor HyperLynx SI : Spartan-6 Virtex-6 FPGA* : Spartan-6 SP601/605 Virtex-6 FPGA ML605* Spartan-6 SP605 DDR3 * Spartan-6 Virtex-6 FPGA (ATP) FPGA Isim PCB 1 CLB Spartan-6 Virtex-6 Spartan-6 FPGA Virtex-6 FPGA MIG 1 : MIG 2 MIG 2 : MIG MIG 3 : MIG PCB 4 : 5 : MIG 1 : MIG MIG (Memory Interface Generator) CORE Generator DDR2 DDR3 Spartan-6 SP601 SP605 (MCB) Virtex-6 ML605 2 : MIG Isim 1 3 : MIG FPGA FPGA 4 : IBIS 5 : MIG ChipScope Pro 20
LogiCORE Endpoint PCI Express v11 PCI Express PCI Express PCIe PCI Express Virtex-5 PCIe Virtex-6 Spartan- 6 FPGA 2 70,000 (5 TC) PCI Express IP LogiCORE PCI Express PCI Express PCIe VHDL Verilog ( ISim) ISE Design Suite : Logic Edition System Edition 11.3 ChipScope Pro 11.3 : Virtex -5 FPGA* : Virtex-5 FPGA PCIe PCIe FPGA PCIe 1 PCIe PCIe CORE Generator 1 : PCIe PCIe 2a : 2b : 2 3 : 4 : ChipScope Pro PCIe 1 : PCIe CORE Generator LogiCORE IP CORE Generator PCIe 2 : ISim 3 : PCIe 4 : ChipScope Pro PCIe ChipScope Pro 21
I/O v11 Spartan -6 LXT Virtex -6 FPGA RocketIO GTP/GTX 8B/10B 64B/66B RocketIO Architecture Wizard 2 70,000 (5 TC) FPGA Verilog VHDL ( ) FPGA () I/O I/O () ISE Design Suite : System Edition 11.3 ChipScope Pro 11.3 Mentor Graphics ModelSim 6.5G : Spartan-6 Virtex-6 FPGA : Spartan-6 FPGA SP605 1 (GTPGTXGTH) (GTPGTX) 8B/10B 1 : 8B/10B 2 : PMA () 2 RX 3 : 4 : GTP Wizard RocketIO RocketIO 1 : 8B/10B 8B/10B 8B/10B 2 : Spartan-6 Virtex-6 FPGA RocketIO GTP/GTX 8B/10B / GTP/GTX Wizard GTP/GTX 3 : TX RX 4 : 2 22
DSP v13 DSP FPGA DSP 1 3 TC FPGA VHDL/Verilog VHDL /Verilog FPGA FPGA FIR FFT FPGA ISE Design Suite : DSP System Edition 13.1 : Spartan -6 Virtex -6 FPGA* : Spartan-6 SP605 Virtex-6 FPGA ML605* 1 Virtex-6 Spartan-6 FPGA DSP 1 : System Generator System Generator 2 : FFT FFT 3 : DSP IP 4 : 1 : System Generator DDS (Direct Degital Synthesizer) DPS48 2 : FFT FIR FFT 2 FFT * Spartan-6 Virtex-6 FPGA (ATP) DSP FPGA FPGA CLB DSP48 DSP FPGA DSP (TRD) DSP 3 : DSP XAPP1018 WCDMA DUC/DDC 4 : DSP System Generator 23
FPGA DSP FPGA DSP 2 FPGA FFT IP 2 70,000 (5 TC) 5 TC FIR () IIR ( ) FFT () FPGA : Spartan -6 Virtex -6 FPGA* : * * Spartan-6 Virtex-6 (ATP) DSP FPGA 2 FPGA FPGA CLB DSP48 DSP RAM SRL FIR FFT FPGA FPGA 1 FPGA FPGA 1 : RAM 2 : SRL32E RAM FIR 3 : 2 4 : () 5 : FFT : System Generator CORE Generator DSP 1 : 2 : SRL32E RAM FPGA 3 : 4 : () 5 : FFT FFT : System Generator CORE Generator DSP DSP DSP IP 24
System Generator DSP v11 System Generator DSP System Generator for DSP DSP FPGA 2 ( / ) 70,000 (5 TC) MATLABSimulink DSP System Generator for DSP MATLAB Simulink ISE Design Suite : System Edition 11.1 MATLAB with Simulink R2008a R2008b DSP System Generator FPGA System Generator Low High FIR FFT High 2 System Generator 1 System Generator Simulink 1 : Simulink 2 : System Generator 2 3: 4 : 5 : MAC FIR 6 : FIR Compiler FIR System GeneratorProject Navigator Platform Studio 7 : System Generator Project Navigator 8 : System GeneratorProject Navigator Platform Studio 1 : Simulink Simulink 2 : System Generator System Generator DSP48 MAC ML505 3 : 4 : Mcode 5 : MAC FIR MAC FIR ML505 6 : FIR Compiler FIR - FIR Compiler FDATool FIR 7 : System Generator Project Navigator - 2 System Generator System Generator VHDL 8 : System GeneratorProject Navigator Platform Studio - 2 System Generator System Generator VHDL 25
FPGA IP (TRD) 1 3 TC FPGA FPGA FPGA ISE MicroBlaze ISE Design Suite : Embedded System Edition 13.1 : Spartan -6 Virtex -6 FPGA* : Spartan-6 SP605 Virtex-6 FPGA ML605* * Spartan-6 Virtex-6 FPGA (ATP) (EDK) IP BSB (Base System Builder) MicroBlaze IP Eclipse (SDK) (TRD) 1 XPS 1 : Base System Buidler SDK IP 2 : AXI 3 : 1 : Base System Buidler BSB (Base System Buidler) XPS ISE 2 : 1 SDK BSP 3 : 26
v12 FPGA MicroBlaze PowerPC (EDK) MicroBlaze PowerPC440 2 70,000 (5 TC) FPGA PowerPC440 MicroBlaze FPGA FPGA ISE C HDL ISE Design Suite : Embedded Edition System Edition 12.1 Mentor Graphics ModelSim : Spartan -6Virtex -5 Virtex-6 FPGA* : Spartan-3E FPGA 1600ESpartan-6 FPGA SP605 Virtex-5 FPGA ML507 * * Spartan-6Virtex-5 Virtex-6 (ATP) EDK () Base System Builder (BSB) MicroBlaze PowerPC CoreConnect IP Eclipse (SDK) IP Project Navigator (BFM) 1 EDK Base System Builder (BSB) 1 : Base System Builder SDK 2 : 3 : IP 2 IPIC IPIC 4 : IP PLB v46 5 : BFM IP 6 : 1 : Base System Builder BSB XPS 2 : SDK 1 BSP FPGA 3 : IP IP IP GUI I/O MHS RAM 4 : IP Create or Import Peripheral Wizard PLB (LCD ) 5 : BFM ModelSim LCD 6 : : IP ISE 27
v12 (EDK) Spartan -6 FPGA SP605 Virtex -5 FPGA ML507 2 70,000 (5 TC) FPGA EDK C HDL PowerPC MicroBlaze ISE Design Suite : Embedded Edition System Edition 12.1 Mentor Graphics ModelSim 6.4b : Spartan -6Virtex -5 Virtex-6 FPGA* : Spartan-6 FPGA SP605 Virtex-5 FPGA ML507 * * Spartan-6Virtex-5 Virtex-6 (ATP) Virtex Spartan FPGAPowerPC 440MicroBlaze ChipScope HDL PowerPC 440 MicroBlaze Virtex -5 FPGA HDL 1 1 : PowerPC 440 ChipScope Pro Analyzer 2 : ChipScope Pro Analyzer RAM () MCI PowerPC440 DDR2 RAM 3 : DDR 2 Fast Simplex Link (FSL) 4 : FPGA 5 : XPS HDL 6 : 1 : IP LEDLCD SDK 2 : ChipScope Pro Analyzer ChipScope Pro AnalyzerSDK XMD 3 : DDR XPS DDR 4 : FPGA SP605 (TRD) DVI / 5 : 6 : HDL ISE Project Navigator 28
v12 2 PowerPC 440 MicroBlaze 2 70,000 (5 TC) ( ) C C++ ( ) ISE Design Suite : Logic Edition System Edition 12.1 : Spartan -6Virtex -5 Virtex-6 FPGA* : Spartan-6 FPGA SP605 Virtex-5 FPGA ML507 * * Spartan-6Virtex-5 Virtex-6 (ATP) SDK (SDK) 1 1 : SDK 2 : 3 : 2 4 : 5 : SDK 6 : 7 : 1 : Base System Builder 2 : 3 : FPGA 4 : SDK 5 : SDK 6 : LCD BSP 7 : XilMFS 29
MicroBlaze Linux v12 MicroBlaze PetaLinux 2 MicroBlaze PetaLinux 0.4 (SoC) Linux Linux / Linux 2 70,000 (5 TC) MicroBlaze PetaLinux FPGA (FPGA ) (FPGA ) ISE Design Suite : Embedded Edition System Edition 12.1 PetaLinux v1.2 : Spartan -6 FPGA* : Spartan-6 FPGA SP605 FMC I/O * * Spartan-6 (ATP) Linux MicroBlaze (EDK) PetaLinux (SDK) MicroBlaze Linux 1 Linux 1 : PetaLinux SDK 2 : PetaLinux 3 : 4 : 2 I/O 5 : PetaLinux SDK XPS 6 : BSB 7 : 8 : 1 : MicroBlaze Linux Linux Linux 2 : PetaLinux Linux Linux MicroBlaze Linux OEMU 3 : PetaLinux Linux Linux GDB 4 : Linux TCP/IP telnet MicroBlaze Linux FTP Linux (NFS) Linux Linux Linux 5 : UIO 6 : BSB BSB EDK Linux PetaLinux Linux 7 : VHDL IP XPS Create and Import Peripheral Wizard IP IP PLB FSL XMD 8 : UIO PWM PLB IP petalinux-new-module PetaLinux FSL FSL PWM 30
Zynq EPP ( ) Zynq EPP Zynq EPP Zynq ARM Cortex -A9 (PS) (PL) Zynq EPP PSI/O DMA PL PS DDR PL PS PS PL 2 \70,000 (5 TC) Zynq EPP C HDL ISE Design Suite : Embedded System Edition 14.1 : Zynq-7000 EPP* : Zynq-7000 EPP ZC702 * * Zynq EPP (ATP) Zynq EPP (PS) Zynq EPP Zynq PS (PL) PL 1 Zynq EPP (APU) / 1 : Zynq Zynq AXI Zynq EPP PS/PL AXI 2 : Zynq EPP Zynq Zynq EPP Zynq EPP PL 3 : Zynq EPP DMA Zynq EPP Zynq EPP 4 : Zynq EPP Zynq EPP 5 : Zynq EPP Linux 1 : Zynq PlanAhead Xilinx Platform Studio (XPS) 2 : Zynq EPP (PL) (PS) 3 : Zynq EPP DMA PS DMA DDRx PL 4 : Zynq EPP Zynq EPP 5 : Zynq EPP Linux Zynq EPP Linux 31
Zynq EPP v14 Zynq EPP ( ) FPGA EDK ( ) Zynq EPP / AXI 2 \70,000 (5 TC) Zynq EPP FPGA FPGA ISE C HDL ISE Design Suite : Embedded System Edition 14.1 : Zynq-7000 EPP : Zynq-7000 EPP ZC702 * Zynq EPP (ATP) EDK () PS Configuration Wizard Cortex -A9 Eclipse (SDK) IP (BFM) AXI 1 EDK Processing System Configuration Wizard 1 : Processing System Configuration Wizard SDK 2 : AXI 3 : IP 2 Cortex-A9 IPIC AXI IP 4 : AXI IP 5 : BFM IP 6 : 1 : Processing System Configuration Wizard (Zynq EPP) XPS 2 : SDK 1 BSP 3 : IP XPS System Assembly View IP 4 : AXI IP Create or Import Peripheral Wizard AXI (LCD ) 5 : BFM ISim LCD 6 : : IP ISE 32
Zynq EPP v14 2 (SDK) Zynq (EPP) / (BSP) ARM Cortex -A9 MicroBlaze 2 \70,000 (5 TC) C C++ ( ) ISE Design Suite : Embedded System Edition 14.1 : Zynq-7000 EPP : Zynq-7000 ZC702 * Zynq-7000 EPP (ATP) (SDK) SDK ( Linux ) 1 2 Linux 1 : SDK Linux 2 : 3 : 4 : 5 : BSP 6 : 7 : 1 : Processing System Configuration Wizard (Zynq EPP) 2 : BSP GPIO API 3 : 4 : SDK 5 : BSP 6 : LCD BSP 7 : XilMFS 33
Verilog v12 Verilog (RTL) FPGA Verilog FPGA Verilog 1995 2001 Verilog HDL 1 (0TC) Verilog ISE Design Suite : Logic Edition System Edition 12.1 : N/A* : Spartan -6 FPGA SP605 * * (ATP) RTL Verilog Verilog Verilog (FSM) Verilog FPGA Verilog I/O Simprim ISE Spartan-6 FPGA SP605 Verilog 1 : 2 : Verilog RTL Verilog 3 : Verilog 4 : 5 : n RL Verilog 6 : 7 : FPGA 8 : Verilog 9 : Verilog I/O * RTL 34
VHDL v12 VHDL (RTL) FPGA VHDL VHDL VHDL HDL 1 (0TC) VHDL ISE Design Suite : System Edition 12.1 : N/A* : Spartan -6 FPGA SP605 * * (ATP) VHDL VHDL ( [FSM]RAM/ROM ) VHDL VHDL FPGA VHDL ISE VHDL 1 : VHDL 2 : 3 : ISim 4 : 5 : 6 : Moore FPGA 7 : 8 : 9 : 10 : * RTL 35
VHDL v12 VHDL VHDL RTL/ 1 (0TC) VHDL VHDL Designing with VHDL RTL 6 ISE Design Suite : Logic Edition System Edition 12.1 : N/A* * (ATP) RTL VHDL TextIO 1 : 2 : IO 3 : TextIO VHDL 4 : 5 : 6 : * 1 : 2 : 3 : TextIO std_logic_textio std_logic std_logic_vector TextIO 4 : 5 : VHDL 6 : IEEE_PROPOSED 36