8088/8086 MICROPROCSOR PROGRAMMING INTEGER INSTRUCTIONS AND COMPUTATIONS The MOVE The move (MOV) instruction is used to transfer a byte or a word of data from a source operand to a destination operand eg MOV Move MOV, CS MOV D, S (S) (D) MOV [SUM], 6 37 微處理機原理與應用 Lecture 05-4 8088/8086 MICROPROCSOR PROGRAMMING INTEGER INSTRUCTIONS AND COMPUTATIONS 53 Logic s 54 Shift s 55 Rotate s The MOVE Note that the MOV instruction cannot transfer data directly between external memory Accumulator Seg-reg Seg-reg Reg6 Source Accumulator Immediate Immediate Reg6 Mem6 Seg-reg Seg-reg 6 37 微處理機原理與應用 Lecture 05-2 Allowed operands for MOV instruction 6 37 微處理機原理與應用 Lecture 05-5 The data-transfer functions provide the ability to move data either between its internal registers or between an internal register and a storage location in memory The data-transfer functions include MOV (Move byte or word) XCHG (Exchange byte or word) XLAT (Translate byte) LEA (Load effective address) LDS (Load data segment) L (Load extra segment) 6 37 微處理機原理與應用 Lecture 05-3 The MOVE MOV, CS 0 IP 0 CS 02 DS BX Before execution 6 37 微處理機原理與應用 Lecture 05-6 0 00 002 020 02 8C CA MOV, CS
The MOVE MOV, CS 002 IP 0 CS 02 DS BX 0 After execution 6 37 微處理機原理與應用 Lecture 05-7 0 00 002 020 02 8C CA MOV, CS The XCHG The exchange (XCHG) instruction can be used to swap data between two general-purpose registers or between a generalpurpose register and a storage location in memory eg XCHG Exchange XCHG, Accumulator 6 37 微處理機原理與應用 Lecture 05-0 XCHG D, S Reg6 Source Allowed operands for XCHG instruction (D) (S) What is the effect of executing the instruction MOV, [SOURCE_MEM] Where SOURCE_MEM equal to 20 6 is a memory location offset relative to the current data segment starting at A0 6 ((DS)0+20 6 ) (CL) ((DS)0+20 6 + 6 ) (CH) Therefore CL is loaded with the contents held at memory address A0 6 + 20 6 = A020 6 and CH is loaded with the contents of memory address A0 6 + 20 6 + 6 = A02 6 What is the result of executing the following instruction? XCHG [SUM], BX Where SUM = 234 6, (DS)=2 6 ((DS)0+SUM) (BX) PA = 20 6 + 234 6 =3234 6 Execution of the instruction performs the following 6-bit swap: (3234 6 ) (BL) (3235 6 ) (BH) So we get (BX) = FF 6 (SUM) = AA 6 6 37 微處理機原理與應用 Lecture 05-8 6 37 微處理機原理與應用 Lecture 05- Use the DEBUG the verify the previous example The XCHG XCHG [SUM], BX 00 IP CS 2 DS 02 03 04 05 87 E 34 2 XCHG [SUM],BX AA BX 20 2 3234 3235 FF Variable SUM 6 37 微處理機原理與應用 Lecture 05-9 Before execution 6 37 微處理機原理與應用 Lecture 05-2 2
The XCHG XCHG [SUM], BX 005 IP CS 2 DS FF BX After execution 6 37 微處理機原理與應用 Lecture 05-3 02 03 04 05 20 2 3234 3235 87 E 34 2 AA XCHG [SUM],BX Variable SUM The XLAT The translate (XLAT) instruction is used to simplify implementation of the lookup-table operation Execution of the XLAT replaces the contents of AL by the contents of the accessed lookup-table location XLAT eg Translate XLAT PA = (DS)0 + (BX) + (AL) = 030 6 + 0 6 + 0D 6 = 030D 6 (030D 6 ) (AL) 6 37 微處理機原理與應用 Lecture 05-6 ((AL)+(BX)+(DS)0) (AL) Use the DEBUG program to verify the previous example The LEA, LDS, and L s The LEA, LDS, L instructions provide the ability to manipulate memory addresses by loading either a 6-bit offset address into a general-purpose register or a register together with a segment address into either DS or LEA Load effective address LEA Reg6, EA EA (Reg6) LDS Load register and DS LDS Reg6, Mem32 (Mem32) (Reg6) (Mem32+2) (DS) L Load register and L Reg6,Mem32 (Mem32) (Reg6) (Mem32+2) () eg LEA, [+BX+5H] 6 37 微處理機原理與應用 Lecture 05-4 6 37 微處理機原理與應用 Lecture 05-7 Use the DEBUG program to verify the previous example The LEA, LDS, and L s LDS, [2H] 0 IP CS 2 DS 02 03 04 C5 36 02 LDS, [2H] BX 20 2 22 220 2202 2203 20 3 6 37 微處理機原理與應用 Lecture 05-5 Before execution 6 37 微處理機原理與應用 Lecture 05-8 3
The LEA, LDS, and L s LDS, [2H] 004 IP CS 3 DS BX 20 After execution 6 37 微處理機原理與應用 Lecture 05-9 02 03 04 20 2 22 220 2202 2203 30 3 C5 36 02 20 3 LDS, [2H] New data segment The arithmetic instructions include Addition Subtraction Multiplication Division Data formats Unsigned binary bytes Signed binary bytes Unsigned binary words Signed binary words Unpacked decimal bytes Packed decimal bytes ASCII numbers 6 37 微處理機原理與應用 Lecture 05-22 ADTION Verify the following instruction using DEBUG program LDS, [2H] ADD ADC INC AAA DAA SUB SBB DEC NEG AAS DAS MUL IMUL AAM V IV AAD CBW Add byte or word Add byte or word with carry Increment byte or word by ASCII adjust for addition Decimal adjust for addition SUBTRACTION Subtract byte or word Subtract byte or word with borrow Decrement byte or word by Negate byte or word ASCII adjust for subtraction Decimal adjust for subtraction MULTIPLICATION Multiply byte or word unsigned Integer multiply byte or word ASCII adjust for multiply VION Divide byte or word unsigned Integer divide byte or word ASCII adjust for division Convert byte to word 6 37 微處理機原理與應用 Lecture 05-20 CWD Convert word to doubleword 6 37 微處理機原理與應用 Lecture 05-23 Initializing the internal registers of the 8088 from a table in memory MOV, [INIT_TABLE] MOV, LDS, [INIT_TABLE+02H] L, [INIT_TABLE+06H] MOV, [INIT_TABLE+0AH] MOV BX, [INIT_TABLE+0CH] MOV, [INIT_TABLE+0EH] MOV, [INIT_TABLE+0H] Addition s: ADD, ADC, INC, AAA, DAA ADD Addition ADD D, S (S) +(D) (D) Carry (CF) ADC Add with carry ADC D, S (S) +(D)+(CF) (D) Carry (CF) INC Increment by INC D (D) + (D) OF, SF, ZF, AF, PF AAA DAA ASCII adjust for addition Decimal adjust for addition AAA DAA AF, CF OF, SF, ZF, PF undefined SF, ZF, AF, PF, CF, 6 37 微處理機原理與應用 Lecture 05-2 6 37 微處理機原理與應用 Lecture 05-24 4
Addition s: ADD, ADC, INC, AAA, DAA Source Immediate Reg6 Immediate Reg8 Accumulator Immediate Addition s: ADD, ADC, INC, AAA, DAA 002 IP CS 2 DS BBC 0ABC BX ADD, BX 02 20 2 03 C3 ADD, BX Allowed operands for ADD and ADC instructions Allowed operands for INC instruction 6 37 微處理機原理與應用 Lecture 05-25 After execution 6 37 微處理機原理與應用 Lecture 05-28 Assume that the and BX registers contain 6 and 0ABC 6, respectively What is the result of executing the instruction ADD, BX? Verify the previous example using DEBUG program (BX)+()= 0ABC 6 + 6 =BBC 6 The sum ends up in destination register That is () = BBC 6 6 37 微處理機原理與應用 Lecture 05-26 6 37 微處理機原理與應用 Lecture 05-29 Addition s: ADD, ADC, INC, AAA, DAA 0 IP CS 2 DS 0ABC BX ADD, BX 02 20 2 03 C3 ADD, BX The original contents of, BL, word-size memory location SUM, and carry flag (CF) are 234 6, AB 6, CD 6, and 0 6, respectively Describe the results of executing the following sequence of instruction? ADD, [SUM] ADC BL, 05H INC WORD PTR [SUM] Before execution 6 37 微處理機原理與應用 Lecture 05-27 () ()+(SUM) = 234 6 + CD 6 =30 6 (BL) (BL)+imm8+(CF) = AB 6 + 5 6 +0 6 = B0 6 (SUM) (SUM)+ 6 = CD 6 + 6 = CE 6 6 37 微處理機原理與應用 Lecture 05-30 5
What is the result of executing the following instruction sequence? ADD AL, BL AAA Assuming that AL contains 32 6 (ASCII code for 2) and BL contains 34 6 (ASCII code 4), and that AH has been cleared (AL) (AL)+(BL)= 32 6 + 34 6 =66 6 The result after the AAA instruction is (AL) = 06 6 (AH) = 6 with both AF and CF remain cleared 6 37 微處理機原理與應用 Lecture 05-3 Subtraction s: SUB, SBB, DEC, AAS, DAS, and NEG Accumulator Source Immediate Immediate Immediate Allowed operands for SUB and SBB instructions 6 37 微處理機原理與應用 Lecture 05-34 Reg6 Reg8 Allowed operands for DEC instruction Allowed operands for NEG instruction Perform a 32-bit binary add operation on the contents of the processor s register (,) (,)+(BX,) (,) = FEDCBA98 6 (BX,) = 0234567 6 MOV, 0FEDCH MOV, 0BA98H MOV BX, 0234H MOV, 04567H ADD, ADC, BX ; Add with carry Assuming that the contents of register BX and are 234 6 and 023 6, respectively, and the carry flag is 0, what is the result of executing the instruction SBB BX,? (BX)-()-(CF) (BX) We get (BX) = 234 6 023 6 0 6 = 6 the carry flag remains cleared 6 37 微處理機原理與應用 Lecture 05-32 6 37 微處理機原理與應用 Lecture 05-35 Subtraction s: SUB, SBB, DEC, AAS, DAS, and NEG SUB SBB DEC NEG DAS AAS Subtract Subtract with borrow Decrement by Negate Decimal adjust for subtraction ASCII adjust for subtraction SUB D, S (D)-(S) (D) Borrow (CF) SBB D, S (D)-(S)-(CF) (D) DEC D NEG D DAS AAS (D)- (D) 0-(D) (D) (CF) OF, SF, ZF, AF, PF OF, SF, ZF, AF, PF,CF SF, ZF, AF, PF, CF, AF,CF OF,SF, ZF,PF undefined Verify the previous example using DEBUG program 6 37 微處理機原理與應用 Lecture 05-33 6 37 微處理機原理與應用 Lecture 05-36 6
Assuming that the register BX contains 3A 6, what is the result of executing the following instruction? NEG BX (BX) = 6 -(BX)= 6 +2 complement of 3A 6 = 6 +FFC6 6 = FFC6 6 Since no carry is generated in this add operation, the carry flag is complemented to give (CF) = Multiplication s: MUL, V, IMUL, IV, AAM, AAD, CBW, and CWD MUL Multiply MUL S (AL) (S8) () OF, CF (unsigned) () (S6) ()() SF,ZF, AF, PF undefined V IMUL IV Division (unsigned) Integer multiply (signed) Integer divide (signed) V S ()Q(()/(S8)) (AL) R(()/(S8)) (AH) (2)Q((,)/(S6)) () R((,)/(S6)) () If Q is FF 6 in case () or FFFF 6 in case (2), then type 0 interrupt occurs IMUL S (AL) (S8) () () (S6) ()() IV S ()Q(()/(S8)) (AL) R(()/(S8)) (AH) (2)Q((,)/(S6)) () R((,)/(S6)) () If Q is positive and exceeds 7FFF 6 or if Q is negative and become less than 8 6, then type 0 interrupt occurs undefined OF, CF SF,ZF, AF, PF undefined undefined 6 37 微處理機原理與應用 Lecture 05-37 6 37 微處理機原理與應用 Lecture 05-40 Verify the previous example using DEBUG program Multiplication s: MUL, V, IMUL, IV, AAM, AAD, CBW, and CWD AAM AAD CBW CWD Adjust AL for multiplication Adjust for division Convert byte to word Convert word to double word AAM Q((AL)/0) (AH) SF,ZF,PF R((AL)/0) (AL) OF,AF,CF undefined AAD (AH) 0+(AL) (AL) SF,ZF,PF (AH) OF,AF,CF undefined CBW (MSB of AL) (All bits of AH) CWD (MSB of ) (All bits of ) Reg8 Reg6 6 37 微處理機原理與應用 Lecture 05-38 Mem8 Mem6 Allowed operands 6 37 微處理機原理與應用 Lecture 05-4 Perform a 32-bit binary subtraction for variable X and Y MOV, 2H MOV, H MOV, [] SUB, [] MOV [], MOV, []+2 SBB, []+2 MOV []+2, ; Initialize pointer for X ; Initialize pointer for Y ; Subtract LS words ; Save the LS word of result ; Subtract MS words ; Save the MS word of result The 2 s-complement signed data contents of AL are and that of CL are 2 What result is produced in by executing the following instruction? MUL CL and IMUL CL (AL) = - (as 2 s complement) = 2 = FF 6 (CL) = -2 (as 2 s complement) = 0 2 = FE 6 Executing the MUL instruction gives () = 2 x0 2 =0 2 =FD02 6 Executing the IMUL instruction gives () = - 6 x -2 6 = 2 6 = 02 6 6 37 微處理機原理與應用 Lecture 05-39 6 37 微處理機原理與應用 Lecture 05-42 7
Verify the previous example using DEBUG program 53 Logic s Logic instructions : AND, OR, XOR, NOT Source Immediate Immediate Accumulator Immediate Allowed operands for AND, OR, and XOR instructions Allowed operands for NOT instruction 6 37 微處理機原理與應用 Lecture 05-43 6 37 微處理機原理與應用 Lecture 05-46 53 Logic s What is the result of executing the following instructions? MOV AL, 0AH CBW CWD (AL) = A 6 = 0 2 Executing the CBW instruction extends the MSB of AL (AH) = 2 = FF 6 or () = 2 Executing the CWD instruction, we get () = 2 = FFFF 6 That is, () = FFA 6 () = FFFF 6 6 37 微處理機原理與應用 Lecture 05-44 Describe the results of executing the following instructions? MOV AL, 0000B AND AL, 0B OR AL, B XOR AL, B NOT AL (AL)=0000 2 0 2 = 000 2 =5 6 Executing the OR instruction, we get (AL)= 000 2 + 2 = 000 2 =D5 6 Executing the XOR instruction, we get (AL)= 000 2 2 = 000 2 =DA 6 Executing the NOT instruction, we get (AL)= (NOT)000 2 = 0 2 =25 6 國立台灣大學生物機電系 6 37 微處理機原理與應用 Lecture 05-47 林達德 53 Logic s 53 Logic s The logic instructions include AND OR XOR (Exclusive-OR) NOT AND OR XOR NOT Logical AND Logical Inclusive-OR Logical exclusive-or Logical NOT AND D, S (S) (D) (D) OR D, S XOR D, S NOT D (S) (D) (D) (S) (D) (D) (NOT D) (D) OF, SF, ZF, PF, CF OF, SF, ZF, PF, CF OF, SF, ZF, PF, CF Masking and setting bits in a register Mask off the upper 2 bits of the word of data in AND, 0F 6 Setting B 4 of the byte at the offset address CONTROL_FLAGS MOV AL, [CONTROL_FLAGS] OR AL, 0H MOV [CONTROL_FLAGS], AL Executing the above instructions, we get (AL)= 2 +0 2 = X 2 6 37 微處理機原理與應用 Lecture 05-45 6 37 微處理機原理與應用 Lecture 05-48 8
54 Shift s Shift instructions: SHL, SHR, SAL, SAR SAL/SHL SHR SAR Shift arithmetic left / Shift logical left Shift logical right Shift arithmetic right SAL D, Count SHL D, Count SHR D, Count SAR D, Count Shift the (D) left by the number of bit positions equal to Count and fill the vacated bits positions on the right with zeros Shift the (D) right by the number of bit positions equal to Count and fill the vacated bits positions on the left with zeros Shift the (D) right by the number of bit positions equal to Count and fill the vacated bits positions on the left with the original most significant bits Flags affected CF, PF, SF, Z CF, PF, SF, Z CF, PF, SF, Z 54 Shift s Assume that CL contains 02 6 and contains 09A 6 Determine the new contents of and the carry flag after the instruction SAR, CL is executed ()=00 2 =0246 6 and the carry flag is (CF)= 2 6 37 微處理機原理與應用 Lecture 05-49 6 37 微處理機原理與應用 Lecture 05-52 54 Shift s Shift instructions: SHL, SHR, SAL, SAR Count 54 Shift s Verify the previous example using DEBUG program CL CL Allowed operands for shift instructions 6 37 微處理機原理與應用 Lecture 05-50 6 37 微處理機原理與應用 Lecture 05-53 54 Shift s Shift instructions: SHL, SHR, SAL, SAR SHL, SHR, CL SAR, CL 54 Shift s Isolate the bit B 3 of the byte at the offset address CONTROL_FLAGS MOV AL, [CONTROL_FLAGS] MOV CL, 04H SHR AL, CL Executing the instructions, we get (AL)=B 7 B 6 B 5 B 4 and (CF)=B 3 6 37 微處理機原理與應用 Lecture 05-5 6 37 微處理機原理與應用 Lecture 05-54 9
55 Rotate s Rotate instructions: ROL, ROR, RCL, RCR ROL ROR RCL Rotate left Rotate right Rotate left through carry ROL D, Count ROR D, Count RCL D, Count Flags affected Rotate the (D) left by the number CF of bit positions equal to Count Each bit shifted out from the leftmost bit goes back into the rightmost bit position Rotate the (D) right by the number of bit positions equal to Count Each bit shifted out from the rightmost bit goes back into the leftmost bit position Same as ROL except carry is attached to (D) for rotation CF CF 55 Rotate s Rotate instructions: ROL, ROR, RCL, RCR For RCL, RCR, the bits are rotate through the carry flag RCR Rotate right through carry RCR D, Count Same as ROR except carry is attached to (D) for rotation CF 6 37 微處理機原理與應用 Lecture 05-55 6 37 微處理機原理與應用 Lecture 05-58 55 Rotate s Rotate instructions: ROL, ROR, RCL, RCR Count CL CL Allowed operands for rotate instructions 55 Rotate s What is the result in BX and CF after execution of the following instructions? RCR BX, CL Assume that, prior to execution of the instruction, (CL)=04 6, (BX)=234 6, and (CF)=0 The original contents of BX are (BX) = 000 2 = 234 6 Execution of the RCR command causes a 4-bit rotate right through carry to take place on the data in BX, the results are (BX) = 2 = 823 6 (CF) = 0 2 6 37 微處理機原理與應用 Lecture 05-56 6 37 微處理機原理與應用 Lecture 05-59 55 Rotate s Rotate instructions: ROL, ROR, RCL, RCR ROL, 55 Rotate s Verify the previous example using DEBUG program ROR, CL (CL)=4 6 37 微處理機原理與應用 Lecture 05-57 6 37 微處理機原理與應用 Lecture 05-60 0
55 Rotate s Disassembly and addition of 2 hexadecimal digits stored as a byte in memory MOV AL, [HEX_GITS] MOV BL, AL MOV CL, 04H ROR BL, CL AND AL, 0FH AND BL, 0FH ADD AL, BL 6 37 微處理機原理與應用 Lecture 05-6