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1 THE 8051 MICROCONTROLLER THE 8051 MICROCONTROLLER 15.1 Introduction 15.2 The 8051 Architecture 15.3 Interfacing to External Memory 15.4 The 8051 Instruction Set 15.5 Timer Operations 15.6 Serial Port Operations 15.7 Interrupts Applications 微處理機原理與應用 Lecture 15-2

2 15.1 Introduction Computers can be divided into following two main types depending on their function: General purpose Special purpose Microcontrollers are more suitable for special purpose devices. Microcontroller is a device similar to microprocessor but includes more circuitry in the same chip. Program & Data Memory I/O Ports Serial Communication Counters/Timers Interrupt Control logic A/D and D/A converters 微處理機原理與應用 Lecture Introduction Comparisons between microprocessors and microcontrollers: Microprocessor is a single chip CPU, microcontroller contains, a CPU and much of the remaining circuitry of a complete microcomputer system in a single chip. Microcontroller includes RAM, ROM, serial and parallel interface, timer, interrupt schedule circuitry (in addition to CPU) in a single chip. RAM is smaller than that of even an ordinary microcomputer, but enough for its applications. Interrupt system is an important feature, as microcontrollers have to respond to control oriented devices in real time. For example, opening of microwave oven s door cause an interrupt to stop the operation 微處理機原理與應用 Lecture 15-4

3 15.1 Introduction Comparisons between microprocessors and microcontrollers: Microprocessors are most commonly used as the CPU in microcomputer systems. Microcontrollers are used in small, minimum component designs performing control-oriented activities. Microprocessor instruction sets are processing intensive implying powerful addressing modes with instructions catering to large volumes of data. Their instructions operate on nibbles, bytes, etc. Microcontrollers have instruction sets catering to the control of inputs and outputs. Their instructions operate also on a single bit. A motor, for example, may be turned ON and OFF by a 1-bit output port 微處理機原理與應用 Lecture Introduction Term 8051 refers to MCS-51 family of microcontroller ICs by Intel Corp. (From ) Features of 8051 are summarized below: 8 Bit data path and ALU. Easy interfacing. 12 to 30 MHz versions available. (1 µsec to 400 ns for single cycle instructions). Full instruction set including: Multiply and Divide. Bit set, reset, and test (Boolean instructions). Variety of addressing modes 微處理機原理與應用 Lecture 15-6

4 Architecture Hardware Features of the K (8031), ROM 4K (8051), EPROM 4K (8751) RAM 128 bytes (8XX1), 256 bytes (8XX2) (where X= 0 or 7 & X=3 or 5) Four 8-bit I/O Ports (P0 - P3) Two 16-bit Timers/Counters (T0 & T1) Serial I/O Port Boolean Processor (Operates on Single Bits) 210 bit-addressable locations Oscillator & Clock Circuit 微處理機原理與應用 Lecture Architecture The 8051 family of microcontrollers Device number Internal memory Program Data Timers/ Event Counter Interrupt Sources K X 8 ROM 128 X 8 RAM 2 X 16-bit H 4K X 8 EPROM 128 X 8 RAM 2 X 16-bit None 128 X 8 RAM 2 X 16-bit H 8K X 8 ROM 256 X 8 RAM 3 X 16-bit BH 8K X 8 EPROM 256 X 8 RAM 3 X 16-bit AH None 256 X 8 RAM 3 X 16-bit 微處理機原理與應用 Lecture 15-8

5 Architecture The 8051 block diagram 微處理機原理與應用 Lecture Architecture The 8051 block diagram 微處理機原理與應用 Lecture 15-10

6 Architecture The 8051 logic symbol 微處理機原理與應用 Lecture Architecture The 8051 pin configuration 微處理機原理與應用 Lecture 15-12

7 Architecture I/O Ports Four 8-bit I/O ports. Port 0, Port 1, Port 2, Port 3 Most have alternate functions. Bi-directional 微處理機原理與應用 Lecture Architecture Port 0 (pin 32 ~ 39 ) Dual purpose I/O port. In minimum component design, it is used as a general purpose I/O port. In larger designs with external memory, it becomes a multiplexed data bus: Low byte of address bus, strobed by ALE. 8-bit instruction bus, strobed by PSEN. 8-bit data bus, strobed by WR and RD 微處理機原理與應用 Lecture 15-14

8 Architecture Port 1 (pin 1 ~ 8 ) As an I/O port: Standard bi-directional port for interfacing to external devices as required for I/O. Alternate functions: Only on some derivatives 微處理機原理與應用 Lecture Architecture Port 2 (pin 21 ~ 28 ) Dual purpose I/O port. As an I/O port: Standard bi-directional general purpose I/O port. Alternate functions: High byte of address bus for external program and data memory accesses 微處理機原理與應用 Lecture 15-16

9 Architecture Port 3 (pin 10 ~ 17 ) Dual purpose I/O port. As an I/O port: Standard bi-directional general purpose I/O port. Alternate functions: P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 Port pin RXD (serial input port) TXD (serial input port) INT0 (external interrupt 0) INT1 (external interrupt 1) T0 (Timer 0 external input) T1 (Timer 1 external input) 微處理機原理與應用 Lecture Alternative function WR (external data memory write strobe) RD (external data memory read strobe) Architecture Bus control signals PSEN (pin 29): (Program Store Enable) enables external program (code) memory. Usually connected to EPROM s output enable (OE). It pulses low during fetch stage of an instruction. It remains high while executing a program ALE/PROG (pin 30): (Address Latch Enable) used for demultiplexing the address and data bus when port 0 is used as the data bus and low-byte of address bus. EA/VPP (pin 31): (External Access) high to execute programs from internal ROM and low to execute from external RST (pin 9): (RESET) master reset of 微處理機原理與應用 Lecture 15-18

10 Architecture Oscillator and power pins Pins 18 and 19 are the oscillator pins to connect the crystal of nominal frequency 12 MHz. Pin 40 is for +5V and pin 20 is for GND 微處理機原理與應用 Lecture Architecture Addressing space 64K x 8 ROM - External Program Memory. (Enabled via PSEN) 64K x 8 RAM - External Data Memory. (Enabled via RD and WR) 256 x 8 RAM - Internal Data Memory. 128 x 8 Special Function Registers (SFRs). Bit addressing of 16 RAM locations and 16 SFRs 微處理機原理與應用 Lecture 15-20

11 Architecture Addressing space 微處理機原理與應用 Lecture Architecture Internal data memory Four register banks (Register Bank 0-3): 00 to 1F hexadecimal. Bit addressable RAM (128 bits): 20 to 2F hexadecimal. General purpose RAM (directly addressable range): 30 to 7F hexadecimal. Special function registers (indirectly addressable range): 80 to FF hexadecimal 微處理機原理與應用 Lecture 15-22

12 Architecture Internal data memory 微處理機原理與應用 Lecture Architecture External data memory 64K byte address space. The only access to this memory is with the MOVX instruction, using either 16- bit data pointer DPTR, R0, or R1 as the address register 微處理機原理與應用 Lecture 15-24

13 Architecture External program memory 64K byte address space. Enabled by PSEN signal 微處理機原理與應用 Lecture Architecture External bus expansion 微處理機原理與應用 Lecture 15-26

14 Architecture Special function register space 128 byte address space, directly addressable as 80H to FFH 16 addresses are bit addressable: Set, Clear, AND, OR, MOV (those ending with 0 or 8). Special function space contains: Special purpose CPU registers. I/O control registers. I/O ports 微處理機原理與應用 Lecture Architecture Special function register map 微處理機原理與應用 Lecture 15-28

15 Architecture Program status word (PSW) Flags are 1-bit registers provided to store the results of certain program instructions. In order to conveniently address the flags, they are grouped inside the PSW register 微處理機原理與應用 Lecture Architecture Program status word (PSW) CY: (Carry Flag) is dual purpose: (1) As traditional CY for arithmetic operations, (2) As Boolean accumulator. AC: (Auxiliary Carry Flag) used in addition of BCD numbers, is set if a carry was generated out of bit 3 into bit 4. If the values are added are BCD, then the add instruction must be followed by DAA (decimal adjust accumulator) to bring results greater than 9 back into range. F0: (Flag 0) is a general-purpose flag bit available for user applications 微處理機原理與應用 Lecture 15-30

16 Architecture Program status word (PSW) OV: (Overflow Flag) is set after an addition or subtraction operation if there was an arithmetic overflow. Results greater than +127 or less than 128 will set OV bit. P: (Parity Bit) automatically set or cleared each machine cycle to establish even parity with the accumulator. Parity bit is most commonly used in conjunction with serial port routines to include a parity bit before or after the transmission. RS1 and RS0 are used to select different register banks 微處理機原理與應用 Lecture Interfacing to External Memory Up to 64K of code memory (ROM/EPROM) and 64K of data memory (RAM) can be added to any of the 8051 family member. Two of the I/O ports are used up in order to provide the address and data buses. The AD 0 -AD 7 lines that are output on port 0 are demultiplexed by the ALE signal and the address latch. All I/O to the external data memory is made using the MOVX instruction 微處理機原理與應用 Lecture 15-32

17 15.3 Interfacing to External Memory Interfacing a 2732 EPROM to the ROMless 8031 microcontroller 微處理機原理與應用 Lecture Interfacing to External Memory Interfacing an 8155 RAM/IO/Timer to the 微處理機原理與應用 Lecture 15-34

18 15.4 The 8051 Instruction Set Data transfer instruction Program branching instructions Logical and bit operation instructions Arithmetic operation instructions 微處理機原理與應用 Lecture The 8051 Instruction Set Addressing mode There are basically 5 ways of specifying source/destination operand addresses: Particular On-chip Resources: This includes the Accumulator (A), the Stack Pointer (SP), the Data Pointer (DP), the Program Counter (PC), and the Carry (C). Other On-chip Registers are Memorymapped while these have special Op-codes. Immediate operands: The # sign is the designator. These are 8- bits except for DPTR contents (16-bits). Register operands: Designated as Rn, where n is One of the four Register Banks is used (selected by RS0 and RS1 in PSW). Direct Operands: From 00 to FF Hex, specifies one of the internal data addresses. Indirect Address: Designated where i is 0 or 1, uses the contents of R0 or R1 in the selected Register Bank to specify the address. Other form using Accumulator contents 微處理機原理與應用 Lecture 15-36

19 15.4 The 8051 Instruction Set Addressing mode Addressing modes are an integral part of each computers instruction set. They allow different ways of specifying source/destination operand addresses depending on the programming situation. There are 8 addressing modes: 1. Immediate 2. Register 3. Direct 4. Indirect 5. Relative 6. Absolute 7. Long 8. Indexed 微處理機原理與應用 Lecture The 8051 Instruction Set EXAMPLE Write the 8051 instruction to perform the following operations. (a) Move the contents of the accumulator to register 5. (b) Move the contents of RAM memory location 42H to port 1. (c) Move the value at port 2 to register 3. (d) Send FFH to port 0. (e) Send the contents of RAM memory, whose address is in register 1, to port 3 Solution: (a) MOV R5, A (b) MOV P1, 42H (c) MOV R3, P2 (d) MOV P0, #0FFH (e) MOV 微處理機原理與應用 Lecture 15-38

20 15.4 The 8051 Instruction Set Program branching instructions JMP label (Unconditional jump) JZ label (Jump if accumulator zero) JNZ label (Jump if accumulator not zero) JB bit, label (Jump if bit set) JNB bit, label (Jump if bit not set) DJNZ Rn, label (Decrement register and jump if not zero) CJNE Rn, #data, label (Compare immediate data to register and jump if not equal) CALL label (Call subroutine) RET (Return) 微處理機原理與應用 Lecture The 8051 Instruction Set EXAMPLE Write a program that continuously reads a byte from port 1 and writes it to port 0 until the byte read equals zero. Solution: READ: MOV A, P1 ; A P1 MOV P0, A ; P0 A JNZ READ ; Repeat until A = 0 NOP ; Remainder of program etc 微處理機原理與應用 Lecture 15-40

21 15.4 The 8051 Instruction Set EXAMPLE Repeat the previous example, except stop the looping when the number 77H is read Solution: READ: MOV A, P1 MOV P0, A CJNE A, #77, READ NOP etc. ; A P1 ; P0 A ; Repeat until A = 77H ; Remainder of program 微處理機原理與應用 Lecture The 8051 Instruction Set EXAMPLE Repeat the previous example, except stop the looping when bit 3 of port 2 is set. Solution: READ: MOV A, P1 ; A P1 MOV P0, A ; P0 A JNB P2.3, READ ; Repeat until P2.3 = 1 NOP ; Remainder of program etc 微處理機原理與應用 Lecture 15-42

22 15.4 The 8051 Instruction Set EXAMPLE Write a program that will produce an output at port 0 that counts down from 80H to 00H. Solution: MOV R0, #80H ; R0 80H COUNT: MOV P0, R0 ; P0 R0 DJNZ R0, COUNT ; Decrement R0, jump to ; COUNT if not 0 NOP ; Remainder of program etc 微處理機原理與應用 Lecture The 8051 Instruction Set Logical and bit operation instructions ANL A, Rn (AND register to accumulator) ANL A, #data (AND data byte to accumulator) ORL A, Rn (OR register to accumulator) ORL A, #data (OR data byte to accumulator) XRL A, Rn (Ex-OR register to accumulator) XRL A, #data (Ex-OR data byte to accumulator) 微處理機原理與應用 Lecture 15-44

23 15.4 The 8051 Instruction Set Logical and bit operation instructions CLR bit (Clear bit) SETB bit (Set bit) CPL bit (Complement bit) RL A (Rotate accumulator left) RLC A (Rotate accumulator left through carry) RR A (Rotate accumulator right) RRC A (Rotate accumulator right through carry) 微處理機原理與應用 Lecture The 8051 Instruction Set EXAMPLE Determine the contents of the accumulator after the execution of the following program segments. MOV A, #3CH ; A MOV R4, #66H ; R ANL A, R4 ; A A AND R4 Solution: A = R4 = A AND R4 = = 24H 微處理機原理與應用 Lecture 15-46

24 15.4 The 8051 Instruction Set EXAMPLE Determine the contents of the accumulator after the execution of the following program segments. MOV A, #0C3H ; A RLC A ; Rotate left through carry Solution: Assume carry = 0 initially A = Rotate left through carry A = , carry = 微處理機原理與應用 Lecture The 8051 Instruction Set EXAMPLE Use the SETB, CLR, and CPL instructions to do the following operations: (a) Clear bit 7 of the accumulator (b) Output a 1 on bit 0 of port 3 (c) Complement the parity flag (bit 0 of the PSW) Solution: (a) CLR ACC.7 (b) SETB P3.0 (c) CPL PSW 微處理機原理與應用 Lecture 15-48

25 15.4 The 8051 Instruction Set EXAMPLE Describe the activity at the output of port 0 during the execution of the following program segment: MOV R7, #0AH MOV P0, #00H LOOP: CPL P0.7 DJNZ R7, LOOP Solution: Register 7 is used as loop counter with the initial value of 10 (0AH). Each time that the complement instruction (CPL) is executed, bit 7 will toggle to its opposite state. Toggling bit 7 ten times will create a waveform with five positive pulses 微處理機原理與應用 Lecture The 8051 Instruction Set Arithmetic operation instructions ADD A, Rn (Add register to accumulator) ADD A, #data (Add immediate data to accumulator) SUBB A, Rn (Subtract register from accumulator with borrow) SUBB A, #data (Subtract immediate data from accumulator with borrow) INC A (Increment accumulator) INC Rn (Increment register) DEC A (Decrement accumulator) DEC Rn (Decrement register) MUL AB (Multiply A times B) DIV AB (Divide A by B) DA A (Decimal adjust accumulator) 微處理機原理與應用 Lecture 15-50

26 15.4 The 8051 Instruction Set EXAMPLE Add the value being input at port 1 to the value at port 2 and send the result to port 3. Solution: MOV R0, P1 MOV A, P2 ADD A, R0 MOV P3, A ; R0 P1 ; A P2 ; A A+R0 ; P3 A 微處理機原理與應用 Lecture The 8051 Instruction Set EXAMPLE Multiply the value being input at port 0 times the value at port 1 and send the result to ports 3 and 2 (high order, low order). Solution: MOV A, P0 MOV B, P1 MUL AB MOV P2, A MOV P3, B ; A P0 ; B P1 ; A X B ; P2 A (low order) ; P3 B (high order) 微處理機原理與應用 Lecture 15-52

27 15.5 Timer Operations Counter/Timer Timer is a series of divide-by-two flip-flops that receive an input signal as a clocking source. Clock is applied to the first flip- flop, which gives output divided by 2. That output of first flip- flop clocks the second flip-flop, which also divides it by 2 and so on. The output of the last stage clocks a timer overflow flipflop, or flag, which is tested by the software. It is like a counter. A 16-bit timer would count from 0000H to FFFFH. The overflow flag is set on the FFFFH-to-0000H count. There are two timers in 8051, T0 and T1. There are four modes of timer operations 微處理機原理與應用 Lecture Timer Operations Counter/Timer mode register, TMOD TMOD is not bit addressable. It is loaded by the software at the beginning of a program to initialize the timer mode. GATE: Permits INTx pin to enable/disable the counter. C/T : Set for counter operation, reset for timer operation. M1, M0 : 00 : Mode bit timer mode (Emulates 8048 counter/timer). 01 : Mode bit timer mode. 10 : Mode 2-8- bit auto-reload mode. 11 : Mode 3 - Split timer mode (Timer 0 = two 8-bit timers) 微處理機原理與應用 Lecture 15-54

28 15.5 Timer Operations Counter/Timer control register, TCON TF1, TF0 : Overflow flags for Timer 1 and Timer 0. TR1, TR0 : Run control bits for Timer 1 and Timer 0. Set to run, reset to hold. IE1, IE0 : Edge flag for external interrupts 1 and 0. * Set by interrupt edge, cleared when interrupt is processed. IT1, IT0 : Type bit for external interrupts. * Set for falling edge interrupts, reset for 0 level interrupts. * = not related to counter/timer operation but used to detect and initiate external interrupts 微處理機原理與應用 Lecture Timer Operations Counter/Timer modes: mode 0 (13-bit timer) High byte and bits of the timer low byte (TLx) form a 13-bit timer, where x = 0 or 1. Upper 3 bits of TLx are not used. Overflow occurs on the 1FFFH-to-0000H and sets the timer overflow flag. MSB is THx bit 7, and LSB is TLx bit 0. MOV TMOD, #00H ; setting both timers to mode 微處理機原理與應用 Lecture 15-56

29 15.5 Timer Operations Counter/Timer modes: mode 1 (16-bit timer) Same as mode 0 except that it is 16-bit. Timer high byte (THx) is cascaded the timer low byte (TLx) to form a 16-bit timer, where x = 0 or 1. Clock is applied to the combined high and low-byte registers. Overflow occurs on the FFFFH-to-0000H and sets the timer overflow flag. MSB is THx bit 7, and LSB is TLx bit 0. LSB toggles at clock frequency/2 and MSB at clock frequency/ 微處理機原理與應用 Lecture Timer Operations Counter/Timer modes: mode 2 (Auto-reload) Timer low byte (TLx) operates as an 8-bit timer while the timer high byte (THx) holds a reload value. When the count overflows from FFH-to-00H, not only the timer flag set, but also the value in THx is loaded into TLx, and counting continues from this value up to next FFH-to-00H, so on 微處理機原理與應用 Lecture 15-58

30 15.5 Timer Operations Counter/Timer modes: mode 3 Timer 0 splits into two 8-bit counter/timers. TL0 and TH0 act as two separate timers with overflows setting the TF0 and TF1, respectively. Timer 1 (when timer 0 is in mode 3): Counter stopped if in mode 3 Can be used in mode 0, 1, or 2 May be used as a baud rate generator 微處理機原理與應用 Lecture Timer Operations Clocking source: Interval timing If C/T = 0 (in TMOD), timer operation is selected and timer is clocked from on-chip oscillator. A divide-by-12 clock frequency is applied. Timer registers (TLx/THx) increment at a rate of 1/12 of the frequency of on-chip oscillator. 12 MHz crystal would yield a clock rate of 1 MHz. Timer overflows occur after a fixed number of clocks, depending on the initial value loaded into the timer registers 微處理機原理與應用 Lecture 15-60

31 15.5 Timer Operations Clocking source: Event timing If C/T = 1 (in TMOD), counter operation is selected and timer is clocked from external source. Usually, external source supplies the timer with a pulse upon the occurrence of an event. Timer counts those events. External clock source comes through P3.4 (for Timer 0) and P3.5 (for Timer 1). Timer registers are incremented in response to a 1-to-0 transition at the external input. Number of external events is determined in software by reading the timer registers TLx/THx 微處理機原理與應用 Lecture Timer Operations Control of timers TRx bit in bit addressable register TCON is responsible for starting and stopping the counters TRx = 0 stops/disables the timers (e.g., CLR TR1) TRx = 1 starts/enables the timers (e.g., SETB TR0) System reset clears TRx, so timers are disabled by default 微處理機原理與應用 Lecture 15-62

32 15.5 Timer Operations Control of timers Timers are usually initialized once at the beginning of the program to set the correct operating mode. Then, within the body of a program, the timers are started, stopped, flag bits are tested and cleared, timer registers read or updated, and so on, as required in the application. First register to be initialized is TMOD to set the mode of operation e.g., MOV TMOD, # B ; sets Timer 1 in mode 1, leave C/T = 0 and GATE = 0 for internal clocking, and clears the Timer 0 bits 微處理機原理與應用 Lecture Timer Operations Control of timers Secondly, registers to be initialized are TLx/THx. E.g., for 100 sec interval, the following instruction will do the job MOV TL1, #9CH ; (-100) 10 = FF9CH MOV TH1, #FFH ; load Timer 1 registers by FF9CH The timer is then started by setting the run control bit i.e., SETB TR1 Overflow flag is automatically set 100 sec later. Following instruction will check that WAIT: JNB TF1, WAIT ; wait until overflow flag is set. When the timer overflows, it is necessary to stop the timer and clear the overflow flag in software by the following instructions: CLR TR1 ; stop Timer 1 CLR TF1 ; clear overflow flag of Timer 微處理機原理與應用 Lecture 15-64

33 15.6 Serial Port Operations 8051 includes an on-chip serial port that can operate in four modes over a wide range of frequencies. Essential function of serial port is to perform parallelto-serial conversion for output data, and serial-toparallel conversion for input data. Transmission bit is P3.1 on pin 11 (TXD) and reception bit is P3.0 on pin 10 (RXD). Features full duplex (simultaneous reception and transmission). Receive buffering allowing one character to be received and held in a buffer while a second character is received. If the CPU reads the first character before the second is fully received, data are not lost 微處理機原理與應用 Lecture Serial Port Operations Two SFRs (SBUF & SCON) provide software access to serial port. Writing to SBUF loads data to be transmitted and reading SBUF accesses received data. SCON is a bit addressable register containing status bits and control bits. Control bits set the operating mode and status bits indicate the end of a character transmission or reception. The status bits are tested in software or programmed to cause an interrupt. Serial port frequency of operation (baud rate) can be fixed or variable. Fixed baud rate is derived from on-chip oscillator and variable baud rate is supplied by Timer 1 which must be programmed accordingly 微處理機原理與應用 Lecture 15-66

34 15.6 Serial Port Operations Serial port control register: SCON (098H) SM0, SM1 : Serial Port Mode bits Mode Baud Rate 00 = Mode 0 : Shift register I/O Fixed (oscillator frequency/12) 01 = Mode 1 : 8-bit UART Variable (set by timer) 10 = Mode 2 : 9-bit UART Fixed (osc frq/32 or osc frq/64 ) 11 = Mode 3 : 9-bit UART Variable (set by timer) SM2 : Serial Port Mode bit Mode 0 : Not used. Mode 1 : 1 = Ignore bytes with no stop bit. Mode 2,3 : 0 = Set receive interrupt (RI) on all bytes. : 1 = Set RI on bytes where 9th bit is 微處理機原理與應用 Lecture Serial Port Operations Serial port control register: SCON (098H) REN: Receiver enable. Must be set to receive characters. TB8: Transmit bit 8. Ninth bit transmitted (in modes 2 and 3); set/cleared by software. RB8: Receive bit 8. Ninth bit received (in modes 2 and 3): Mode 0 : Not used. Mode 1 : Stop bit. Mode 2, 3 : Ninth data bit. TI: Transmit interrupt flag. Set at end of character transmission; cleared by software. RI: Receive interrupt flag. Set at end of character reception; cleared by software 微處理機原理與應用 Lecture 15-68

35 15.6 Serial Port Operations Serial interface Full duplex UART (Universal Asynchronous Receiver /Transmitter is a device that receives and transmits serial data with each data character preceded by a start bit 0 and followed by a stop bit 1 ). Sometimes a parity bit is inserted between the last data bit and the stop bit. The essential operation of a UART is to perform parallel-toserial conversion for output data, and serial-to-parallel conversion for input data. 10 or 11 bit frames. Interrupt driven. Registers: SCON - Serial port control register. SBUF - Read received data. - Write data to be transmitted 微處理機原理與應用 Lecture Serial Port Operations Serial port block diagram 微處理機原理與應用 Lecture 15-70

36 15.6 Serial Port Operations Serial interface operation mode: Mode 0 Mode 0: 8-Bit Shift Register Mode. Terms RXD & TXD are misleading in this mode. RXD line is used for both input and output. TXD line serves as the clock. Eight bits are transmitted and received with the LSB first. Baud Rate is 1/12 of on-chip oscillator frequency. Transmission is initiated by any instruction that writes data to SBUF. Data are shifted out on RXD line with clock pulses sent out by the TXD line. Each transmitted bit is valid on the RXD pin for one machine cycle. Reception is initiated when the receiver enable bit (REN) is 1 and the receive interrupt bit (RI) is 0. REN is set at the beginning of the program, and then clear RI to begin a data input operation. The clocking of data into serial port occurs on the positive edge of TXD 微處理機原理與應用 Lecture Serial Port Operations Serial interface operation mode: Mode 1 Mode 1: Serial port operates as an 8-bit UART with a variable baud rate. 10 bits are transmitted on TXD or received on RXD. Start bit (always 0), 8 data bits (LSB first), and a stop bit (always 1). For a receive operation, the stop bit goes into RB8 in SCON. Baud Rate Clock is variable using Timer 1 overflow or external count input. Transmission is initiated by writing data to SBUF, but does not start until the next rollover of the divide-by-16 counter supplying the serial port baud rate. Shifted data are outputted on the TXD line beginning with the start bit. The transmit interrupt flag (TI) is set as soon as the stop bit appears on TXD. Reception is initiated by a 1-to-0 transition on RXD. The divide-by-16 counter is immediately reset to align the counts with the incoming bit stream 微處理機原理與應用 Lecture 15-72

37 15.6 Serial Port Operations Serial interface operation mode: Mode 2 Mode 2: Serial port operates as a 9-bit UART with a fixed baud rate. 11 bits are transmitted or received. Start bit (always 0), 8 data bits (LSB first), a programmable 9th bit, and a stop bit (always 1). On transmission, the 9th bit whatever has been put in TB8 in SCON (may be a parity bit). On reception, the 9th bit is placed in RB8 in SCON. Baud Rate is programmable to either 1/32 or 1/64 of the onchip oscillator frequency 微處理機原理與應用 Lecture Serial Port Operations Serial interface operation mode: Mode 3 Mode 3: Serial port operates as a 9-bit UART with a variable baud rate. 11 bits are transmitted or received. Baud Rate is programmable and provided by the Timer 1 overflow or external input. Summary: Baud rate: Fixed in mode 2, variable in modes 1 & 3 Data Bits: Eight in mode 1, nine in modes 2 & 微處理機原理與應用 Lecture 15-74

38 15.6 Serial Port Operations Serial interface initialization Receiver Enable Bit (REN): must be set by software to enable the reception of characters at the beginning of a program when the serial port, timers, etc. are initialized. The instructions are SETB REN or MOV SCON, #xxx1xxxxb The 9 th Bit: transmitted must be loaded into TB8 by software and received is placed in RB8. Adding a Parity Bit: is a common use of 9th bit. E.g., if communication requires 8 data bits plus even parity MOV C, P ; Put even parity bit in C flag MOV TB8, C ; This becomes the 9th data bit in TB8 MOV SBUF, A ; Move 8 bits from ACC to SBUF 微處理機原理與應用 Lecture Serial Port Operations Serial interface initialization If communication requires 8 data bits plus odd parity MOV C, P ; Put even parity bit in C flag CPL C ; Convert to odd parity MOV TB8, C ; This becomes the 9th data bit in TB8 MOV SBUF, A ; Move 8 bits from ACC to SBUF Parity can be used in mode 1 also if the 7 data bits are used. For example, 7-bit ASCII code with even parity can be transmitted as follows: CLR ACC.7 ; Ensure MSB is clear MOV C, P ; Put even parity bit in C flag MOV ACC.7, C ; Copy even parity bit into MSB MOV SBUF, A ; Send character 微處理機原理與應用 Lecture 15-76

39 15.6 Serial Port Operations Interrupt flags RI & TI in SCON play an important role in serial communications. Both bits are set by hardware but must be cleared by software. RI is set at the end of character reception and indicates receive buffer full. This condition is tested in software or programmed to cause an interrupt. If software wishes to input a character from the device connected to the serial port, it must wait until RI is set, then clear RI and read the character from SBUF. WAIT: JNB RI, WAIT ; Check RI until set CLR RI ; Clear the flag MOV A, SBUF ; Read character 微處理機原理與應用 Lecture Serial Port Operations Interrupt flags TI is set at the end of character transmission and indicates transmit buffer empty. If software wishes to send a character to the device connected to the serial port, it must wait until TI is set (means previous character was sent, wait until transmission is finished before sending the next character), then clear TI and send the character. WAIT: JNB TI, WAIT ; Check TI until set CLR TI ; Clear the flag MOV SBUF, A ; Send character 微處理機原理與應用 Lecture 15-78

40 15.6 Serial Port Operations Baud rates Baud rate is also affected by a bit in the PCON register. PCON.7 is SMOD bit. If SMOD = 1, baud rate will be doubled in modes 1, 2 and 3. Mode 2 baud rate is 1/64 of the oscillator frequency (SMOD = 0) and can be doubled to 1/32 of the oscillator frequency (SMOD = 1). PCON is not bit-addressable, setting SMOD without altering the other bits requires a readmodify-write operation as follows: MOV A, PCON ; Get current value of PCON SETB ACC.7 ; Set SMOD MOV PCON, A 微處理機原理與應用 Lecture ; Write value back to PCON 15.6 Serial Port Operations Baud rates Usually the timer is used in auto-reload mode and TH1 is loaded with a proper reload value. Formula for the baud rate in modes 1 and 3 is Baud Rate = Timer 1 Overflow Rate / 32 e.g., For 1200 baud 1200 = Timer 1 Overflow Rate / 32 Timer 1 Overflow Rate = Hz Timer must overflow at a rate of 38.4 khz and the timer is clocked at a rate of 1000 khz (1 MHz), overflow required every 1000/38.4 = clocks, so MOV TH1, # -26 Due to rounding, there is a slight error in the resulting baud rate. Up to 5% is tolerable using asynchronous communications. Exact baud rates are possible using an MHz crystal 微處理機原理與應用 Lecture 15-80

41 15.6 Serial Port Operations Baud rates To initialize the serial port to operate as an 8-bit UART at 2400 baud. ORG 0000H MOV SCON,#52H ;serial port mode 1 MOV TMOD,#20H ;timer 1, mode 2 MOV TH1, #-13 ;reload count for 2400 baud SETB TR1 ;start timer 1 END 微處理機原理與應用 Lecture Interrupts An interrupt is the occurrence of an event that causes a temporary suspension of a program while the condition is serviced by another program. It is like a sub-routine. CPU cannot execute more than one instruction at a time; but it can temporarily suspend execution of one program, execute another, then return to the first program. Difference in interrupt and subroutine is that in an interrupt-driven system, the interruption occur asynchronously with the main program, and it is not known when the main program will be interrupted. Program that deals with the interrupt is called as ISR (Interrupt Service Routine) 微處理機原理與應用 Lecture 15-82

42 15.7 Interrupts 微處理機原理與應用 Lecture Interrupts Five interrupt sources in order of polling (priority) sequence are: External Interrupt 0 Timer 0 External Interrupt 1 Timer 1 Serial Port The polling sequence is fixed but each interrupt type can be programmed to one of two priority levels. If two interrupts of same priority occur simultaneously then polling sequence will determine which is serviced first. External interrupts can be programmed for edge or level sensitivity. Each interrupt type has a separate vector address. All interrupts are disabled after a system reset and enabled individually by software 微處理機原理與應用 Lecture 15-84

43 15.7 Interrupts When an interrupt occurs and is accepted by CPU, the following actions occur: Current instruction s complete execution PC is saved on the stack PC is loaded with the vector address of the ISR ISR executes and takes action in response to interrupt ISR finishes with a RETI instruction PC is loaded with its old value from the stack Execution of main program continues where it left off 微處理機原理與應用 Lecture Interrupts Interrupt enable register, IE (0A8H) EA : Global interrupt enable/ disable. ES : Serial port interrupt enable/ disable. ET1: Timer 1 interrupt enable/ disable. EX1 : External interrupt 1 enable/ disable. ET0: Timer 0 interrupt enable/ disable. EX0 : External interrupt 0 enable/ disable. e.g., Timer 1 interrupt can be enabled as follows: SETB EA ; Enable global interrupt bit SETB ET1 ; Enable Timer 1 interrupt Or MOV IE, # B 微處理機原理與應用 Lecture 15-86

44 15.7 Interrupts Interrupt priority register, IP (0B8H) PS : Priority for Serial port interrupt. PT1: Priority for Timer 1 interrupt. PX1 : Priority for External interrupt 1. PT0 : Priority for Timer 0 interrupt. PX0 : Priority for External interrupt 0. IP is cleared after a system reset to place all interrupts at the lower priority level by default 微處理機原理與應用 Lecture Interrupts Interrupt vectors When an interrupt is accepted, the value loaded into the PC is called the interrupt vector. It is the address of the start of the ISR for the interrupting source. When an interrupt is vectored, the flag that caused the interrupt is automatically cleared by hardware. Timer interrupts occur when the timer registers (TLx/THx) overflow and set the overflow flag (TFx) 微處理機原理與應用 Lecture 15-88

45 15.7 Interrupts Interrupt address 微處理機原理與應用 Lecture Interrupts External Interrupts External interrupt occurs as a result of a low-level or negative-edge on the INT0 or INT1 pin of Flags that generate these interrupts are bits IE0 and IE1 in TCON. These are automatically cleared when the CPU vectors to the interrupt. Low-level or negative-edge activated interrupts can be programmed through IT0 and IT1 bits in TCON, i.e., ITx = 0 means low-level and ITx = 1 means negative-edge triggered 微處理機原理與應用 Lecture 15-90

46 Applications EXAMPLE Assume that there are input switches connected to port 0 and output LEDs connected to port 1 of an Write a program that will flash the LEDs ON one second, OFF one second, the number of times indicated on the input switches. Solution: READ: MOV A, P0 ; Keep reading port 0 switches JZ READ ; into A until A 0 MOV R0, A ; Transfer A to register 0 ON: MOV P1, #0FFH ; Turn ON port 1 LEDs CALL DELAY ; Delay 1 second OFF: MOV P1, #00H ; Turn OFF port 1 LEDs CALL DELAY ; Delay 1 second DJNZ R0, ON ; Loop back number of times on switches STOP: JMP STOP ; Suspend operation 微處理機原理與應用 Lecture Applications ; Delay 1 second subroutine DELAY: MOV R7, #08H ; Outer loop counter MOV R5, #00H ; Inner loop counter LOOP2: MOV R6, #0F3H ; Middle loop counter LOOP1: DJNZ R5, LOOP1; LOOP1 delays for DJNZ R6, LOOP1; one-eighth second DJNZ R7, LOOP2; LOOP2 executes LOOP1 eight times RET ; Return 微處理機原理與應用 Lecture 15-92

47 Applications EXAMPLE Write a program that will decode the hexadecimal keyboard shown in the following figure 微處理機原理與應用 Lecture Applications Solution: KEYSCAN: CALL ROWRD ; Determine row of key pressed CALL COLRD ; Determine column of key pressed CALL CONVRT ; Convert row/column to key value STOP: JMP STOP ; Suspend operation ROWRD: MOV P0, #0FH ; Output 0s to all columns MOV R0, #00H ; Row = 0 JNB P0.0, RET1 ; Return if row 0 is LOW MOV R0, #01H ; Row = 1 JNB P0.1, RET1 ; Return if row 1 is LOW MOV R0, #02H ; Row = 2 JNB P0.2, RET1 ; Return if row 2 is LOW MOV R0, #03H ; Row = 3 JNB P0.3, RET1 ; Return if row 3 is LOW JMP ROWRD ; Else keep reading RET1: RET ; Return 國立台灣大學生物機電系 微處理機原理與應用 Lecture 林達德

48 Applications COLRD: MOV P0, #0F0H ; Output 0s to all rows MOV R1, #00H ; Column = 0 JNB P0.4, RET2 ; Return if column 0 is LOW MOV R1, #01H ; Column = 1 JNB P0.5, RET2 ; Return if column 1 is LOW MOV R1, #02H ; Column = 2 JNB P0.6, RET2 ; Return if column 2 is LOW MOV R1, #03H ; Column = 3 JNB P0.7, RET2 ; Return if column 3 is LOW JMP COLRD ; Else keep reading RET2: RET ; Return CONVRT: MOV B, #04H ; B = Multiplication factor MOV A, R0 ; Move row number to A MUL AB ; A = row X 4 ADD A, R1 ; A = row X 4 + column RET ; A now contains value the key 微處理機原理與應用 Lecture Applications EXAMPLE The following figure shows how an ADC0801 is interfaced to an Write a program that takes care of the handshaking requirements for SC and EOC to complete an AD conversion 微處理機原理與應用 Lecture 15-96

49 Applications Solution: FLOAT: MOV, P1, #0FFH ; Write 1s to port 1 MOV, P0, #0FFH ; Write 1s to port 0 SC: CLR P0.6 ; Output LOW-then-HIGH SETB P0.6 ; on SC WAIT: JB P0.7, WAIT ; Wait here until EOC goes LOW DONE: MOV R0, P1 ; Transfer ADC result to register 微處理機原理與應用 Lecture Applications Digital altimeter 微處理機原理與應用 Lecture 15-98