32 1 Vol. 32, No. 1 2014 2 PROGRESS IN ASTRONOMY Feb., 2014 doi: 10.3969/j.issn.1000-8349.2014.01.07 VLBI 1,2 1,2 (1. 200030 2. 200030) VLBI (Digital Baseband Convertor DBBC) CDAS (Chinese VLBI Data Acquisition System) m P228 A 1 (VLBI Very Long Baseline Interferometry) VLBI 10 3 km [1,2] VLBI 1 VLBI CDAS 2010 4 2013-05-05 2013-12-05 (11103066) zhurj@shao.ac.cn
1 VLBI 119 1 VLBI 2 32 MHz 2 Gbps X J1836-194 VLBI [3] CDAS IVS [4,5] CDAS 4 16 32 MHz, 16 MHz, 8 MHz, 4 MHz, 2 MHz [6] CDAS VLBI CDAS 2 CDAS CDAS 5 20 FPGA 2 CDAS a b c d 4 ADC (Analog- Digital Convertor) ADC 4 FPGA (Field Programmable Gate Array) e 32 VSI (VLBI Standard Interface) VSI e 4 FPGA FPGA VSI
120 32 2 CDAS FPGA VSI 3 (1) ( ) FPGA CDAS FPGA FPGA 2 ( ) PCB (Printed Circuit Board) FPGA
1 VLBI 121 256 MHz FPGA 2 FPGA 1 FPGA 3.9065 ns (2) 2 FPGA 4 16 16 16 VSI 16 64 MHz 32 MHz 15.625 ns 16 MHz 8 MHz 4 MHz 2 MHz 31.25 ns 62.5 ns 125 ns 250 ns (3) FPGA 256 MHz 16 DDR (Double Data Rate) FPGA FPGA 1 2 3.906 25 ns 3 CDAS 20 16
122 32 (1) 3 2 3 FPGA (2) m FIFO (First In First Out) FIFO 64 MHz 2 FIFO 1) FPGA FIFO 256 MHz m x 3 + 1 15 1 0001 FIFO FIFO FIFO 4 FIFO
1 VLBI 123 2) m 1 m FPGA Q 3 Q 2 Q 1 Q 0 1 0 0 0 1 2 0 0 1 1 3 0 1 1 1 3) 4 1 1 1 1 5 1 1 1 0 15 6 1 1 0 1 15 7 1 0 1 0 8 0 1 0 1 FPGA FIFO 9 1 0 1 1 10 0 1 1 0 11 1 1 0 0 12 1 0 0 1 13 0 0 1 0 14 0 1 0 0 4 FPGA 15 1 0 0 0 (m ) FPGA 4 4) 4 FPGA ADC DSP (Digital Signal Processor) 5 FPGA ( 00000001) FPGA FPGA
124 32 5 FPGA 4 FPGA ( ) DSP ( ) 4 2 4 CDAS /MHz /MHz CH1 1008 976 32 1 CH2 976 944 32 CH3 944 912 32 CH4 912 880 32 CH5 1008 976 32 2 CH6 976 944 32 CH7 944 912 32 CH8 912 880 32 CH9 1008 976 32 3 CH10 976 944 32 CH11 944 912 32 CH12 912 880 32 CH13 1008 976 32 4 CH14 976 944 32 CH15 944 912 32 CH16 912 880 32 4 4 32 MHz 4 1008 MHz 976 MHz 944 MHz 912 MHz 2 4 CH13 CH16 12 CH1 CH4 1 CH5 CH8 2 CH9 CH12 3 4 12 12
1 VLBI 125 6 4 7 1 2 3 4 0.20 ns 0.13 ns 0.24 ns 256 MHz 3.9 ns 0.05 0.06 ns ( 2 ) 6 7
126 32 5 m, 1 ns ADC ADC [1] Ulvestad J, Goss M. Sky & Telescope, 1999, 98: 36 [2] Koyama Y, Kondo T, Petrachenko W. International VLBI Service For Geodesy and Astrometry-2004 General Meeting Processdings, 2004, 80: 94 [3] Jun Yang, Yonghua Xu, Zhixuan Li, et al. MNRAS, 2012, 426: L66 [4] http://lupus.gsfc.nasa.gov/data10/sessions/2011/apsg28/apsg28-plotdata.txt, 2013 [5] http://lupus.gsfc.nasa.gov/data10/sessions/2011/apsg29/apsg29-plotdata.txt, 2013 [6],,., 2011, 29: 207 Adjustment for the Delay Alignment Among Channels of Chinese VLBI Data Acquisition System ZHU Ren-jie 1,2, WU Ya-jun 1,2 (1. Shanghai Astronomical Observatory Chinese Academy of Science, Shanghai 200030, China; 2. Key Laboratory of Radio Astronomy, Shanghai Astronomical Observatory Chinese Academy of Science Shanghai 200030, China) Abstract: The Chinese VLBI Data Acquisition System (CDAS) independently designed by Shanghai Astronomical Observatory is a digitalized base band convertor for VLBI, which can take the place of traditional analogy base band convertor. It can extract up to 16 channels baseband from 512 MHz bandwidth. The bandwidth of each channel can be selected to be 2, 4, 8, 16 and 32 MHz. The character of the group delay between each channel is important. If the group delay can keep aligning, it will simplify the post data processing. However, due to structure of CDAS there are several horizontal and longitudinal data streams, which have their own
1 VLBI 127 clock regions, it is difficult to keep the group delay aligning among different channels. This paper described the reason why the group delay causes and also the solution how to get alignment of the group delay by adjusting the clock taps of the data inside each FPGA chip. Comparison has been made to show that after adjustment, the difference of group delay among channels in the same IF had been significantly reduced. Key words: data processing board; data synthesizing board; reset signal; clock region; group delay; phase.......................................................................................... ApJ. MNRAS. A&A ( ) Latex (http://202.127.29.4/twxjz/index.htm) E-mail twxjz@shao.ac.cn 2014 2