je50-sb_0401(is88731)

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1 iscrete/um /Muxless chematics ocument M LINO PU F M GPU Manhattan(Park/Madison M) and Vancouver(eymour/Whistler M) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. over Page ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

2 R R Line Out JE0- lock iagram 0/ MHz INT.PKR,, O T T H T U.0 (0 parts or port if U.0 do not used) INT RT M Liano PU ( F socket W ) -Pin ufpg GPP X port P X Port GPP X port U. ( parts) T ( parts) INT LK GEN HW MONITOR PI.,,9,0,, Mini U lue Tooth U X PI EXPRE GRPHI(Muxless Lan ~Lan) X PI EXPRE GRPHI(iserete only Lan0 ~Lan) P(PI EXPRE Lan0~Lan) HMI 0/ MHz,,,,,, P EP UMI-Link Panel 9 X L TRVI 9 P 9 INT MI FH RT 0 odec HUON-M 9 ZLI LX Integrated isplay 9 LN PIE x MI In U.0 (parts) Giga LN M P0 U.0 x.0 amera 9 LP U PIE x,u x PIE x,u x U.0 x,u x K ENE K9 Touch Pad 9 INT. K 9 Mini ard WLN IO MXI MXL0 0 (iserete only) LP EUG ONN. JE0- Project code:9.m0.00 TXFM 9 RJ 9 M/M Pro/x /MM/ in Madison/Park Whistler/eymour TI Mini-ard IM WWN U.0 PORT,,,, R VRM M/G/G,9,90,9.Park/eymour (Mxb*)=>M.Park/eymour(MXb *) =>G.Madison/Whistler(Mxb*)=>G.Madison/Whistler(Mxb*)=>G TOP V GN OTTOM P TKUP YTEM / RT9 INPUT TOUT YTEM / RT0 V_ V_ RT90 9 V_ RT90 V_0 RT0 9 V_ OUTPUT V_(.) V_() V_() RT0 V_ 0_0(.) YTEM / RT INPUT HRGER Q INPUT TOUT PU / IL INPUT TOUT V_(.) V_VG_0 V_0 (00m) VG_ORE OUTPUT HG_PWR V.0 UP+V V 00m VN 0~.V OUTPUT RT V_ V_ V_0(.) V_VG_0 0, OUTPUT V_ORE_0 0~.V Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. lock iagram ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

3 trapping REQUIRE YTEM TRP UE this pin to determine INT/EXT LK E_PWM PH GPO99 PI_LK RT_LK LK_PI_LP PI_LK LP_LK0 LP_LK PULL HIGH LP ROM EFULT llow PIE GEN EFULT _PLU Mode ILE EFULT UE EUG TRP non_fusion LOK mode ENLE E LKGEN ENLE (Use Internal) EFULT PULL LOW PI ROM Force PIE GEN _PLU Mode ENLE IGNORE EUG TRP EFULT Fusion LOK mode EFULT ILE E EFULT LKGEN ILE (Use External) U Table PIE Routing Pair U evice U.0 EXT(For W ebug) WLN N WWN T G IM ard N N ard Reader U.0 port U.0 EXT U.0 EXT N LNE0 LNE LNE LNE LNE0 LNE LNE LNE PU LN WWN LN FH Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Table of ontent ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

4 PUF OF LN WWN WLN UMI_FH_PU_RX0P UMI_FH_PU_RX0N UMI_FH_PU_RXP UMI_FH_PU_RXN UMI_FH_PU_RXP UMI_FH_PU_RXN UMI_FH_PU_RXP UMI_FH_PU_RXN V_0 PIE_RXP0 PIE_RXN0 PIE_RXP PIE_RXN PIE_RXP PIE_RXN PEG_RXP0 PEG_RXN0 PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP9 PEG_RXN9 PEG_RXP0 PEG_RXN0 PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN P_ZVP R0 9RF-GP PI EXPRE P_GFX_RXP0 9 P_GFX_RXN0 Y P_GFX_RXP Y P_GFX_RXN W P_GFX_RXP W P_GFX_RXN W P_GFX_RXP W9 P_GFX_RXN V P_GFX_RXP V P_GFX_RXN U P_GFX_RXP U P_GFX_RXN U P_GFX_RXP U9 P_GFX_RXN T P_GFX_RXP T P_GFX_RXN R P_GFX_RXP R P_GFX_RXN R P_GFX_RXP9 R9 P_GFX_RXN9 P P_GFX_RXP0 P P_GFX_RXN0 N P_GFX_RXP N P_GFX_RXN N P_GFX_RXP N9 P_GFX_RXN M P_GFX_RXP M P_GFX_RXN L P_GFX_RXP L P_GFX_RXN L P_GFX_RXP L9 P_GFX_RXN P_GPP_RXP0 P_GPP_RXN0 P_GPP_RXP 9 P_GPP_RXN P_GPP_RXP P_GPP_RXN P_GPP_RXP P_GPP_RXN F P_UMI_RXP0 F P_UMI_RXN0 E P_UMI_RXP E P_UMI_RXN E9 P_UMI_RXP E P_UMI_RXN P_UMI_RXP P_UMI_RXN INE UMI-LINK GPP GRPHI P_GFX_TXP0 P_GFX_TXN0 P_GFX_TXP P_GFX_TXN P_GFX_TXP P_GFX_TXN P_GFX_TXP P_GFX_TXN P_GFX_TXP P_GFX_TXN P_GFX_TXP P_GFX_TXN P_GFX_TXP P_GFX_TXN P_GFX_TXP P_GFX_TXN P_GFX_TXP P_GFX_TXN P_GFX_TXP9 P_GFX_TXN9 P_GFX_TXP0 P_GFX_TXN0 P_GFX_TXP P_GFX_TXN P_GFX_TXP P_GFX_TXN P_GFX_TXP P_GFX_TXN P_GFX_TXP P_GFX_TXN P_GFX_TXP P_GFX_TXN P_GPP_TXP0 P_GPP_TXN0 P_GPP_TXP P_GPP_TXN P_GPP_TXP P_GPP_TXN P_GPP_TXP P_GPP_TXN P_UMI_TXP0 P_UMI_TXN0 P_UMI_TXP P_UMI_TXN P_UMI_TXP P_UMI_TXN P_UMI_TXP P_UMI_TXN K P_ZVP P_Z INE.00. GTXP0 I 0 UVKX-GP GTXN0 I 0 UVKX-GP Y GTXP I 0 UVKX-GP Y GTXN I 0 UVKX-GP Y GTXP I 0 UVKX-GP Y GTXN I 0 UVKX-GP W GTXP I 0 UVKX-GP W GTXN I 0 UVKX-GP V GTXP I 09 UVKX-GP V GTXN I 0 UVKX-GP V V GTXP GTXN I I UVKX-GP UVKX-GP U GTXP I UVKX-GP U GTXN I UVKX-GP T GTXP I UVKX-GP T GTXN I UVKX-GP T GTXP I_PX UVKX-GP T GTXN I_PX UVKX-GP R GTXP9 I_PX 9 UVKX-GP R GTXN9 I_PX 0 UVKX-GP P GTXP0 I_PX UVKX-GP P GTXN0 I_PX UVKX-GP P GTXP I_PX UVKX-GP P GTXN I_PX UVKX-GP N GTXP I_PX UVKX-GP N GTXN I_PX UVKX-GP M GTXP I_PX UVKX-GP M GTXN I_PX UVKX-GP M GTXP I_PX 9 UVKX-GP M GTXN I_PX 0 UVKX-GP L GTXP I_PX UVKX-GP L GTXN I_PX UVKX-GP K PIE_TXP0_ PIE_TXN0_ PIE_TXP_ PIE_TXN_ PIE_TXP_ PIE_TXN_ F UMI_TX0P_ F UMI_TX0N_ F UMI_TXP_ F UMI_TXN_ E UMI_TXP_ E UMI_TXN_ UMI_TXP_ UMI_TXN_ P_Z R0 9RF-GP UVKX-GP UVKX-GP G UVKX-GP G UVKX-GP 0 UVKX-GP UVKX-GP UVKX-GP UVKX-GP UVKX-GP 9 UVKX-GP 0 UVKX-GP UVKX-GP UVKX-GP PEG_TXP0 PEG_TXN0 PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP9 PEG_TXN9 PEG_TXP0 PEG_TXN0 PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PIE_TXP0 PIE_TXN0 PIE_TXP PIE_TXN PIE_TXP PIE_TXN UMI_PU_FH_TX0P UMI_PU_FH_TX0N UMI_PU_FH_TXP UMI_PU_FH_TXN UMI_PU_FH_TXP UMI_PU_FH_TXN UMI_PU_FH_TXP UMI_PU_FH_TXN GTXP0 GTXN0 GTXP GTXN GTXP GTXN GTXP GTXN LN WWN WLN UM_PX UVKX-GP UM_PX UVKX-GP UM_PX UVKX-GP UM_PX UVKX-GP UM_PX UVKX-GP UM_PX UVKX-GP UM_PX 9 UVKX-GP UM_PX 0 UVKX-GP 0 - PEG_TXP[0..] PEG_TXN[0..] PU_HMI_T PU_HMI_T# PU_HMI_T PU_HMI_T# PU_HMI_T0 PU_HMI_T0# PU_HMI_LK PU_HMI_LK# PEG_TXP[0..] PEG_TXN[0..] PEG_RXP[0..] PEG_RXN[0..] PEG_RXP[0..] PEG_RXN[0..] Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PU_PIE(/) ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

5 M 0 M M M M M M M M M 9 M 0 M M M M M M 0 M M M M0 M M M M M M M M M M M M M M M Q0 M Q#0 M Q M Q# M Q M Q# M Q M Q# M Q M Q# M Q M Q# M Q M Q# M Q M Q# M IM0_LK_R0 M IM0_LK_R#0 M IM0_LK_R M IM0_LK_R# M IM0_KE0 M IM0_KE M IM0_OT0 M IM0_OT M IM0_#0 M IM0_# M R# M # M WE# V_ M RT# M EVENT# M_VREF_Q_PU M_ZVIO R0 9RF-GP PU MEMORY HNNEL U0 M_0 R0 M_ R M_ P M_ P M_ N M_ N M_ N0 M_ N M_ M M_9 U M_0 M M_ L M_ M_ L M_ L0 M_ U M_NK0 U M_NK L M_NK E M_M0 J M_M E M_M F M_M M_M M_M 9 M_M M_M G M_Q_H0 H M_Q_L0 G M_Q_H H M_Q_L J M_Q_H H M_Q_L E M_Q_H E M_Q_L E M_Q_H M_Q_L M_Q_H M_Q_L M_Q_H M_Q_L M_Q_H M_Q_L T M_LK_H0 T M_LK_L0 R M_LK_H R M_LK_L H M_KE0 H M_KE Y M_OT0 M_OT V M_#0 M_# V M_R# W M_# W M_WE# H M_REET# T M_EVENT# W0 M_VREF W M_ZVIO INE OF M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T9 M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T9 M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T9 M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T9 M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T9 M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T9 M_T0 M_T M_T M_T E J H J H F F E H F E9 J9 G H H9 F9 H0 F J H G0 E0 G H G E G G F H E F E Y Y Y9 Y Y Y M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M 0 M M M M M M M M M 9 M 0 M M M M M M 0 M M M M0 M M M M M M M M M M M M M M M Q0 M Q#0 M Q M Q# M Q M Q# M Q M Q# M Q M Q# M Q M Q# M Q M Q# M Q M Q# M IM0_LK_R0 M IM0_LK_R#0 M IM0_LK_R M IM0_LK_R# M IM0_KE0 M IM0_KE M IM0_OT0 M IM0_OT M IM0_#0 M IM0_# M R# M # M WE# M RT# M EVENT# PU MEMORY HNNEL T M_0 P M_ P M_ N M_ N M_ M M_ M M_ M M_ M M_ L M_9 U M_0 L M_ K M_ W M_ K M_ K M_ U M_NK0 T M_NK K M_NK M_M0 M_M M_M M_M F M_M G M_M H M_M M_M M_Q_H0 M_Q_L0 E M_Q_H M_Q_L E M_Q_H M_Q_L M_Q_H M_Q_L G M_Q_H G M_Q_L G M_Q_H F M_Q_L G M_Q_H G M_Q_L H M_Q_H G M_Q_L R M_LK_H0 R M_LK_L0 P M_LK_H P M_LK_L J M_KE0 J M_KE W M_OT0 Y M_OT V M_#0 Y M_# V M_R# V M_# V M_WE# J M_REET# T M_EVENT# INE OF M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T9 M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T9 M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T9 M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T9 M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T9 M_T0 M_T M_T M_T M_T M_T M_T M_T M_T M_T9 M_T0 M_T M_T M_T E 0 0 E E E G H F G G F H E E H E0 H0 0 F9 E E H G0 G9 F G G G F E F M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q PU_VREF_Q INE.00. INE.00. R_VREF_ R00R00-P 0 U0VKX-GP M_VREF_Q_PU LYOUT: place them close to PU V_ 0 RN0 KP0VKX-GP 090- RNKJ--GP M EVENT# M EVENT# Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PU_R(/) ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

6 V V oot Voltage (V/GN) 0 0 PU_LERT# V_0 V_ V_0 V_ V_0 V_ V_ V_ V_ Power L0 N =.090.P RN0 RN0 R KRJ--GP 090- V_ PU_LERT#_Q R 00RJ--GP R 00RJ--GP R 00RJ--GP RN RNKJ--GP RNKJ--GP RNKJ-GP RN0 R 00RJ--GP R 00RJ--GP RNKJ-GP V_ PU_I PU_I PU_THERMTRIP#_VIO PU_LERT# PU_TRT# PU_TI PU_TM PU_TK PU_REQ# H_PUPWRG_E H_PUPWRG_E PU_V_R PU_V_R PU_PROHOT# PU_RT# PU_RT# oot Voltage (open) PH_TEMP_LERT# 9, MHz 00MHz 9 9 PU_PROHOT# LV_L0P_TRVI LV_L0N_TRVI EP VG output from FH PU_LKP PU_LKN IP_LKP IP_LKN PU_THERMTRIP#_VIO PU_VN_RUN_F_L PU_VN_RUN_F_H V_0 PU_PROHOT#_ PU_V_RUN_F_L PU_V_RUN_F_H V_ PU_THERMTRIP#_VIO_Q PU_P_TXP0_PU PU_P_TXN0_PU P_TX0P_R P_TX0N_R P_TXP_R P_TXN_R P_TXP_R P_TXN_R P_TXP_R P_TXN_R V_0 V_ PU_TI PU_TO PU_TK PU_TM PU_TRT# PU_R PU_REQ# PU_PROHOT#_VIO H_THERMTRIP#,, PU_TI PU_TO PU_TK PU_TM PU_TRT# PU_R PU_REQ# PU_RUN_F_L PU_VP_F_H PU_VIO_U_F_H PU_VR_F_H PU_I P_TX0P P_TX0N P_TXP P_TXN P_TXP P_TXN P_TXP P_TXN PU_V_R PU_V_R RN0 PU_I LK PU_I T PU_RT_L_UF R 0RJ--GP RN0J--GP PU_RT#_R PU_RT# R9 0R00-P PU_PWRG_R,,,9 H_PUPWRG_E R0 0 change to short pad 0R00-P PU_PROHOT# R 0R00-P 0 - PU_THERMTRIP#_VIO PU_LERT# H_PROHOT# R 0 - KRJ--GP Q0 PM90--GP R 0KRJ--GP.090.L0 N =.090.P.090.L0 N =.090.P Q PM90--GP R 0RJ--GP R0 0KRJ--GP Q0 UM_PX 0 UVKX-GP UM_PX 0 UVKX-GP 0 - R 0KRJ--GP 09- PM90--GP PU exceeds to TRVI LV Panel UM_PX UVKX-GP UM_PX 9 UVKX-GP UM_PX 0 UVKX-GP UM_PX UVKX-GP UM_PX UVKX-GP UM_PX UVKX-GP UM_PX UVKX-GP UM_PX UVKX-GP R9 0KRJ--GP R 0KRJ--GP R 0R00-P R9 0R00-P TP0 TP TP H_PUPWRG_E V_ F F E E K K J J H H G G H H H H H G F0 E0 0 G H E K L0 N =.090.P PU P0_TXP0 P0_TXN0 P0_TXP P0_TXN P0_TXP P0_TXN P0_TXP P0_TXN P_TXP0 P_TXN0 P_TXP P_TXN P_TXP P0_HP P_TXN P_HP P_HP P_TXP P_HP P_TXN P_HP P_HP LKIN_H LKIN_L P_LON P_IGON IP_LKIN_H P_VRY_L IP_LKIN_L P_UX_Z V V TET TET9 I TET0 I TET TET REET# TET PWROK TET TET PROHOT# TET THERMTRIP# TET9 LERT# TET0 TET TI TET TO TET TK TET TM TET_H TRT# TET_L R TET_H REQ# TET_L TET0_H RV#E TET0_L RV#K TET RV# TET_H TET_L TET _ENE VP_ENE FR VN_ENE MTIVE# VIO_ENE V_ENE THERM VR_ENE THERM INE.00. V_0 H_PUPWRG_ NLOG/IPLY/MI V_0 R 0R00-P 0 - G IPLY PORT 0 IPLY PORT ENE RV JTG TRL ER. LK R 0KRJ--GP Q0 Q PM90--GP --GP INE IPLY PORT MI. TET R 0KRJ--GP V_ OF P0_UXP P0_UXN P_UXP P_UXN P_UXP P_UXN P_UXP P_UXN P_UXP P_UXN P_UXP P_UXN R0 0KRJ--GP E E J J H H G G F F E J H G F 0 G0 H0 H 9 E9 G9 H9 H G F E F0 G H0 H9 K K K 0 Y 0 E H_PUPWRG P_UXP P_UXN ML_LK 9,, P0_HP P_HP PU_LEN PU_IGON PU_LPWM P_UX_Z PU_TET9_NLOGIN PU_TET_NHIFTEN PU_TET_P0 PU_TET_P PU_TET_P PU_TET_P PU_TET_PLLTET PU_TET9_PLLTET0 PU_TET0_NLK PU_TET_NEN PU_TET_NHIFTEN PU_TET_NLK PU_TET_H_YPLK_H PU_TET_L_YPLK_L NTTIN_H NTTIN_L M_TET NTTOUT_H NTTOUT_L TET PU_LEN UM_PX_EP PU_P_UXP_PU PU_P_UXN_PU 0 0 R 0RF--GP PU_IGON UVKX-GP UM_PX_LV UVKX-GP UM_PX_LV UVKX-GP UM_PX UVKX-GP UM_PX P_HP TP TP0 TP TP PU_TET_PLLTET PU_TET9_PLLTET0 V_ PU_LEN_Q TP TP9 FR LLOW_TOP R 00KRJ--GP UM_PX_EP UM_PX_EP.090.L0 N =.090.P R 00KRJ--GP P0_HP PU_IGON_Q V_0 V_ UM_PX_EP.090.L0 N =.090.P TP0 TP R0 KRJ--GP Q09 PM90--GP UM_PX_EP R KRJ--GP V_0 R 00KRJ--GP V_0 Q0 PM90--GP UM_PX_EP R9 KRJ--GP UM_PX_EP PU_P_UXP_PU 9 ep PU_P_UXN_PU 9 LV_HP_TRVI 9 LV_HN_TRVI 9 P_UXP_R 9 P_UXN_R 9 PH_HMI_LK_R PH_HMI_T_R PU_I TET R KRJ--GP UM_PX_EP L_KLT_EN_R 9,0 V_ RT LV V_ PU_LPWM HMI [M HMI desing guidance] trap define PU :Enable HMI P:isable HMI LV_V_EN_R 9,0 0 - G --GP Q0 R 00RJ--GP R 00RJ--GP UM_PX R KRJ--GP LV_HN_TRVI LV_HP_TRVI 0 - PU_LPWM_Q V_ V_ 9,9 R KRJ--GP UM_PX Q0 PM90--GP.090.L0 N =.090.P P_HP0_ R 0KRJ--GP R 00KRJ--GP R 00KRJ--GP 9,9 V_0 ML_T 9,, P_HP0_ V_0 9 HP_ P_HP_R PU_P_UXP_PU PU_P_UXN_PU P_UXP P_UXN PU_TET_H_YPLK_H M_TET V_VG_0 PU_TET9_NLOGIN PU_TET_NHIFTEN PU_TET_NHIFTEN PU_TET9_PLLTET0 PU_TET_PLLTET PU_TET_NEN PU_TET0_NLK PU_TET_NLK PU_TET_L_YPLK_L LLOW_TOP PU_LPWM_TRVI 9, EP_HP_PWR R HP 0KRJ-L-GP UM_PX V_VG_0 L_KLT_TRL_R 9,0 R9 P_HP 0KRJ-L-GP.090.L0 N =.090.P V_ EP_HP EP_HP_ET V_0 V_ V_UX_ R FR 0KRJ--GP [M FE Frank]: this is electrical key do not allow power to turn on if this pin is still "L" F package is open pin in the furtur,fr will have this pin tied to if the wrong processor is plugged the socket This is more of a problem on desktop platforms V_ (changing PUs) UM_PX R KRJ--GP UM_PX R 0RJ--GP R 0RJ--GP UM_PX_EP R 00KRJ--GP UM_PX R9 RJ--GP I_EP R 00KRJ--GP R9 0RJ--GP R9 0RJ--GP R0 0 - RN0 P0_HP P_HP EP_HP_ET Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PU_ontrol&ebug(/) ize ocument Number Rev ustom JE0_ R 0RJ--GP 9RF-GP R9 0RJ--GP UM_PX RNKJ-GP RN0 Friday, pril 0, 0 ate: heet of 0 RNKJ--GP R 0RJ--GP.090.L0 N =.090.P UM_PX Q0 PM90--GP R 0KRJ--GP UM_PX RN09 RNKJ-GP R0 0RJ--GP RN0 RNKJ--GP R KRJ--GP R90 0RJ--GP R9 0RJ--GP UM_PX Q0 PM90--GP R0 0KRJ--GP

7 PU_V OF PU PU_V for V(W PU) V V T V V T0 for V(W PU) V V T E V V U F V V U 0 09 V F F G H V V U9 V V V: V V V V V V0 0UF X H V V V H V V W 0.UF X 0nF X 0pF ap for EMI requirment J V V W K V V W K V V W L V V W L V V W9 L9 V V Y M V V Y M V V Y0 M0 V V Y M V V Y N V V Y N V V Y N9 V V Y0 P V V P V V for VN(W PU) P0 V V P V V for VN(W PU) R V V R V V PU_VN R9 V V E T V PU_VN INE 0P0VJN-GP 0UVKX-GP U0VKX-GP 0UVKX-GP 0UVKX-GP 0UVKX-GP 0P0VJN-GP 0UVKX-GP 0UVKX-GP U0VKX-GP 0UVKX-GP 0UVKX-GP 0UVKX-GP 0UVKX-GP J9 VN VN K J0 VN VN K J VN VN K 0 9 J 0UVKX-GP VN VN K J VN VN K J VN VN K K9 VN VN K K0 VN VN L VN: 0UF X 0.UF X 0pF ap for EMI requirment for VIO(W PU). for VIO(W PU) V_ 0P0VJN-GP U0VKX-GP 0UVKX-GP U0VKX-GP 0UVKX-GP 0P0VJN-GP 0P0VJN-GP 0UVKX-GP V_ VIO: 0UF X 0.UF X.uFUF X 0pF ap for EMI requirment. for VP(W/W) UVKX-GP U0VKX-GP 0UVKX-GP U0VKX-GP U0VKX-GP 0P0VJN-GP U0VKX-GP V_0 VIO R VIO R VIO R VIO T0 VIO T VIO T VIO U VIO U VIO U VIO V0 VIO V VIO V VIO W VIO W VIO W VIO Y VIO Y VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO VIO G H J K0 K K L L L M0 M M N N N P0 P P 9 0 UVKX-GP U0VKX-GP 0P0VJN-GP UVKX-GP UVKX-GP U0VKX-GP 0UVKX-GP V_0 G VP_ VP_ G VP_ VP_ VP: G VP_ VP_ G VP_ VP_ 0 0UF X 0.uF X V_0 G VR VR 0pF ap for EMI requirment G VR VR V_0 G VR VR G9 VR VR for VR(W). for VR(W) 0. for V(W/W) V_0 0P0VJN-GP U0VKX-GP U0VKX-GP 0UVKX-GP 0UVKX-GP V V E F INE 00P0VKX-GP 9 0 V_ 0P0VJN-GP UVKX-GP U0VKX-GP UVKX-GP 0P0VJN-GP 0P0VJN-GP UVKX-GP 9 U0VKX-GP U0VKX-GP Wistron orporation VR:.UF X 0.uF X 0pF ap for EMI requirment F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ecoupling between processor and IMMs across VIO and plit 0P0VJN-GP 0P0VJN-GP U0VKX-GP U0VKX-GP 0 PU_Power(/) JE0_ ize ocument Number Rev ate: Friday, pril 0, 0 heet of 0

8 PUE OF E E0 E F9 F F F F F0 F F F F G G G G G G9 G G G J J J J0 J J K9 L L L0 M9 M M9 N N N0 N P9 P P9 R R R0 R T9 INE T T9 U U U0 U V9 V V9 W W W0 W W W W Y9 Y E E E E E E9 E E E E F F F9 F F F F F0 F F F F G0 H H H H H H9 H H H INE.00. Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PU_(/) ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

9 P_RT# R9 0RJ--GP UM_PX_LV V_0 V_0 P_VIO 0 om change y edwin P_VIO UM_PX_LV L90 GK00T-0Y-GP nd =.00. UVKX-GP UVKX-GP UM_PX_LV P_VIOX UM_PX_LV L90 GK00T-0Y-GP nd =.00. UVKX-GP UVKX-GP UM_PX_LV R90 0KRJ--GP UM_PX_LV P_W_OUT P_V P_VRX UM_PX_LV UM_PX_LV L90 L90 GK00T-0Y-GP IN-UH-9-GP.R nd =.R.0E nd = UM_PX_LV UVKX-GP UVKX-GP UM_PX_LV P_RT# 9 UVMX-GP 9 0UVKX-GP LV_HN_TRVI LV_HP_TRVI LV_L0P_TRVI LV_L0N_TRVI,9 P_VIOX, P_HP0_ P_P# PU_LPWM_TRVI R909 0KRJ--GP P_RT# P_P# P_VRX 9 U0VKX-GP UM_PX_LV P_I_FG P_VIO PWMI: 0~00KHz, 0~00% duty cycle UM_PX_LV UM_PX_LV R9 PU_LPWM_TRVI_R 0RJ--GP 9 0 P_W_OUT U90 UXN UXP GN RX0P RX0N VRX RT# P# HP I_FG VIOX VIOX P_V GN 9 N# N# T0N T0P T0N T0P VIO T0N T0P 0 TK0N 9 TK0P PWMI W_OUT GNX V TETMOE GPIO0 RLV_FG RLV_ /M L/ML REXT RLV_MP GN 9 0 P_VIO T0N T0P N# N#.0.0 VIO N# UM_PX_LV ENPV/I_R 0 PWMO 9 ENLT V L PQFNGTR-0-GP P_RLV_MP P_REXT L/ML /M P_RLV_ P_RLV_FG P_RLV_LNK 99 U0VKX-GP UM_PX_LV LV_V_EN_R L_KLT_TRL_R L_KLT_EN_R P_VIO LV_T0# 9,9 LV_T0 9,9 LV_T# 9,9 LV_T 9,9 LV_T# 9,9 LV_T 9,9 LV_LK# 9,9 LV_LK 9,9 UM_PX_LV 9 U0VKX-GP 0RJ--GP 0RJ--GP 0RJ--GP 0 - LV_V_EN_R,0 L_KLT_TRL_R,0 L_KLT_EN_R,0 0 - R99 R90 R9 LV T_R 9 LV LK_R 9 PH.K V_0_TRVI on page:9 ingle Link LV ingle Link LV LV_V_EN 0,,9,9 L_KLT_TRL 0,9,9 L_KLT_EN 0,,9,9 R90: LV output swing control.99k for default swing, change the value for swing adjust UM_PX_LV R90 K99RF-L-GP R90 K99RF-L-GP UM_PX_LV TP90 9 U0VKX-GP P_V 9 0UVKX-GP UM_PX_LV 9 UVKX-GP 9 0UVKX-GP UM_PX_LV UM_PX_LV 90 U0VKX-GP V_0 0 UM_PX_LV R9 P_I_FG KRJ--GP UM_PX_LV R90 P_VIO KRJ--GP default setting RN90 RNKJ--GP UM_PX_LV Q90 L/ML ML_LK,, UM_PX_LV I_FG: Initial code loading selection, internal pull-down ~0K L: Hardware self configuration M: No initial code loading, external I control is expected H: Load initial code from external EEPROM through ML/M L: Hardware self configuration /M N00KW-GP.N0.F nd =.M0.0F ML_T,, R9 P_RLV_ KRJ--GP R9 UM_PX_LV P_VIO KRJ--GP 0 om change y EMI RLV_: LV selection, internal pull-down ~0K L: off M: +/- 0.% central spreading H: +/- % central spreading L: off R9 P_RLV_FG KRJ--GP UM_PX_LV R9 P_VIO KRJ--GP RLV_FG: LV color depth and data mapping selection, internal pull-down ~0K L: -bit LV, VE mapping M: -bit LV, JEI mapping H: -bit LV, both VE and JEI mapping H: -bit LV, both VE and JEI mapping Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. TRVI ize ocument Number Rev JE0_ Friday, pril 0, 0 ate: heet of 9 0

10 00 HH-0--GP K UM_PX U00 V_0,9 LV_V_EN_R,,,9 _RT# 00 HH-0--GP K UM_PX R0 0KRF-GP UM_PX LV_V_EN_ 00 U0VKX-GP UM_PX N# V GN Y NVPX-GP.V.00H UM_PX LV_V_EN_Y R09 0RJ--GP UM_PX LV_V_EN 9,,9,9 00 HH-0--GP K L_KLT_EN_ UM_PX U00 N# GN V Y V_0 R0 0KRJ--GP UM_PX V_0,9 L_KLT_EN_R R0 00KRF-L-GP UM_PX 009 U0VKX-GP UM_PX NVPX-GP.V.00H UM_PX G Q00 N00K--GP.N0.J N =.N0.0 UM_PX LV_EQ_TRL_R R0 0R00-P LV_EQ_TRL R0 0R00-P LV_TRL_OE,9 L_KLT_TRL_R,9 L_KLT_EN_R R00 0-0RJ--GP KLT_TRL_ UM_PX 0 U0VKX-GP UM_PX R0 0RJ--GP LV_TRL_ UM_PX R00 0RJ--GP V_EN_U UM_PX 00 HH-0--GP K L_TRL_ UM_PX R00 00KRJ--GP UM_PX L_TRL_Q V_0 U00 UM_PX V GN Y NZ0MX-NL-GP.Z0.G V_0 U00 V 00 UM_PX HH-0--GP L_TRL_R L_TRL_U GN Y K 00 U0VKX-GP UM_PX NZ0MX-NL-GP.Z0.G UM_PX R00 00KRJ--GP UM_PX 00 U0VKX-GP UM_PX U00 OE V GN UM_PX Y HGGW-GP.G.0H L_TRL_OE U00 OE V GN UM_PX Y HGGW-GP.G.0H V_0 V_0 L_KLT_TRL_Y R0 0RJ--GP UM_PX L_KLT_TRL 9,9,9 R009 0RJ--GP UM_PX L_KLT_EN 9,,9,9 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet 0 of 0

11 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

12 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

13 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

14 0V_0 0UVKX-GP KP0VKX-GP R_VREF_ 9 UVKX-GP M RT# 09-0V_0 0 UVKX-GP can't stuff load too large let system abnormol at boot UVKX-GP Place these caps close to VTT and VTT. UVKX-GP U0VKX-GP KP0VKX-GP UVKX-GP Intel HR channel & RT tied toghter M have to separate channel & M 0 9 NP 0 NP M 9 NP NP M 9 M 9 0 R# M R# M 9 WE# M WE# M 9 # M # M 90 M 0# M IM0_#0 M 9 # M IM0_# M 9 9 M 0 0 0/P KE0 M IM0_KE0 M KE M IM0_KE M M 9 0 K0 M IM0_LK_R0 M 0 0 K0# M IM0_LK_R#0 M M 9 0 / K M IM0_LK_R 0 K# M IM0_LK_R# M M 0 M0 M M0 M M M M Q0 Q0 M M M M Q Q M M M M Q Q M M M M Q Q M M M M Q 0 Q M M M Intel HR M tied to GN M Q Q M M M M still following previous design M Q Q M Q Q 00 PH_MT,, M Q 0 Q L PH_MLK,, M Q9 Q9 V_0 M Q0 9 Q0 EVENT# M EVENT# M Q Q M Q Q VP 99 0_IM0 M Q Q 0_IM0 M Q 9 Q 0 _IM0 _IM0 M Q 0 F0 0 0 Q M Q 9 U0VKX-GP Q M Q Q N# M Q Q N# V_ M Q9 R0 R0 Q9 N#/TET M Q0 0 Q0 0 change to short pad 0R00-P 0R00-P M Q Q V M Q 0 Q V M Q Q V M Q Q V M Q 9 Q V M Q Q V M Q 9 9 Q V M Q 9 Q V M Q9 99 Q9 V9 M Q0 00 Q0 V0 M Q 0 0 Q V M Q 9 0 Q V M Q Q V M Q Q V M Q Q V M Q 0 Q V M Q 0 - Q V M Q 0 Q V M Q9 F0 Q9 M Q0 Q0 M Q 9 Q PH_MT M Q R0 0RJ--GP Q PH_MLK M_T M Q 9 Q 9 R0 0RJ--GP M_LK M Q Q M Q Q PH_MT M Q Q 9 0P0VJN-GP PH_MLK M Q 0 Q 0 0P0VJN-GP M Q Q M Q9 Q9 M Q0 Q0 M Q Q M Q Q M Q Q M Q Q M Q Q M Q Q M Q Q 9 M Q 9 Q M Q9 9 Q9 M Q0 0 Q0 0 M Q Q M Q 9 F0 Q M Q 9 Q M Q#0 0 Q0# M Q# Q# M Q# Q# M Q# Q# V_ M Q# Q# M Q# Q# OIMM EOUPLING M Q# 9 Q# 9 M Q# Q# M Q0 Q0 0 F0 0 0 M Q 9 Q M Q Q M Q Q M Q Q M Q Q M Q Q M Q Q M IM0_OT0 OT0 M IM0_OT 0 OT 9 R_VREF_ VREF_ Layout Note: VREF_Q Place these aps near U0VKX-GP 9 M RT# 0 O-IMM. REET# V_0 0 VTT 0 0 VTT 0 U0VKX-GP U0VKX-GP H =mm M TNR TYPE R-0P--GP.00. nd =.00.P9 rd =.00. U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP 0UVKX-GP U0VKX-GP U0VKX-GP 0UVKX-GP 0U0VZY-GP 0UVKX-GP 0UVKX-GP 0U0VZY-GP 0UVKX-GP 0 0UVKX-GP Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. R-OIMM ize ocument Number Rev JE0_ Friday, pril 0, 0 ate: heet of 0

15 M M RT# U0VKX-GP R_VREF_ 0V_0 UVKX-GP U0VKX-GP Place these caps close to VTT and VTT. 0 -abine avid M M 0 M can't stuff load too large let system abnormol at boot UVKX-GP 9 0 UVKX-GP UVKX-GP U0VKX-GP UVKX-GP M IM0_OT0 M IM0_OT F0 M RT# Intel HR channel & RT tied toghter M have to separate channel & U0VKX-GP F0 U0VKX-GP M 0 M M M M M M M M M 9 M 0 M M M M M M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q#0 M Q# M Q# M Q# M Q# M Q# M Q# M Q# M Q0 M Q M Q M Q M Q M Q M Q M Q R_VREF_ 0V_0 H = mm /P / 0 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q0# Q# Q# Q# Q# Q# Q# Q# Q0 Q Q Q Q Q Q Q OT0 OT VREF_ VREF_Q REET# VTT VTT TNR TYPE NP NP R# WE# # 0# # KE0 KE K0 K0# K K# M0 M M M M M M M NP NP L VP 99 0 N# N# N#/TET R-0P--GP.00.Z nd =.00.M rd =.00.X EVENT# V V V V V V V V V9 V0 V V V V V V V V _IM _IM V_ M R# M WE# M # M IM0_#0 M IM0_# M IM0_KE0 M IM0_KE M IM0_LK_R0 M IM0_LK_R#0 M IM0_LK_R M IM0_LK_R# V_0 V_ 0_IM _IM M M0 M M M M M M M M 0 -abine avid M M 0 change to short pad M M Intel HR M tied to GN M M M still following previous design PH_MT,, PH_MLK,, M EVENT# 0 U0VKX-GP 0 U0VKX-GP U0VKX-GP F0 Layout Note: Place these aps near O-IMM. O-IMM is placed farther from the Processor than O-IMM 0 0U0VZY-GP U0VKX-GP V_0 Intel HR channel address is 0 M channel address is 0 OIMM EOUPLING 0 0U0VZY-GP U0VKX-GP 0 0UVKX-GP U0VKX-GP 0 0UVKX-GP R0 0KRJ--GP R0 0R00-P 0 0UVKX-GP 0 0U0VZY-GP U0VKX-GP 09 0UVKX-GP 0 0UVKX-GP U0VKX-GP F0 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. R-OIMM ize ocument Number Rev JE0_ Friday, pril 0, 0 ate: heet of 0

16 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

17 00 change bom by siv FHE Part of 0,,,9 _RT# UMI_FH_PU_RX0P UMI_FH_PU_RX0N UMI_FH_PU_RXP UMI_FH_PU_RXN UMI_FH_PU_RXP UMI_FH_PU_RXN UMI_FH_PU_RXP UMI_FH_PU_RXN V_0 IP_LKP IP_LKN PU_LKP PU_LKN LK_PIE_VG LK_PIE_VG# WLN LK_PIE_WLN LK_PIE_WLN# G LK_PIE_WWN LK_PIE_WWN# LN LK_PIE_LN LK_PIE_LN# GPP LK port evice 0 New ard WLN WWN LN X X X X X V_0 V_0 PIE_RT#_ E R _RT#_R PIE_RT# PILK0 F 0P0VKX-GP PI_LK RJ--GP _RT# PILK/GPO F _RX0P_ PILK/GPO F 0 UVKX-GP E0 PI_LK_R R RJ--GP LK_PI_LP,, R R _RX0N_ UMI_TX0P PILK/GPO G 0 UVKX-GP E PI_LK_R 0KRJ--GP 0KRJ--GP _RXP_ UMI_TX0N PILK/M_O/GPO9 F R 0R00-P PI_LK 09 UVKX-GP I_UM 0 _RXN_ UMI_TXP UVKX-GP _RXP_ UMI_TXN PIRT# UVKX-GP PX_UPPORT dgpu_prnt# _RXN_ UMI_TXP UVKX-GP 9 _RXP_ UMI_TXN UVKX-GP 0 J _RXN_ UMI_TXP 0/GPIO0 UVKX-GP L UVZY-GP R R UMI_TXN /GPIO /GPIO G 0KRJ--GP 0KRJ--GP UMI_PU_FH_TX0P UMI_RX0P /GPIO L PX PX UMI_PU_FH_TX0N UMI_RX0N /GPIO H UMI_PU_FH_TXP UMI_RXP /GPIO J UMI_PU_FH_TXN 9 UMI_RXN /GPIO L VRM_00_900 UMI_PU_FH_TXP Y N UMI_RXP /GPIO dgpu_prnt# UMI_PU_FH_TXN Y UMI_RXN /GPIO N -abin avid PX_UPPORT UMI_PU_FH_TXP Y UMI_RXP 9/GPIO9 J for W Jin define ZP_O_upport UMI_PU_FH_TXN Y9 UMI_RXN 0/GPIO0 L PU_PIE_LRP /GPIO L R0 F9 PU_PIE_LRN PIE_LRP /GPIO M 90RF-GP F V_0 PIE_LRN /GPIO J R09 V_0 /GPIO K KRF--GP V GPP_TX0P /GPIO N 0 - V GPP_TX0N /GPIO G9 W0 GPP_TXP /GPIO M R9 W J0 R 0KRJ--GP GPP_TXN /GPIO GPP_TXP 9/GPIO9 L 0KRJ--GP 00MHz K GPP_TXN 0/GPIO0 Zero O VRM_00_900 GPP_TXP /GPIO N ebug trap ZP_O_upport GPP_TXN /GPIO G /GPIO E PI_ R0 GPP_RX0P /GPIO PI_ GPP_RX0N /GPIO E R 0KRJ--GP PI_ W GPP_RXP /GPIO F PI_ PX 0KRJ--GP 900MHz V GPP_RXN /GPIO H R GPU_PWROK_ PI_ Non Zero O V GPP_RXP /GPIO H 0RJ--GP GPU_PWROK,9,9 W GPP_RXN 9/GPIO9 W GPP_RXP 0/GPIO0 W GPP_RXN /GPIO E E0# N R E# J R0 N0 PIE_RT#_ RJ--GP LK_LRN E# PLT_RT#,,,, V_0 KRF--GP F LK_LRN E# FRME# G0 EVEL# K9 G0 V_0 V_0 folloiwng Intel HR netname 0 - EXT clock_gen PIE_RLKP IR# L0 0P0VKX-GP G PIE_RLKN TR# F0 R 0R00-P FHIP_LKP_R PR E0 R FHIP_LKN_R IP_LKP TOP# H R 0R00-P T R IP_LKN PERR# M9 0KRJ--GP ERR# H R For TRVI H IP_LKP REQ0# G 0KRJ--GP H IP_LKN REQ#/GPIO0 G LT_TP# connection is just 00- FHPU_LKP_R REQ#/LK_REQ#/GPIO F R GPIO Muxless support for chipset automation purpose. 0R00-P T FHPU_LKN_R PU_LKP REQ#/LK_REQ#/GPIO M TP0 R 0R00-P T It is an automatic test for PU_LKN GNT0# FHGFX_LKP_R GNT#/GPO PE_GPIO0 PE_GPIO0 ->VG_REET FHGFX_LKN_R GPIO PE_GPIO 9 PE_GPIO ->VG_PowerEnable M validation team only I_PX R I_PX R 0RJ--GP 0RJ--GP J0 LT_GFX_LKP GNT#/_LE/GPO K9 LT_GFX_LKN GNT#/LK_REQ#/GPIO K TP0 LKRUN# 9 PM_LKRUN# 0 - H NEW GPP_LK0P LOK# H9 H GPP_LK0N PM_LKRUN# F R LK_MINI_R INTE#/GPIO 0R00-P J checklist:no PU Res LK_MINI#_R GPP_LKP INTF#/GPIO E R9 0R00-P K GPP_LKN INTG#/GPIO Integrated Resistor PU0K LK_R INTH#/GPIO T_O_# G R0 0RJ--GP F LK_R# GPP_LKP G R 0RJ--GP F GPP_LKN LKREQ# 0 R 0R00-P R 0R00-P LN_LK_R LN_LK#_R M_X M_X E GPP_LKP E GPP_LKN M GPP_LKP M GPP_LKN M GPP_LKP M GPP_LKN N GPP_LKP N GPP_LKN R GPP_LKP R GPP_LKN N GPP_LKP R GPP_LKN J M_M_M_O M_X M_X PI EXPRE INTERFE LOK GENERTOR PI LK PI INTERFE LPLK0 LPLK L0 L L L 9 LFRME# LRQ0# E LRQ#/LK_REQ#/GPIO9 E9 ERIRQ/GPIO PU PLU LP M_TIVE# G PROHOT# E PU_PG E LT_TP# G F PU_RT# K_X K_X _ORE_EN RTLK INTRUER_LERT# VT_RT_G G G LPLK0_R R9 RJ--GP LP_0 LP_ LP_ LP_ INT_ERIRQ K_X K_X H F F INTRUER_LERT# E INT_ERIRQ LLOW_TOP PU_PROHOT# H_PUPWRG_E,,,9 PU_RT# TP0 LP_0,, LP_,, LP_,, LP_,, LP_FRME#,, RT_UX_ LP_LK0, LP_LK 0 change to short pad R0 0R00-P PH_ULK_K RT_LK K_X R0 0MR-GP K_X 00 bom change 0 0P0VJN-GP X0 X-KHZ-GPU.000. N = P0VJN-GP R0 MRJ--GP X0 XTL-MHZ-0-GP.000. N = R =.000. M_X M_X L = pf Freq tolertance :+/- 0ppm 0 P0VJN-GP.HUM.M0 G0 GP-OPEN 0 UVZY-GP 0 UVKX-GP L = pf Freq tolertance :+/- 0 ppm Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. HUON-M(/) ize ocument Number Rev ustom JE0_ 0 P0VN-GP ate: Friday, pril 0, 0 heet of 0

18 U V_ V_0 RN0 R 0KRJ--GP integrated PU R 0KRJ--GP LK T R 0KRJ--GP R 0KRJ--GP R 0KRJ--GP R9 0KRJ--GP M_LK M_T E_I# E_WI# PM_PWRTN# PIE_WKE# U_O# have not use O function in JE0 Project VG_P integrated PU (FH Rev. updated) 0 integrated PU R R RN0KJ--GP RN0 RNKJ--GP 0KRJ--GP 0KRJ--GP integrated PU is not supported when the pin if configured for U O (FH Rev. updated) H_0GTE H_RIN# R 00KRJ--GP 9 base on M suggestion, PM_RMRT# H_PKR M define two function pin on same pin in R PM_RMRT# 0 U0VKX-GP ,, R0 make sure Travis_EN# function first so confrim function work nornally or not on GPIO,if work nornally, IO can re-programming pin to GPIO (R,stuff R) and change Travis_EN# to GPIO in the furtur keep Gevent# for PIE_RT used LK_PIE_WWN_REQ# LK_PIE_WLN_REQ# H_OE_ITLK H_OE_OUT 9 H_IN0 H_OE_YN H_OE_RT#,9,, PM_LP_#, PM_LP_#,9 PM_PWRTN# FH_PWRG H_THERMTRIP# 0 change to short pad TP0 0 change to short pad TP0 TP0 R H_0GTE 0R00-P R H_RIN# 0R00-P E_I# V_0 PIE_LK_LN_REQ# 0R00-P R0 E_WI# T_O_PRNT# O Q,, M_LK M_T PEG_LKREQ# PIE_WKE# 0-0R00-P R9 0R00-P 0R00-P 0-0RJ--GP R 0KRJ--GP 0 - R R TP0 R0 0RJ--GP ZERO O R0 RJ--GP R0 RJ--GP E0 0P0VJN-GP R0 RJ--GP R0 RJ--GP E0 0P0VJN-GP R09 0R00-P TP0 PM_PWRTN#_R FH_TET0 FH_TET FH_TET E_0M#_R E_K_RT#_R E_I# PIE_WKE# FH_THERMTRIP# W_PWRG PIE_LK_LN_RQ#_R LK T LK_PIE_WWN_REQ#_R LK_PIE_WLN_REQ#_R R 0RJ--GP VG_P FH_GPIO H_PKR_R H_ITLK H_OUT H_IN0 H_YN H_RT# LKREQG# U_O# E_WI# T_O_PRNT#_R R W T W J N T9 T0 V9 E G9 R9 T U K V R0 F9 U G E E F H G F T R G G J G V W Y V0 F M R T P F P J T Y Y Y E K9 J9 J FH PIE_RT#/PI_PME#/GEVENT# RI#/GEVENT# PI_#/GE_TT/GEVENT# LP_# LP_# PWR_TN# PWR_GOO TET0 TET/TM TET G0IN/GEVENT0# KRT#/GEVENT# LP_PME#/GEVENT# LP_MI#/GEVENT# LP_P#/GEVENT# Y_REET#/GEVENT9# WKE#/GEVENT# IR_RX/GEVENT0# THRMTRIP#/MLERT#/GEVENT# W_PWRG RMRT# LK_REQ#/T_I0#/GPIO LK_REQ#/T_I#/GPIO MRTVOLT/T_I#/GPIO0 LK_REQ0#/T_I#/GPIO0 T_I#/FNOUT/GPIO T_I#/FNIN/GPIO9 PKR/GPIO L0/GPIO 0/GPIO L/GPIO /GPIO LK_REQ#/FNIN/GPIO LK_REQ#/FNOUT/GPIO IR_LE#/LL#/GPIO MRTVOLT/HUTOWN#/GPIO R_RT#/GEVENT#/VG_P GE_LE0/GPIO PI_HOL#/GE_LE/GEVENT9# GE_LE/GEVENT0# GE_TT0/GEVENT# LK_REQG#/GPIO/OIN/ILEEXIT# LINK/U_O#/GEVENT# U_O#/IR_TX/GEVENT# U_O#/IR_TX0/GEVENT# U_O#/IR_RX0/GEVENT# U_O#/_PRE/TO/GEVENT# U_O#/TK/GEVENT# U_O#/TI/GEVENT# U_O0#/PI_TPM_#/TRT#/GEVENT# Z_ITLK Z_OUT Z_IN0/GPIO Z_IN/GPIO Z_IN/GPIO9 Z_IN/GPIO0 Z_YN Z_RT# H UIO P_T//GPIO P_LK/E/L/GPIO PI_#/GE_TT/GPIO PI / WKE UP EVENT GPIO U O U MI U. ULK/M_M_M_O U.0 U.0 Part of U_ROMP U_FP/GPIO U_FN U_F0P/GPIO U_F0N U_HP U_HN U_HP U_HN U_HP U_HN U_H0P U_H0N U_H9P U_H9N U_HP U_HN U_HP U_HN U_HP U_HN U_HP U_HN U_HP U_HN U_HP U_HN U_HP U_HN U_HP U_HN U_H0P U_H0N U_LRP U_LRN U TXP U TXN U RXP U RXN U TXP U TXN U RXP U RXN U TXP U TXN U RXP U RXN G 9 U_ROMP H H H H H0 G0 K0 J G F K K E0 F0 0 0 H9 G9 F E E E U_LRP U_LRN E F F G H G Pair evice 0 U.0 EXT(For W ebug) WLN N WWN T R9 KRF-GP G IM ard U PORT U PORT U0_P U0_M 9 U0_P 0 U.0 ccd.0 U0_M U.0 on board port U0_P U0_M U.0 ext port U.0 ext port U_PP 9 U_PN 9 U_PP U_PN U_PP U_PN U_PP U_PN U_PP U_PN U_PP U_PN U_PP0 U_PN0 R U KRF--GP R U KRF--GP V_ U0_TXP U0_TXN U.0 ext port U0_RXP U0_RXN U0_TXP U0_TXN U.0 ext port U0_RXP U0_RXN U0_TXP U0_TXN U.0 on board port U0_RXP U0_RXN 0 PK_T/GPIO9 PK_LK/GPIO90 PM_T/GPIO9 PM_LK/GPIO9 U TX0P U TX0N U RX0P U RX0N J H J K U0_TXP0 9 U0_TXN0 9 U0_RXP0 9 U0_RXN0 9 RN0 RN0KJ--GP H_IN0 H_OE_ITLK H_OE_RT# hecklist suggestion do not stuff by default Function G0IN KRT# Name H_0GTE H_RIN# FH_PIE_RT# MEM_Hot# Integrated Resistor.K PU.K PU External Resistor 0K PU._0 0K PU._0 PME# E_I# 0K PU 0K PU._ THRIPTRIP# PIE_RT# Gevent 0K PU 0K PU Gevent E_WI# 0K PU 0K PU._ U_O0# U_O# H_THERMTRIP# U_O0# U_O# 0K PU 0K PU 0K PU 0K PU._ WKE# PIE_WKE# 0K PU 0K PU._ F E0 F0 E 0 J H G K 9 9 KO_0/GPIO09 KO_/GPIO0 KO_/GPIO KO_/GPIO KO_/GPIO KO_/GPIO KO_/GPIO KO_/GPIO KO_/GPIO KO_9/GPIO KO_0/GPIO9 KO_/GPIO0 KO_/GPIO KO_/GPIO KO_/X0/GPIO KO_/X/GPIO KO_/X/GPIO KO_/X/GPIO.HUM.M0 EMEE TRL L/GPIO9 /GPIO9 L_LV/GPIO9 _LV/GPIO9 E_PWM0/E_TIMER0/GPIO9 E_PWM/E_TIMER/GPIO9 E_PWM/E_TIMER/WOL_EN/GPIO99 E_PWM/E_TIMER/GPIO00 KI_0/GPIO0 KI_/GPIO0 KI_/GPIO0 KI_/GPIO0 KI_/GPIO0 KI_/GPIO0 KI_/GPIO0 KI_/GPIO0 H9 G9 G G E H J H K K F F E F L T LK T LK T E_PWM RN0 L T RN0KJ--GP If not used MU or GPIO,P 0K V_ RN0 LK T RN0KJ--GP U_O# U_O# 0K PU Gevent# T_O_PRNT# 0K PU Gevent# O_ 0K PU V_UX_ U_O# U_O# 0K PU Gevent# E_WI# 0K PU 0K PU._0 U_O# U_O# 0K PU LP_MI# E_MI#.K PU 0K PU._ GPIO T_O_#.K PU ERIRQ INT_ERIRQ.K PU 0K PU._0 R 00KRJ--GP R 0KRJ--GP _PGOO_ Q PM_RMRT# R KRJ--GP RMRT#_K V_V_POK LK_REQ0 LK_PIE_NEW_REQ#.K PU LK_REQ LK_REQ LK_PIE_WLN_REQ# LK_PIE_WWN_REQ#.K PU.K PU LK_REQ PIE_LK_LN_RQ#.K PU LK_REQG PEG_LKREQ#.K PU N00KW-GP.N0.F nd =.M0.0F Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. HUON-M(/) ize ocument Number Rev ustom JE0_ Friday, pril 0, 0 ate: heet of 0

19 FH Part of st T H T O E-T nd T H T_TXP0 T_TXN0 T_RXN0 T_RXP0 T_TXP T_TXN T_RXN T_RXP K9 M9 L0 N0 N L H0 J0 J H M K H J N L L N J H T_TX0P T_TX0N T_RX0N T_RX0P T_TXP T_TXN T_RXN T_RXP T_TXP T_TXN T_RXN T_RXP T_TXP T_TXN T_RXN T_RXP T_TXP T_TXN T_RXN T_RXP R GE LN _LK/LK_/GPIO _M/LO_/GPIO _#/GPIO _WP/GPIO _T0/TI_/GPIO _T/TO_/GPIO _T/GPIO9 _T/GPIO0 GE_OL GE_R GE_MK GE_MIO GE_RXLK GE_RX GE_RX GE_RX GE_RX0 GE_RXTL/RXV GE_RXERR GE_TXLK GE_TX GE_TX GE_TX GE_TX0 GE_TXTL/TXEN GE_PHY_P GE_PHY_RT# GE_PHY_INTR L N J H K M H J 9 W0 H F E G F9 G E 9 W9 GE_OL GE_R GE_MIO GE_RXERR GE_PHY R90 0KRJ--GP V_ RN90 RN0KJ--GP N9 L K M L9 N L L H H T_TXP T_TXN T_RXN T_RXP N#L9 N#N N#L N#L N#H N#H ERIL T PI ROM PI_I/GPIO PI_O/GPIO PI_LK/GPIO PI_#/GPIO ROM_RT#/PI_WP#/GPIO VG_RE VG_GREEN VG_LUE V V V T V L0 L M9 R90 0RF--GP UM_PX R90 0RF--GP UM_PX R90 0RF--GP UM_PX RT_RE 9 RT_GREEN 9 RT_LUE 9 J J N#J N#J VG_HYN/GPO VG_VYN/GPO9 M N0 RT_HYN 9 RT_VYN 9 V_ R90 0KRJ--GP RN90 PU_TLERT# GPIO FH_U.0PORT_EN# M_THRM_FH V_0 0, PH_TEMP_LERT# R90 KRF--GP R90 9RF--GP T_O_PWRGT T_LE# T_LP T_LN [checklist]: Integrated lock Mode => Left unconnected GPIO FH_U.0PORT_EN# M_THRM_FH R9 PU_TLERT# 0RJ--GP F T_LRP F T_LRN F G T_T#/GPIO T_X T_X H FNOUT0/GPIO M FNOUT/GPIO J FNOUT/GPIO K FNIN0/GPIO N FNIN/GPIO L FNIN/GPIO HW MONITOR K TEMPIN0/GPIO K TEMPIN/GPIO K TEMPIN/GPIO M TEMPIN/TLERT#/GPIO.HUM.M0 VG MINLINK VG VG /GPO0 VG L/GPO VG RET UX_VG_H_P UX_VG_H_N UXL ML_VG_L0P ML_VG_L0N ML_VG_LP ML_VG_LN ML_VG_LP ML_VG_LN ML_VG_LP ML_VG_LN ML_VG_HP/GPIO9 VIN0/GPIO VIN/GPIO VIN/TI_/GPIO VIN/TO_/GPIO VIN/LO_/GPIO9 VIN/LK_/GPIO0 VIN/GE_TT/GPIO VIN/GE_LE/GPIO N#G N#H0 N# N#G N#L M N K HUON REET V V9 U T T T9 T R R0 P9 P 9 N M L N P P M M G H0 G L UXL PW_LR# GPIO U_HP GPIO GPIO9 GPIO0 VIN_VR GPIO RT T 9 RT LK 9 R90 UM_PX RF-GP P_UXP_R P_UXN_R 0 GPIO M M V_0 R9 P_TX0P_R 00RF-L-GP-U P_TX0N_R P_TXP_R P_TXN_R P_TXP_R P_TXN_R V_VN 0_R P_TXP_R R90 P_TXN_R 0KRJ--GP V_ R9 0KRJ--GP 9 R9 0KRJ--GP P_HP_R U_HP V_ R99 0KRJ--GP R9 0KRJ--GP RN0KJ--GP RN90 RN0KJ--GP GPIO0 GPIO GPIO GPIO9 V_ VIO.V.V MEM_V H L MEM_V on't are H VRM IZE M G Vram size (GPIO) Vram size (GPIO) 0 0 G 0 PW_LR# undfine 0 R9 0KRJ--GP R909 0KRJ--GP VIN_VR 09- If not used HWM or GPIO,P 0K G90 GP-OPEN Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. HUON-M(/) ize ocument Number Rev ustom JE0_ ate: Friday, pril 0, 0 heet 9 of 0

20 V_0 V_0 0m 00m VN LK V_VPPL_Y_0 0m H VPL Y VN LK V_VPL_ML_0 0m H 0m V Q00 VPL VN LK m J U O00-GP VPL ML VN LK 0 ohm 00m V_0 V_VN 0_R 0m K 0 T VN VN LK V_VPL_U_ m L 0 U0VKX-GP L UVKX-GP U0VKX-GP UVKX-GP R09 L00 VPL U_ VN LK V_VPL_U_ m M U0VKX-GP 0RJ-0-U-GP VPL_.V_PIE VPL U_ VN LK m N H9 LMG-GP VPL PIE VN LK m N G.000.E 0 0 LO_P V_0 V_0 R00 0RJ--GP VPL T VN LK P nd =.00.0 U0VKX-GP U0VKX-GP 0 UVKX-GP M 0m V_0 LO_P VN PIE L00 VN PIE Y V 0 ohm 00m VPL VPL VN PIE m E V_0 PY00T-0Y-N-GP VN PIE m Y UVKX-GP U0VKX-GP U0VKX-GP UVKX-GP 0UVKX-GP V_ L00 VN ML VN PIE.000. V VPL_.V_T VN ML VN PIE UM_PX V LMG-GP UVKX-GP U0VKX-GP VN ML VN PIE F V.000.E 0 0 VN ML VN PIE UM_PX G nd =.00.0 U0VKX-GP U0VKX-GP m 0 VIO GE_ VN T m V_ R0 VN T UM_PX Y0 U00 VN T VN T m 09 U0VKX-GP U0VKX-GP UVKX-GP VR GE_ VN T UVKX-GP IN OUT VR GE_ VN T GN V_ET VN T 0 0 HN# ET VN T m 9 VIO_GE_ VN T 0 0 G9TU-GP VIO_GE_ VN T F R0 9K9RF-L-GP 0 ohm V_ V_U_ V_ Vout=.0*(+R/R) L00 0m G 0m H0KF-T0-GP VN U_ VIO N H VN U_ VIO L9 J 0 0 N = VN U_ VIO M 0 0 K U0VKX-GP UVKX-GP UVKX-GP UVKX-GP 0UVKX-GP VN U_ VIO V U0VKX-GP U0VKX-GP K9 VN U_ VIO V If support U.0 or LN wake-up, pls tie to.v_ M9 VN U_ VIO Y M0 otherwise, tie to.v_0 VN U_ VIO Y N9 VN U_ VIO L00 0 ohm 00m W N0 V_ VN U_ V_ M 0 ohm 00m L009 LMG-GP VN U_ N m VXL_.V.000.E 0 0 VN U_ VXL G M R0 LMG-GP nd =.00.0 U0VKX-GP U0VKX-GP VN U_ 0RJ--GP V_ E VN_.V_U 0mU VN U_ VR N0 90m nd =.00.0 U VR_V V_ R0 VN U_ VR M0 L0 R0 V_ 0RJ--GP VR_.V_ VR_.V_U m T 0m V_VPPL_Y_ RJ--GP 0 ohm 00m LMG-GP VR U_ VPL Y_ J T UVKX-GP V_.000.E VR U_ R00 nd =.00.0 U0VKX-GP m V_VN_HWM_ 0RJ--GP VN HWM_ m M P VN U_ M VN U_ N VN U_ VIO_Z_ m V_ P VN U_ P VN U_ 09 0 ohm 00m ohm U VN_.V_U_ mn UVKX-GP VR U_ L00 N V_U_ V_VPL_U_ VR U_ V_ P L0 PY00T-0Y-N-GP VR U_ M VR U_.000. LMG-GP onfrim.000.e R0 nd U U = RJ--GP odec power use.v,vio_z have to tied to.v U0VKX-GP U0VKX-GP Non U U0VKX-GP U0VKX-GP UVKX-GP POWER U odec power use.v,vio_z have to tied to.v If use.v_ power,have to add LO for it extra 00 0UVKX-GP U0VKX-GP 00 U0VKX-GP U0VKX-GP 00 U0VKX-GP UVKX-GP U0VKX-GP U0VKX-GP 00 U0VKX-GP U0VKX-GP E9 0 G FH VIO PIGP VIO PIGP VIO PIGP VIO PIGP VIO PIGP VIO PIGP VIO PIGP VIO PIGP VIO PIGP VIO PIGP.HUM.M0 MIN LINK GE LN PI/GPIO I/O ERIL T PI EXPRE LKGEN I/O U U ORE 0.V_ I/O Part of VR_ VR_ VR_ VR_ VR_ VR_ VR_ VR_ VR_ T T T0 U U V V V0 Y 00 UVKX-GP 00 UVKX-GP UVKX-GP 009 U0VKX-GP V_0 00 U0VKX-GP U0VKX-GP VN LK U0VKX-GP U0VKX-GP VN LK_ G R09 0KRF--GP.000. V_0 0KRF--GP UVKX-GP If support U.0 wake-up, tie to.v_ If no, tie to.v_0, If no U.0, tied to GN 0 ohm 00m 0 ohm 00m 0 ohm 00m 0 ohm 00m V_0 R0 0R00-P V_VPL_ML_0 0 UVKX-GP V_0 0 U0VKX-GP UM_PX UM_PX L0 LMG-GP.000.E nd =.00.0 V_0 V_VPPL_Y_0 V_ V_VN_HWM_ L0 L0 LMG-GP LMG-GP.000.E.000.E nd = nd = U0VKX-GP U0VKX-GP U0VKX-GP 0 U0VKX-GP V_VN 0_R 0 U0VKX-GP UM_PX HW Montior Not implemented or HW Montior balls not used GPIO => ecoupled cap not used HW Montior Not implemented or HW Montior balls used as GPIO => ead not used 0 U0VKX-GP V_ L0 LMG-GP.000.E nd =.00.0 V_ L00 LMG-GP.000.E nd =.00.0 V_VPPL_Y_ If support U.0, tie to.v_ otherwise, tie to.v_0 0 U0VKX-GP 09 U0VKX-GP V_ V_VPL_U_ U L0 LMG-GP.000.E nd = U0VKX-GP If U.0 wake-up is supported, tie to.v_ If no, tie to.v_0, If no U.0, tie to GN 0 U U0VKX-GP R0 0RJ--GP Non U Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. HUON-M(/) ize ocument Number Rev JE0_ Friday, pril 0, 0 ate: heet of 0 0

21 I =. REQUIRE TRP V_0 V_ V_ R:PU.V_UX_ checklist:pu.v_ no support PLU funciton,pu.v_ REQUIRE YTEM TRP UE this pin to determine INT/EXT LK 0KRJ--GP R0 R0 0KRJ--GP R0 0KRJ--GP R0 0KRJ--GP 0KRJ--GP R0 0KRJ--GP R0 PULL HIGH PULL LOW E_PWM PH GPO99 LP ROM EFULT PI ROM PI_LK llow PIE GEN EFULT Force PIE GEN RT_LK _PLU Mode ILE EFULT _PLU Mode ENLE LK_PI_LP UE EUG TRP IGNORE EUG TRP EFULT PI_LK non_fusion LOK mode Fusion LOK mode EFULT LP_LK0 ENLE E ILE E EFULT LP_LK LKGEN ENLE (Use Internal) EFULT LKGEN ILE (Use External) PI_LK,, LK_PI_LP PI_LK, LP_LK0 LP_LK E_PWM RT_LK LP ROM implemented checklistsuggestion: no PU or P required (integrated PU 0K) R: do not stuff PU Res R 0KRJ--GP 0KRJ--GP R 0KRJ--GP R 0KRJ--GP R R R R9 0KRJ--GP KRF-GP KRF-GP EUG TRP PI_ PI_ PI_ PI_ PI_ R0 R0 R09 R09 R0 R0 R R R PULL HIGH PI_ UE PI PLL (EFULT) PI_ isable IL UTORUN (EFULT) PI_ UE F PLL (EFULT) PI_ UE EFULT PIE TRP (EFULT) PI_ isable PI MEM OOT (EFULT) KRJ--GP KRJ--GP KRJ--GP KRJ--GP KRJ--GP PULL LOW YP PI PLL Enable IL UTORUN YP F PLL UE EEPROM PIE TRP Note: FH has K internal PU FOR PI_[:] Enable PI MEM OOT Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. HUON-M(/) ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

22 FH Part of 9 E E E E9 F F9 F F F F F9 F F F9 G G G H H H9 J J9 J0 J J J K K K K L L L L L L M M M M N N N N N P P P0 P P P R R R R T T T N K H N_HWM XL PL_Y GROUN PL_ N_ NQ_ IO_ EFUE T T U U U U0 U U0 U V V V W W W W Y Y Y 0 E E E E F F F F G0 G H H H H9 H H H H J J J9 K K L M M N N N N T L K N R.HUM.M0 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. HUON-M(/) ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

23 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

24 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

25 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

26 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

27 V_UX_, 0,,,9 _RT# LP_LK0 9 F0 UVZY-GP KOL TP0,, INT_ERIRQ LP_FRME# PM_LKRUN#,, LP_0,, LP_,, LP_,, LP_ TP > H_RIN# H_0GTE K_EEP FN_PWM FN_TH KOL[0..] KOL KROW[0..] TPLK TPT P_RT# _TFULL RT_E# INT_ERIRQ LP_FRME# LP_LK0 PM_LKRUN# LP_0 LP_ LP_ LP_ ERT# EI#_K KOL0 KOL KOL KOL KOL KOL KOL KOL KOL KOL9 KOL0 KOL KOL KOL KOL KOL KOL KOL KROW0 KROW KROW KROW KROW KROW KROW KROW G_PRE# U0 ERIRQ LFRME# PILK LKRUN# L0 L L L ERT# KRT# I# G0 PIRT# PWM0 PWM FNPWM0 FNPWM FNF0 FNF KO0 KO KO KO KO KO KO KO KO KO9 KO0 KO KO KO KO KO KO KO KI0 KI KI KI KI KI KI KI PLK PT PLK PT PLK PT V V V V_0 V 9 V 9 V GN 9 GN GN GN GN_0 GN 9 L0 0 L 0 0 GPXIO0 GPXIO GPXIO GPXIO GPXIO GPXIO GPXIO GPXIO GPXIO GPXIO9 GPXIO0 GPXIO GPXIO0 GPXIO GPXIO GPXIO GPXIO GPXIO GPXIO GPXIO T_L T_ FN_ E_LV_V_EN _I P_VER_ T_TYPE E_PI_WP# _ENLE _OFF E_GPXIO09 G_LE E_GPXIO _IN# E_GPXIO0 E_GPXIO HRGER_TYPE E_GPXIO E_V E_GN T_L 9,0 T_ 9,0 ML_T,9, ML_LK,9, R9 0RJ--GP _EN 9 G_EN _I 0 0 UVZY-GP PU_THRM E_PI_WP# 0 U_PWR_EN#, MP_MUTE# 9 PM_PWRTN#,9 _ENLE,9 RMRT#_K _OFF WLN_TET_LE T_IN# 9 _IN# 0 TP 0 UVZY-GP PH_TEMP_LERT#,9 V PWRG, TP 0 UVZY-GP E_GN TP LV_V_EN 9,0,9,9 0 change to short pad 0 UVZY-GP LON_OUT 9 HRGER_TYPE V_UX_ T/HRGER PU-Temp/VG Temp ; PH.k on PU side TP TP09 TP0 0 - R 0R00-P V_UX_ R 0KRJ--GP L0 H0KF--GP Reserved E_GN T_TYPE V_UX_ E_GN IRETE# Reserved.9K 00.0K V_UX_ T_TYPE /(PIN) PULL-LOW REITOR PULL-HIGH REITOR VOLTGE W 90W 0W 0W N/ 00.0K 0.0K 0.0K.0K 00.0K 00.0K.V 0V 0.V 0.V 0W.0K 00.0K 0.V Reserved Reserved N/ 00.0K 00.0K.0K.9K.K 00.0K.0V P VERION /(PIN) PULL-LOW REITOR PULL-HIGH REITOR VOLTGE - Reserved W 90W 00.0K 00.0K 00.0K 00.0K 00.0K 00.0K 00.0K R0 00KRF-L-GP R0 00KRF-L-GP IRETE# High: UM Low: iscrete, PX 0.0K 0.0K.0K UM I_PX R0 00KRF-L-GP R0 00KRF-L-GP.V.0V.V.V.V.0V.V.V Model I R0 00KRF-L-GP E_GN V_UX_ 0 - R 00KRF-L-GP _IN# V_UX_ 0 - R 00KRF-L-GP E_GPXIO R09 0RJ--GP 0 0P0VKX-GP G0 GP-OPEN K_PWRTN# 9, 0 PI_LK_R E_I# TP9 R RJ--GP TP0 TP, 0 0 EI#_K,9,, 0, 9,0,9,9 9 WIFI_RF_EN LUETOOTH_EN L_KLT_EN RIGHTNE HG_ON# LI_LOE# PM_LP_# TOP_HG# PM_LP_# TY_LE Y_THRM 0 change to short pad 0 --GP.000.K N =.000.F, E_WI# E_I# TOP_HG# E_GPIO0 E_GPIO0 E_GPIO LUETOOTH_EN E_PI_LK_ HG_ON# EWI#_K PURE_HW_HUTOWN# R 0R00-P R 0RJ--GP GPIO GPIO GPIO GPIO0 GPIO0 GPIO0 PWM GPIO9 GPIO GPIO GPIO PILK GPIO9 GPIO0 GPIO K9QF-0-GP.09.0G R 0KRJ--GP EWI#_K EI#_K PI# 0 MOI MIO 9 9 GPIO0 90 GPIO GPIO GPIO 0 GPIO 9 GPIO 9 GPIO GPIO GPIOE VR PURE_HW_HUTOWN#_Q E_PI_#_ E_PI_O_ E_PI_I_ PROHOT_E Model I WIRELE_LE IRETE# VR 09 UVKX-GP UHRGER_ P_PWM_K E Q0 MMT90--GP R RJ--GP R RJ--GP R 0R00-P U0VKX-GP ERT# 0- HRGE_LE E_Tx E_Rx 0 UVKX-GP TP WLN_LE_OFF# PWRLE 0RJ--GP R PURE_HW_HUTOWN# PI_0#_R 0 PI_I_R 0 PI_O_R 0 R TP0 00KRF-L-GP U0VKX-GP V_UX_ R 0KRJ--GP 0- PU_LPWM_TRVI,9 0 Prevent IO data loss solution R 0KRJ--GP U0 GN REET# P0VJN-GP V R 00KRJ--GP V_UX_ 0- P_VER_ V_UX_ PH_ULK_K E_GN E GPIO standard PH/PL T_L T_ T_IN# R0 KRF-GP R0 00KRF-L-GP Value 0K 0K.K.9K.K K K K RN0 RNKJ--GP R 00KRJ--GP PN.00.L.0.L..L.9.L..L.00.L.00.L.0.L V_UX_ T_ T_L V_0 Q0 N00KW-GP.N0.F nd =.M0.0F V_0 RN0 RNKJ--GP T,9 T L,9.T90. nd =.090.F rd =.090.R V_0 G90L9TUF-GP.0090.I ERT# R 0KRJ--GP HG_ON# TOP_HG# RN0 V_UX_ PROHOT_E E_GPIO0 High ctive Q0 G R G 0KRJ--GP _ENLE R0 0KRJ--GP _OFF RN00KJ--GP R KRJ--GP R0 00KRJ--GP H_PROHOT#_E N00K--GP.N0.J N =.N0.0 R9 0R00-P H_PROHOT# 0- G_PRE# R NON G 0KRJ--GP FN_TH V_0 R 0KRJ--GP E Proceted:KV E_Rx R 0KRJ--GP w/ G: PU 0K to V_0 ; w/o G: P 0K GN Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. K NPE9 ize ocument Number Rev JE0_ Friday, pril 0, 0 ate: heet of 0

28 00- V_0 J IN Over temperature threshold setting by external resistor divider Floating= o; GN=90o; V=9o V_0 V_0 R0 NT-00K--GP R 00RJ--GP 0 0UVKX-GP 09- V_0_thermal U0VKX-GP Layout notice : oth XN and XP routing 0 mil trace width and 0 mil spacing..090.l0 N =.090.P Q0 PM90--GP P00_XP 9 90P0VJN-GP P00_XN J 0- close to U0 V_0_thermal 00P0VKX-GP THERM_Y_HN#.ystem ensor, Put on palm rest.h/w T hutdown R0 0KRJ--GP R09 0KRJ--GP U0 V XP XN OTZ P00E0-GP TR TL GN J.000. J FN_TH Y_THRM PU_THRM 0 UVKX-GP R0 0RJ--GP FN_TH_ U0VKX-GP 0 HH-0PT-GP.R00.F 0 change to short pad nd =.R00.HH FN_PWM_R FN_PWM R0 rd =.R00.0F 0R00-P FN_TH_ R9 V_0 FN_V *Layout* mil 0-09 U0VKX-GP R0 0KRJ--GP FN_V 0 HH-0PT-GP.R00.F nd =.R00.HH rd =.R00.0F 0 00P0VKX-GP 0R00-P For PWM FN FN E-ON--GP 0.F0.00 nd = 0.F0.00 rd = 0.F.00 VG Thermal sensor P00 V_UX_ V_0, PURE_HW_HUTOWN# 0 TPT-GP.000.T nd =.T. rd =.T. R 0KRJ--GP U0VKX-GP Q0 N00K--GP THERM_Y_HN# G V_0.N0.J N =.N0.0 E Proceted:KV R 00KRJ--GP 0 - Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thermal P00 ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

29 V_0 P# 9 U0VKX-GP 0 - R9 0RJ-0-U-GP U90 EN N# GN VIN VOUT G909-TU-GP.0909.FF N =.099.F R9 00RJ--GP EP V_0 U_GN U_GN LOE TO PIN U_GN 0-9 0U0VKX-GP H_OE_OUT H_OE_ITLK H_OE_OUT H_IN0 P#=0 Power down PK mp P#= Power up PK mp IGITL U90 (include thermal pad) L_V 90 P0VJN--GP 0-90 U0VKX-GP U_GN 9 U0VKX-GP LOE TO PIN 9 U0VKX-GP LOE TO PIN V_0 U_P U_N PVEE HP_OUT_R_U HP_OUT_L_U 0 - R9 U_HP_JK_R RJ--GP R9 U_HP_JK_L RJ--GP 0 - EP V_0 U_PK_R+ U_PK_R- U_PK_L- U_PK_L+ 0 - V_0 V_0 R9 0R00-P 9 GN PIFO EP PV PK-OUT-R+ PK-OUT-R- P P PK-OUT-L- 0 PK-OUT-L+ 9 PV V.00.0 LX-V-GR-GP U_HP_J# H_OE_ITLK 0 - R9 RJ--GP R9 0R00-P V 90 P0VJN-GP GPIO0/MI-T GPIO/MI-LK P# P# 0 - Z_ITLK_UIO_+ 9_TIN LK T-IN V-IO 9 YN 0 REET# T-OUT VREF LO_P_UIO MIV MI-VREFO MI-VREFO 9 UIP_P_EEP U_GN MIV V_0 NLOG L_V U_HP 0 - R9 0RJ--GP U_HP_J_R# PEEP P N PVEE HPOUT-R/PORT-I-R HPOUT-L/PORT-I-L MI-VREFO-L MI-VREFO-R MI-VREFO LO-P VREF V 0 9 ENE_ LINE-L/PORT-E-L LINE-R/PORT-E-R MI-L/PORT-F-L MI-R/PORT-F-R ENE_ JREF 9 MONO-OUT 0 MI-L/PORT--L MI-R/PORT--R LINE-L/PORT--L LINE-R/PORT--R H_OE_YN H_OE_RT# 909 P0VJN-GP pilt by GN L_ENE_ LIN-L_PORT- LIN-R_PORT- MI-L_PORT- MI-R_PORT- L_ENE_ MI-L_PORT- MI-R_PORT- JREF LOE TO PIN9 U_GN 9 U0VKX-GP G U_GN 0 - R909 0KRF-L-GP Q90 V_0 90 0UVMX-GP LOE TO PIN 9 LOE TO PIN 9 UVKX-GP UIP_P_EEP UIO_EEP R90 0KRF-L-GP 9 U0VKX-GP 9 U0VKX-GP 90 U0VKX-GP 99 U0VKX-GP R90 0KRF-L-GP OMO_MI_J# 9 U0VKX-GP 9 U0VKX-GP 9 U0VKX-GP 9 00P0VJN-GP 9 U0VKX-GP U_GN 9 0UVKX-GP N00K--GP.N0.J N =.N U0VKX-GP R90 9KRF-L-GP U_GN 0 - INT_MI_R U_MI_L U_MI_R 0 - U_HP_J# EXT_MI_J# U_MI_L U_MI_R 9 00P0VKX-GP 90 0UVMX-GP U_GN V_0 LOE TO PIN and P0VKX-GP INT_MI_R OMO_MI_R 9 00PVKX-GP 90 U0VKX-GP P# OMO_MI R90 0KRF--GP RN90 R90 KRJ--GP RN90 RNKJ--GP-U RN90 RNKJ--GP RNKJ--GP R99 0R00-P OMO_MI 90 0U0VKX-GP 0UVMX-GP U_GN 0-9 V_0 LOE TO PIN9 and 90 OMO_MI_Q U_GN INT_MI_L_R 9 MI_IN_L MI_IN_R K_EEP H_PKR MIV Ref voltage is.v becasue Vgs(th)concern cann't use N0 for desing 90 W--GP.000.Q nd =.000.K 0 - MI_GN 0-90 U0VKX-GP 9 TVL GP 0 - U_GN U_GN MIV U_GN OMO_MI_J# OMO_MI PM_LP_#,,, MP_MUTE# K_PWRTN#, Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. UIO OE(L) ize ocument Number Rev JE0_ Q90 Max Vgs(th).V G ate: Friday, pril 0, 0 heet 9 of 0 --GP R9 KRJ--GP R99 KRF-GP R9 0RJ--GP 9 U0VKX-GP 9 U0VKX-GP R9 0RJ--GP 99 U0VKX-GP G90 GP-LOE G90 GP-LOE 90 --GP.000.K N =.000.F

30 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. MP ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet 0 of 0

31 0 change to short pad V_ V_LN_ R0 0R00-P 0 V_LN_ UVKX-GP 0 change to short pad L0 VL_G 0R00-P UVKX-GP L0 GK00T-0Y-GP.00.0 nd =.00. L0 0R00-P 0 U0VKX-GP 0 U0VKX-GP PIE_RXP0 PIE_RXN0 PIE_TXP0 PIE_TXN0 V_LN_ GPHY_PLLV 9 UVKX-GP PIE_PLLV 0 UVKX-GP 0 UVKX-GP 0 U0VKX-GP 0 U0VKX-GP V_LN_ U0VKX-GP U0VKX-GP U0VKX-GP 0 09 U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP VL_G VL_G VL_G GPHY_PLLV PIE_PLLV PIE_RXP0 PIE_RXN0 0 U0VKX-GP V V 9 VL VL VL U0 V_LN_ 09- GPHY_PLLVL PIE_PLLVL 9 PIE_PLLVL PIE_TX_P PIE_TX_N PIE_RX_P PIE_RX_N VO/VIO VO/VIO VO/VIO VO_R 0 IVH XTLVH VH VH TR_N 9 TR_P 0 TR_N TR_P TR_N TR_P TR0_N TR0_P 0 LOW_PWR P00LE#_ERILO TRFFILE#_ERILI IV_G U0VKX-GP XTLV_G LN_V LN_V LOW_PWR 0 change to short padv_ln_ U0VKX-GP LN MI Off-Page MI- 9 MI+ 9 MI- 9 MI+ 9 MI- 9 MI+ 9 MI0-9 MI0+ 9 0M/00M/G_LE# LN_T_LE# IV_G 0 change to short pad U0VKX-GP R0 0RJ--GP XTLV_G L0 0R00-P L0 0R00-P 0 change to short pad L0 LN_V 0R00-P U0VKX-GP 0M/00M/G_LE# 9 LN_T_LE# 9 LN_FLH_I/EET M_#/EELK M_GPIO0 00- V_LN_ R0 KRJ--GP R M_GPIO0 0KRJ--GP V_LN_ R0 KRJ--GP VO_R R0 KRJ--GP R0 KRJ--GP R0 KRJ--GP U0VKX-GP V_0,,,, PLT_RT# _T0/X_0/M_0 _T/X_/M T/X_/M T/X_/M T/X_/M T/X_/M T/X_/M T/X_/M_ E0 E0 E0 E0 U0VKX-GP U0VKX-GP U0VKX-GP R 0R00-P 9 U0VKX-GP V_LN_0 _T0/X_0/M_0 _T/X_/M T/X_/M T/X_/M_ U0VKX-GP P0VJN-GP P0VJN--GP R 00RJ--GP V_LN_ V_LN_0 LN_XO_R X0 LN_XI,, PIE_WKE# PIE_LK_LN_REQ# R0 0R00-P R 0R00-P R 0R00-P R 0R00-P R 0R00-P R 0R00-P R 0R00-P R0 0R00-P XTL-MHZ-0-GP.000. N = R =.000. LK_PIE_LN LK_PIE_LN# R KRJ--GP R LN_X0 00RF-L-GP LN_RT M_R_T0 M_R_T M_R_T M_R_T M_R_T M_R_T M_R_T M_R_T VMINPRNT R KRJ--GP M_TET R KRJ--GP M_TET P0VJN--GP L=pF Freq tolertance:+/-0ppm LN_R R9 KRF-GP WKE# LK_REQ# PERT# PIE_REFLK_P 0 PIE_REFLK_N R_T0 R_T R_T R_T R_T R_T R_T R_T 0 9 XTLO XTLI VMIN_PRNT TET TET R MX0KMLG-GP..M0 GN 9 JE0-HR change to version P/N:..M0 GPIO_LR_OUT GPIO_0 LK_P000LE# I_EET O_LINKLE# #_EELK _ETET/X_WE# R_ILE/X_ETET# M_IN#/X_E# GPIO_/MEI_ENE/X_RE# 9 R_WP#/X_WP# R_LE/R_U_PWR/X_LE 0 R_LK/X_RY_Y# R_M/X_LE 9 R_LX R_VF R_VP R_V M_GPIO0 M_000LE# LN_FLH_I/EET M_LINKLE# M_#/EELK M /X_WE# M_X_# M_X_E#/M_IN# M_X_R/ M_X_LE V_LN_ 0M/00M/G_LE# 0M/00M/G_LE# M_X_RE# R 0R00-P V_R_0 VO_R X_RE# R X_WP#/_WP# M_X_LE R 0RJ--GP 0R00-P X_LE.R0.0 V_LN_ nd =.R.0E rd =.R0.0P L0 V_LN R IN-UH-9-GP UVKX-GP V_LN_ 0 change to short pad TP0 R09 0R00-P R 0R00-P R 0R00-P R 0R00-P R 0R00-P R 0R00-P R 0R00-P U0VKX-GP U0VKX-GP 0 0UVKX-GP E0 U0VKX-GP _/X_WE# X_# UVKX-GP X_E#/M_IN# _LK/X_R/# _M/X_LE/M_ 09- LOW_PWR LOM 0 change to short pad R 0R00-P X_LE 000 V.9 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev JE0_ U0VKX-GP for version version can't use LO 09- ate: Friday, pril 0, 0 heet of 0

32 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. RT ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

33 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

34 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

35 V_0 U0_TXP U0_TXN U0_RXP U0_RXN 0 U0VKX-GP TX+_ 9 TX-_ 0 0 U U0VKX-GP 0 U0VKX-GP RX+_HU_ U RX-_HU_ 0 U U0VKX-GP I_EN U V_0 U0 _INP _INN GN _OUTP _OUTN I_EN GN _E _EQ0 _E0 _EQ TET_U _E/N# _EQ0/N# _E0/L_TL _EQ/_TL V_0 TET V V _EQ0/N# _E0/I_R0 _EQ/I_R P# _E/N# P0TQFNGTR--GP _OUTP _OUTN GN 0 _INP 9 _INN REXT U0_REXT R KRF-GP U0_TXP_R U0_TXN_R U0_RXP_R U0_RXN_R Note: REXT can be left open with default swing setting U 0 U0VKX-GP U 0 0UVKX-GP U _E0 _E _E0 _E _EQ0 _EQ _EQ0 _EQ TET_U I_EN V_0 R0 KRJ--GP R0 KRJ--GP R0 KRJ--GP R0 KRJ--GP V_0 R KRJ--GP R09 KRJ--GP U R0 KRJ--GP R KRJ--GP U R0 KRJ--GP R0 KRJ--GP U _EQ0 _E0 _EQ _E,9,9 T T L R0 0RJ--GP R0 0RJ--GP _EQ _E0 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

36 V_0 V_ U09 G O-GP.0.0 nd =.00.0 RUN_ENLE_ 09 V_0 V_0 V_ U0 G O-GP.0.0 nd =.00.0 V_ U0 G O-GP.0.0 nd = ,,,9,,,9 if have use Reset I tied to Pure_HW_shutdown have to take care R and R value _RT# H_PUPWRG_E R KRJ--GP 00- R0 KRJ--GP H_PWRG_R 0 U0VKX-GP E Q0 MMT--GP.0.V nd =.0.R H_THERMTRIP#,, V_0 U0 O0-GP RUN_ENLE_HV 09 V_ V_V_EN R0 00KRJ-L-GP R0 KRF--GP 0 --GP.000.K N =.000.F _ENLE,9 PURE_HW_HUTOWN#,.00. V_ U0 G RUN_ENLE_ 0- V EN PM_LP_#,,9, GN V_0 HV V_0 G9TLU-GP.09.09P V_0 0 change to short pad R0 0R00-P RUN_ENLE_HV 09 0U0VKX-GP UVKX-GP V_ U0 V GN HV EN V_0 V_0 RUN_ENLE_HV 09 G9TLU-GP.09.09P Power equence V_0 V_ V_0 0 0 R 0KRJ--GP,,9, PM_LP_# 0 W--GP R 0KRJ--GP R9 0KRJ--GP FR,,9, PM_LP_# V_PGOO Q N =.000.G 0 R =.000.K W--GP 0 --GP.000.K N =.000.F R0 0R00-P 0 change to short pad UVKX-GP 0- VORE_EN, V_0_PWRG, V PWRG V PWRG VRM_V_PWRG VRM_V_N_PWRG.000.Q N =.000.G R =.000.K 0 W--GP RUNPWROK_ R0 FH_PWRG 0R00-P.000.Q N =.000.G R =.000.K 0 W--GP confrim Intersil by FE,don't need L/.000.Q N =.000.G R =.000.K Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Power On Logic ize ocument Number Rev ustom JE0_ Friday, pril 0, 0 ate: heet of 0

37 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

38 daptor in to generate TOUT IN NP NP E-ON--GP 0.F0.00 N = 0.F.00 Pin= P0 U0VKX-GP _OFF K 0 - _JK R R.00.KK N =.000.0K PWR_+_ PR0 00KRJ--GP + 0 PMJPT-GP.PM.G nd =.PM.JG rd =.PM.G K 0 PMJPT-GP.PM.G nd =.PM.JG rd =.PM.G PQ0 PQ0 E PWR_JK_EN R R PTEU--GP LT0EU-F-GP.000.K nd =.00.HK rd =.0.0 P0 U0VZY--GP PR0 00KRF-L-GP P0 U0VZY--GP PU0 G P0EV-GP.P0. nd =.00.F Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. IN_JK ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

39 T+ TTERY ONNETOR P90 U0VKX-GP P90 00P0VKX-GP 0 change to short pad 0 TT_ENE PR90 0R00-P 9 T,0,0 T_IN# T_L T_ E Protect K P90 MMPZPT-GP-U PN90.R0.F nd =.R0.KF rd =.R0.QF RNJ--GP P90 000P0VJN-GP-U T+ T_IN#_ T_L_ T P90 0P0VJN-GP 0 P90 0P0VJN-GP LP-ON--GP-U N = rd = Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. TT_ONN ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet 9 of 0

40 + NER PU00 G P0EV-GP.P0. nd = _G_ +_TO_Y PR0 PR0 9K9RF-L-GP 0KRF--GP PR0 00KRJ--GP +_G_ harge diff + K + total power R R w k 9.9k 90w k 9.9k +_TO_Y P00 00GPT-GP.0000.F nd =.00.F PR0 0RJ--GP 0- V ZENR PWR_HG_REF W_Q 90W_Q PR009 PR00 KRF-GP KRF-L-GP + total power R R 0w k 9.9k PR00 0RF-GP-U PG00 GP-LOE-PWR--GP PR0 0KRJ--GP PG00 GP-LOE-PWR--GP TOUT + PU00 G P0EV-GP.P0. PR00 nd = KRJ--GP T+ K P00 MFTG-GP.MF.0H N =.MF.H 00 LM9_IN+ LM9_OUT PQ00 N00KW-GP.N0.F nd =.M0.0F _IN OK V_UX_ HG_GN PR0 KRJ--GP _I harge diff V_UX_ V_UX_ P0 0U0VKX-GP harge diff 0- R PR00 PR0 0KRF--GP KRF-GP PR0 W KRF-L-GP 90W PR0 0RJ--GP TOP_HG# TOP_HG# R V_UX_ to K GPIO PR09 0-9K9RF-L-GP P0 0U0VKX-GP P0 IL UVZY-GP HG_GN IL Use GN IN+ IN+ IN- IN- OUT OUT V PR00 9K9RF-L-GP P00 0U0VKX-GP R PR0 PR0 TOP_HG# 0RJ--GP 0RJ--GP TOP_HG# IL use.00.l harge diff harge diff + P00 0- PR00 P00 P00 R 0RJ--GP U0VKX-GP U0VKX-GP PWR_HG_P PR00 harge diff P00 KRF--GP HG_GN 0U0VKX-GP HG_GN harge diff HG_GN harge diff PU00 0- Wayne PR0 RJ--GP 00- PWR_HG_IN IN P 0- IL PWR_HG_IN IN PWR_HG_N N PWR_HG_IOUT PR0 TOP_HG# P009 VM IOUT 0RJ--GP K UVKX-GP Q PWR_HG_OOT P00 OOT PWR_HG_VP H0-0PT-GP 09 - _OK PWR_HG_OK VP PR0.R00.0F P00 0R00-P OK nd =.R00.IF U0VKX-GP PWR_HG_UGTE UGTE,9 T_L 0 L PWR_HG_PHE P0 PHE U0VKX-GP HG_GN,9 T_ 9 PWR_HG_LGTE LGTE 0 N# PGN 9 PWR_HG_OP HG_GN OP PWR_HG_ON P0 PWR_HG_VIM ON VIM P00 PR0 0KRJ--GP PWR_HG_FO_R 0P0VJN-GP harge diff Q PR0 PWR_HG_FO 00KRF-L-GP PWR_HG_EI Q PWR_HG_EO P0 PWR_HG_REF 00P0VKX-GP PWR_HG_E PWR_HG_REF_R Q PR0 P0 KRF--GP U0VKX-GP Q P0 Q P0VJN-GP Q P0 0U0VKX-GP P0 0U0VKX-GP 0- IL UVKX-GP FO EI EO VREF E GN QRHR-GP IREF PWR_HG_IREF.. harge diff N# 9 GN Replace part -->.. HG_GN PR0 00RJ--GP VF VF TT_ENE 9 0- harge diff P0 UVZY-GP PL00 T+_R IN-UH--GP Wayne HG_GN PR0 RJ--GP PWR_HG_OP_R harge diff WYNE TOUT 0- for RF IL Use HG_GN Friday, pril 0, 0 ate: heet of 0 0 U0VKX-GP P0 U0VKX-GP Q G PU00 QM00M-GP.00.0 nd =.0. P00 UVZY-GP T+_PG F0 UVZY-GP 000-WYNE PR00 0RJ--GP IL use.00.l harge diff P0 U0VKX-GP JE0_ P00 0UVKX-GP F0 P0VJN-GP.R.0K nd =.R0.0 T+ 0- HG_GN HG_GN PR0 0R00-P PU00 LM9R-GP.009.H PR0 PQ00 HG_GN V_UX_ 00KRJ--GP PWR_HG_E PWR_HG_E 0 _OK HG_ON# HG_ON# PWR_HG_REF _IN# U0VKX-GP PR09 N00KW-GP F,, ec., Hsin Tai Wu Rd., Hsichih, 0KRF--GP _OK.N0.F P0 Taipei Hsien, Taiwan, R.O.. Q nd =.M0.0F U0VKX-GP PWR_HG_VP HG_GN _IN# to K PR00 HRGER Q 0-00KRJ--GP ize ocument Number Rev IL 0- ustom G PU00 QM00M-GP.00.0 nd =.0. 0UVKX-GP P00 PG00 PR0 0RF-GP-U GP-LOE-PWR--GP PG00 GP-LOE-PWR--GP P0 0UVKX-GP F0 00P0VKX-GP P09 0UVKX-GP P0 0UVKX-GP P0 U0VKX-GP Wistron orporation

41 G G G G 0 change to short pad 0 change to short pad TOUT PWR_V_TOUT V_ V_PWR TOUT PWR_V_TOUT PG GP-LOE-PWR--GP PG PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG9 GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP PG GP-LOE-PWR--GP V_V_EN PR0 0R00-P V_UX_ PR0 00KRJ--GP 0 change to short pad PWR_VV_ENTRIP PWR_V_ENTRIP PR KRF-GP 0- by Wayne P09 P0VJN--GP PQ0 N00KW-GP.N0.F nd =.M0.0F PR0 KRF-GP PWR_VV_ENTRIP 0- by Wayne PWR_V_ENTRIP P P0VJN--GP TOUT PR 00KRF-L--GP TOUT_UVP_ PR 0KRF-L-GP PQ0 N00KW-GP.N0.F nd =.M0.0F PWR_VV_ENLO TOUT_UVP_ TOUT Vz=.9V UVP Function TOUT<.V /V disable K P0 MMPZPT-GP.R90.F PR 0KRF-GP PR 9KRF-GP GP-LOE-PWR--GP PG9 GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP PG GP-LOE-PWR--GP PT0 TUVM--GP V_PWR V_ PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG F0 F0 P UVKX-GP UVKX-GP V_PWR P U0VKX-GP..L nd =..00L U0VKX-GP PT0 T0UVM-GP V_UX_ PG 00WYNE PWR_V_TOUT GP-LOE-PWR--GP PWR_VV_VREG 09-.R.0J nd =.R0.0 PL0 IN-UH--GP PWR_V_VOUT P UVKX-GP PG GP-LOE-PWR--GP PR K9R-GP P 0UVKX-GP PU.00.0 QM00M-GP nd =.0. G P UVKX-GP P9 PWR_V_VOOT_ PR0 PWR_V_OOT 0RJ-0-U-GP UVKX-GP PWR_V_UGTE PWR_V_PHE PWR_V_LGTE PWR_V_F PU QM00M-GP V_UX_ PG PWR_VV_VREG G GP-LOE-PWR--GP P V_V_POK UVKX-GP PWR_V_ENTRIP.00.0 nd =.0.0 PWR_V_ENTRIP RT9ZQW-GP-U V_ PU0 ENLO LO VIN 9 OOT OOT UGTE UGTE 9 PHE PHE LGTE 0 LGTE F F 0 YP.09. LO EF PGOO ENTRIP TON ENTRIP GN PR0 00KRF-L-GP PWR_VV_ENLO TOUT TOUT P0 UVKX-GP PWR_V_OOT PR PWR_V_VOOT_ 0RJ-0-U-GP PWR_V_UGTE PWR_V_PHE PWR_V_LGTE PWR_V_F PWR_V_VOUT PWR_VV_ENM/EF PWR_VV_TON GP-LOE-PWR--GP PG9 GP-LOE-PWR--GP 00WYNE P0 0U0VKX-GP PWR_V_TOUT.00.0 nd =.0. PU09 QM00M-GP G G PL0 IN-UH--GP.R.0J nd =.R0.0 PU QM00M-GP.00.0 nd =.0.0 PR 00KRF-L-GP 0 change to short pad P P P PWR_V_VOUT UVKX-GP PR KRF-GP 0- Wayne 00WYNE PR0 0R00-P V_UX_ PR 0KRF--GP 0UVKX-GP 0UVKX-GP U0VKX-GP PG GP-LOE-PWR--GP F0 F0 UVKX-GP P U0VKX-GP V_PWR PT0 T0UVM-GP..L nd =..00L PR9 0KRF--GP V_V_POK PR 00KRJ--GP 0 PR 0RJ--GP V_UX_ Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. RT9 ize ocument Number Rev JE0_ Friday, pril 0, 0 ate: heet of 0

42 TOUT TOUT_V_ORE PG 0 change to short pad GP-LOE-PWR--GP PG 00WYNE TOUT_V_ORE GP-LOE-PWR--GP PG9 GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PT TUVM--GP 00- for layout issue 0 change to short pad TOUT TOUT_V_ORE PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP 00- for layout issue 00WYNE 0-0-avid PU_VN_RUN_F_L PU_VN_RUN_F_H PU_VN 00WYNE PU_VN_RUN_F_R PR0 KRF--GP 009 Wayne V_ VRM_V_N_PWRG PU_V_R H_PUPWRG PU_V_R, VORE_EN VRM_V_PWRG V_ PU_PROHOT#_VIO confrim Intersil by FE,don't need L/ PWR_V_ORE_F_R 009 PR0 K0RF-GP PU_V_RUN_F_H PU_V_RUN_F_L 0-avid 00-avid PR0 00KRF-L-GP PR 00KRF-L-GP PWR_V_ORE_NT_R PR KRF-GP 009 PR KRF--GP 000 Wayne P PR0 0RF-L-GP PR0 0RF-L-GP P0 0P0VKX-GP P0 00P0VJN-GP PR K0RF-GP 0P0VKX-GP P P0VJN-GP PU_V 009 Wayne PR0 KRF-GP PR0 KRF-GP P0 KP0VJN-GP PR0 RF-GP PR PWR_V_ORE_NT NT-0K-9-GP P0 KP0VJN-GP PU_VN_RUN_F_ PWR_V_ORE_IEN_N 0 change to short pad PWR_V_ORE_F_N PWR_V_ORE_OMP_N PWR_V_ORE_VW_N PR 0R00-P VRM_VN_PWRG PR0 0R00-P PWR_V_ORE_V PR 0R00-P PWR_V_ORE_PWROK PR 0R00-P PWR_V_ORE_V 9 0 PWR_V_ORE_PRO_HOT PR 0R00-P 0 change to short pad PR9 KRF-GP PR KRF-GP P0 KP0VJN-GP P0 0P0VKX-GP P KP0VJN-GP PR0 RF-GP PR KRF--GP PWR_V_ORE_F_ P KP0VJN-GP PWR_V_ORE_VW PWR_V_ORE_OMP PWR_V_ORE_F PWR_V_ORE_IEN PWR_V_ORE_IEN PWR_V_ORE_IEN PWR_V_ORE_IEN PWR_V_ORE_IEN VUM- VUM- P09 0P0VKX-GP V_ 00WYNE PU0 F_N F_N OMP_N VW_N PGOO_N V PWROK V ENLE PGOO PRO_HOT NT P 009 Wayne P0VJN-GP 0- Wayne P UVKX-GP PR 0RF-L-GP PR 0RF-L-GP P 0P0VKX-GP P KP0VJN-GP 0- P9 U0VKX-GP PR 9RF--GP PWR_V_ORE_IUMN_N PWR_V_ORE_NT_N PWR_V_ORE_PROG PWR_V_ORE_IUMN PR KRF-GP VW OMP F IEN/F IEN IEN VEN RTN IUMN IUMP V VIN 9 0 P0 0UVKX-GP GN 9 IEN_N IEN_N VEN_N RTN_N IUMP_N IUMN_N NT_N PROG OOT_N 0 UG_N 9 PH_N LG_N ILHRTZ-T-GP.0. PWR_V_ORE_VIN PWR_V_ORE_V P U0VKX-GP PR KRF-L-GP PWM_N OOT UG PH LG VP PWM LG PH UG OOT PROG P UVKX-GP PR KRF--GP PWR_V_ORE_IUMP_N PWR_V_ORE_IUMP_N_R 000 Wayne 0- Wayne P 0P0VKX-GP P PR KRF--GP P U0VKX-GP 0 9 PWR_V_ORE_OOT_R PWR_V_ORE_OOT PWR_V_ORE_UG PWR_V_ORE_PH PWR_V_ORE_LG PWR_V_ORE_VP PWR_V_ORE_PWM PWR_V_ORE_LG PWR_V_ORE_PH PWR_V_ORE_UG PWR_V_ORE_OOT PWR_V_ORE_PROG PWR_V_ORE_OOT_R PWR_V_ORE_IUMP PWR_V_ORE_NT_N_R PR KRF-GP 009 PWR_V_ORE_UG PWR_V_ORE_PH PWR_V_ORE_OOT_N PWR_V_ORE_UG_N PWR_V_ORE_PH_N PWR_V_ORE_LG_N PWR_V_ORE_LG P0 UVKX-GP PWR_V_ORE_PH P UVKX-GP PWR_V_ORE_PH 0 change to short pad TOUT_V_ORE PR 0R00-P 000 Wayne P 0UVKX--GP 000 Wayne PR R--U-GP PR R--U-GP P UVKX-GP UVKX--GP 009 PR V_ RF-GP 00WYNE PR KRF-L-GP PR KRF--GP PR9 0R00-P V_ PWR_V_ORE_PH PWR_V_ORE_IUMP_R P U0VKX-GP PU0 FM0-GP.00.0 / 9 00-WYNE PWR_V_ORE_UG PWR_V_ORE_LG PR NT-0K-9-GP PR KRF-GP Q G G 00WYNE 0 change to short pad PR 0R00-P P UVKX--GP 00-WYNE PHE PU0 FM0-GP.00.0 / 9 Q G G Q PWR_V_ORE_PROG PWR_V_ORE_NT_N PU0 FM0-GP.00.0 / 9 PHE Q Q G G PU0 FM0-GP.00.0 / 9 PR09 KRF-GP 000 Wayne PHE Q G G Q PHE P 0UVKX-GP Q yntec 0.uH R=.0mohm Idc=0, Isat=0 PWR_V_ORE_IEN PWR_V_ORE_IUMP VUM- PR NT-0K--GP Place close to PL0 VUMG- VUMG- 009 PR0 NT-0K--GP Place close to PL0 VUM- P 0UVKX-GP PG GP-LOE-PWR--GP PH PWR_V_ORE_IEN PH PL0 IN-UH-9-GP nd =.R0.0M.R0.0 PWR_V_ORE_IEN PWR_V_ORE_IUMP P 0UVKX-GP VO PR 0KRF--GP 00WYNE P 0UVKX-GP yntec 0.uH R=.0mohm Idc=0, Isat=0 PL0 IN-UH-9-GP GP-LOE-PWR--GP PG P 0UVKX-GP PR KRF-GP PR RJ-GP PR 0KRF--GP VO P 0UVKX-GP PWR_V_ORE_IEN F0 UVKX-GP Iomax= peak current> Iomax= OP> PT0 E0UFVM-GP 000- Wayne PH 000 Wayne VO TOUT_V_ORE P 0UVKX-GP nd =.R0.0M.R0.0 PG PG GP-LOE-PWR--GP GP-LOE-PWR--GP PH 000 Wayne VO PU_V 000- Wayne PR 0KRF--GP PR9 KRF-GP PR RJ-GP PR0 0KRF--GP F0 UVKX-GP P 0UVKX-GP PT0 E0UFVM-GP PT0 E0UFVM-GP F0 UVKX-GP PT0 E0UFVM-GP PT0 E0UFVM-GP PU_V PT0 E0UFVM-GP F0 UVKX-GP Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. VREG : +V_ORE ize ocument Number Rev ustom JE0_ Friday, pril 0, 0 ate: heet of 0

43 G G TOUT TOUT_VN PG0 0 change to short pad GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP PG0 TOUT_VN 00wayne 00WYNE GP-LOE-PWR--GP 00- for layout issue PWR_V_ORE_UG_N PWR_V_ORE_PH_N PWR_V_ORE_LG_N Id=. Qg=9.~n Rdson=~mohm.N0. N = nd =.00.0 PU0 RMW0N0FUT-GP PU0 RW0N0-GP P0 0UVKX-GP yntec 0.uH R=.0mohm Idc=0, Isat=0 P0 0UVKX-GP PG0 GP-LOE-PWR--GP P0 0UVKX-GP P0 PL0 IN-UH-9-GP.R0.0 N =.R0.0M 0UVKX-GP PG0 GP-LOE-PWR--GP F0 UVKX-GP PU_VN 000- Wayne PT0 E0UFVM-GP F0 UVKX-GP PT0 E0UFVM-GP Panasonic 0uF V, ER=9 mohm Iomax= peak current> Iomax= OP> PH_N VN Id=. Qg=0.~n Rdson=.~.mohm PWR_V_ORE_OOT_N PR0 PWR_V_ORE_OOT_N_R R--U-GP 009- P0 UVKX-GP PWR_V_ORE_PH_N PWR_V_ORE_IEN_N PWR_V_ORE_IUMP_N PR0 0KRF--GP 000 Wayne PR0 PH_N KRF--GP VUMG- PR0 0RF-L-GP VN Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. VREG : +V_N ize ocument Number Rev JE0_ Friday, pril 0, 0 ate: heet of 0

44 0 change to short pad TOUT 0 change to short pad PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PWR_TOUT_V 00- for layout issue GP-LOE-PWR--GP PG PT0 TUVM--GP 0V_0, PM_LP_# lose to pin PWR_TOUT_V V_PWR 0 change to short pad lose to pin PR0 0R00-P V PWRG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG9 V_PWR 0 change to short pad PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP 00WYNE PWR_V_EN PR PWR_V_TON 0KRF-GP PWR_V_EN R_VREF_PWR R_VREF_PWR V_ 00 - PWR_0V_EN PWR_V_VTTIN PWR_V_VQ lose to output cap pin, not inside of the output cap +0.V Iomax:. PG P09 0UVMX-GP GP-LOE-PWR--GP P0 0UVMX-GP P0 U0VKX-GP P0 0UVMX-GP PR0 0KRF--GP P0 RT0L for V KP0VKX-GP PWR_V_V PR0 9KRF-GP PWR_V_ 0 POK N# VTTIN VTT VTTN 00WYNE,,9, PWR_V_VTTREF PV VTTREF PWR_V_VP UGTE nd =.00. N# VTTGN MOE PGN GN V.0.0 PU0 OOT PHE LGTE VQN VQET PM_LP_# 0 9 PGN _GN OMP 9 UPPQG-GP PWR_V_OOT PWR_V_UGTE PWR_V_PHE PWR_V_LGTE PWR_V_VQ PWR_V_F PR0 0R00-P V_ 00 - V_ 00 - R R V_ 00 - PR0 R--U-GP PR0 R_VREF_ 0R00-P 0 change to short pad P0 0UVKX-GP PR0 RF-GP P0 U0VKX-GP P0 U0VKX-GP lose to PIN9 PWR_0V_EN PWR_V_PHE_L 0 change to short pad PR0 0R00-P PR0 0KRF-GP PR09 0KRF-GP P0 P0VJN--GP P0 UVKX-GP Id=. Qg=9.~n Rdson=~mohm Id=. Qg=0.~n Rdson=.~.mohm PWR_TOUT_V 00wayne G G PU0 RMW0N0FUT-GP PU0 RMW0N0FUT-GP 00WYNE 0UVKX-GP.N0. nd =.00.0 P0 0UVKX-GP P.00.0 nd =.00.0 P UVKX-GP F0 UVKX-GP Mag. 0.uH 0*0* R=.~.mohm Idc=0, Isat= PL0 IN-UH-9-GP V_PWR V_ V_PWR nd =.R0.0Q.R0.0J Vout=0.*(+R/R) PG GP-LOE-PWR--GP PG09 GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG F0 UVKX-GP GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP V_PWR Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. RT0L (V_/0V_0) ize ocument Number Rev ustom JE0_ PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP Iomax= OP>. Matsuki cap 90uF.V, ER=0 mohm.φ.l Friday, pril 0, 0 ate: heet of 0 P PT0 E90UVM-GP 000- Wayne UVKX-GP nd = 9.9V.L 9.9V.0L

45 PL9 for VR&VP(V_0) 0 change to short pad V_PWR PG V_0 V_0_PWRG, VORE_EN 000 V. for R board V_ PR0 00KRJ--GP 0 change to short pad PR0 0R00-P PWR_V_G PR0 0R00-P P UVKX-GP V_ 0 change to short pad PWR_V_EN PR0 0R00-P PWR_V_VNTL P0 U0VKX-GP PU0 POK EN VNTL PWR_V_VIN R PWR_V_F R PR0 0KRF-GP 0 change to short pad V_ P0 0UVMX-GP Iomax= OP>9 V_PWR GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG9 GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP PG GP-LOE-PWR--GP GN VIN VIN 9 VOUT VOUT F PL9KI-TRL-GP.09.0 P0 0UVMX-GP P0 0UVMX-GP PR0 KRF-GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG GP-LOE-PWR--GP P0 00P0VJN-GP P0 0UVMX-GP PT0 T0U0VM-GP Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PL9(V_0) ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

46 E 0 hange to short pad 0 hange to short pad V_PWR V_ TOUT PWR_TOUT_V RT for V_ PG0 PG09 GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP PG GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP GP-LOE-PWR--GP PWR_TOUT_V 00WYNE.00.0 PR0 P0 00KRJ--GP PU0 PR0 UVKX-GP nd =.0. V_PWR PWR_V_TON PWR_V_OOT PWR_V_OOT_R TON OOT 0RJ-0-U-GP nd =.R0.0 PWR_V_UGTE PL0 V UGTE 0 hange to short pad.r.0j PWR_V_PHE PHE PWR_V_LGTE, V PWRG 9 IN-UH--GP PR0 PGOO LGTE 0 by edwin 0R00-P PWR_V_EN PWR_V_F 00WYNE P PWR_VV_EM EN F PT0 for power sequency PR P0 P0 MOE E90UVM-GP KRF-L-GP U0VKX-GP PWR_V_O GN Wayne V_ GN PR0 RTGQW-GP PU 0R00-P PR0.0.0 QM00M-GP 0KRJ-GP 9.9V.0L P 0 hange to short pad PWR_V_F nd = 9.9V.L 0UVMX-GP PR0 0KRJ--GP PWR_V_EN_R V_ V_ PWR_TOUT_V V_ 00WYNE Freq=0KHz 00WYNE Id= Qg=.~n Rdson=~0mohm G G P P 0UVKX-GP Mag.** R=0mohm, Irating= Isat=. P P9 UVKX-GP Iomax= OP> Matsuki cap 90uF.V, ER=0 mohm.φ.l P9 00P0VKX-GP Vout=0.*(+R/R) P0 U0VKX-GP PR0 00KRF-GP G.00.0 nd =.0. G PU QM00M-GP UVKX-GP PR 0KRF--GP UVKX-GP P0VJN--GP F0 UVKX-GP F0 UVKX-GP UVKX-GP V_ do not ramp up before the V_ Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. RT (V_) ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0 E

47 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

48 V_ hange to short pad V_ PR0 0R00-P RT90 for V_0 0 hange to short pad V_PGOO 0 hange to short pad PR09 V_0 0R00-P V_0 P09 0UVMX-GP PR 00KRJ--GP PWR_V_EN P U0VKX-GP PR0 0R00-P PWR_V_PGOO PWR_V_V PU0 NTL VIN EN POK 00wayne Vo(cal.)=.V PR0 0KRF-L-GP PWR_V_J PR KRF-GP V_PWR Iomax>0. PG0 GP-LOE-PWR--GP PG0 GP-LOE-PWR--GP V_0 P0 U0VKX-GP GN 9 N# VOUT F GN UP00RW-GP P0 00P0VJN-GP P 0UVMX-GP P0 0UVMX-GP Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. RT90(V_0) ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

49 U0_TXP0_R U0_TXN0_R U0_RXP0_R U0_RXN0_R LV V EP o-layout ONNETOR(0 Pin) 0 Remove U IPEX-ON0-GP L NP NP P-ON0-GP 0.F.00 TOUT_L N = 0.F0.00 _EN_ LON_OUT_ L_RIGHTNE P_UXP_PU_ P_UXN_PU_ P_TXP0_PU_ P_TXN0_PU_ 09 - U0_TXP0_R U0_TXN0_R U0_RXP0_R U0_RXN0_R V_MER_0 R90 EP 0RJ--GP R90 RJ--GP V_MER_0 For amera GN V_0 LV_LK 9,9 LV_LK# 9,9 R90 LV 0RJ--GP R90 LV 0RJ--GP R90 LV 0RJ--GP R90 LV 0RJ--GP LV_T0 9,9 LV_T0# 9,9 LV T 9 LV LK 9 0 hange from port to port0 L90 FILTER--GP L90 FILTER--GP INT_MI_L_RR 90 U0VKX-GP INT_MI_L_RR P_HP0_,9 L_KLT_TRL 9,0,9 MI_GN LV LV_T 9,9 LV_T# 9,9 LV_T 9,9 LV_T# 9,9 U0_TXP0 U0_TXN0 U0_RXP0 U0_RXN0 V_0 0 - R9 00KRJ--GP R9 00KRJ--GP E90 MLVG000NV0P-GP-U 90 UVKX-GP R99 00KRJ--GP R9 00KRJ--GP 0 R9 R9 0RJ--GP R9 0RJ--GP R9 0RJ--GP INT_MI_L_R 9 V_0 0- P_UXP_PU_ P_UXN_PU_ P_UXP_PU_ P_UXN_PU_ MI_GN 9 0 Remove U.0 0 hange from port to port0 0 hange from port to port0 99 U0VKX-GP TX+_ 9 TX- INP 0 9 U0VKX-GP _INN 9 U0VKX-GP RX+_HU_ GN RX-_HU OUTP 9 U0VKX-GP I_EN _OUTN I_EN GN 90 U0VKX-GP U0_TXP0 U0_TXP0_R U0_TXN0 U0_TXN0_R 9 U0VKX-GP RN90 RN0J--GP U0_RXP0 U0_RXP0_R U0_RXN0 U0_RXN0_R U90 _E _EQ0 _E0 _EQ TET_U L90 FILTER--GP _E/N# _EQ0/N# _E0/L_TL _EQ/_TL V_0 TET V V _EQ0/N# _E0/I_R0 _EQ/I_R P# _E/N# P0TQFNGTR--GP _OUTP _OUTN GN 0 _INP 9 TOUT_L V_0 U_PN U_PP P_UXN_PU_ P_UXP_PU_ *For P0: V =.V P_TXN0_PU_ P_TXP0_PU_ INVERTER POWER V_0 amera Power V_MER_0 _E0 _E R909 KRJ--GP R90 KRJ--GP _E0 _E R90 KRJ--GP R9 KRJ--GP V_0 9 U0VKX-GP TX+_R U0_TXP0_R TX-_R U0_TXN0_R _EQ0 9 U0VKX-GP _EQ R99 KRJ--GP U0_RXP0_R R9 KRJ--GP U0_RXN0_R _EQ0 U0_REXT _EQ R9 KRJ--GP R9 KRJ--GP TET_U R90 Note: R9 KRJ--GP K99RF-L-GP REXT can be left open with default swing setting I_EN R9 KRJ--GP Pin ontrol Mode _INN REXT 90 UVKX-GP 90 KP0VKX-GP F90 FUE-V-GP-U N = EP EP EP EP 9 U0VKX-GP 90 U0VKX-GP 9 UVKX-GP 9 UVKX-GP F90 9 0UVKX-GP TOUT POLYW-V-GP-U nd = UVMX-GP 9 UVKX-GP 9 UVKX-GP 0 Remove U.0 P_UXN_PU 9 P_UXP_PU 9 P_TXN0_PU 9 P_TXP0_PU 9 V_0 _EQ0 _E0 _EQ _E, T, T L R9 0RJ--GP R9 0RJ--GP _EQ _E0 9,0,,9 LV_V_EN R9 00KRJ--GP 909 UVZY-GP LV U90 Layout 0 mil EN IN# GN OUT IN# 90 GTU-GP UVKX-GP.0.0F N =.09.09F 9,0,,9 L_KLT_EN V_0 LON_OUT 90 UVKX-GP R9 KRJ--GP R90 KRJ--GP LON_OUT_ R9 00KRJ--GP 90 00P0VJN-GP R9 0KRJ--GP R9 _EN_ RJ--GP R9 0KRJ--GP V_0 _EN Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. L/Inverter onnector ize ocument Number Rev JE0_ reserve for I mode ate: Friday, pril 0, 0 heet 9 of 0

50 9 RT_RE_R 9 RT_GREEN_R 9 RT_LUE_R RT_RE_R RT_GREEN_R RT_LUE_R RN00 RN0F--GP 0 0UVKX-GP V_RT_0 RT RG RT_T_ON RT_LK_ON 9 RT_VYN 9 RT_HYN RT_R RT_G RT_ 00 P0V-GP 00 P0V-GP 9 RT V_RT T_I LK_I RT_RE RT_GREEN RT_LUE VYN HYN -U---GP.00.0 L00 nd =.000. FM0F-0T0-GP.00.0 L00 nd =.000. FM0F-0T0-GP.00.0 L00 nd =.000. FM0F-0T0-GP 00 P0V-GP nd = N# N# GN GN GN GN GN 0 GN GN 00 0P0VJN-GP 00 0P0VJN-GP RT_IN#_R V_0 9 RT_R RT_G RT_ 00 0P0VJN-GP R00 0KRJ--GP RT_IN#_R T V_0 RN00 RNKJ--GP T V_0 Q00 RT_IN#_R 09 - V_RT_0 V99PT-GP-U RN00 RNKJ--GP RT_T_ON 00 V_0 0 - V_HMI 00m 00 HH-0PT-GP.R00.F nd =.R00.HH rd =.R00.0F RT_E# R00 0RJ--GP RT_IN#_R 00 00P0VJN-GP 9 LK LK RT_T_ON RT_HYN RT_VYN RT_LK_ON N00KW-GP.N0.F nd =.M0.0F RT_LK_ON 00 00P0VJN-GP 009 P0VJN--GP 00 P0VJN--GP 0 00P0VJN-GP Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. RT onnector ize ocument Number Rev ustom JE0_ ate: Friday, pril 0, 0 heet 0 of 0

51 HMI ONN PU_HMI_LK# PU_HMI_LK PU_HMI_T0# PU_HMI_T0 PU_HMI_T# PU_HMI_T HMI Level hifter & ONNETOR RN0 RN0 RN09 UM_PX UM_PX UM_PX RN0J--GP RN0J--GP RN0J--GP HMI_LK_R_# HMI_LK_R_ HMI_T0_R_# HMI_T0_R_ HMI_T_R_# HMI_T_R_ HMI KT-HMI9P--GP-U.09. nd =.09.0 rd =.09. th =.09. _LK_HMI _T_HMI HMI_T_R_ HMI_T_R_# HMI_T_R_ HMI_T_R_# HMI_T0_R_ HMI_T0_R_# HMI_LK_R_ HMI_LK_R_# V_HMI 0 U0VKX-GP V_HMI F0 V_VG_0 V_0 FUE-V-GP-U nd = V_ V_0 V_ PU_HMI_T# PU_HMI_T 0- RN0 UM_PX RN0J--GP lose to HMI onnector HMI_T_R_# HMI_T_R_ HP_HMI_ON I R 0RJ--GP HMI_HP_PWR R 0RJ--GP UM_PX U0 V_ V_ UM_PX HMI_LK# HMI_LK HMI_T0# HMI_T0 HMI_T# HMI_T HMI_T# HMI_T HMI_LK# HMI_LK HMI IRETE/ UM o-lay HMI_T0# HMI_T0 HMI_T# HMI_T HMI_T# HMI_T I I U0VKX-GP U0VKX-GP I U0VKX-GP I U0VKX-GP I U0VKX-GP I U0VKX-GP I U0VKX-GP I U0VKX-GP lose to VG chip V_0 G HMI_PLL_GN 0 - E Proceted:KV R 0RF--GP R 0RF--GP R 0RF--GP R 0RF--GP hecklist: uggestion to stuff 99-ohm for I P/N:.990.L Q0 N00K--GP.N0.J N =.N0.0 R 0RF--GP R9 0RF--GP R0 0RF--GP R 0RF--GP HMI_LK_R_# HMI_LK_R_ HMI_T0_R_# HMI_T0_R_ HMI_T_R_# HMI_T_R_ HMI_T_R_# HMI_T_R_ V Tolerance GPU_HMI_LK GPU_HMI_T UM_PX R HMI_HP_ 0KRJ-L-GP.090.L0 N =.090.P R0 00KRJ--GP I RN0 V_ RN0J--GP RN RN0KJ--GP V_0 Q0 PM90--GP HMI_ET R 0KRJ--GP 0 Leakage 0 HH-0PT-GP.R00.F nd =.R00.HH rd =.R00.0F RN0 RNKJ--GP _LK_HMI _T_HMI I R9 0RJ--GP R 0RJ--GP UM_PX confrim by NXP FE o not need PU Res, Reserve PU Res for debug furtur HMI_HP_ET P_HP PH_HMI_T_R PH_HMI_LK_R P_HP R0 P_HP_909 0RJ--GP UM_PX.090.L0 N =.090.P PH_HMI_LK_R _LK_HMI Q0 PM90--GP.090.L0 N =.090.P P_HP_R P_HP R0 KRJ--GP P_HP_R P_HP R0 KRJ--GP EN GN P909P-GP W _T_HMI _LK_HMI R 00KRJ--GP PH_HMI_T_R PH_HMI_LK_R PH_HMI_T_R _T_HMI Q0 PM90--GP Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. HMI Level hifter/onnector ize ocument Number Rev JE0_ Friday, pril 0, 0 ate: heet of 0

52 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

53 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

54 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

55 I = User.Interface H_PURT# use pull-up Resistor close ITP connector 00 mil ( max ), others place near PU side. ITP onnector PU TK(PIN ) ITP onnector TK(PIN ) FO(PIN ) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ITP ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

56 I = T T H onnector H T_TXP0 T_TXN0 T_RXP0 T_RXN0 V_0 0 0U0VZY-GP 09 0UVKX-GP 0 0UVKX-GP 0 0UVKX-GP 0 0UVKX-GP T_TXP0_ T_TXN0_ T_RXP0_ T_RXN0_ P P P P P 0 F0 P9 U0VKX-GP U0VKX-GP P P P V V V V V V V V V NP NP GN GN GN GN GN GN GN GN / NP NP P P P P0 P P KT-TP-P--GP-U.00.0 nd =.00. R =.00.H O onnector T_RX- and T_RX+ Trace Length match within 0 mil Following M routing table O V_0 V_ T_TXN T_TXP T_RXN T_RXP If support Zero Power O tuff R0,R,Q0 and R T0 and U0 R0 V_0 R0 0RJ--GP Non Zero O 0UVKX-GP 0UVKX-GP 0 0UVKX-GP 0 0UVKX-GP O_PWR_V T_TXN_ T_TXP_ T_RXN_ T_RXP_ P +V P +V NP NP NP NP M P P P GN GN GN GN P GN P GN GN KT-TP-P-9-GP-U nd =.000. T_O_#_ T_O_PRNT# R0 0KRJ--GP When the drive is powered on, the FET to the M/ pin drive is OFF. When the drive is powered off, the FET to the M/ pin is ON R0 0KRJ--GP Zero O O_PWRGT# Zero O Q0 N00K--GP.N0.J nd =.N0.0 T_O_PWRGT T_O_#_Q G R 0KRJ--GP R0 T_O_#_ 0RJ--GP T_O_#_Q Zero O G Q0 N00K--GP.N0.J nd =.N0.0 Zero O R0 0RJ--GP T_O_# O Q R 0RJ--GP FH integrated PU Zero O 9 T_O_PWRGT V_0 V_0 T0 0U0VZY-GP Zero O FH integrated PU R 0KRJ--GP U0 EN/EN# IN# IN# GN O# OUT# OUT# OUT# GIPU-GP.00.H9 Zero O urrent limit ctive High typ =>. 00 mil O_PWR_V T0 0U0VZY-GP H/O Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

57 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ET/U harger ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

58 I = UIO 0 change to short pad peaker onnector PK U_PK_R+ U_PK_R- U_PK_L+ U_PK_L- R 0R00-P R 0R00-P R 0R00-P R 0R00-P U_PK_R+_ U_PK_R-_ U_PK_L+_ U_PK_L-_ 9 9 MI_IN_L MI_IN_R MLVG000NV0P-GP-U E0 MLVG000NV0P-GP-U E0 MLVG000NV0P-GP-U E0 MLVG000NV0P-GP-U 0 change to short pad 9 EXT_MI_J# E0 000V. 0 - E-ON--GP-U 0.F.00 nd = 0.F.00 MI IN MIIN PHONE-JK0-GP hange to.0. at next stage 0KRJ--GP R0 0KRJ--GP R0 E0 E E.0. nd =.0. TP TP-GP U_GN 0 - MLV00M0--GP MLV00M0--GP 0 - MLV00M0--GP U_GN U_GN U_GN U_GN 0-9 U_HP_J# 9 U_HP_JK_R 9 U_HP_JK_L OMO_MI_RR LOUT RN0 RNKJ--GP 0 - U_GN U_GN E MLV00M0--GP U_GN E MLV00M0--GP U_GN E MLV00M0--GP 0 - U_GN E MLV00M0--GP U_GN UIO-JK-GP.00. nd =.00. Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. 9 OMO_MI R0 9RF-GP OMO_MI_RR udio Jack ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

59 E90 P0VN-GP MI0- E909 P0VN-GP MI0+ 90 U0VKX-GP XRF_T XRF_T MI+ MI- MI- GIG Lan Transformer XF90 T:T Tx ide T:T 0 RJ_ MT RJ_ RJ_ MT LN_T_LE# 0M/00M/G_LE# ONN_PWR ONN_PWR RJ_ RJ_ RJ_ RJ_ RJ_ RJ_ RJ_ RJ_ LN 9 0 E90 P0VN-GP MI- E90 P0VN-GP MI+ E90 P0VN-GP MI- E90 P0VN-GP MI+ E90 P0VN-GP MI- E90 P0VN-GP MI+ 09- for Vendor uggestion 90 U0VKX-GP 90 MI+ 00-WP MI+ U0VKX-GP XRF_T MI- MI0- XRF_T 90 MI0+ 00-WP U0VKX-GP 9 Rx ide XFORM-P--GP.H0.0 nd =.0.0 XF90 T:T Tx ide T:T 0 9 Rx ide XFORM-P--GP.H0.0 nd =.0.0 RJ_ 00-WP RJ_ MT RJ_ RJ_ MT RJ_ 00-WP V_ LN_T_LE# 0M/00M/G_LE# MLX-ON--GP 0.F0.0 N = 0.F0.0 RN90 ONN_PWR ONN_PWR RN0J--GP-U E90 00P0VJN-GP 90 KP0VKX-GP 90 E90 00P0VJN-GP MT MT MT MT V_ U90 TVLT00-GP V_ U90 TVLT00-GP R90 RJ-L-GP R90 RJ-L-GP MT_R 90 KPKVKX-GP KP0VKX-GP R90 RJ-L-GP R90 RJ-L-GP MI+ MI0+ MI- MI0- MT MT MT MT V_ U90 TVLT00-GP V_ U90 TVLT00-GP 09X9T0-GP GT 09X9T0-GP GT 09X9T0-GP GT 09X9T0-GP GT MI+ MI- MI+ MI- Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O for EMI LN_ONN ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet 9 of 0

60 PI FLH ROM (M byte) for K V_UX_ V_UX_ R00 00KRJ--GP RN00 RN00KJ--GP PI_HOL_0# U00 PI_0#_R PI_O_R R00 RJ--GP PI_O # V O/IO HOL# E_PI_WP# WP# LK PI_LK_R GN I/IO0 PI_I_R R00 0KRJ--GP MXL0EMI-G-GP.0.0 nd =.Q.00 E00 P0VN-GP PILK R R RJ--GP 00 0UVKX-GP 00 U0VKX-GP E00 P0VJN-GP E00 P0VJN-GP I = RTT 00 UVKX-GP 0 - RT_UX_ R00 0RJ--GP 0- for RT Leakage RT_PWR_ 00 V_UX_ HFPT-GP.R00. nd =.0000.E RT_PWR Width = 0 mils TP R00 0R00-P +RT_V +RT_V 0 - PWR GN NP NP NP NP RT T--T-0-P0-GP-U N = elete rd sourse Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Flash/RT ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet 0 of 0

61 V_ at least 0 mil, U_PWR_EN# 0 U0VKX-GP upport U0 GN OUT# IN# OUT# IN# OUT# EN/EN# O# GEPU-GP nd = at least 0 mil 0 U0VKX-GP V_U_ T0 E00UVM-GP 9.0.L Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. U Power W ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

62 0 hange from port to port U0_TXP_R U0_TXN_R 0 0 UVKX-GP U U U0_TXP_ U0_TXN_ FILTER--GP 0 - UVKX-GP L0 V_U_ U0_M U0_P U0_RXP_R FILTER--GP L0 FILTER--GP 0 9 U HI HI HI HI KT-U--GP-U U0_RXN_R L0 U.0 onnector Pin definition 9 POWER U.0 - U.0 + GN td_rx- td_rx+ GN td_tx- td_tx+ uperpeed RX uperpeed TX Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. U.0 ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

63 NNIE luetooth Module. / High ctive Voltage V V_T_0 V_T_0 U0 OUT GN N# IN EN V_0 0 UVKX-GP LUETOOTH_EN, G0TU-GP.00.F N =.0.F T U_PN V_T_0 U_PP E-ON--GP-U 0.F0.00 nd = 0.F0.00 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. LUE TOOTH ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

64 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

65 Mini ard onnector(0.a/b/g/n) R0~R09 close to ebug connector,, PIE_WKE# R 0RJ--GP LK_PIE_WLN_REQ# LK_PIE_WLN# LK_PIE_WLN MINI_WKE# WLN NP 9 0 LP_0_ LP LP LP LP_FRME#_ V_0 V_0 R0 R0 R0 R0 R09 0RJ--GP 0RJ--GP 0RJ--GP 0RJ--GP 0RJ--GP LP_0,, LP_,, LP_,, LP_,, LP_FRME#,, E_RX E_TX V_, LUETOOTH_EN R0 0RJ--GP E_RX_R R0 0RJ--GP E_TX_R 9 0 PIE_RXN PIE_RXP 9 0 PIE_TXN PIE_TXP V_ R0 +V_MINI_EUG 0RJ-0-U-GP NP R 0RJ-0-U-GP 放放 IMM door 可可可可 PTWO-ONN--GP 0.F.0 N = 0.F.0 R.00.9 LK_PI_LP_ WMX_LE#_ WLN_LE#_ PLT_RT#_WLN WLN_MLK_R WLN_MT_R R0 0RJ--GP R0 0RJ--GP RN0 RN0J--GP U_PN U_PP 0 - R 0RJ--GP R 0R00-P LK_PI_LP,, WIFI_RF_EN PLT_RT#,,,, R 0KRJ--GP V_0 PH_MLK,, PH_MT,, WLN_LE# PLT_RT#_WLN 0U0VKX-GP 0- Reserve for H9 driver loss issue V_ V_0 V_0 0 UVKX-GP 0 0-0UVKX-GP 0 UVKX-GP 0 UVKX-GP F0 UVKX-GP 0 UVKX-GP 0 0UVKX-GP 0-0 UVKX-GP F0 UVKX-GP WLN Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

66 Mini ard onnector(wwn) WWN R0,, PIE_WKE# 0RJ--GP LK_PIE_WWN_REQ# LK_PIE_WWN# LK_PIE_WWN MINI_WKE# NP 9 0 V_0 V_0 UIM_PWR UIM_T UIM_LK UIM_REET UIM_VPP PIE_RXN PIE_RXP PIE_TXN PIE_TXP V_ NP PLT_RT#_WN R0 0RJ--GP G WWN_MLK_R WWN_MT_R RN0 RN0J--GP G_LE# G_EN PLT_RT#,,,, U_PN U_PP PH_MLK,, PH_MT,, Place near MINI ard ONN V_0 G PTWO-ONN--GP 0.F.0 N = 0.F.0 R =.00.9 G 0 UVKX-GP 0-0 P0VJN-GP V_0 V_0 G UVKX-GP TP0 UIM_PWR UIM_VPP UIM_REET UIM_LK UIM_T IM V NP NP NP NP VPP REERVE# REERVE# RT LK I/O GN 9 GN 0 GN RU9P-GP-U G 0.I00.00 avl in sb stage U_PP U_PN 0 UVKX-GP 09 UVKX-GP 0 - V_0 0 P0VJN-GP 0 P0VJN-GP G 0 UVKX-GP Place near Pin WWN Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

67 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

68 PLE FRONT_PWRLE#_R TY_LE#_R V_ WLN_LE FRONT_PWRLE#_Q TY_LE#_Q _TFULL#_Q HRGE_LE#_Q R0 0RF-GP R0 0RF-GP R0 0RF-GP R0 0RF-GP LE-O-9-GP-U.00.E0 From module V_0 Power button LE Q0 FRONT_PWRLE#_Q PWRLE R R LT0ZU-F-GP nd =.00.K Power TY_LE Q0 TY_LE#_Q TY_LE R R LT0ZU-F-GP nd =.00.K _TFULL#_R HRGE_LE#_R FRONT_PWRLE#_Q HRGE_LE#_Q TY_LE#_Q _TFULL#_Q E0 E0 E0 E0 HLE LE-O-9-GP-U.00.E0 U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP V_UX_ WLN_LE#_ Q0 N00K--GP.N0.J N =.N0.0 G R0 WLN_LE# KRJ--GP Q0 R LT0ZU-F-GP nd =.00.K R WLN_LE_OFF# WLN_TET_LE for factory test attery LE(_TFULL) T H LE _TFULL 9 T_LE# R0 0RF-GP MEI_LE#_R V_0 G LE attery LE(HRGE) From module V_0 Q0 _TFULL#_Q R R LT0ZU-F-GP nd =.00.K N K MLE LE---GP-U.000.F0 HRGE_LE Q0 HRGE_LE#_Q R R LT0ZU-F-GP nd =.00.K G_LE#_ WLN_LE#_ G R0 0RF-GP R0 0RF-GP G_LE#_R WLN_LE#_R WLE LE-O-9-GP-U.00.E0 G_LE#_ V_0 Q0 N00K--GP.N0.J N =.N0.0 R09 0KRJ--GP Q0 LT0EU-F-GP R R G_LE# G N =.00.KK PW V_ G G FRONT_PWRLE#_Q K_PWRTN#,9 WLN_TET_LE for factory test PTWO-ON-9-GP-U nd = 0.K K0.00 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. LE ard/power utton ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

69 V_0 TOUH P V_0 Internal Keyoard onnector RN90 RNKJ--GP E90 U0VKX-GP E90 U0VKX-GP 0.K0.0 nd = 0.K00.0 TP K PTWO-ON-GP-U nd = 0.K0.0 0.K0.0 TPT TPLK TPT TPLK TP_T TP_LK TP_LEFT TP_RIGHT RNJ--GP-U RN90 TP_T TP_LK TP_RIGHT 0 9 KOL KOL KOL KOL KOL KOL KOL KOL KOL KOL9 KOL0 KOL KOL KOL KOL KOL KOL KOL KROW0 KROW KROW KROW KROW KROW KROW KROW KOL KROW[0..] KOL[0..] Pin on right side M PIN EFINE K PIN EFINE E90 00P0VJN-GP E90 00P0VJN-GP E90 00P0VJN-GP E90 00P0VJN-GP TP_LEFT T/P E-ON-9-GP-U K/ TP_RIGHT W_R TP_LEFT W_L W-TT-P-9-GP.009. W-TT-P-9-GP.009. Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Key oard/touch Pad ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet 9 of 0

70 V_UX_ 00 U0VKX-GP LI V LI_LOE# R00 LI_LOE# 00RJ--GP 00 0UVKX--GP GN LI_LOE#_ VOUT PX9HI-TRG-GP Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Hall ensor ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet 0 of 0

71 0 OM hange,, LP_0,, LP_,, LP_,, LP_,, LP_FRME#,,,, PLT_RT#,, LK_PI_LP V_0 9 0 MLX-ON0--GP HT+ onnectors PU_TRT# TP0 PU_TK PU_TM PU_TI PU_TO,,,9 H_PUPWRG_E PU_RT_L_UF PU_R PU_REQ# PU_TET9_PLLTET0 PU_TET_PLLTET TP0 TP0 TP0 TP0 TP09 TP0 TP TP TP TP R:placed 0-ohm hecklist: If both N and HT+ header are implement placed -ohm Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ubug connector ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

72 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

73 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

74 /X/M ard Reader I = IO _T0/X_0/M_0 _T/X_/M T/X_/M T/X_/M T/X_/M T/X_/M T/X_/M T/X_/M /X_WE# X_# X_E#/M_IN# X_RE# X_WP#/_WP# X_LE _LK/X_R/# _M/X_LE/M_ V_R_0 E0 U0VKX-GP _T0/X_0/M_0 _T/X_/M T/X_/M T/X_/M /X_WE# X_WP#/_WP# _LK/X_R/# _M/X_LE/M T0/X_0/M_0 _T/X_/M T/X_/M T/X_/M M/X_LE/M_ X_E#/M_IN# _LK/X_R/# P P P P P P9 P P P P P0 P9 P P P P P R _V M_V X_V _T0 _T _T _T WP _LK _M M_T0 M_T M_T M_T M_ M_IN M_LK X_ X_R/ X_RE X_E X_LE X_LE X_WE X_WP_IN X_0 X_ X_ X_ X_ X_ X_ X_ M_GN M_GN _GN _GN 0 P P0 X_GN 9 X_GN 9 P P X_# _LK/X_R/# X_RE# X_E#/M_IN# _M/X_LE/M_ X_LE _/X_WE# X_WP#/_WP# _T0/X_0/M_0 _T/X_/M T/X_/M T/X_/M T/X_/M T/X_/M T/X_/M T/X_/M_ NP NP NP NP _/WP_OM/IO_GN _/WP_OM/IO_GN P P R-PUH-P--GP 0.I0.00 ard-reader Off-Page Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. R Reader ONN ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

75 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

76 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

77 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

78 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

79 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet 9 of 0

80 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet 0 of 0

81 (lanking) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Reserved ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

82 0 hange from port to port 0 hange from port0 to port HR-ON0--GP U0_RXN U0_RXP U0_TXN U0_TXP U0_TXP U0_TXN U0_RXP U0_RXN U0_P U0_M U R U R UVKX-GP UVKX-GP U R U R UVKX-GP UVKX-GP U0_M U0_P U0_TXN_ U0_TXP_ U0_TXN_ U0_TXP_ UN U R 0 change from port to port0 U_PN U_PP U_PN0 U_PP0, U_PWR_EN# V_ 0 9 UN 0.K0.0 nd = 0.K00.0 E-ON--GP-U Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. IO oard onnector ize ocument Number Rev JE0_ ate: Friday, pril 0, 0 heet of 0

83 PEG_TXP[0..] PEG_RXN[0..] PEG_TXN[0..] PEG_TXP0 PEG_TXN0 PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN VG PIE_RX0P Y PIE_RX0N Y PIE_RXP W PIE_RXN W PIE_RXP V PIE_RXN V PIE_RXP U PIE_RXN U PIE_RXP T PIE_RXN OF PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG_RXP[0..] PEG RXP0 PIE_TX0P Y 0 I PEG RXN0 PIE_TX0N Y 0 I PIE_TXP W PIE_TXN W PIE_TXP U PIE_TXN U PIE_TXP U0 PIE_TXN U9 PIE_TXP T PIE_TXN T 0 I 0 I 0 I 0 I 0 I 0 I 09 I 0 I U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP PEG_RXP0 PEG_RXN0 PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN LLOW FOR PULLUP P FOR THEE TRP N IF THEE GPIO RE UE, THEY MUT NOT ONFLIT URING REET TRP TX_PWR_EN TX_EEMPH_EN REERVE VG_I ROMIFG[:0] ONFIGURTION TRP PIN GPIO GPIO9 GPIO[:] ERIPTION OF EFULT ETTING Transmitter Power avings Enable 0: 0% Tx output swing : Full Tx output swing PIE TRNMITTER E-EMPHI ENLE 0:Tx de-emphasis disabled :Tx de-emphasis enabled 0:dvertises the PIe device as.gt/s capable at power on. IF_GEN_EN_ GPIO :dvertises the PIe device as.0gt/s capable at power on. 0 GPIO TT GPIO0 GPIO GPIO optional input allow the system to request a fast power reduction by setting GPIO to low. REERVE 0:VG ontroller capacity enabled :The device won't be recognized as the system's VG controller IO_ROM_EN=, onfig[:0] defines the ROM type IO_ROM_EN=0, onfig[:0] defines the primary memory aperture size REOMMENE ETTING 0= O NOT INTLL REITOR = INTLL K REITOR X = EIGN EPENNT N = NOT PPLILE REOMMEN X X X? 0 0 X X PLTFORM ETTING (M) PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP9 PEG_TXN9 PEG_TXP0 PEG_TXN0 PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXN T R R P P N N M M L L K K J J H H G G F PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RX9P PIE_RX9N PIE_RX0P PIE_RX0N PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PIE_RXP PIE_RXN PI EXPRE INTERFE PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TX9P PIE_TX9N PIE_TX0P PIE_TX0N PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN T0 T9 P P P0 P9 N N N0 N9 PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP PEG RXN PEG RXP9 PEG RXN9 0 9 L PEG RXP0 L PEG RXN0 L0 PEG RXP L9 PEG RXN K PEG RXP K PEG RXN J PEG RXP J PEG RXN K0 PEG RXP 0 K9 PEG RXN 9 I I I I I I I_PX I_PX I_PX I_PX I_PX I_PX I_PX I_PX I_PX I_PX I_PX I_PX I_PX I_PX U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP9 PEG_RXN9 PEG_RXP0 PEG_RXN0 PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN PEG_RXP PEG_RXN REERVE IO_ROM_EN GPIO ROM VIP_EVIE_TRP_EN RV RV U[] U[0] TX_PWR_EN TX_EEMPH_EN IF_GEN_EN_ GPIO_ROMO GPIO VYN HYN REERVE 0 HYN VYN VG_I 0:isable external IO ROM device :Enable external IO ROM device VIP evice trap Enable indicates to the software driver that it sense whether or not a VIP device is connected on the VIP Host interface. GENERI REERVE 0 PIN TRP REERVE U[:0]:-udio for both isplayport and HMI R0 I_PX KRJ--GP R0 I_PX KRJ--GP R0 I_PX 0KRJ--GP R0 0KRJ--GP R0 0KRJ--GP V_VG_0 X 0 X X X R stuff K for Mannhatton VG stuff.k for Vancouver VG V_VG_0 TI_RT# PEG_TXP PEG_TXN 00MHz LK_PIE_VG LK_PIE_VG# VG_RT# J I_PX N#J K PWRGOO N#K R H 0KRF--GP PWRGOO R0 0RJ--GP I_PX 090 -,,,, PLT_RT# 9 V_0_VG_PG F PIE_RXP E PIE_RXN LOK PIE_REFLKP PIE_REFLKN VG_RT# 0 PERT# MION-PRO--GP P0VJN-GP PE_GPIO0 R 0RJ--GP PX PE_GPIO0 PLT_RT#_R R V_0_VG_PG_R 0RJ--GP U0VKX-GP --GP PEG RXP PIE_TXP H I_PX PEG RXN PIE_TXN H I_PX LIRTION PIE_LRP Y0 PIE_LRP PIE_LRN PIE_LRN Y9 I_PX 0 PX 0 V_VG_0 0KRJ--GP W--GP PX I_PX R KRF-L-GP R KRF--GP I_PX R9.000.Q N =.000.G R =.000.K TI_RT#.000.K N =.000.F rd =.000. U0VKX-GP U0VKX-GP V_VG_0 PEG_RXP PEG_RXN dgpu mode IGPU IGPU with O PE_GPIO0 H L H ONFIG0 ONFIG ONFIG,9 VG_RT_VYN,9 VG_RT_HYN VYN_ HYN_ IO_ROM_EN GPIO TT GPIO EN JTG_TM_VG PLT_RT# R0 R0 R0 R09 R0 R R R R R R I R 0RJ--GP I_PX I I TI_RT# 0KRJ--GP 0KRJ--GP 0KRJ--GP 0KRJ--GP 0KRJ--GP 0KRJ--GP 0KRJ--GP 0KRJ--GP 0KRJ--GP 0KRJ--GP 0KRJ--GP TETEN JTG_TRT#_VG JTG_TK_VG JTG IGNL OPTION Normal ebug ignal mode mode TETEN JTG_TRT# JTG_TK JTG_TM R ""(PU) ""(PU) "0"(P) ""(PU) LK Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. GPU_PIE/TRPPING(/) ize ocument Number Rev ustom JE0_ R 0KRJ--GP R 0KRJ--GP 0 - ""(PU) ""(PU) ""(PU) pilot run mode "0"(P) ate: Friday, pril 0, 0 heet of 0 0KRJ--GP R I_PX KRF--GP N N N

84 VG OF R R M[0..] GR/GR GR/GR 90 M[0..] R R M0 M Q0_0/Q_0 M0_0/M_0 G M0,9 M Q0_/Q_ M0_/M_ J M,9 M Q0_/Q_ M0_/M_ H M,9 E M Q0_/Q_ M0_/M_ J M,9 G M Q0_/Q_ M0_/M_ H M,9 M Q0_/Q_ M0_/M_ J M,9 F M Q0_/Q_ M0_/M_ H M,9 E M Q0_/Q_ M0_/M_ G M,9 H9 M9 Q0_/Q_ M_0/M_ M,9 F0 M0 Q0_9/Q_9 M_/M_9 H0 M9,9 0 M Q0_0/Q_0 M_/M_0 L M0,9 0 G M Q0_/Q_ M_/M_ M,9 F M Q0_/Q_ M_/M_ J M,9 _,9 M Q0_/Q_ M_/M H _0,9 M Q0_/Q_ M_/M 0 J E M Q0_/Q_ M_/M H _,9 M Q0_/Q_ F QM0 M Q0_/Q_ WK0_0/QM_0 QM M9 Q0_/Q_ WK0#_0/QM_ QM M0 Q0_9/Q_9 WK0_/QM_ F M Q0_0/Q_0 WK0#_/QM_ E QM QM 9 M Q0_/Q_ WK_0/QM_ QM 9 M Q0_/Q_ WK#_0/QM_ E QM 9 M Q0_/Q_ WK_/QM_ E0 9 QM 9 M Q0_/Q_ WK#_/QM_ M Q0_/Q_ GR/R/GR F QP_0 M Q0_/Q_ E0_0/Q_0/RQ_0 QP_ M Q0_/Q_ E0_/Q_/RQ_ 9 0 QP_ M9 Q0_/Q_ E0_/Q_/RQ_ F0 QP_ M0 Q0_9/Q_9 E0_/Q_/RQ_ E0 9 M Q0_0/Q_0 E_0/Q_/RQ_ E QP_ 9 9 M[..] E QP_ 9 9 M[..] M Q0_/Q_ E_/Q_/RQ_ E QP_ 9 M Q_0/Q_ E_/Q_/RQ_ J0 QP_ 9 M Q_/Q_ E_/Q_/RQ_ F M Q_/Q_ M Q_/Q_ I0_0/Q_0#/WQ_0 QN_0 QN_ M Q_/Q_ I0_/Q_#/WQ_ E0 F QN_ M Q_/Q_ I0_/Q_#/WQ_ E QN_ M9 Q_/Q_ I0_/Q_#/WQ_ 0 E QN_ 9 M0 Q_/Q_9 I_0/Q_#/WQ_ F M Q_/Q_0 I_/Q_#/WQ_ QN_ 9 QN_ 9 M Q_9/Q_ I_/Q_#/WQ_ J F QN_ 9 M Q_0/Q_ I_/Q_#/WQ_ F M Q_/Q_ OT0 M Q_/Q_ I0/OT0 J F0 G9 M Q_/Q_ I/OT OT 9 0 M Q_/Q_ 0 LK0 M Q_/Q_ LK0 H G LK0# M9 Q_/Q_ LK0# G H M0 Q_/Q_9 J M Q_/Q_0 LK J LK 9 H M Q_9/Q_ LK# H LK# 9 G0 M Q_0/Q_ G K M Q_/Q_ R0# R0# K9 M Q_/Q_ R# K9 R# 9 K0 M Q_/Q_ G9 0# M Q_/Q_ 0# K0 # 9 M Q_/Q_ # K M9 Q_/Q_ E 0#_0 M0 Q_/Q_9 0#_0 K M Q_/Q_0 0#_ K M Q_9/Q_ E M #_0 9 M Q_0/Q_ #_0 Q_/Q_ #_ K MEMORY INTERFE M0 M M M M M M M M M9 M0 M M M M M M M M M9 M0 M M M M M M M M M9 M0 M M M M M M M M M9 M0 M M M M M M M M M9 M0 M M M M M M M M M9 M0 M M M E E F F F G H H J K K L M M M M N P P R T T U V V V Y Y Y Y F F F G H H J K F F9 G G K9 L M M K L M M N P P P VG R GR/GR R Q0_0/Q_0 Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_9/Q_9 Q0_0/Q_0 Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_9/Q_9 Q0_0/Q_0 Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_/Q_ Q0_9/Q_9 Q0_0/Q_0 Q0_/Q_ Q_0/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_9 Q_/Q_0 Q_9/Q_ Q_0/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_9 Q_/Q_0 Q_9/Q_ Q_0/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_ Q_/Q_9 Q_/Q_0 Q_9/Q_ Q_0/Q_ Q_/Q_ MEMORY INTERFE OF R GR/GR R M0_0/M_0 M0_/M_ M0_/M_ M0_/M_ M0_/M_ M0_/M_ M0_/M_ M0_/M_ M_0/M_ M_/M_9 M_/M_0 M_/M_ M_/M_ M_/ M_/0 M_/ WK0_0/QM_0 WK0#_0/QM_ WK0_/QM_ WK0#_/QM_ WK_0/QM_ WK#_0/QM_ WK_/QM_ WK#_/QM_ GR/R/GR E0_0/Q_0/RQ_0 E0_/Q_/RQ_ E0_/Q_/RQ_ E0_/Q_/RQ_ E_0/Q_/RQ_ E_/Q_/RQ_ E_/Q_/RQ_ E_/Q_/RQ_ I0_0/Q_0#/WQ_0 I0_/Q_#/WQ_ I0_/Q_#/WQ_ I0_/Q_#/WQ_ I_0/Q_#/WQ_ I_/Q_#/WQ_ I_/Q_#/WQ_ I_/Q_#/WQ_ I0/OT0 I/OT LK0 LK0# LK LK# R0# R# 0# # 0#_0 0#_ #_0 #_ P T9 P9 N N N9 U9 U Y9 W9 9 Y 9 H H T T E F K K F K P V H J9 M G K P W H J M T W L9 L T0 Y0 W0 0 P0 L0 0 0 M0 90,9 M 90,9 M 90,9 M 90,9 M 90,9 M 90,9 M 90,9 M 90,9 M 90,9 M9 90,9 M0 90,9 M 90,9 M 90,9 _ 90,9 _0 90,9 _ 90,9 QP_0 90 QP_ 90 QP_ 90 QP_ 90 QP_ 9 QP_ 9 QP_ 9 QP_ 9 QN_0 90 QN_ 90 QN_ 90 QN_ 90 QN_ 9 QN_ 9 QN_ 9 QN_ 9 QM0 90 QM 90 QM 90 QM 90 QM 9 QM 9 QM 9 QM 9 OT0 90 OT 9 LK0 90 LK0# 90 LK 9 LK# 9 R0# 90 R# 9 0# 90 # 9 0#_0 90 #_0 9 MVREF MVREF MEM_LRN0 MEM_LRN MEM_LRN MEM_LRP MEM_LRP0 MEM_LRP V_VG_0 R0 RF--GP MEM_LRN0 Madison_Whistler R0 MEM_LRN RF--GP I_PX MEM_LRN R0 RF--GP Madison_Whistler L MVREF L0 MVREF L MEM_LRN0 N MEM_LRN G MEM_LRN M MEM_LRP M MEM_LRP0 H MEM_LRP MION-PRO--GP I_PX R0 RF--GP MEM_LRP I_PX V_VG_0 R0 MEM_LRP0 RF--GP Madison_Whistler MEM_LRP Ra R0 R09 0RF-GP RF--GP Madison_Whistler Madison_Whistler MVREF GR KE0 K KE0 KE J0 KE 9 WE0# K WE0# WE# L WE# 9 M0_ H M,9 TETEN M_ J9 00- RN0 RNKJ--GP PLE MVREF IVIER N P LOE TO I V_VG_0 V_VG_0 Ra R R 0RF-GP Ra 0RF-GP Madison_Whistler I_PX MVREF MVREF MVREF MVREF LKTET LKTET V_VG_0 Ra Y K0 L0 R 0RF-GP I_PX MVREF MVREF TETEN LKTET LKTET MION-PRO--GP I_PX MVREF GR KE0 KE WE0# WE# M0_ M_ RM_RT# ** U0 N0 T W H RM_RT KE0 90 KE 9 WE0# 90 WE# 9 M 90,9 RM_RT_R This basic topology should be used for RM_RT for R/GR/GR.These apacitors and Resistor values are an example only. The eries R and ap values will depend on the RM load and will have to be calculated for different Memory,RM Load and board to pass Reset ignal pec. Vancouver R0 KRF--GP I_PX R0 0RJ--GP I_PX I_PX R0 RJ--GP I_PX V_VG_0 R0 KRJ--GP MEM_RT,9,90,9 0 if for Mannhatton,have to 0P0VJN-GPchange to other value Rb R 0 Rb R 0 Rb R 0 Rb 00RF-L-GP-U U0VKX-GP 00RF-L-GP-U U0VKX-GP 00RF-L-GP-U U0VKX-GP Madison_Whistler Madison_Whistler Madison_Whistler Madison_Whistler I_PX I_PX R 00RF-L-GP-U I_PX 0 U0VKX-GP I_PX R/GR Memory tuff Option(Mad/Park) Mannhatton GR GR R MVQ.V.V/.V.V Ra 0.R 0.R 0.R Rb 00R 00R 00R Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. GPU_Memory(/) ize ocument Number Rev ustom JE0_ Friday, pril 0, 0 ate: heet of 0

85 VPT [:::0] for VRM type selection H/W strap hould provide VRM Table for Vios request ddress VPT[:0] Vender Hynix HTQGFR- Gb(Mx) 900Mhz Rev ie V_VG_0 GPIO_VG_0_LK GPIO_VG_0_T 09 - Hynix Reserve Reserve amsung amsung TI HTQGFR- Gb(Mx) 900Mhz 0 0 Hynix HTQGFR- Gb(Mx) 00Mhz Hynix Reserve Reserve Hynix HTQGFR- Gb(Mx) HTQGFR- Gb(Mx) KWG-H Gb(Mx) KWGG- Gb(Mx) KWGG- Gb(Mx) XTLIN V_VG_0 GPIO_VG ML_LK,9, ML_T,9, XTLOUT 00Mhz 00Mhz 900Mhz 00Mhz I us for LV Rev ie Rev G ie traps TX_PWR_EN TX_EEMPH_EN IF_GEN_EN_ GPIO TT GPIO_ROMO VG_I JTG_TK_VG JTG_TM_VG ONFIG0 ONFIG ONFIG GPIO EN IO_ROM_EN JTG_TRT#_VG XTLOUT V_VG_0 9 9 MEM_I0 MEM_I MEM_I MEM_I 9 GPU_LV_LK 9 GPU_LV_T PLE VREFG IVIER N P LOE TO I lock Input onfiguraiton -GR/R a) MHz crystal connected to XTLIN or XTLOUT or b) MHz (.V) oscillator connected to XTLIN or c) MHz (.V) oscillator connected to XO_IN (Park, Madison, and roadway only) PN peed NEW!! Rev ie NEW!! 00Mhz Rev ie Rev ie amsung KWGE-H Gb(Mx) 00Mhz Rev E ie amsung KWG-H Gb(Mx) 900Mhz Rev ie NEW!! Reserve amsung RN0 RNKJ--GP I_PX P0VJN-GP EYM G(M*) Q0 I_PX N00KW-GP.N0.F nd =.M0.0F I_PX I_PX R 0KRJ--GP V_VG_0 I_PX L0 PY00T-Y-N-GP.000. UVKX-GP 0- Use same parts for VG PPower 0- TM erek Hsieh suggestion 900Mhz Rev ie Rev G ie NEW!! NEW!! NEW!! VG_LEN PWRNTL_0 PWRNTL_ V_VG_0 (.0V@m PLL_V) PLL_V (.V@0m PLL_V For M9/M9) 9 EP_HP_ET PEG_LKREQ# For new version no M V_VG_0 PLL_PV I_PX (.V@m PLL_PV) L0 PY00T-Y-N-GP R RF-GP I_PX I_PX UVKX-GP I_PX U0VKX-GP ead:0-ohm. R MRJ--GP I_PX X0 I_PX XTL-MHZ--GP.00. nd =.00. rd =.00. P0VJN--GP I_PX I_PX UVKX-GP R0 0RJ--GP 0KRJ--GP R G_,G_,G_ G_H,G_H R 0KRJ--GP V_VG_0 pollo use Hynix die G 900MHz TP0 0- elete R0 I_PX R 99RF--GP 9 U0VKX-GP I_PX 0KRJ--GP TP0 TP0 G_,G_ R HMI_HP_ET TP TP G_H,G_H,G_,G_ GPIO_VG_0_T GPIO_VG_0_LK VPIO_VG GPIO_IN GPIO_VG EP_HP_ET THERMTRIP_VG GPU_VREFG U0VKX-GP I_PX R R0 0KRJ--GP G_H,G_,G_ TV L0 (.V@0m TV) LM-GP.000.F nd =.00.0 I_PX UVKX-GP I_PX G_H,G_H,G_0KRJ--GP TP R9 0KRJ--GP G_ 0KRJ--GP G_H,G_ R 0KRJ--GP JTG_TI_VG XTLIN XTLOUT XO_IN P00_VG_XP P00_VG_XN R U P W R R U U W P W U R W U T V N V9 T9 R0 W0 U0 P0 V T R W U P K J H0 H N H J H J K J H J K L M M M K G0 N M L J K N M N K L M J9 K9 J0 K0 J H H K H M N N V U W W F9 G9 K L J J VG VPNTL_MVP_0 VPNTL_MVP_ VPNTL_0 VPNTL_ VPNTL_ VPLK VPT_0 VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_9 VPT_0 VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_9 VPT_0 VPT_ VPT_ VPT_ L GPIO_0 GPIO_ GPIO_ GPIO MT GPIO MLK GPIO TT GPIO_ GPIO LON GPIO ROMO GPIO_9_ROMI GPIO_0_ROMK GPIO_ GPIO_ GPIO_ GPIO HP GPIO PWRNTL_0 GPIO IN GPIO THERML_INT GPIO HP GPIO_9_TF GPIO_0_PWRNTL_ GPIO EN GPIO ROM# GPIO LKREQ# JTG_TRT# JTG_TI JTG_TK JTG_TM JTG_TO GENERI GENERI GENERI GENERI GENERIE_HP GENERIF GENERIG HP VREFG PLL_PV PLL_P PLL_V XTLIN XTLOUT XO_IN XO_IN PLU MINU T_FO T_ TV T MUTI GFX I GENERL PURPOE I/O PLL/LOK THERML MION-PRO--GP P P P P /UX OF TXP_PP TXM_PN TX0P_PP TX0M_PN TXP_PP TXM_PN TXP_P0P TXM_P0N TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_P0P TXM_P0N TXP_PP TXM_PN TX0P_PP TX0M_PN TXP_PP TXM_PN TXP_P0P TXM_P0N TXP_PP TXM_PN TXP_PP TXM_PN TXP_PP TXM_PN TXP_P0P TXM_P0N R R# G G# # HYN VYN RET V Q VI I R R# G G# # Y OMP HYN VYN VI I V VQ Q RET LK T UXP UXN LK T UXP UXN LK_UXP T_UXN LK_UXP T_UXN LK_UXP T_UXN LK T LK_UXP T_UXN I_PX U V T R U V T R R0 T9 V U0 R T T U U V T R U V T R U0 T9 T R0 U V T R 9 E F E E 0 0 F0 F F 9 9 G G G F 9 M N M L M9 L9 N0 M0 L0 M0 L9 M9 N M J0 J K0 K9 VG_RT_LUE +.V tolerant GPU_RET RET VG_RT_RE VG_RT_GREEN V VI HMI_LK HMI_LK# HMI_T0 HMI_T0# HMI_T HMI_T# HMI_T HMI_T# VG_P_TXP0_PU 9 VG_P_TXN0_PU 9 VG_RT_HYN,9 VG_RT_VYN,9 VI V VQ VG_RT_LK 9 VG_RT_T 9 VG_RT_RE 9 VG_RT_GREEN 9 VG_RT_LUE 9 Q Q HYN_ VYN_ VG_RT_RE VG_RT_GREEN VG_RT_LUE // have V-tolerant GPU_HMI_LK GPU_HMI_T channel for HMI VG_P_UXP_PU 9 VG_P_UXN_PU 9 UXP P 00K UXN PU 00K raw on EP circuit page,, I_PX R 99RF--GP I_PX_Park_Madison R RF-GP H_THERMTRIP# VG_RT# R0 0R00-P channel for RT THERMTRIP_R Q0 N00KW-GP.N0.F nd =.M0.0F R0 0RJ--GP Q0_ THERMTRIP_VG LV Interface VGG RN0 RN0F--GP I LV ONTROL LVTMP I_PX MION-PRO--GP U0VKX-GP OF VRY_L IGON TXLK_UP_PFP TXLK_UN_PFN TXOUT_U0P_PFP TXOUT_U0N_PFN TXOUT_UP_PFP TXOUT_UN_PFN TXOUT_UP_PF0P TXOUT_UN_PF0N TXOUT_UP TXOUT_UN TXLK_LP_PEP TXLK_LN_PEN TXOUT_L0P_PEP TXOUT_L0N_PEN TXOUT_LP_PEP TXOUT_LN_PEN TXOUT_LP_PE0P TXOUT_LN_PE0N TXOUT_LP TXOUT_LN K J K L J K H J G H F G P R W U R U9 P R N P RN0 V_VG_0 I_PX_ifferent L0 (.V@m V) LM-GP.000.F 0 0 nd =.00.0 I R0 0KRJ--GP VG_LKLT_TL 9 VG_LV_EN 9 GPU_LV_TX 9 GPU_LV_TX# 9 GPU_LV_TX0 9 GPU_LV_TX0# 9 GPU_LV_TX 9 GPU_LV_TX# 9 GPU_LV_TX 9 GPU_LV_TX# 9 V Q I_PX_ifferent VI L0 (.V@00m VI) LM-GP.000.F nd =.00.0 U0VKX-GP I I R0 (.V@0m VI) 0RJ--GP I_PX_Park_Madison 0 U0VKX-GP I_Park_Madison L0 (.V@.m VQ) LM-GP.000.F nd = U0VKX-GP UVKX-GP RN0KJ--GP I_LV V_VG_0 R09 (.V@0m V) 0RJ--GP I_PX_Park_Madison UVKX-GP UVKX-GP U0VKX-GP UVKX-GP VI VQ V 0 UVKX-GP I 09 UVKX-GP UVKX-GP U0VKX-GP ize ocument Number Rev JE0_ Friday, pril 0, 0 ate: heet of 0 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. GPU_P/LV/RT/GPIO(/)

86 V_VG_0 V_VG_0 I_PX I_PX 0 UVKX-GP I_PX 0 UVKX-GP 0 UVKX-GP I_PX I_PX L0 LM-GP.000.F N = For R/GR, MVQ =.V I_PX (.V@0m V_T) 0 UVKX-GP V_VG_0 0 0 I_PX L0 (.V@0m PIE_PV) LM-GP I_PX.000.F N =.00.0 U0VKX-GP (For M9, roadway, Madison and Park PV0 =.0V) UVKX-GP I_PX L0 (.V@m PV) LM-GP.000.F 9 N =.00.0 U0VKX-GP UVKX-GP UVKX-GP UVKX-GP UVKX-GP UVKX-GP UVKX-GP I_PX 9 UVKX-GP I_PX I_PX UVKX-GP U0VKX-GP UVKX-GP UVKX-GP I_PX PV I_PX 0 I_PX 9 9 UVKX-GP UVKX-GP I_PX UVKX-GP UVKX-GP F_V F_GN I_PX UVKX-GP UVKX-GP PIE_PV V_VG_0 I_PX L0 LM-GP.000.F N = U0VKX-GP PV0 MPV (0m PV0) I_PX PX_EN VRH RH VRH RH PV Mode 0 Normal UVKX-GP I_PX U0VKX-GP UVKX-GP I_PX TP0 TP0 TP0 TP0 TP0 I_PX 9 UVKX-GP UVKX-GP UVKX-GP O V_T 0 U0VKX-GP I_PX F_VI F G0 J K L9 G G G G0 G G G9 H0 J J9 K K K L L L L L L M N P R U U Y Y F F G G F F G G F F G G F F G M0 M V U H H M0 N9 N0 F G H9 IF_V VG_ore V_VG VGE VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR VR V_T V_T V_T V_T VR VR VR VR VR VR VR VR VR VR VR VR N_VRH N_RH N_VRH N_RH PIE_PV MPV MPV PV PV0 MEM I/O LEVEL TRNLTION I/O PLL P VOLTGE ENEE F_V F_VI F_GN MION-PRO--GP 0/ 0 change to short pad,9,9 PIE GPU_PWROK PIE_VR PIE_VR PIE_VR PIE_VR PIE_VR PIE_VR PIE_VR PIE_VR PIE_V PIE_V PIE_V PIE_V PIE_V PIE_V PIE_V PIE_V PIE_V PIE_V PIE_V PIE_V ORE V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V/IF_V V V V V V V V V V/IF_V V V V V V V V V V V V V V V V V IOLTE ORE I/O POWER I_PX OF VI VI VI VI VI VI VI VI VI VI VI VI VI VI VI VI VI VI VI VI VI VI V W9 W0 Y G0 G H9 H0 J9 J0 L M N R T U 0 0 F F0 F G G G H H H M N N R R R R T T0 T T T U U U U U V V0 V V V Y Y Y Y Y Y M M M M N N N N0 N R R R T T V Y R0 0R00-P (.V@0m PIE_VR) (.0V@90m PIE_V) I_PX UVKX-GP UVKX-GP IF_V m in O mode UVKX-GP I_PX 9 UVKX-GP I_PX GPU_PWROK_ 0 9 UVKX-GP UVKX-GP V_VG_0 V_VG_0 0 dd for I only VG_ORE I R0 0RJ-0-U-GP 0 OM change UVKX-GP I_PX V_VG_0 VG_ORE VG_ORE I_PX VI and V should have seperate regulators with a merge option on P For Madison and Park, VI and V can share one common regulator U0VKX-GP 9 U0VKX-GP UVKX-GP I_PX I_PX UVKX-GP U0VKX-GP UVKX-GP I_PX UVKX-GP I_PX 0 UVKX-GP UVKX-GP I_PX I_PX U0VKX-GP UVKX-GP I_PX I_PX 0 UVKX-GP 9 I_PX UVKX-GP UVKX-GP I_PX I_PX 9 UVKX-GP 9 UVKX-GP UVKX-GP 9 U0V0KX-ML-GP UVKX-GP UVKX-GP I_PX 9 UVKX-GP R09 0KRJ--GP PX UVKX-GP 0 UVKX-GP UVKX-GP I_PX 0 UVKX-GP UVKX-GP 0 I_PX UVKX-GP I_PX UVKX-GP UVKX-GP UVKX-GP UVKX-GP PX Q0 UVKX-GP UVKX-GP UVKX-GP VG_ORE I_PX I_PX UVKX-GP I_PX U0VKX-GP have to use Vgs(th):0.~. V low Rds(on) PX_EN## PX_EN# V_VG_0 R0 KRJ--GP IF_V Vgs(th):~. V R KRJ--GP V_VG_0 R0 KRJ--GP PX IF_V R0 KRJ--GP PX V_0 PX U0 O00-GP V_0 G G PX U0 O-GP IF_V_ORE.000. IF_V_V.0.0 PX U0 O00-GP G PX U0 O-GP G VG_ORE.000. V_VG_0.0.0 (M9, roadway and Madison:.V@0m MPV) PX V_VG_PWOK_R PX_EN# (Park:.V@m MPV) L0 I_PX LM-GP.000.F N = UVKX-GP I_PX 9 UVKX-GP MPV 9 U0VKX-GP I_PX PX_EN 9 G PX 09_EN/EM_VG Q0 N00K--GP.N0.J N =.N0.0 E Proceted:KV GPU_PWROK W--GP.000.Q N =.000.G R =.000.K R0 0RJ--GP V_VG_PWOK_R PX_EN## N00KW-GP.N0.F nd =.M0.0F Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. GPU_POWER(/) ize ocument Number Rev JE0_ Friday, pril 0, 0 ate: heet of 0

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