cathedral_peak2_sb_0620

athedral Peak II lock iagram LK GN. I LPRKLFT (.0.0) RTM N-0-LFT (.00.0) R IMM /00 MHz MI In INT.PKR Line Out (NO PIF) RJ R IMM /00 MHz INT.MI odec L OP MP P0 MOM M ard /00MHz /00MHz ZLI H T O T T Mobile PU HOT U X MI 00MHz Penryn antiga GTL+ PU I/F R Memory I/F INTGRT GRHPI LV, RT I/F IHM T lue Tooth (U) U Port /00/0MHz@.0V -Link0 PIe ports PI/PI RIG PI.0 T U.0/. ports THRNT (0/00/000Mb) High efinition udio LP I/F erial Peripheral I/F Matrix torage Technology(O) ctive Managemnet Technology(O),,,,,0,,,,0 U PIex PIex PIex LP U amera (U) THRML M0 LN Giga LN TXFM RJ 0 New card K N0 0 Touch INT. Pad 0 K 0 RT L PWR W TP Mini ard Kedron IO Winbond WX M its Launch uttom a/b/g/n U ardreader Realtek M/M Pro/x /MM/ in RT LP UG ONN. TOP GN OTTOM Launch oard L oard Project code:.k0.00 P P/N :.K0.0 RVIION : 0- P TKUP LOK IGRM ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of YTM / TP INPUT OUTPUT TOUT YTM / TP INPUT TOUT RT0 V_ RT0 V_ FXOR / IL INPUT TOUT V_ V_ 0V_0 V_ R_VRF_0 OUTPUT VOR 0.~.V Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. OUTPUT R_VRF_ V_0 PU / IL INPUT TOUT HRGR Q INPUT TOUT OUTPUT _OR_0 0.~.V OUTPUT T+ TOUT

ignal H_OUT IHM Functional trap efinitions antiga chipset and IHM I/O controller Hub strapping configuration H_YN PI config bit0, This signal has a weak internal pull-down. L_RT0# PULL-UP 0K GNT#/ GPIO GPIO0 GNT#/ GPIO GNT#/ GPIO GNT0#: PI_#/ GPIO PI_MOI Reserved This signal has a weak internal pull-up. ets bit of RP.P(onfig Registers:Offset 0h) This signal should not be pulled high. FG F ynamic OT 0 = ynamic OT isabled GPIO TL# PKR TP GPIO/ H_OK _N# Usage/When ampled XOR hain ntrance/ PI Port onfig bit, Rising dge of PWROK Rising dge of PWROK. PI config bit, Rising dge of PWROK. I trap (erver Only) Rising dge of PWROK Top-lock wap Override. Rising dge of PWROK. oot IO estination election 0:. Rising dge of PWROK. Integrated TPM nable, Rising dge of LPWROK omment llows entrance to XOR hain testing when TP pulled low.when TP not pulled low at rising edge of PWROK,sets bit of RP.P(onfig Registers: offset h). This signal has weak internal pull-down ets bit0 of RP.P(onfig Registers:Offset h) I compatible mode is for server platforms only. This signal should not be pulled low for desttop and mobile. ampled low:top-lock wap mode(inverts for all cycles targeting FWH IO space). Note: oftware will not be able to clear the Top-wap bit until the system is rebooted without GNT# being pulled down. ample low: the Integrated TPM will be disabled. ample high: the MH TPM enable strap is sampled low and the TPM isable bit is clear, the Integrated TPM will be enable. MI Termination Voltage, The signal is required to be low for desktop Rising dge of PWROK. applications and required to be high for mobile applications. PI xpress Lane Reversal. Rising dge of PWROK. No Reboot. Rising dge of PWROK. XOR hain ntrance. Rising dge of PWROK. Flash escriptor ecurity Override trap Rising dge of PWROK ontrollable via oot IO estination bit (onfig Registers:Offset 0h:bit :0). GNT0# is M, 0-PI, 0-PI, -LP. ignal has weak internal pull-up. ets bit of MP.LR(evice :Function 0:Offset ) page If sampled high, the system is strapped to the "No Reboot" mode(ih will disable the TO Timer system reboot feature). The status is readable via the NO ROOT bit. This signal should not be pull low unless using XOR hain testing. ampled low:the Flash escriptor ecurity will be overridden. If high,the security measures will be in effect.this should only be enabled in manufacturing environments using an external pull-up resister. Flash-decriptor section of the Firmware. This 'oft-trap' is PI Routing LN LN LN LN LN LN LN MRVLL 0 Miniard WLN N N Neward N IH Rev.. U Table U Pair evice 0 U N U N U luetooth N MINI WM NW 0 ard Reader N Mus K IHM IHM Integrated Pull-up and Pull-down Resistors Pin Name FG[:0] FG[:] FG FG[:] FG[:] FG FG GLN_OK# The pull-up or pull-down active when configured for nativefg GLN_OK# functionality and determined by LN controller GNT[:0]#/GPIO[,,] PULL-UP 0K GPIO[0] PULL-OWN 0K FG0 M0 T_L IGNL L_LK[:0] L_T[:0] PRLPVR/GPIO NRGY_TT H_IT_LK H_OK_N#/GPIO H_RT# H_IN[:0] H_OUT H_YN GPIO[] L[:0]#/FHW[:0]# LN_RX[:0] LRQ[0] LRQ[]/GPIO PM# PWRTN# TL# PI_#/GPIO/LGPIO PI_MOI PI_MIO PKR TH_[:0] TP[] U[:0][P,N] M_IH Thermal TTRY LPRKLFT R IH Rev.. Resistor Type/Value PULL-UP 0K PULL-UP 0K PULL-OWN 0K PULL-UP 0K PULL-OWN 0K PULL-UP 0K PULL-OWN 0K PULL-OWN 0K PULL-OWN 0K PULL-OWN 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP K PULL-UP 0K PULL-OWN 0K PULL-UP 0K PULL-OWN 0K PULL-UP 0K PULL-UP 0K PULL-OWN K FG FG[:] FG FG0 VO_TRLT L T Montevina Platform esign guide 0. page trap escription onfiguration F Frequency 000 = F0 elect 0 = F 00 = F00 others = Reserved Reserved MI x elect 0 = MI x = MI x (efault) itpm Host 0= The itpm Host Interface is enabled(note) Interface =The itpm Host Interface is disalbed(default) 0 = Transport Layer ecurity (TL) cipher Intel Management suite with no confidentiality engine rypto strap = TL cipher suite with confidentiality (default) 0 = Reverse Lanes,->0,-> ect.. PI Graphics Lane = Normal operation(efault):lane Numbered in order PI Loopback enable XOR/LL MI Lane Reversal igital isplay Port (VO/P/iHMI) oncurrent with PIe VO Present Local Flat Panel (LFP) Present 0 = nable (Note ) = isabled (default) 00 = Reserve 0 = XOR mode nabled 0 = LLZ mode nabled (Note ) = isabled (default) = ynamic OT nabled 0 = Normal operation(efault): Lane Numbered in Order 0 = LFP isabled (efault) Reference (efault) = Reverse Lanes MI x mode[mh -> IH]:(->0,->,->and0->) MI x mode[mh -> IH]:(->0,->) 0 = Only igital isplay Port or PI is operational (efault) =igital display Port and PIe are operting simulataneously via the PG port 0 =No VO ard Present (efault) = VO ard Present = LFP ard Present; PI disabled NOT:. ll strap signals are sampled with respect to the leading edge of the (G)MH Power OK (PWROK) signal.. itpm can be disabled by a 'oft-trap' option in the activated only after enabling itpm via FG. Only one of the FG0/FG//FG straps can be enabled at any time. Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of

V_0 V_0 V_0 R V_MPWR_0 V_LKPLL_0 0R00-P 0 UVKX-GP UVZY-GP UVZY-GP UVZY-GP U0VZY-GP UVZY-GP UVZY-GP UVZY-GP R 0R00-P UVZY-GP V_LKGN_0 UVZY-GP V_LKGN_0 U0VZY-GP UVZY-GP UVZY-GP UVZY-GP R 0R00-P UVZY-GP UVZY-GP PLK_IH LK_IH V_LKPLL_0 LK_IH GN_XTL_OUT LK_MH_LK_ R 0R00-P LK_MH_LK X R 0R00-P X PUT_F LK_MH_LK_# LK_MH_LK# X-M-GP RN X PU_F R 0R00-P N.000. LK_ RNJ--GP-U LK_PI_LN_R PUT_ITP/RT R 0R00-P LK_PI_LN LK_IH LK_PI_LN#_R R 0R00-P GN_XTL_OUT_R LK PU_ITP/R LK_PI_LN# LN U_MHZ/FL, PU_L0 R KRJ--GP LK_PI_NW_R R 0R00-P LK_PI_NW P0VJN-GP RT/R#_F LK_PI_NW#_R R/R#_ 0 R 0R00-P LK_PI_NW# New ard PM_TPPI# PI_TOP# PM_TPPU# LK_PI_IH_ PU_TOP# RT R 0R00-P LK_PI_IH LK_PI_IH_# R 0R00-P R LK_PI_IH# MI, PU_L V_0 RT0 V_0,,0 M_IH LK R0,,0 M_IH T RT/R#_H 0 LK_PWRG K_PWRG/P# R/R#_G RN R 0KRJ--GP RT RN0KJ--GP LK_MH_O# PLKLK0 R R0 TP0 TP RF-L-GP PLKLK PI0/R#_ 0 LK_PI_MINI_ R 0R00-P LK_PI_MINI PLKLK PI/R#_ RT LK_PI_MINI_# LK_PI_MINI# MINI PLKLK PLKLK PI/TM R R 0R00-P PI LK_MH_GPLL_ LK_MH_GPLL PU_L_R 0 PLK_K RN PLKLK PI/_LT RT/R#_ R0 0R00-P LK_MH_GPLL_# R 0R00-P LK_MH_GPLL# N LK PLKLK PLK_IH PLKLK PI_F/ITP_N R/R#_ PLKLK RNJ--GP-U LK_PI_T_ R 0R00-P RT/TT LK_PI_T LK_PI_T_# R 0R00-P R/T LK_PI_T# T, PU_L PLK_K PLK_FWH PU_L_R FL/TT_MO RF0/FL/TT_L RFLK_ R 0R00-P MHZ_NON/RT/ RFLK LK_IH RFLK#_ R 0R00-P RFLK# PLK_FWH PLKLK N# MHZ_/R/ P0VN-GP P0VN-GP N LK RFLK_ R 0R00-P RT0/OTT_ 0 RFLK RN0 RFLK#_ R 0R00-P R0/OT_ RFLK# N LK RNJ--GP-U L=0pF±0.pF P0VJN-GP GN_XTL_IN ILPRKLFT setting table PIN NM RIPTION PI0/R#_ PI/R#_ PI/TM PI PI/M_L PI_F/ITP_N yte, bit 0 = PI0 enabled (default) = R#_ enabled. yte, bit controls whether R#_ controls R0 or R pair yte, bit 0 = R#_ controls R0 pair (default), = R#_ controls R pair yte, bit 0 = PI enabled (default) = R#_ enabled. yte, bit controls whether R#_ controls R or R pair yte, bit 0 = R#_ controls R pair (default) = R#_ controls R pair 0 = Overclocking of PU and R llowed = Overclocking of PU and R NOT allowed V_MPWR_0 PIN NM R/R#_ R/R#_ R/R#_G RT/R#_H RIPTION LK_PU_LK_ LK_PU_LK_# yte, bit 0 = R enabled (default) = R#_ enabled. yte, bit 0 controls whether R#_ controls R or R pair yte, bit 0 0 = R#_ controls R pair (default) = R#_ controls R pair yte, bit 0 = R# enabled (default) = R#_F controls R LK_PU_LK LK_PU_LK# 0 = Pin as R-, Pin as R-#, Pin0 as OT, Pin as OT# = Pin as MHz, Pin as MHz_, Pin0 as R-0, Pin as R-0# yte, bit 0 = R enabled (default) = R#_F controls R RT/R#_.V PI clock output 0 =R/R# = ITP/ITP# P0VN-GP R 0MRJ-L-GP yte, bit 0 = R enabled (default) = R#_ enabled. yte, bit controls whether R#_ controls R0 or R pair yte, bit 0 = R#_ controls R0 pair (default), = R#_ controls R pair P0VN-GP U ILPRKLFT-GP.0.0 RT/R#_F VRF V VPI VR VPU VPLL GN GNPI GNRF GN GNR GNR GNR GNPU GN 0 V_IO VPLL_IO VR_IO VR_IO VR_IO VPU_IO GN yte, bit 0 = R# enabled (default) = R#_G controls R yte, bit 0 = R enabled (default) = R#_H controls R0 PUT0 PU0 0 nd:.00.0 RTMN-0-LFT QFN P P0VN-GP R0 0R00-P R 0R00-P L F L F L0 F PU 0 00M X 0 0 M M 0 M M 0 0 00M 00M 0 0 0 M 0M Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. lock Generator ize ocument Number Rev athedral Peak II PU ( MHz) F ate: Friday, June 0, 00 heet of

H_#[..] H_#[..] H_# J 0V_0 H_TP#[..0] H_# # # H H_# H_TP#[..0] L H_# # NR# H_NR# L H_#[..0] H_# # PRI# G H_PRI# H_#[..0] K H_# # M H_# # FR# H H_FR# N Place testpoint on H_# # R# F H_R# R J H_IRR# with a GN H_#0 # Y# RJ--GP H_Y# N 0." away H_# 0# P H_# # R0# F H_RQ#0 P H_# # L H_IRR# H_# # IRR# 0 TP TP0 P H_# # INIT# H_INIT# P H_# # R # LOK# H H_LOK# H_T#0 M H_PURT#, U OF T0# H_RQ#[..0] H_RQ#0 RT# H_R#[..0] K H_R#0 H_#0 H_# H_RQ# RQ0# R0# F H_R# H_# 0# # Y H H_# H_RQ# RQ# R# F F H_R# H_# # # K H_# H_RQ# RQ# R# G H_# # # V J H_# H_RQ# RQ# TR# G H_TR# G H_# # # V L H_# RQ# F H_HIT# H_THRM H_# # # V H_# H_# HIT# G G H_HITM# H_# # # T Y H_# H_# # HITM# H_# # # U U H_# H_# # XP_PM#0 H_# # # U R H_#0 H_#0 # PM0# TP TP0 K XP_PM# H_# # 0# Y W H_# H_# 0# PM# TP TP0 00P0VKX-GP G XP_PM# H_THRM H_#0 # # W U H_# H_# # PM# TP TP0 J XP_PM# H_# 0# # Y Y TP TP0 H_# H_# # PM# J XP_PM# H_# # # W U H_# H_# PR# TP0 TP0 # H XP_PM# H_# # # W R H_# H_# # PRQ# TP TP0 F XP_TK TP TP0 H_# # # T H_# H_# # TK K XP_TI 0V_0 H_# # # T TP TP0 H_# H_# # TI H XP_TO # # W H_TN#0 J H_TN# H_# # TO TP0 TP0 XP_TM TP TP0 TN0# TN# Y W H_TP#0 H H_TP# H_# # TM XP_TRT# TP TP0 TP0# TP# Y H_INV#0 H H_INV# H_#0 # TRT# XP_RT# INV0# INV# U ide and U H_# 0# R# 0 TP TP0 R V R-GP Non GTL H_# # W H_# N H_# H_# # H_# # # K H_# H_# # THRML H_# # # P H_#0 H_# # PU_PROHOT# PU_PROHOT#_R H_# # 0# R H_# # PROHOT# H_#0 # # H_# H_T# V THRM H_THRM R T# L H_THRM H_# 0# # M H_# THRM 0RJ--GP H_0M# H_# # # L H_# 0M# H_FRR# PM_THRMTRIP-#,, H_# # # 0 M H_# FRR# THRMTRIP# H_IGNN# H_# # # P H_# IGNN# H_# # # F P H_# H_TPLK# H_# # # P H_# TPLK# H_INTR LK_PU_LK H_# # # T H_# LINT0 HLK LK0 0V_0 H_NMI LK_PU_LK# H_# # # R H_#0 LINT LK H_MI# H_# # 0# L H_# MI# PM_THRMTRIP# H_#0 # # T H_# RV_PU_ should connect to H_# 0# # F TP0 TP M N H_# RV_PU_ IH and MH # # TP0 TP RV#M N H_TN# L H_TN# RV_PU_ without T-ing TN# TN# TP0 TP RV#N T R H_TP# M H_TP# RV_PU_ ( No stub) TP# TP# F TP0 TP RV#T V KRF--GP H_INV# N H_INV# RV_PU_ RV#V Layout Note: INV# INV# 0 TP0 TP TP0 TP RV_PU_ RV# "PU_GTLRF0" PU_GTLRF0 OMP0 RV_PU_ 0." max length. TT GTLRF OMP0 R R0 RF-L-GP TP0 TP RV# OMP RV_PU_ TT TT MI OMP U R0 RF-L-GP TP0 TP0 RV# OMP TP0 TP RV_PU_ RV# RV_PU_ TT OMP R RF-L-GP OMP R TP0 TP RV_PU_0 RV# TT TT OMP Y R RF-L-GP TP0 TP F KRF--GP RV#F F TP0 TP RV_PU_ TT F H_PRTP#,, TP0 TP RV_PU_ RV_PU_ TT PRTP# TP0 TP0 KY_N TT PLP# H_PLP# PWR# H_PWR# G-KT-GPU, PU_L0 L0 PWRGOO H_PWRG,,.00.00, PU_L L LP# H_PULP#, PU_L L PI# PI# XP_TM XP_TI XP_PM# H_PURT# U OF R RF--GP RRV 0V_0 R0 RF-L-GP R0 RF-L-GP R RF-L-GP R GROUP 0 R GROUP IH XP/ITP IGNL ONTROL nd:.00.0 TP TP0 Follow emo ircuit TT R KRJ--GP TT R KRJ--GP TT XP_TK R RF-L-GP U0VKX-GP XP_TRT# R RF-L-GP V_0 ll place within " to PU XP_RT# R KRJ--GP KP0VKX-GP 0V_0 T GRP0 T GRP G-KT-GPU.00.00 Net "TT" as short as possible, make sure "TT" routing is reference to GN and away other noisy signals T GRP T GRP H_INV#[..0] H_TN#[..0] H_INV#[..0] H_TN#[..0] Layout Note: omp0, connect with Zo=. ohm, make trace length shorter than 0.". omp, connect with Zo= ohm, make trace length shorter than 0.". Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. XP_TO R00 RF-L-GP PU ( of ) ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of

U OF _OR _OR _OR _OR _OR P U OF P 0 0 0 P 0 T R 0 T00UVM--GP R N TP R F TP0 T.0.0 T T T 0 U U _OR U 0 0 U V V 0 0 0 0 0 0 V V W 0 P P P P P P W 0 W 0 W Y Y Y Y 0 F 0 F0 F F F F F 0V_0 F0 G 0 P_0 P G P V GP-LO-PWR-U P J 0V_0 P K P M P J 00 F 0 P K F F 0 P M 0 0 0 F F P N F F0 P N layout note: "V 0" F F P R as short as possible F F P R F F P T F F P T F F V_0 P V G F0 V 0 P W L G G G 0 H H_VI[..0] PY00T-Y-GP H H_VI0 VI0.000.0 H H_VI _OR VI F H H_VI VI J H_VI VI F J 0 H_VI VI J H_VI VI F R TP0 J 0 H_VI VI 00RF-L-GP-U TP K 0 K K N F _N K L L N _N L TP0 L Layout Note: TP M G-KT-GPU R M TP.00.00 00RF-L-GP-U N and N lines F M TP0 should be of equal length. F M F N F N Layout Note: F N Provide a test point (with F N no stub) to connect a F P differential probe TP between N and F TP0 TP N at the location TP0 where the two.ohm G-KT-GPU resistors terminate the ohm transmission line..00.00 U0VKX-GP U0VKX-GP U0VKX-GP 0UVMX-GP U0VKX-GP 0UVMX-GP 0UVKX-GP U0VKX-GP 0UVMX-GP U0VKX-GP 0UVMX-GP 0UVMX-GP 0UVMX-GP U0VKX-GP 0UVMX-GP U0VKX-GP 0UVMX-GP U0VKX-GP 0UVMX-GP U0VKX-GP 0UVMX-GP U0VKX-GP 0UVMX-GP U0VKX-GP 0UVMX-GP U0VKX-GP 0UVMX-GP U0VKX-GP 0UVMX-GP U0VKX-GP 0UVMX-GP U0VKX-GP U0VKX-GP UVKX-GP UVKX-GP Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PU ( of ) ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of

H_WING routing Trace width and pacing use 0 / 0 mil H_WING Resistors and apacitors close MH 00 mil ( MX ) 0 U0VKX-GP H_ROMP routing Trace width and pacing use 0 / 0 mil H_WING R RF-L-GP Place them near to the chip ( < 0.") 0V_0 H_ROMP 0V_0 R RF--GP R 00RF-L-GP-U R KRF--GP H_#[..0] H_#[..0], H_PURT# H_PULP# H_VRF H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_WING H_ROMP U F H_#_0 G H_#_ F H_#_ H_#_ G H_#_ H H_#_ H H_#_ F H_#_ H_#_ H H_#_ M H_#_0 M H_#_ J H_#_ J H_#_ N H_#_ J H_#_ P H_#_ L H_#_ R H_#_ N H_#_ L H_#_0 M H_#_ J H_#_ N H_#_ R H_#_ N H_#_ N H_#_ P H_#_ N H_#_ L H_#_ N0 H_#_0 M H_#_ Y H_#_ H_#_ Y H_#_ Y0 H_#_ Y H_#_ Y H_#_ Y H_#_ W H_#_ H_#_0 Y H_#_ H_#_ H_#_ H_#_ H_#_ 0 H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ F H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ G H_#_ H_#_ H_WING H_ROMP H_PURT# H_PULP# H_VRF H_VRF HOT OF 0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_# H_T#_0 H_T#_ H_NR# H_PRI# H_RQ# H_FR# H_Y# HPLL_LK HPLL_LK# H_PWR# H_R# H_HIT# H_HITM# H_LOK# H_TR# H_INV#_0 H_INV#_ H_INV#_ H_INV#_ H_TN#_0 H_TN#_ H_TN#_ H_TN#_ H_TP#_0 H_TP#_ H_TP#_ H_TP#_ H_RQ#_0 H_RQ#_ H_RQ#_ H_RQ#_ H_RQ#_ H_R#_0 H_R#_ H_R#_ F H M J P R N M P F G0 J 0 H J0 L L J H0 K 0 F K L0 H G F G 0 H H J F H H J L Y Y L0 M L M K F F H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_INV#0 H_INV# H_INV# H_INV# H_TN#0 H_TN# H_TN# H_TN# H_TP#0 H_TP# H_TP# H_TP# H_RQ#0 H_RQ# H_RQ# H_RQ# H_RQ# H_R#0 H_R# H_R# H_#[..] H_# H_T#0 H_T# H_NR# H_PRI# H_RQ#0 H_FR# H_Y# LK_MH_LK LK_MH_LK# H_PWR# H_R# H_HIT# H_HITM# H_LOK# H_TR# H_INV#[..0] H_TN#[..0] H_TP#[..0] H_#[..] H_INV#[..0] H_TN#[..0] H_TP#[..0] H_RQ#[..0] H_R#[..0] R KRF--GP UVZY-GP NTIG-GM-GP-U-NF.NTIG.00U Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. antiga ( of ) ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of

V_ V_0 R0 K0RF-GP FG R0 K0RF-GP FG0 R KRF-GP FG R KRF-GP FG R KRF-GP FG R KRF-GP FG R KRF-GP FG0 R0 KRF-GP FG R KRF-GP FG R KRF-GP FG RN PM_XTT#0 PM_XTT# RN0KJ--GP R KRF--GP M_ROMP_VOH R K0RF--GP 0UVKX-GP UVMX--GP R KRF--GP 0UVKX-GP M_ROMP_VOL 0 UVMX--GP layout take note V_ R 0RF-L-GP M_ROMPP M_ROMPN R0 0RF-L-GP, PU_L0, PU_L, PU_L PM_YN#,, H_PRTP# R 0RJ--GP,, VGT_PWRG, PWROK R 0R00-P,,,0, PLT_RT# R0 00RF-GP 00P0VJN-GP,, PM_THRMTRIP-#, PM_PRLPVR V_0 FG FG FG FG FG0 FG FG FG FG FG0 PM_YN# H_PRTP# PM_XTT#0 PM_XTT# PWROK_G RTIN# PM_THRMTRIP-# PM_PRLPVR M N R T H H0 H H K L K N M T M Y G F H F T R P P0 P N M N P T R0 M0 L H P R T R N P T0 T T0 R G F H G H F G H H H H G H F H G G F F U RRV#M RRV#N RRV#R RRV#T RRV#H RRV#H0 RRV#H RRV#H RRV#K RRV#L RRV#K RRV#N RRV#M RRV#T RRV# RRV# RRV#M RRV#Y RRV#G RRV#F RRV#H RRV#F FG_0 FG_ FG_ FG_ FG_ FG_ FG_ FG_ FG_ FG_ FG_0 FG_ FG_ FG_ FG_ FG_ FG_ FG_ FG_ FG_ FG_0 PM_YN# PM_PRTP# PM_XT_T#_0 PM_XT_T#_ PWROK RTIN# THRMTRIP# PRLPVR N#G N#F N# N# N#H N#G N# N#H N#F N#G N#H N#H N#H N#H N#G N#H N#F N#H N#G N# N#G N#F N# N# N#F N# NTIG-GM-GP-U-NF.NTIG.00U RV FG PM N R LK/ ONTROL/OMPNTION LK MI GRPHI VI M MI H OF 0 _K_0 _K K_0 _K K#_0 _K# K#_0 _K# K_0 _K K_0 _K #_0 _# #_0 _# OT_0 _OT OT_0 _OT_ M_ROMP M_ROMP# M_ROMP_VOH M_ROMP_VOL M_VRF M_PWROK M_RXT M_RMRT# PLL_RF_LK PLL_RF_LK# PLL_RF_LK PLL_RF_LK# PG_LK PG_LK# MI_RXN_0 MI_RXN_ MI_RXN_ MI_RXN_ MI_RXP_0 MI_RXP_ MI_RXP_ MI_RXP_ MI_TXN_0 MI_TXN_ MI_TXN_ MI_TXN_ MI_TXP_0 MI_TXP_ MI_TXP_ MI_TXP VI_0 _VI VI VI VI VR_N L_LK L_T L_PWROK L_RT# L_VRF P_TRLLK P_TRLT VO_TRLLK VO_TRLT LKRQ# IH_YN# TTN# H_LK H_RT# H_I H_O H_YN P T V U0 R R U V0 Y Y Y V R Y F Y G H F H V R F F F H 0 H0 H F H G F H H N J H N M G K H 0 M_ROMPP M_ROMPN M_ROMP_VOH M_ROMP_VOL M_RXT R TP_M_RMRT# RF--GP TP0TP0 RFLK RFLK# RFLK RFLK RFLK# RFLK# RFLK RFLK# MI_TXN0 MI_TXN MI_TXN MI_TXN MI_TXP0 MI_TXP MI_TXP MI_TXP MI_RXN0 MI_RXN MI_RXN MI_RXN MI_RXP0 MI_RXP MI_RXP MI_RXP VR_N LPWROK_MH MH_LVRF MH_TTN# M_LK_R0 M_LK_R M_LK_R M_LK_R M_LK_R#0 M_LK_R# M_LK_R# M_LK_R# M_K0 M_K M_K M_K M_0# M_# M_# M_# M_OT0 M_OT M_OT M_OT LK_MH_GPLL LK_MH_GPLL# MI_RXN0 MI_RXN MI_RXN MI_RXN _VI0 _VI _VI _VI _VI TPTP0 MI_TXN0 MI_TXN MI_TXN MI_TXN MI_TXP0 MI_TXP MI_TXP MI_TXP MI_RXP0 MI_RXP MI_RXP MI_RXP R 0R00-P VR_N LK_MH_O# MH_IH_YN# TP0TP0 MH_TTN# R_VRF VI[..0] L_LK0 L_T0 PWROK, L_RT#0 0V_0 0 U0VKX-GP U0VKX-GP 0V_0 R RJ--GP 0 GMH_LK GMH_T GMH_HYN GMH_VYN R KRF--GP R RF--GP L_KLTTL GMH_L_ON LK I T I L_KLTTL GMH_L_ON LTL_LK LTL_T LK I T I GMH_LV_ON GMH_LV_ON LIG TP0 TP L_LVG GMH_LU GMH_GRN GMH_R FOR antiga:00 ohm Teenah: ohm LIG TP0 TP TP0 TP GMH_LU GMH_GRN GMH_R GMH_LK GMH_T GMH_H GMH_V RN RNJ--GP-U RT_IRF R K0RF--GP GMH_LV_ON GMH_L_ON VR_N GMH_TXOUT0+ GMH_TXOUT+ GMH_TXOUT+ GMH_TXOUT0- GMH_TXOUT- GMH_TXOUT- GMH_TXLK- GMH_TXLK+ GMH_TXLK- GMH_TXLK+ GMH_TXOUT0- GMH_TXOUT- GMH_TXOUT- GMH_TXOUT0+ GMH_TXOUT+ GMH_TXOUT+ TV_ TV_ TV_ FOR antiga:.0k_% ohm Teenah:.k ohm RT_IRF routing Trace width use 0 mil RN RN00KJ--GP-U R KRF-GP L G M M K J M 0 H G0 0 H F0 0 H G J G F K F H K H G J G H J J L U L_KLT_TRL L_KLT_N L_TRL_LK L_TRL_T L LK L T L_V_N LV_IG LV_VG LV_VRFH LV_VRFL LV_LK# LV_LK LV_LK# LV_LK LV_T#_0 LV_T#_ LV_T#_ LV_T#_ LV_T_0 LV_T_ LV_T_ LV_T_ LV_T#_0 LV_T#_ LV_T#_ LV_T#_ LV_T_0 LV_T_ LV_T_ LV_T_ TV_ TV_ TV_ TV_RTN TV_ONL_0 TV_ONL_ RT_LU RT_GRN RT_R RT_IRTN RT LK RT T RT_HYN RT_TVO_IRF RT_VYN NTIG-GM-GP-U-NF.NTIG.00U GMH_R GMH_LU GMH_GRN TV_ TV_ TV_ LV LTL_T LTL_LK LK_MH_O# PI-XPR GRPHI TV VG RN RN0F--GP OF 0 PG_OMPI PG_OMPO PG_RX#_0 PG_RX#_ PG_RX#_ PG_RX#_ PG_RX#_ PG_RX#_ PG_RX#_ PG_RX#_ PG_RX#_ PG_RX#_ PG_RX#_0 PG_RX#_ PG_RX#_ PG_RX#_ PG_RX#_ PG_RX#_ PG_RX_0 PG_RX_ PG_RX_ PG_RX_ PG_RX_ PG_RX_ PG_RX_ PG_RX_ PG_RX_ PG_RX_ PG_RX_0 PG_RX_ PG_RX_ PG_RX_ PG_RX_ PG_RX_ PG_TX#_0 PG_TX#_ PG_TX#_ PG_TX#_ PG_TX#_ PG_TX#_ PG_TX#_ PG_TX#_ PG_TX#_ PG_TX#_ PG_TX#_0 PG_TX#_ PG_TX#_ PG_TX#_ PG_TX#_ PG_TX#_ PG_TX_0 PG_TX_ PG_TX_ PG_TX_ PG_TX_ PG_TX_ PG_TX_ PG_TX_ PG_TX_ PG_TX_ PG_TX_0 PG_TX_ PG_TX_ PG_TX_ PG_TX_ PG_TX_ RN RNJ--GP RN V_0 T T H J L L0 N P N T U Y Y Y H J L L N0 P N T U Y W Y 0 J M M M0 M R N T0 U U0 Y0 0 J L M M M R N T U U Y Y 0V_0 R PG_MP RF-GP lose to GMH as 00 mils. RN0KJ--GP Pin Name trap escription onfiguration FG0 igital isplayport (VO/P/HMI) oncurrent with PI Low = Only digital isplayport (VO/P/HMI) or PI is operational (default) High = igital isplayport (VO/P/HMI) and PI are operating simultaneously via the PG port Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. antiga ( of ) ize ocument Number Rev athedral Peak II Friday, June 0, 00 ate: heet of

M Q[..0] M Q[..0] M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q U J _Q_0 J _Q_ N _Q_ M _Q_ J _Q_ J0 _Q_ M _Q_ M _Q_ N _Q_ N _Q_ U0 _Q_0 T _Q_ N _Q_ N _Q_ U _Q_ U _Q_ V _Q_ Y _Q_ 0 _Q Q_ V _Q_0 Y _Q Q_ 0 _Q_ Y _Q Q_ V _Q_ T _Q_ Y _Q Q_ V _Q_0 W _Q Q_ U _Q Q Q_ U _Q_ V _Q Q Q Q_0 _Q_ U0 _Q_ V _Q Q Q_ Y _Q Q_ V _Q_ V _Q_ T _Q_0 N _Q_ U _Q_ U _Q_ T _Q_ N0 _Q_ M _Q_ M _Q_ J _Q_ J _Q_ N _Q_0 M _Q_ J _Q_ J _Q_ R YTM MMORY OF 0 0 _R# _# _W# _M_0 _M M M M M M M Q_0 _Q Q Q Q Q Q Q Q#_0 _Q# Q# Q# Q# Q# Q# Q# M_0 _M M M M M M M M M M_0 _M M M M_ G T 0 0 Y0 M T Y U Y T J J T W U M J T Y U M G H G G F W G H H Y M M0 M M M M M M M M M M M M M M M Q0 M Q M Q M Q M Q M Q M Q M Q M Q#0 M Q# M Q# M Q# M Q# M Q# M Q# M Q# M 0 M M M M M M M M M M 0 M M M M M M[..0] M Q[..0] M Q#[..0] M [..0] M #0 M # M # M R# M # M W# M M[..0] M Q[..0] M Q#[..0] M [..0] M Q[..0] M Q[..0] M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q U K _Q_0 H _Q_ P _Q_ P _Q_ J _Q_ J _Q_ M _Q_ P _Q_ U _Q_ U _Q Q_0 Y _Q_ T _Q_ R _Q Q Q Q Q_ G _Q_ F _Q Q_0 _Q_ F0 _Q_ F _Q_ G _Q_ F _Q_ H _Q_ G _Q_ H0 _Q_ G _Q_ G _Q_0 H _Q_ H _Q_ G _Q_ H _Q_ G _Q_ H _Q_ F _Q_ F _Q_ G _Q Q_0 _Q_ Y _Q_ Y _Q_ F _Q_ F _Q Q Q_ V _Q_ U _Q_ R _Q_0 N _Q_ Y _Q_ V _Q_ P _Q_ R _Q_ L _Q_ L _Q_ J _Q_ H _Q_ M _Q_0 M _Q_ H _Q_ J _Q_ R YTM MMORY OF 0 0 _R# _# _W# _M_0 _M M M M M M M Q_0 _Q Q Q Q Q Q Q Q#_0 _Q# Q# Q# Q# Q# Q# Q# M_0 _M M M M M M M M M M_0 _M M M M_ U G F M Y 0 F G P K L V G G H U N L V H H G T N V U W U W T W Y H U M M0 M M M M M M M M M M M M M M M Q0 M Q M Q M Q M Q M Q M Q M Q M Q#0 M Q# M Q# M Q# M Q# M Q# M Q# M Q# M 0 M M M M M M M M M M 0 M M M M M M[..0] M Q[..0] M Q#[..0] M [..0] M R# M # M W# M #0 M # M # M M[..0] M Q[..0] M Q#[..0] M [..0] NTIG-GM-GP-U-NF NTIG-GM-GP-U-NF.NTIG.00U.NTIG.00U Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. antiga ( of ) ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of

V_ UG OF 0 _OR MT 00m 00MT 000m _XG_N _XG_N _OR P _M N _M H _M G _M F _M _M _M _M _M Y _M W _M V _M U _M T _M R _M P _M N _M H _M G _M F _M G0 _M H _M G _M F _M _M _M _M _M Y _M W _M V _M U _M T _M R _M P _M _M/N _M/N _M/N _M/N W _M/N W _M/N T _M/N Y _XG _XG _XG _XG _XG _XG _XG Y _XG _XG _XG _XG _XG J _XG G _XG _XG _XG _XG Y _XG H0 _XG F0 _XG 0 _XG 0 _XG 0 _XG 0 _XG T _XG T _XG M _XG L _XG _XG J _XG H _XG G _XG F _XG _XG _XG Y _XG V _XG U _XG N _XG M _XG U _XG T _XG J _XG_N H _XG_N POWR M NTIG-GM-GP-U-NF.NTIG.00U NTF M LF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _XG_NTF _M_LF _M_LF _M_LF _M_LF _M_LF _M_LF _M_LF W V W V W V W V W V M L K W V U M0 K0 W0 U0 M L K J H G F Y W V U M K H G F Y W V M L K J H G F Y W V U V M_LF_GMH M_LF_GMH M0M_LF_GMH V M_LF_GMH Y M_LF_GMH M0M_LF_GMH M_LF_GMH U0VKX-GP U0VKX-GP U0VKX-GP place near antiga U0VKX-GP 0UVM-GP UVZY-GP U0VKX-GP 0V_0 _OR Place on the dge Place P where LV and R taps FOR M 0UVMX-GP U0VKX-GP T U0VKX-GP U0VKX-GP 0UVMX-GP U0VKX-GP 0UVMX-GP 0UVMX-GP T 0UVM-LGP 0UVMX-GP 0UVMX-GP oupling P 0UVMX-GP Place on the dge U0VKX-GP 0UVMX-GP U0VZY-GP U0VKX-GP V_ U0VKX-GP 0UVMX-GP 0UVMX-GP 0UVMX-GP oupling P 0 mils from the dge Y W V U H F J G H G F G J H oupling P F G _GMH_ T 0UVMX-GP U0VKX-GP U0VKX-GP U0VKX-GP GP-LO-PWR G Y V U M K J G F UF OR NTIG-GM-GP-U-NF.NTIG.00U POWR NTF OF 0 _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF 0V_0 M L K J H G Y W U M0 L0 K0 H0 G0 F0 0 0 0 0 Y0 W0 V0 U0 L K J H G Y W V L K L K K K K Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. antiga ( of ) ize ocument Number Rev athedral Peak II Friday, June 0, 00 ate: heet of

V_0 0V_0 0V_0 L FM0KF--GP.00. 0ohm 00MHz 0V_0 R0 0R00-P L FM0KF--GP.00. 0ohm 00MHz Imax = 00 m RT-PR-GP.0.GF UVZY-GP R 0R00-P R 0R00-P U 0 0UVMX-GP L PY00T-Y-GP.000.0 0ohm 00MHz 0UVMX-GP 0V_U_MH_PLL L FM0F-T0-GP.00. 0ohm 00MHz V_0 R 0R00-P VIN VOUT GN N/N# N# UVKX-GP 0UVMX-GP V_0_ UVZY-GP m M PLL m M PLL U0VKX-GP m M HPLL.m M MPLL 0m 0V_RUN_PGPLL m U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP VRUN_TV U0VKX-GP VRUN_Q U0VKX-GP UV0KX-GP V_0_ R 0R00-P V_0 0V_0 V_0_ 0V_0 V_0_ 0V_U_MH_PLL R 0R00-P m R 0R00-P R 0R00-P V_ 0m 0.m m V_TXLV_ KP0VKX-GP 0UVMX-GP R0 0R00-P 0UVMX-GP L 0R00-P U0VKX-GP 0UVKX-GP U0VKX-GP U0VKX-GP UVKX-GP UVMX--GP.m V_RT_0 U0VKX-GP V_TXLV_ U0VKX-GP M PLL M PLL M HPLL M MPLL _PG_G U0VKX-GP R 0R00-P m 0V_M_K U0VKX-GP U0VKX-GP U0VKX-GP m VTV 0m VRUN_TV VRUN_Q V_U_LV.m 0UVKX-GP 0UVMX-GP _RT RT_ M G G G F L J J _PLL _PLL _HPLL _MPLL _LV _PG_G 0V_RUN_PGPLL 0V_M _PG_PLL R0 _M P0 _M N0 _M R _M P _M N _M T _M R _M P _M P _M_K N _M_K P _M_K N _M_K N _M_K M _M_K_NTF M _M_K_NTF M _M_K_NTF L _M_K_NTF M _M_K_NTF L _M_K_NTF M _M_K_NTF L _M_K_NTF _TV TV_ M L F UH _LV _H _TV _Q _HPLL 0V_RUN_PGPLL _PG_PLL U0VKX-GP M _LV L _LV RT PLL LV PG M TV H LV NTIG-GM-GP-U-NF.NTIG.00U POWR K TV/RT XF M K MI HV PG U T U T U T U0 T0 U T U T U T U T U T V U V U T V U _XF _XF _XF _M_K F _M_K H0 _M_K G0 _M_K F0 _TX_LV LF OF 0 K _HV _HV _HV _PG V _PG U _PG V _PG U _PG U _MI H _MI F _MI H _MI G LF LF L LF LF LF LF UVKX-GP 0m m m UVKX-GP V_HV_0 UVKX-GP UVKX-GP 0 m V_TXLV_ 0V_0 UVKX-GP m 0V_0 m 0V_0 0V_0 V_0 V_HV_0 R0 0V_HV_0 T--F-GP 0R00-P R 0 0RF-L-GP V_U_M_K V_ R m 0R00-P R V_U_M_K_R 0 U0VKX-GP RF-GP 0UVMX-GP 0 UVKX-GP U0VKX-GP KP0VKX-GP UVKX-GP UVMX--GP U0VKX-GP UVMX-GP UVMX-GP UVKX-GP 0 0UVMX-GP 0UVMX-GP U0VKX-GP V_ R 0R00-P U0VKX-GP 0 0UVMX-GP 0V_0 0UVMX-GP Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. antiga ( of ) ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet 0 of U0VKX-GP

UI U R L W N J F Y T N L G Y V R M V R P H F F H Y U T M F V U M J G Y T N J N L U M H Y U T M G G0 0 V0 N0 H0 0 T M J N L H U H Y U T J F F W T N J H G K U NTIG-GM-GP-U-NF.NTIG.00U OF 0 M P L J F H Y U T F M J F W G V R L H P L H N K F N T N K H F G V T R J G Y P K H F F H F H V R J Y N L J G F Y T J H F R L K J G F H G Y J UJ 0 OF 0 G L W U P N H F R M J G 0 0 W0 T0 J0 G0 Y0 N0 K0 F0 0 0 G G W T R M H U N N K G G W G G N J N L G _NTF _NTF F _NTF V _NTF T _NTF M _NTF _NTF J _NTF _NTF _NTF _NTF Y _NTF N _NTF H _NTF _NTF Y _NTF N G NTF #H G0 NTF #H V0 NTF # T0 NTF # J0 NTF # 0 0 N# M0 N# F N# N# N N# M N# N# G N# N# H N# N# V N# T N# N#F N# N# N# NTF TT PIN:,,,H,H NTF N NTIG-GM-GP-U-NF.NTIG.00U H Y L Y U N J N J G V T M M H Y L J H F V L R P F W U R P J H F Y M K M P H U U U U F V J0 M F U U L0 V0 L J U H H F TP TP0 TP TP0 TP TP0 TP TP0 TP TP0 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. antiga ( of ) ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of

M [..0] M 0 0 M 0 R# 0 M R# 0 R_VRF_ M W# 0 M W# 00 PRLLL TRMINTION M # M # M M 0# 0 M_# RN Put decap near power(0.v) and pull-up resistor M M # M_# M M M M K0 M_K M K 0 M_K M 0 0 M_LK_R RNJ--GP M 0/P K0 0 0 M K0# M_LK_R# RN M_K M M M K M_LK_R M # M K# M_LK_R# TP0 M_K TP M M[..0] M # M M0 / M0 0 M M RNJ--GP M M #0 0 M M 0 M RN M # 0 M M M M M M M M 0 M M M 0 M Q0 M M M M W# M Q Q0 M 0 M M M Q[..0] M Q Q M RNJ--GP M Q Q M Q Q RN M_IH,,0 M M Q Q V_0 M_IH,,0 M_OT M Q Q L M_OT M Q Q M R# M Q Q VP M Q Q RNJ--GP M Q0 Q 0 R_0 M Q Q0 00 R M Q Q RN 0 M # M Q Q N#0 0 0KRJ--GP UVZY-GP M M Q Q N# M 0 M Q Q N# M M Q Q N#0 0 M Q Q N#/TT RNJ--GP M Q Q M Q Q RN M Q0 Q V M M Q Q0 V M M Q Q V M M Q Q V M M Q Q V M Q Q V RNJ--GP M Q Q V 0 M Q Q V 0 M Q Q V RN V_ M #0 M Q Q V M # M Q0 Q V M_# M Q Q0 V M_# M Q Q M Q Q RNJ--GP M Q Q M Q Q M Q Q M Q Q M Q Q M Q Q M Q0 Q M Q Q0 M Q Q M Q Q M Q Q 0 M Q Q M Q Q 0 M Q Q M Q Q M Q Q M Q0 Q M Q Q0 M Q Q M Q Q 0 M Q Q 0 M Q Q V_ Place these aps near M M Q Q M Q Q M Q Q ecoupling apacitor M Q Q M Q0 Q 0 Put decap near power(0.v) M Q Q0 R_VRF_ M Q Q and pull-up resistor M Q Q Q M Q#0 M Q# Q0# M Q#[..0] 0 0 0 0 M Q# Q# M Q# Q# M Q# Q# M Q# Q# M Q# Q# M Q# Q# Q# M Q0 M Q Q0 UVZY-GP UVZY-GP 0 0 UVZY-GP UVZY-GP UVZY-GP UVZY-GP UVZY-GP UVZY-GP UVZY-GP UVZY-GP UVZY-GP M Q[..0] M Q Q M Q Q 0 M Q Q M Q Q M Q Q M Q Q R_VRF Q M_OT OT0 M_OT OT 0 VRF 0 UVKX-GP 0 GN GN 0 UVZY-GP M RVR TYP MH MH MH MH R-00P--GP-U.00. High.mm UVMX--GP UVZY-GP UVMX--GP UVZY-GP UVMX--GP UVZY-GP UVMX--GP UVZY-GP UVMX--GP nd:.00. Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. R ocket 0 (M) athedral Peak II ize ocument Number Rev Friday, June 0, 00 ate: heet of

PRLLL TRMINTION M M [..0] R_VRF_ M 0 0 M 0 /R 0 M R# 0 M /W 0 M W# 00 M / M # Put decap near power(0.v) and pull-up resistor RN M M M_K0 M /0 0 M_0# M # M / M_# M M M K0 M_K0 M_K RNJ--GP M K 0 M 0 0 M 0/P K0 0 M_LK_R0 RN 0 M M /K0 M_LK_R#0 M_OT0 M M_0# M K M_LK_R M R# M /K M_LK_R# TP0 TP M M[..0] M # M M0 / M0 0 RNJ--GP M M M M #0 0 M M 0 M RN M # 0 M M M # M M M M 0 M Q0 M 0 M M M M Q Q0 M M M M Q[..0] M M Q Q M 0 M M M Q Q M RNJ--GP M Q Q M_IH,,0 M Q Q V_0 M_IH,,0 M Q Q L RN M # M Q Q M Q Q VP M_OT M Q Q M_# M Q0 Q 0 M Q Q0 00 RNJ--GP M Q Q 0 M Q N#0 0 UVZY-GP Q M Q Q N# RN M M Q Q N# M M Q Q N#0 0 M M Q Q N#/TT M M Q Q M Q Q RNJ--GP M Q0 Q V M Q Q0 V M Q Q V RN M M Q Q V M M Q Q V M M Q Q V M_K M Q Q V 0 M Q Q V 0 RNJ--GP M Q Q V V_ M Q Q V M Q0 Q V RN M #0 M Q Q0 V M M Q Q M 0 M Q Q M W# M Q Q M Q Q RNJ--GP M Q Q M Q Q M Q Q M Q Q M Q0 Q M Q Q0 M Q Q M Q Q M Q Q 0 M Q Q M Q Q 0 M Q Q M Q Q V_ Place these aps near M M Q Q M Q0 ecoupling apacitor Q M Q Q0 M Q Q R_VRF_ M Q Put decap near power(0.v) 00 Q 0 M Q Q 0 M Q Q and pull-up resistor M Q M Q M Q M Q M Q0 M Q M Q UVMX--GP Q Q Q 0 0 0 0 Q Q 0 Q0 M Q M Q#0 M Q# M Q#[..0] M Q# UVZY-GP UVZY-GP Q UVMX--GP UVMX--GP UVMX--GP UVMX--GP Q Q /Q0 /Q UVZY-GP UVZY-GP UVZY-GP UVZY-GP UVZY-GP UVZY-GP UVZY-GP UVZY-GP UVZY-GP M Q# /Q M Q# /Q M Q# M Q# M Q# M Q0 UVZY-GP /Q /Q /Q 0 /Q M Q Q0 UVZY-GP UVZY-GP UVZY-GP M Q[..0] M Q Q M Q Q 0 M Q Q M Q Q M Q Q M Q Q R_VRF Q M_OT0 OT0 M_OT OT 0 VRF 0 UVKX-GP GN GN 0 KT-OIMM00UGP.00. UVZY-GP RVR TYP High.mm nd:.00. Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. R ocket (M) ize ocument Number Rev athedral Peak II Friday, June 0, 00 ate: heet of

UPN UPP TOUT 0 0UVKX-GP L/INVRTR/ ONN LK I T I LON_OUT UPN_R UPP_R LK I T I _PWR R RIGHTN_N LON_OUT_ POLYW-V-GP.000. U0VZY-GP R 0R00-P R 0R00-P RJ--GP F V_0 V_0 PWR_INVRTR RIGHTN_N LON_OUT L 0 0 0 0 nd: 0.F0.00 nd: 0.F0.00 -ONN0-GP 0.F0.00 0 LV UVZY-GP UVZY-GP 0U0VZY-GP GMH_TXLK+ GMH_TXLK- GMH_TXOUT+ GMH_TXOUT- GMH_TXOUT+ GMH_TXOUT- GMH_TXOUT0+ GMH_TXOUT0- GMH_TXLK+ GMH_TXLK- GMH_TXOUT+ GMH_TXOUT- GMH_TXOUT+ GMH_TXOUT- GMH_TXOUT0+ GMH_TXOUT0- R 0RJ--GP R 0R00-P GMH_TXLK+ GMH_TXLK- GMH_TXOUT+ GMH_TXOUT- GMH_TXOUT+ GMH_TXOUT- GMH_TXOUT0+ GMH_TXOUT0- GMH_TXLK+ GMH_TXLK- GMH_TXOUT+ GMH_TXOUT- GMH_TXOUT+ GMH_TXOUT- GMH_TXOUT0+ GMH_TXOUT0- L_KLTTL RIGHTN 0 LON_OUT,0 Inverter Pin Pin ymbol Vin Vin rightness LON GN GN Pin Pin ymbol _PWR U- U+ GN GN over Up witch V_UX_ R U 0KRJ--GP OUT GN V UVZY-GP M-00-GP.00.0.00..00. UVZY-GP LI_LO# LI_LO# 0 RN RNKJ--GP 00P0VJN-GP 0 00P0VJN-GP LK I T I V_0 LV U GMH_LV_ON GMH_LV_ON Layout 0 mil UVZY-GP IN# OUT N GN GN IN# IN# IN# IN# UVMX-GP UVZY-GP GRU-GP.0.0 UVMX-GP F V_0 FU-V-GP.0.0 F _PWR V_0 0 U0VZY-GP 0 FU-V--GP UVZY-GP.00.0 onsumption stock L ONN Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of

Layout Note: Place these resistors close to the RT-out connector P0VN--GP GMH_R RT_R F0F-GP.000.0 UVZY-GP L GMH_GRN RT_G F0F-GP.000.0 L RT_HYN RT_ GMH_HYN GMH_LU F0F-GP U 0 0.000.0 THTPW-GP RN RN0F--GP RT_VYN GMH_VYN U THTPW-GP Layout Note: * Must be a ground return path between this ground and the ground on the VG connector. P0VN--GP Ferrite bead impedance: 0 ohm@00mhz P0VN--GP L RT_R 0 P0VN-GP V_0 P0VN-GP Hsync & Vsync level shift VPT-GP-U Pi-filter & 0 Ohm pull-down resistors should be as close as to RT ONN. RG will hit Ohm first, pi-filter, then RT ONN. RT_G VPT-GP-U P0VN-GP P0VJN--GP P0VJN--GP V_0 RT_ VPT-GP-U RT I/F & ONNTOR 0 RT V_0 V_RT_0 PT-GP RT_R F RT_G V_RT_ T V_RT_0 RT_ RN FU-V-GP-U RT_HYN RNKJ--GP.000. RN RN0KJ--GP RT_VYN RT_IN#_R 0 LK Q 0UVKX-GP RT_IN#_R T VIO---GP-U 0.0.0 GMH_T _LK & T level shift V_0 V_0 RT_VYN RT_HYN GMH_LK N00W--GP P0VJN--GP LK LK T 00P0VJN-GP R V_0 RT_IN#_R Wistron orporation 0 RT_# F,, ec., Hsin Tai Wu Rd., Hsichih, 0RJ--GP Taipei Hsien, Taiwan, R.O.. VPT-GP-U 0P0VJN-GP 00P0VJN-GP RT onnector ize ocument Number Rev P0VJN--GP 00P0VJN-GP athedral Peak II ate: Friday, June 0, 00 heet of

0 FRONT_PWRL 0 TY_L 0 _TFULL 0 HRG_L WLN_L#_M Q HTZUPT-GP.00.J IN R R Q PWRL#_ R R PTZU-GP-U.00.K Q0 TY_L#_ R R PTZU-GP-U.00.K Q R R PTZU-GP-U.00.K Q R R PTZU-GP-U.00.K GN _TFULL# R RJ--GP R HRG_L# RJ--GP WLN_L#_ R RJ--GP 0 WLN_TT_L G L R FRONT_PWRL#_R RJ--GP R0 TY_L#_R RJ--GP _TFULL#_R HRG_L#_R L-GY--GP.00.I0 L L-GY--GP.00.I0 WLN_L# Q N00--GP V_ V_UX_ PWRL#_ TY_L#_ Power utton W nd:.000. R RJ--GP R RJ--GP W-TT--GP.000. FRONT_PWRL#_P TY_L#_P R K_PWRTN#_ K_PWRTN# 0RJ--GP V_UX_ KP0VKX-GP RN L L-GY--GP.00.I0 V_ RN0KJ--GP K_PWRTN# 0 K_PWRTN# LON_OUT,0 OUT 0 T_L Q R R PTZU-GP-U.00.K T_L# Power utton W R -UTTON#_N_ -UTTON# 0RJ--GP -UTTON# 0 W-TT--GP.000. nd:.000. LUNHN 0 -ON-GP 0.K0.0 KP0VKX-GP V_0 UVZY-GP UVZY-GP 0 UVZY-GP WLN_L# T_L# Volume_Up# T_TN# WIRL_TN# Volume_own# MI_L# P_L# NUM_L# INT_MI nd: 0.K0.0 V_0 UVZY-GP Volume_Up# 0 T_TN# 0 WIRL_TN# 0 Volume_own# 0 MI_L# P_L# 0 NUM_L# 0 INT_MI V_0 FT0-GP TP WLN_L# V_0 FT0-GP TP 0P0VJN-GP WLN_L# FT0-GP TP0 T_L# T_L# FT0-GP TP 0P0VJN-GP Volume_Up# FT0-GP TP Volume_Up# T_TN# FT0-GP TP 0P0VJN-GP WIRL_TN# FT0-GP TP T_TN# Volume_own# FT0-GP TP 0P0VJN-GP MI_L# FT0-GP TP WIRL_TN# P_L# FT0-GP TP 0P0VJN-GP NUM_L# FT0-GP TP Volume_own# INT_MI FT0-GP TP 0P0VJN-GP MI_L# 0P0VJN-GP P_L# 0P0VJN-GP NUM_L# 0P0VJN-GP INT_MI 0P0VJN-GP MI Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. POWR /LUNH/L OR ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of

P0VJN-GP RT_X RT Z_YN RT_T nd: 0.F0.00 MLX-ON--GP-U 0.F000.00 V_0 R 0KRJ--GP V_UX_ MI_L# RT_T_R UVZY-GP R KRJ--GP V_0 H O RT_UX_ RN RN0KJ-GP-U R MRJ--GP MI_L# T_RXN0 T_RXP0 T_TXN0 T_TXP0 T_RXN T_RXP T_TXN T_TXP H_OK_RT# RT_X INTVRMN LN00_LP LN_RTYN GLN_OMP place within 00 mil of IHM V_0 GLN_OK# GLN_OK# R R GLN_OMP Z_TLK_M RJ--GP RF-L-GP Z_ITLK R 0R00-P Z_IT_LK_R RN 0P0VJN-GP, Z_YN Z_YN_R, Z_RT# Z_RT#_R, Z_TOUT Z_TOUT_R Z_TIN0 Z_TIN RNJ--GP UVZY-GP UVZY-GP P0VJN-GP TP0 TP R 0MRJ-L-GP RT_RT# RT_RT# F0 INTRUR# Z_TOUT_R H_OK_N# R0 KRJ--GP RTX RTX RTRT# RTRT# INTRUR# INTVRMN LN00_LP GLN_LK LN_RTYN F LN_RX0 G LN_RX LN_RX LN_TX0 LN_TX LN_TX 0 F H_IT_LK H H_YN H_RT# F H_IN0 G H_IN H H_IN H_IN G G U GLN_OK#/GPIO GLN_OMPI GLN_OMPO H_OUT G H_OK_N#/GPIO H_OK_RT#/GPIO TL# 0U0VKX-GP T_RXN0_ J 0U0VKX-GP T_RXP0_ T0RXN H T_TXN0_ T0RXP 0U0VKX-GP F T_TXP0_ T0TXN 0U0VKX-GP G T0TXP 0U0VKX-GP T_RXN_ H 0 T_RXP_ TRXN 0U0VKX-GP J T_TXN_ TRXP 0U0VKX-GP G T_TXP_ TTXN 0U0VKX-GP F TTXP IHM-GP-NF.IHM.00U RT LP LN / GLN PU IH T OF FWH0/L0 FWH/L FWH/L FWH/L FWH/LFRM# LRQ0# LRQ#/GPIO 0GT 0M# PRTP# PLP# FRR# PUPWRG IGNN# INIT# INTR RIN# NMI MI# TPLK# THRMTRIP# PI TRXN TRXP TTXN TTXP TRXN TRXP TTXN TTXP T_LKN T_LKP TRI# TRI K K L K K J J N J J J F G L F F H G G H J G F H J 0 F0 H J J H LP_L0 LP_L LP_L LP_L LRQ0# V_LRQ_0 H_PRTP# IH_TP TRI H_FRR#_R LP_L[0..] LP_LFRM# 0, TP TP0 TP0 TP0 K0GT 0 H_0M# H_PWRG,, H_IGNN# H_INIT# H_INTR KRIN# 0 H_TPLK# H_THRMTRIP_R TP TP0 LK_PI_T# LK_PI_T R0 RF-L-GP Place within 00 mils of IH ball LP_L[0..] 0, H_PRTP#,, H_PLP# H_NMI H_MI# H_FRR# H_PLP# H_THRMTRIP_R R00 RF-L-GP 0V_0 0V_0 H_PWRG V_0 R RJ--GP 0V_0 H_FRR#_R 0V_0 PM_THRMTRIP-#,, Layout note: R needs to placed within " of IH, R must be placed within " of R w/o stub RN RN0KJ--GP RT_UX_ RT_UX_ INTVRMN R 0RJ--GP R 0KRF-L-GP LN00_LP integrated Vccus_0,Vccus_,VccL_ INTVRMN High=nable Low=isable integrated VccLan_0VccL_0 LN00_LP High=nable Low=isable H_INIT# H_INIT#_G Q MMT0--GP FWH_INIT# FWH_INIT# HFPT-GP.R00. TP0 TP X X-KHZ-GPU.000. UVZY-GP RN RNJ--GP R 00RF-L-GP R0 0KRF-L-GP R 0RJ--GP Z_TLK_M P0VJN-GP Z_ITLK P0VJN-GP MI Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. IH-M ( of ) ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of

INT_PIRQ# INT_PIRQ# INT_PIRQ# INT_PIRQ# IHM-GP-NF.IHM.00U PI_PRR# RP 0 V_0 INT_PIRQ# INT_PIRQH# PI_RQ# PI_LOK# PI_RQ#0 INT_PIRQF# INT_PIRQ# INT_PIRQ# INT_PIRQG# V_0 INT_PIRQ# PI_RR# V_0 RNKJ--GP-U PI_RQ# RP 0 V_0 PI_RQ# INT_RIRQ PI_VL# PM_LKRUN# PI_TOP# V_0 PI_FRM# LN PI_RXN PI_RXP PI_TXN PI_TXP PI_RXN PI_RXP PI_TXN PI_TXP MINIR PI_RXN PI_RXP PI_TXN PI_TXP NW R RNKJ--GP-U U0VKX-GP 0 U0VKX-GP U0VKX-GP U0VKX-GP U 0 0 G 0 F F F0 0 F 0 F F G H G H G 0 H J PIRQ# PIRQ# J PIRQ# PIRQ# PI Interrupt I/F RF-L-GP PI_RQ#0 RQ0# F PI_GNT#0 GNT0# G PI_RQ# RQ#/GPIO0 GNT#/GPIO PI_RQ# RQ#/GPIO F GNT#/GPIO F PI_RQ# RQ#/GPIO PI_GNT# GNT#/GPIO F /0# /# /# /# PI_IR# IR# PI_PR PR PIRT# R PI_VL# VL# PI_PRR# PRR# PI_LOK# PLOK# PI_RR# RR# J PI_TOP# TOP# PI_TR# TR# F PI_FRM# FRM# PLTRT# PLT_RT#_R PILK PM# R OF PIRQ#/GPIO H PIRQF#/GPIO K PIRQG#/GPIO F PIRQH#/GPIO G TXN TXP TXN TXP IH_PM# INT_PIRQ# INT_PIRQF# INT_PIRQG# INT_PIRQH# N PRN N PRP P PTN P PTP L PRN L PRP M PTN M PTP J PRN J PRP K PTN K PTP G PRN G PRP H PTN H PTP RP 0 U RNKJ--GP-U TP TP0 PLK_IH TP TP0 INT_PIRQ# PI_IR# PI_TR# I#_ V_0 MI_RXN0 MI_RXP0 MI_TXN0 MI_TXP0 MI_RXN MI_RXP MI_TXN MI_TXP MI_RXN MI_RXP MI_TXN MI_TXP MI_RXN MI_RXP MI_TXN MI_TXP LK_PI_IH# LK_PI_IH MI_IROMP_R UPN0 UPP0 UPN UPP UPN UPP UPN UPP UPN UPP UPN UPP UPN UPP UPN0 UPP0 0, M_LK 0, M_T V_ V_ (GPIO,GPIO) I (0, ) Realtek (, ) eligo (, 0) 00P0VJN-GP V_0 R PLT_RT#,,,0, 0RJ--GP PI-xpress MI0RXN V MI0RXP V MI0TXN U MI0TXP U irect Media Interface MIRXN Y MIRXP Y MITXN W MITXP W MIRXN MIRXP MITXN MITXP MIRXN MIRXP MITXN MITXP PRN MI_LKN T U0VKX-GP TXN PRP MI_LKP T F U0VKX-GP TXP PTN F PTP MI_ZOMP F MI_IROMP F PRN/GLN_RXN PRP/GLN_RXP UP0N PTN/GLN_TXN UP0P PTP/GLN_TXP UPN UPP PI_LK UPN PI_# PI_0# UPP F PI_#/GPIO/LGPIO UPN UPP PI_MOI UPN PI_MIO UPP U_O#0 U_O#0 UPN N U_O# O0#/GPIO UPP N U_O# O#/GPIO0 UPN N U_O# O#/GPIO U W UPP W P U_O# U_O# O#/GPIO UPN Y M U_O# O#/GPIO UPP Y N U_O# O#/GPIO UPN W M U_O# O#/GPIO0 UPP W M U_O# O#/GPIO UPN V N U_O# O#/GPIO UPP V N U_O#0 O#/GPIO UP0N U P U_O# O0#/GPIO UP0P U P O#/GPIO UPN U R0 U_RI_PN UPP U G URI G URI# IHM-GP-NF.IHM.00U PI OF G0 R 0KRJ--GP GP-OPN RTL+L R KRJ--GP I R KRJ--GP Z_PKR MH_IH_YN# IH_TP TP0 TP GPIO should be pulled down to GN only when using Teenah. When using antiga, this ball should be left as No onnect. V_0 Pair 0 U evice U N U N U N MINI WM NW luetooth 0 ardreader N G MLK RN M_LINK_LRT# MT MLINK0 LINKLRT#/GPIO0/LGPIO MLINK MLINK0 MLINK PM_TPPI# PM_TPPU# GLN_OK# GPIO PM_YN# 0 PM_LKRUN#, PI_WK# 0 INT_RIRQ THRM#,, VGT_PWRG TOUT _GPIO PWROK PM_RI# PM_U_TT# RT# GLN_OK# R U_TT#/LPP# G Y_RT# M PMYN#/GPIO0 M_LRT# MLRT#/GPIO TP_PI# TP_PU# LKRUN# I+RTL R IH_TP 0 R0 T 0RJ--GP KRJ--GP _GPIO G LK_L_ TH/GPIO H TH/GPIO 0 I#_ G TH/GPIO 0 WI# GPIO GPIO TP0 TP0 _GPIO LN_PHY_PWR_TRL/GPIO PW_LR# NRGY_TT/GPIO GPIO TH0/GPIO K TP0 TP GPIO0 GPIO F TP0 TP LK_L_0 GPIO0 J LOK/GPIO L R0 GPIO KRJ--GP GPIO L P_VR0 TLKRQ#/GPIO P_VR LO/GPIO G TOUT TOUT0/GPIO F GPIO TOUT/GPIO H TP0 TP GPIO GPIO GPIO/LGPIO RN RN0KJ--GP R RF-L-GP RN0KJ--GP TP0 TP F L 0 WK# M RIRQ J THRM# U RI# VRMPWRG M PKR J MH_YN# TP H0 PWM0 J0 PWM J PWM V_0 V_ P_VR0 P_VR V_0 OOT IO trap PI_GNT#0 PI_# PI_GNT#0 R KRJ--GP PI_# R KRJ--GP GNT0 and PI_# PI_GNT# KRJ--GP R have a weak internal pull up RP U_O# 0 U_O# PM_RI# PI_WK# V_ T0GP TGP GPIO GPIO LP# RP V_ 0 U_O# M_LINK_LRT# GPIO0 M_LRT# OOT IO Location 0 PI 0 PI LP(efault) swap override strap PI_GNT# M IHM-GP-NF No Reboot trap.ihm.00u PKR LOW = efaule High=No Reboot U_O# PM_TLOW#_R WI# U_O#0 RN RN0KJ--GP R 0KRJ--GP T GPIO locks Y GPIO Power MGT MI GPIO ontroller Link R 0KRJ--GP R 0KRJ--GP T0GP/GPIO H TGP/GPIO F TGP/GPIO TGP/GPIO 0 R OF 0KRJ--GP low = swap override enable high = default LK H LK F ULK P LP_# LP_# LP_# G _TT#/GPIO PWROK PRLPVR/GPIO TLOW# PWRTN# LN_RT# RMRT# K_PWRG LPWROK 0 G0 M R 0 R R _TT# PM_PRLPVR PM_TLOW#_R PWRTN#_IH RMRT#_ PM_LP_M# LP_M# L_LK0 F L_LK L_T0 F L_T L_VRF0 L_VRF L_RT0# F L_RT# GPIO/MM_L GPIO0/U_PWR_K GPIO/_PRNT GPIO/WOL_N 0 RN0KJ-L-GP RN0KJ-L-GP R 0KRJ--GP GPIO GPIO0 GPIO GPIO V_ U_O# RT# U_O# U_O# PlanarI (,0) : 0,0 : 0, :,0 :, 0 RMRT#_K LK_IH LK_IH L_LK0 L_T0 L_VRF0_IH L_VRF_IH L_RT#0 PM_U_LK PM_LP_#,0,,,, PM_LP_#,0,, TP TP0 TP TP0 PWROK, R 00KRJ--GP LK_PWRG PWROK, TP TP0 TP TP0 TP TP0 PT-GP 0 ate: Friday, June 0, 00 heet of V_ U_O# U_O# U_O#0 U_O# _GPIO GPIO V_ PM_PRLPVR, PM_PWRTN# 0, V_0 RMRT#_ V_ Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. IH-M ( of ) ize ocument Number Rev R KRF-GP U0VKX-GP R 0RJ--GP T--F-GP RN athedral Peak II U0VKX-GP R RF--GP RN0KJ--GP R KRF-GP RN RN0KJ--GP RN RN0KJ--GP R 0KRJ--GP R 00KRJ--GP R RF--GP

m V_0 V_0 VRF_0 Layout Note: Place near IH m VRF_ U0VKX-GP m *Within a given well, VRF needs to be up before the corresponding.v rail V_0 V_ 0 HH-0PT U0VKX-GP V_0 UVZY-GP HH-0PT V_ UVZY-GP V_0 V_0 m in 0;m in // U0VKX-GP U0VKX-GP V_0 UVKX-GP R 00RJ--GP R 00RJ--GP 0 0m UVMX-GP U0VKX-GP m U0VKX-GP V_0 RT_UX_ U0VKX-GP U0VKX-GP m. 0 U0VKX-GP UPLL=m V_0 U0VKX-GP u in G 0 UVZY-GP U0VKX-GP U0VKX-GP 0UVMX-GP V_0 V_PLL_0 L IN-UH-0-GP.R0.0 0UVMX-GP UVMX-GP U0VKX-GP m U0VKX-GP UVZY-GP U0VKX-GP UVZY-GP VRF_0 VRF_ U0VKX-GP VccLan0 U0VKX-GP UF RT VRF VRF_U F G H H J J K K L L L M M N N N P P R R R R T T T T U U V V U W W K Y Y J TPLL F G H J F G0 G H0 J0 G0 G J UPLL 0 LN_0 LN_0 LN_ LN_ GLNPLL GLN_ GLN_ GLN_ GLN_ GLN_ IHM-GP-NF.IHM.00U GP RX TX U OR GLN POWR OR PU PU P_OR PI OF _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 _0 MIPLL MI MI V_PU_IO V_PU_IO H UH U_0 U_0 U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ L_0 L_ L_ L_ F L L L L L L M M P P T T U U V V V V V V R W 0V_MI_IH_0 Y G J 0 F0 G 0 F G G J J K J J Vccus_0 F F F T T T T T T U U V V W W Y Y T V_ U0VKX-GP G Vccus_0[] G Vccus_[] U0VKX-GP V_0. Layout Note:Place near IHM 0 _=0m V_0 V_ V_MIPLL_IH_0 L0 V_0 IN-UH-0-GP 00.R0.0 0 0UVKX-GP UVMX-GP V_0 m in 0;m in // U0VKX-GP 0 U0VKX-GP U0VKX-GP U0VKX-GP 0UVMX-GP 0 U0VKX-GP U0VKX-GP U0VKX-GP 0 0 U0VKX-GP U0VKX-GP U0VKX-GP TP TP 0 U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP V_0 U0VKX-GP U0VKX-GP U0VKX-GP V_ V_ R 0R00-P UVKX-GP m m 0 U0VKX-GP m U0VKX-GP 0V_0 m 0V_0 m 0V_0 V_0 U_=m 0 U0VKX-GP 0 U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP U0VKX-GP V_ U0VKX-GP U0VKX-GP ize ocument Number Rev ate: Friday, June 0, 00 heet of U0VKX-GP UVKX-GP Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. IH-M ( of ) athedral Peak II

U OF H J J J K K L L L L L L L M 0 M M M M M M M M N N N N N N N N N N P P 0 P P P P P P F P F V_ V_0 P F P F P H R F R F R F R F R RN F R RNKJ--GP G R G R G R G0 T G T G T G T G V_0 T H T H T H H U H U H U Q H U H U, M_LK M_IH,, H U H J U J U N00W--GP J U J V V, M_T V M_IH,, V V 0 V V MU V W W W Y Y Y Y Y G H F F F F TP TP0 NTF_# G NTF_# TP TP0 G NTF_# TP TP0 G NTF_# TP TP0 G NTF_# TP TP0 G NTF_# TP TP0 G NTF_#J J TP TP0 G TP0 TP0 NTF_#J J G TP TP0 Wistron orporation NTF_#H H H TP0 TP0 F,, ec., Hsin Tai Wu Rd., Hsichih, NTF_#J J H TP00 TP0 Taipei Hsien, Taiwan, R.O.. NTF_#J J H TP TP0 NTF_#H H H NTF TT PIN:,,,,, H,J,J,H,J,J IHM-GP-NF.IHM.00U IH-M ( of ) ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet 0 of

V_0 V_0 V_0 RN RN0KJ--GP M0_FN_TH_ M0_FN_TH M0_FN_RIV MPT-GP-U K.R00.M M0_FN_TH_ K *Layout* mil FN V_0 0 U0VZY-GP R 0 UVZY-GP M0_V_ UVMX-GP M_Therm 0 M_Therm 0 MPT-GP-U.R00.M MLX-ON-0-GP-U 0.F000.00 nd: 0.F0.00 nd: 0.0.0 H_THRM H_THRM 0 Q MMT0--GP 0P0VJN-GP 0P0VJN-GP.00.L0 must be near M0.ystem ensor, Put between PU and N. Q MMT0--GP.00.L0 PM_U_LK 0P0VJN-GP.For PU ensor must be near Q must be near Q.HW T sensor Q0 0P0VJN-GP RUN_POWR_ON G.00.N K suspend clock output N00--GP Layout notice : oth H_THRM and THRM routing 0 mil trace width and 0 mil spacing Layout notice : oth N and P routing 0 mil trace width and 0 mil spacing Layout notice : oth N and P routing 0 mil trace width and 0 mil spacing 0P0VJN-GP must be near M0 LK_K_R RF-GP M0_N M0_P M0_N M0_P GN = hannel OPN = hannel +.V = isabled V_0 LK_K R M0_HN M0_FN_mode GN = Fan is OFF OPN = Fan is at 0% full-scale +.V = Fan is at % full-scale R0 0RF-L-GP R0 0KR-GP UVKX-GP 0KRJ--GP R GN U V_V N P N P N P M0-ZK-GP.00. 0KRJ--GP TH N# V_Va HN_L V_UX_ V_UX_ V_0 PUR_HW_HUTOWN# V_GR LRT# LK_K M0_LK_L M0_LK_L THRM# VGT_PWRG RN PUR_HW_HUTOWN# RMRT# M0_FN_mode RN0KJ--GP R0 0RJ--GP V_0 M0_FN_TH_ M0_FN_RIV V_0 FT0-GP TP THRM# GN = Internal Oscillator elected +.V = xternal.khz lock elected UVZY-GP M0_PWROK TRIP_T Pin Voltage V_GR =(((egree-)/) T 0 degree FNa FN_MO 0 FNb TRIP_T V_Vb M0 Y_HN# MLK THRMTRIP# MT POWR_OK# LK_L RN N# GN 0 LRT# LK_IN RT# N# RN0KJ--GP UVZY-GP FT0-GP TP R0 0KRF--GP R0 KRF-GP T--F-GP.R00.F,, VGT_PWRG PUR_HW_HUTOWN# G N00--GP.00.N Q RMRT# (dummy, K already delay) UVZY-GP RMRT# 0, Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thermal/Fan ontrollor ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of

T O onnector T onnector V_0 T_RXP T_RXN T_TXP T_TXN UVZY-GP T0 0U0VZY-GP O + - + - P +V P +V GN GN GN P GN P GN GN GN P P M P KT-TP+P--GP.00. O_P O_M R 0KRJ--GP TP TP0 T NP 0 0 NP T_RXP0 T_RXN0 T_TXN0 T_TXP0 T 0U0VZY-GP UVZY-GP K V_0 MPT-GP KT-TP--GP.00. Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. H & ROM ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of

V_U_0 U UPN0 UPP0 UPN UPP UPN UPP R 0R00-P R 0R00-P R 0R00-P R 0R00-P R 0R00-P R 0R00-P nd:.0.t nd:.0.p0 V_U_0 U_0- U_0+ U_- U_+ V_U_0 U_- U_+ U U U nd:.0.t nd:.0.p0 KT-U--GP.0.W U U KT-U--GP.0.W U0VKX-GP U_O#0 V_ U0VKX-GP V_U_0 V_ V_U_0 U 00 mil IN# OUT# IN# OUT# T T OUT# U_PWR_N# O# N/N# GN UVZY-GP GPU-GP.00. nd source.0.0 V_U_0 U GN VOUT VIN VOUT U_PWR_N# VIN VOUT U_O# N/N# FLG# RTPF-GP.0.0 0 U_PWR_N# UVZY-GP nd source.00. T0UVM--GP V_U_0 0mil U_O# T0UVM-GP T T00UVM-GP UVZY-GP UVZY-GP 000P0VJN-GP 000P0VJN-GP KT-U--GP.0.W LUTOOTH MOUL. / High ctive Voltage V M. ONN V_T_0 0 UVZY-GP V_T_0 put near LU / all U put one choke near connector by MI request LU U VOUT VIN GN N# N/N# RT-PG-GP.0.F nd:.00.f (G0TU-GP) U_- U_+ V_T_0 V_0 U0VZY-GP LUTOOTH_N 0 R 0R00-P, Z_TOUT, Z_YN Z_TIN, Z_RT# UPN UPP M Z_TOUT NP RN RNJ-GP Z_YN_ Z_TIN_ 0 Z_RT#_M NP R 0R00-P TYO-ONN--GP-U 0.F0.0 P0VJN-GP 00P0VJN-GP nd: 0.F00.0 U0VZY-GP U0VZY-GP V_ R 00KRJ--GP V_ UMMY- Z_TLK_M Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. TY-ON--GP-U 0.F0.00 nd: 0.0.0 nd: 0.F0.00 R 0R00-P U_- FT0-GP TP U_+ FT0-GP TP V_T_0 FT0-GP TP U/LUTOOTH/M ize ocument Number Rev athedral Peak II Friday, June 0, 00 ate: heet of

V_0 V 0 V 0 _T/X_/M R00 0RJ--GP _T/X_/M_ R 0R00-P R 0R00-P R_V_0 U0VKX-GP X_# _WP _# X_ X_/M T/X_/M T0/X_/M_0 _T/X_/M_ M_IN# _T/X_/M LK/X_/M_LK _T/X_0 _T/X_WP# X_R/# _T/X_W# _T/X_R# X_L X_# X_L 0 0 U X_ R0 0R00-P V 0 V_0 UVKX-GP V 0 R 0R00-P V_0 U0VKX-GP MO_L VRG R0 0R00-P UVZY-GP V_PLL VRG V_VU_0 V 0 UVZY-GP UVZY-GP UVZY-GP MO_L R L _M VU_R K VU_L R R-GP L-W--GP RRF KRF-GP RT# 0 R_V V_PLL VRG V_IN V V MO_L _M GPIO0 RRF RT# P P P P P P P P P P0 P P P P P P P P P P M XTL_TR XTLI XTLO K O I M_ M_ N#0 0 N# N# GN GN GN GN RT-GR-GP.0.0G K O I V 0 UVZY-GP - P0VN-GP U Q U ORG GN M-WMNTP-GP M_XI UVZY-GP RT# R 00KRJ--GP P0VJN-GP 0 U0VKX-GP R 0KRJ--GP UPP0 UPN0 U_0+ R 0R00-P U_0- R 0R00-P V 0 R 0R00-P XL_TR M_XI M_XO K O I R 0KRF-GP P0VN-GP X XTL-MHZ-GP.000. M_XO LK_ R 0R00-P M_XO IN R-RR (/MM/M/M PRO/X) R U0VZY-GP R_V_0 0 UVZY-GP Pin change to _T/X_/M for X fail R_V_0 X_R/# _T/X_R# X_# X_L X_L _T/X_W# _T/X_WP# X_# _T/X_0 _LK/X_/M_LK _T/X_/M T/X_/M X_ X_/M T0/X_/M_0 _T/X_/M_ 0 NP NP X M_ X_R/ X_R X_ X_L X_L X_W X_WP X W X_0 X_ X_ X_ X_ X_ X_ X_ NP NP _T0 _T _T 0 _T _WP_W W _M _LK M_T0 M_T 0 M_T M_T M_LK M_IN M_ GROUN GROUN IN_GN IN_GN _T0/X_/M_0 _T/X_/M T/X_R# _T/X_W# _WP _# _M _LK/X_/M_LK _T0/X_/M_0 _T/X_/M T/X_/M T/X_/M LK/X_/M_LK M_IN# X_/M_ Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. RUP-GP-U 0.I00.00 nd: 0.I00.00 rd: 0.I00.00 RRR- RT ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of

V_LN_ 0RJ--GP R V_0 0R00-P LNPWR V_LN_ V_LN_ V_LN_ R KRJ--GP LN_LKRQ# VP_T VP_LK V_LN_ Kbit V_LN_ RN RNKJ-0-GP U 0 WP L GN T0N-H-T-GP.0.J0 VP_LK VP_T LNLOM PI_RXP PI_RXN U0VKX-GP U0VKX-GP PI_RXP_LN PI_RXN_LN 0 U TX_P TX_N N# V VMIN_VLL TTMO VO_TTL V MT LKRQ# VP_T 0 VO_TTL V VP_LK PI_LK PI_ PI_I PI_O V N# MIN MIP 0 MI- MI+ Pull up for T0 another pull low Main source:.0.j0 nd source:.0.i0 N# RRV# V_ PI_TXN PI_TXP RX_N RX_P V MIN MI- 0KRJ--GP R LK_PI_LN LK_PI_LN# LN_T_L# 0M/00M/G_L# M_LRT#_LN R0 LN_L_0/00/G 0RJ--GP 0 RFLKP RFLKN MLRT# V L_T# L_LINK0/00# VO_TTL MIP RRV# RRV# V V MIN MIP 0 MI+ MI- MI+ L_LINK000# V KP0VKX-GP L_UPLX# MLK GN VO_TTL V TRL TRL PRT#/TTPT WK# V VH/_V WITH_VUX LOM_IL# WITH_ VUX_VLL V XTLO XTLI RT MIN0 MIP0 MI0- MI0+ PL PNP TO HIP P TRL PIN TR I MIL 0 0-0-GP.0.0 V_LN_ R0 0R00-P R KRJ--GP V_LN TRL Q P--GP.000. UVKX-GP U0VKX-GP V_LN_,,,0, PLT_RT# V_LN_ R 00RJ--GP 00P0VJN-GP TRL TRL PLT_RT#_LN LNLOM LNRT R KRF-L-GP U0VKX-GP 0UVKX-GP, PI_WK# LNX R 0MRJ-L-GP LNX X LNX LNX.000. V_ U0VKX-GP V_LN_ R 0R00-P 0 0UVKX-GP 0UVKX-GP U0VKX-GP PL PNP TO HIP P TRL PIN TR I MIL UVKX-GP R0 KRJ--GP TRL Q P--GP.000. 0UVKX-GP V_LN_ V_LN_ V_LN_ KP0VKX-GP 0 U0VKX-GP UVKX-GP KP0VKX-GP U0VKX-GP UVKX-GP V_LN_ UVKX-GP KP0VKX-GP KP0VKX-GP U0VKX-GP 0 UVKX-GP KP0VKX-GP KP0VKX-GP UVKX-GP UVKX-GP UVKX-GP UVKX-GP KP0VKX-GP UVKX-GP KP0VKX-GP XTL-MHZ-GP 0 P0VJN-GP P0VJN--GP 0 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev athedral Peak II ate: Friday, June 0, 00 heet of