Frequency display and VFO stabilizer eliminates frequency drift in home-brew and surplus HF receivers One of the most frequent topics for discussion among the many Home Brewers on the amateur bands is the difficulty of building a VFO that is stable enough to be used on all of the HF bands. The relatively simple circuit described here will stabilize the frequency of an HF VFO, and provide a digital frequency display. The display will allow for the different frequency offsets required for USB and LSB, and the fact that the VFO frequency may be above the signal frequency on some bands, and below it on others. By Eamon Skelton, EI9GQ The circuit uses a microcontroller to count the frequency of an HF VFO (variable frequency oscillator), add or subtract the IF (intermediate frequency) offset, and display the signal frequency on a standard Hitachi intelligent LCD display module. The VFO frequency is stabilized by sending a correcting voltage to a varicap diode in the VFO. The circuit is based on a Huff & Puff stabilizer that I have been using for several years. The circuit design philosophy was to keep the hardware as simple as possible, and to use inexpensive and readily available components. This was made possible by using a microcontroller chip which was programmed to take care of most of the complex functions like counting, arithmetic, and driving the LCD display module. Two versions of the unit were built, one using the 0 microcontroller, and this version using the PIC C5. I have tested the circuit at various frequencies between MHz and 0 MHz. C IRCUIT DESCRIPTION The circuit diagram of the VFO stabilizer is shown in Figure. The circuit is basically a Frequency Locked Loop (FLL). As many of you will be aware, the PICC5 microcontroller is a complete computer on a chip with 5 bits of ROM, bytes of RAM, a clock circuit, I/O pins, a real time clock/counter, and several other useful features. For a full description of the PICC5 and its instruction set, see the Microchip data book or Microchip data sheet DS005. The RF signal picked up from the VFO is amplified and digitized by T, then buffered by ICb. The BSX0 is a fast switching transistor for use up to 00 MHz. The amplified signal is gated by ICc and ICd. A 00-ms gate pulse is generated by a software delay loop in the PIC. The square wave pulses from ICd are counted by IC which is configured as an -bit counter. The output of ICb is connected to the RTCC input of the PIC through a.kω resistor (R). The PIC has a realtime clock/counter (RTCC) which can count pulses applied to the RTCC input (pin ). The RTCC register is only eight bits wide giving a maximum count of 55. If the PIC s internal prescaler is set to divide by 5 the
Visit our Web site at http://ourworld.compuserve.com/homepages/elektor_uk maximum count is 5,55, effectively making a -bit counter. With a -ms gate time this would allow the counter to count up to 5.55 MHz but the resolution would be khz which is not good enough for our purposes. The HC9 counter chip increases the count to bits, or,,5. With a 00-ms gate time this will allow a maximum count frequency of. MHz and a resolution of 0 Hz, that is, if you can find logic chips that are fast enough. One problem with this arrangement is that it is not possible to read the least significant bits directly from the 9 counter. This problem is overcome by sending pulses to the counter input through gate ICd. By counting the number of pulses it takes to make the counter overflow it is a simple matter to calculate the value in the 9 at the time the gate was closed. As the PIC internal prescaler can not be read directly, a similar method is used to calculate the value in the internal prescaler. Pulses are applied to the prescaler input by pin of the PIC (RB) until the prescaler overflows. The most significant bits can be read directly from the RTCC register. This may seem like a strange way of reading the count but it is quite easy to implement in software and makes the circuit hardware very simple. Now that we have the count result stored in the PIC, the IF offset must be added or subtracted; the result is the signal frequency in binary. This number is converted first to BCD, then to ASCII and finally sent to the LCD display module. A new count takes place about 9 times every second, the display is updated every second count, or just over times a second. Updating the display more often than this causes the last digit to flicker, updating less often makes the display sluggish when you tune quickly across the band. Before the first digit of the frequency is displayed a test is done to find out if it is a zero. If it is then a blank space is displayed instead, giving automatic leading zero suppression. Whether the IF offset is to be added or subtracted is determined by the state of the ADD/SUBTRACT (+/ ) input, which is linked to an input pin on the PIC. Whether the offset is for USB (upper sideband) or LSB (lower sideband) is determined by the state of the OFFSET input pin. Suggested circuits for controlling the ADD/SUBTRACT (+/ ) and OFFSET inputs are shown in Figures and respectively. Mind you, these are just examples, the exact configuration of the switches depends on the requirements of your HF receiver. So far the circuit is just acting as a frequency counter and display. At the OFFSET + / K C n R 00k BSX0 C B IC E C R 00n R R R0 k R k C5 0p end of each count/display cycle, the counters are reset and the cycle is repeated again. No attempt is made to control the frequency of the VFO. The control voltage at the output of the integrator is set at about.5 volts and remains there until the LOCK/UNLOCK button, S, is pressed. H OW THE VFO IS CONTROLLED When you find a frequency that you want to stay on, press the LOCK/UNLOCK button. After the button is pressed there is a 00 ms delay, then the result of the most recent count is stored in three registers in the PIC. The result of all subsequent counts are compared with this value. If the current count is less than the stored value, the VFO has apparently drifted lower in frequency; a positive pulse is sent to the integrator (IC) to correct the error. If the current count is greater than the stored value then a negative correction pulse is generated. S ICb 5 & T IC k 00Ω R9 LOCK / UNLOCK BSX0 D GATE R D N00 D D5 D D ICc 9 0 & ICa & 00Ω C 0µ 0V C p R C 00n MCLR RB0 RB RA0 RB IC RA 9 RB 0 PICC5 RB RA - XT/P RB5 RA RB RB RTCC OSC/ OSC CLKOUT D INC 5 X MHz 00Ω ICd & IC5 05 D N00 C p D5 RESET R5 Figure. Circuit diagram of the Fre- The width of the correction quency Display and pulse depends on VFO Stabilizer. the degree of VFO drift. If the error is less than 0 Hz then a very short pulse of about ms duration is generated. Greater frequency errors result in longer correcting pulses: 0 Hz = ms, 0 Hz = ms, 0 Hz = ms and so on. This results in much tighter control of the VFO than can be achieved with a conventional Huff and Puff circuit. When the circuit is in locked mode, the LCD display readout changes: MHz disappears from the display and is replaced by the 0-Hz digit. To the right of this is the error level display which is shown as E0 to E9. E0 means that the error is less than 0 Hz, E is an error level of 0 Hz, E9 is an error level of 00 Hz. If the error level is greater than 9, a 9 is still displayed. The last character on the display is the correction direction indicator: > indicates a positive pulse, < indicates a negative pulse. A low error level indication of 0 or and a continuous rapidly alternat- 9 5 R CTR 0 + ICa CT CT=0 CTR 0 + ICb CT CT=0 C0 0µ 0V C 00n EN RS 5 R k R k 0 9 P 0k CONTRAST x N D D C 00µ V IC C 00n TL0 D D D5 D EN RS K R C9 µ V LCD MODULE IC = HC00 IC = HC9 9000 - K
OFFSET SELECT (OFFSET) USB OSCILLATOR ENABLE LSB OSCILLATOR ENABLE USB LSB 9000 - V ing up/down indication means that all is well, and the VFO frequency is within the control loop bandwidth of the system. The varicap diode control of the VFO should be arranged so that the maximum frequency change is approximately ± khz. This should be sufficient range to keep a moderately stable VFO locked for hours or even days! When you need to change frequency, press the LOCK/UNLOCK button again. This puts the device in unlocked mode, the integrator output is set at.5 volts and the display changes back to digits followed by MHz. To lock to a new frequency simply press the LOCK/UNLOCK button again. T HE PROGRAM Various interesting options are available as regards the control software which resides in the PIC microcontroller. To enable you to make your choice, we first tell you what s available for this project, and then make an important statement. The items available for this project are () a ready-programmed PIC (for 0. MHz IF), () a ready-made PCB and () a diskette containing the source code files for the PIC control program. For prices, order numbers and other relevant information, please refer to the Readers Services pages elsewhere in this issue. And now, a serious note. Although this frequency display/vfo stabilizer Huff and Puff Although this circuit is generally referred to as the huff and puff stabilizer among English-speaking hams, it should really be called the PA0KSB VFO stabilizer after its inventor, the Dutch radio amateur Klaas Spaargaren, PA0KSB. The circuit can act as an outboard enhancement with any reasonable VFO, keeping the output frequency stable within a couple of hertz without adding parasitics and other whistles to the VFO output. A crystal oscillator, whose output frequency need not be a round value, is followed by a divider cascade which open a gate for, say, second. Next, a binary counter counts the VFO cycles within this gate period. On closing the gate, the last counter digit is compared to.if it is smaller, the output of the counter is reset to 0. If it is greater, the output is made logic. The counter output is applied to a D-bistable. If the gate signal drops to 0, the first oneshot is triggered. Next, the second one-shot clocks the or the 0 into the D- bistable. Finally, counter is reset by the third one-shot. If the counter signal was a 0, the Q output of the bistable goes high, charging the capacitor and so causing the VFO frequency to go up. By contrast, a counter signal of causes the frequency to go down. In this way, the VFO frequency puffs at a rate of a few hertz around the stabilization point at which the counter detects an as the last digit. Over the years, the basic design by PA0KSB was enhanced and followed by several variants using a raster of about 0 Hz, allowing virtually continuous tuning. from VFO buffer from XTAL osc. and dividers 5 & / 00 Figure. Suggested method of switching the ADD/SUBTRACT (+/ ) control input on the board. 9 M 000µ is fairly easy to build, you should realize that considerable experience may be required to establish the link with the VFO in your receiver. Before building this project, you should, therefore be positive about the following points. The receiver is a heterodyne (mixer) design. The VFO frequency is between and about 0 MHz.. The VFO has varicap control allowing a tuning range of ± khz to be produced by a control voltage swing of 5 V (.5 V = centre tuning).. The VFO signal can be tapped in a safe way (preferably by inductive coupling) and has a level of at least 00 mv pp. Most experienced radio amateurs (and not only those who actually transmit!) will be able to come to terms with these conditions, if necessary with the help of a fellow ham. Back to your options! Here s what you can do.. I have a receiver with an IF of 0. MHz. Simply order the PCB, the ready-programmed PIC and the source disk supplied through our Readers Services.. I have a receiver with an IF other than 0. MHz. Order the PCB (9000-) and the source code disk (900-) as separate items. Purchase a PICC5, and get hold of a an assembler and a PIC programmer. Edit the source code as explained in the README file, and then program your own PIC.. I have a receiver with an IF of 55 khz or. MHz. Do the same as under. The necessary files are on the disk.. I can make my own PCBs and program my own PICs. Order the diskette only (900-). Make your own PCB using the artwork shown in this article. Burn your own PIC for the IF you require. Tell your friends about it. A PIC programmer can be built from one of the many published designs, or a commercially made unit can be purchased from one of several companies advertising in this magazine. The source code file on disk may be edited using any ASCII word processor. Details on modifying the IF offset are also available. Examples are available for 0. MHz, 55 khz and. MHz. 0 9 0 9 0 9 00n 00n 00n 9000 - C ONSTRUCTION If you use the PCB layout shown in Figure and a ready-made board, construction of the circuit is fairly easy. Check the orientation of all polarized components (electrolytic capacitors, diodes, ICs, transistor T). Use sockets 0
G G 9000- (C) Segment G G W Visit our Web site at http://ourworld.compuserve.com/homepages/elektor_uk to BPF/LPF CONTROL INPUTS 0M 0M 0M 0M 0M M 5M M 0M R x N 9000 - V ADD/SUB ( + / ) for the ICs if you want to experiment with different logic IC families, LS, ALS, HC etc. If you use HC or ALS series chips for IC and IC it will not be necessary to have a heat sink on the 5-V regulator. The circuit was tested with HC ICs, and worked reliably up to about 50 MHz. Higher input frequencies should be possible if you use ALS ICs. The type of opamp used for IC is quite critical, the ADOP0CN gave very good results. If you do not have an ADOP0CN available, the TLOCN also works quite well. Figure. Method of switching the OFFSET select input on the board. Note that USB/LSB selection is only required on SSB receivers. ues shown in the circuit diagram worked fine with several -MHz crystals from the author s junkbox. If the crystal you are using requires different capacitor values it may be necessary to change the value of C. In the author s HF transceiver, the circuit was put in a small box made from copper clad glass fibre board, this box was mounted on top of the VFO. The RF input and control output connections were made with miniature (RG or similar) coaxial cable. A short length of ribbon cable is used to connect the LCD module to the PCB. The OFFSET select input may be connected to the USB/LSB switch on the front panel of the rig. The ADD/SUB- TRACT (+/ ) input may be connected to the band switch of the rig using four diodes (see Figure ). If you only need to subtract the IF offset, you can connect the add/subtract (+/ ) input to ground. (9000-) Figure. Copper track layout and component overlay (board available ready-made through the Readers Services). Components list Resistors: R = 00 kω R,R,R,R,R = kω R,R,R5 = 00Ω R,R = kω R9 = kω R0,R = kω P = 0kΩ preset H Capacitors: C,C,C,C = 00nF C = nf C5 = 0pF trimmer C = pf ceramic C = pf ceramic C = 00µF V radial C9 = µf V radial C0,C = 0µF 0V radial Semiconductors: D,D = N D,D = N00 T = BSX0 IC = HC00 (see text) IC = HC9 (see text) IC = PICC5-XT/P (order code 950-) IC = TL0CP IC5 = 05 Miscellaneous: X = MHz quartz crystal S = push-button, make contact K = -way SIL header LCD module characters PCB only, order code 9000- Disk only, order code 900- PIC only, order code 950- T HE DISPLAY Any general-purpose -line -character display that uses the Hitachi HD0 chip should be suitable (the author used a type LCD display module). Some of these displays have LED or electroluminescent backlighting built in. Do not spend large sums of money on these displays, they are often advertised for less than 5.00. R R + 0 D C C T C0 IC IC5 C P IC D R K IC X C5 C C C R9 9000- R D D R R IC C9 C T T ESTING When the unit is first powered up, adjust preset P for best contrast on the LCD display. Connect your VFO to the input (C), set the ADD/SUB input high to add the IF offset, or low to subtract the IF offset. Set the OFFSET switch for USB (high) or LSB (low). The display should show the approximate frequency of the VFO plus or minus the IF offset. The best way to calibrate the counter accurately is to tune your receiver to a frequency standard signal or a station of known frequency accuracy, then adjust C5 until the displayed frequency is correct. The capacitor val- C T R5 R R offset 9000- (C) Segment R R R0 R +/- S C
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