HCS08 shylion@gmail.com HCS08 Tiny Small shylion@gmail.com HCS08...- 1-1.1. HCS08...- 2-1.1...- 2-1.2 RAM...- 5-1.3 FLASH...- 5-1.4 Vectors...- 6-1.2....- 7-1.3. HCS08 Tiny Small...- 9-1.4. heap segment...12 1.5. stack segment...13
1.1. HCS08 HCS08 Memory Map 16bit 64K MC9S08AW60 $0000 I/O Peripheral Registers $0070 RAM I/O $0100 RAM $0870 $1800 $1860 ROM or FLASH HIGH PAGE REGISTERS 64K ROM or FLASH? $FFB0 $FFC0 $FFFF NV Registers Vectors Vectors 1- AW60 1.1 CPU CPU08 I/O I/O CPU08 BSET 8bit IOREAD OR IOWRITE PTA 0b00000001 PTA PTA A 0 A - - Read-Modify-Write
CPU08 BSET 0, PTAD ; 0xb0 OPCODE, 0x00 operand 2bytes 5 CPU08 3 Direct Page Hige Page FLASH CPU08 0x0100 AW60 0x0000~0x006F 0x1800 High Page Registers SRS SBDFR SOPT SMCLK SDIDH:SDIDL SRTISC SPMSC1 SPMSC2 FLASH I/O System Reset Status Register (SRS) AW60 POR PIN COP ILOP ICG LVD SRS COP SRS CodeWarrior C C #define RESET_WATCHDOG() {asm sta SRS;} Write-once System Option Register (SOPT) 3 COPE COPT STOPE Configuration Bits COPE = 1 STOPE = 0 STOP
High Page Registers HCS08 SBDFR ID System Background Debug Force Reset (SBDFR) HCS08 0x1801 0 BDFR 1 BDM 0x00 System Device Identification Register (SDIDH:SDIDL) HCS08 0x1806:0x1807 16bit 12 SDIDH 4 SDIDL 8 AW60 ID 0x008 Nonvolatile Register 0xFFB0 0xFFBF FLASH NVBACKKEY NVPROT NVOPT const HCS08 Security Protection ; NVPROT Bit0 0 bit7~bit1 7 ; 0x00FF 0xDFFF 0xE000d ; 0xFFFF ORG #$NVPROT DB #$DE // C NVPROT const unsigned char _nvprot @ FFBF = 0xDE Flash Options Register NVOPT 0xFFBF FLASH HCS08 FLASH 0xFFBF bit1 bit0 SEC01:SEC00 SEC01 SEC00 4 1:0 bit 1 NVFOPT copy FOPT HCS08 RAM FLASH FLASH NVBACKKEY 0xFFB0~0xFFB7
FOPT bit7 KEYEN 8bytes NVBACKKEY[8] MD5 SHA-1 NVPROT 0xFFBD NVPROT FLASH FLASH HCS08 FLASH 512bytes FLASH FLASH NVPROT bit0 0 bit7~bit1 FLASH 7 A15~A9 9 1 NVPROT copy FPROT bootloader Bootloader FLASH bootloader redirection NVOPT bit6 FNORED 1.2 RAM CPU08 RAM AW60 2048bytes RAM 0x0070~0x0870 RAM RAM 0x0100 RAM 1.3 FLASH HCS08 0.25um FLASH 512bytes AW60 124 124 512 = 63,280bytes HCS08 FLASH HC08 HC08 100,000
IAP EEPROM FLASH Program/Erase Cycles FLASH bit 0 1 Erase 1 0 Program FLASH FLASH Burst Page HCS08 FLASH FLASH FLASH HC08 HC08 FLASH / HCS08 HCS08 FLASH HC08 IAP FLASH CPU08 FLASH EEPROM bootloader HCS08 FLASH 57kbytes 0x1800 FLASH AW60 0x870~0x17FF 3984bytes 0x1860~0xFFFF 59,296bytes FLASH CPU08 FLASH RAM FLASH / FLASH FLASH 1.4 Vectors CPU08 Reset Vector Interrupt Vector Table IVT FLASH 0xFFFE:0xFFFF PC Bill Blunden Bill CPU ISR HCS08 FLASH 0xFFC0~0xFFFF 16bit CPU08 CPU
CCR I 3 CPU PCL PCH X A CCR H IRQ SWI CPU bootloader IVT Redirection MAP 1.2. unsigned char CPU Intel Little Endian Intel Big Endian CodeWarrior C08 Big Endian long 4 bytes 4 unsigned char void main(void) { unsigned char temp; long x = 0x12345678; long *px = &x; temp = (unsigned char) *((unsigned char *)px + 0); temp = (unsigned char) *((unsigned char *)px + 1); temp = (unsigned char) *((unsigned char *)px + 2); temp = (unsigned char) *((unsigned char *)px + 3); #ifdef HCS08 EnableInterrupts; /* enable interrupts */ /* include your code here */ for(;;) { RESET_WATCHDOG(); /* feeds the dog */ } /* loop forever */ /* please make sure that you never leave main */ #endif } HCS08 PC HCS08 4 temp 0x12 0x34 0x56 0x78 PC 4 0x78 0x56 0x34 0x12 PC 4 1byte x HCS08
0x12345678 0x78563412
1.3. HCS08 Tiny Small 08 C Tiny Small Tiny RAM 0x0100 AW60 RAM 0x0070 0x00FF Tiny RAM #pragma Tiny PRM SEGMENTS /* Here all RAM/ROM areas of the device are listed. Used in PLACEMENT below. */ ROM = READ_ONLY 0x1860 TO 0xFFAF; Z_RAM = READ_WRITE 0x0070 TO 0x00FF; RAM = READ_WRITE 0x0100 TO 0x086F; ROM1 = READ_ONLY 0x0870 TO 0x17FF; ROM2 = READ_ONLY 0xFFC0 TO 0xFFCB; END PLACEMENT /* Here all predefined and user segments are placed into the SEGMENTS defined above. */ FAR_RAM INTO RAM; DEFAULT_ROM, ROM_VAR, STRINGS INTO ROM; /* ROM1,ROM2 In case you want to use ROM1,ROM2 as well, be sure the option -OnB=b is passed to the compiler. */ _DATA_ZEROPAGE, MY_ZEROPAGE, DEFAULT_RAM INTO Z_RAM; END STACKSIZE 0x50 VECTOR 0 _Startup /* Reset vector: this is the default entry point for an application. */ PLACEMENT Z_RAM 0x0070 0x00FF 144bytes 0x0100 0x086F 1904bytes FAR_RAM Z_RAM Z_RAM 80bytes RAM 64bytes Startup INIT_SP_FROM_STARTUP_DESC() hidef.h asm LDHX @ SEG_END_SSTACK; asm TXS; SEG_END_SSTACK SP SEG_END_SSTACK map 0x100 OBJECT-ALLOCATION SECTION Name Module Addr hsize dsize Ref Section RLIB ------------------------------------------------------------------------------------------------- - LABELS: SEG_END_SSTACK 100 0 0 1 main.c
unsigned char auto_data[0x40]; /* auto_data[] will be allocated in the default Z_RAM*/ #pragma DATA_SEG FAR_RAM /* specify the allocation segment FAR_RAM */ unsigned char data1; unsigned char data2; #pragma DATA_SEG DEFAULT /*specify the default data segment Z_RAM*/ void main(void) { // static unsigned char data3; /* static variable will also be allocated in Z_RAM /test 1 */ data1 = auto_data[0]; data2 = auto_data[1]; // data3 = 0xff; // test 2 EnableInterrupts; /* enable interrupts */ /* include your code here */ for(;;) { RESET_WATCHDOG(); /* feeds the dog */ } /* loop forever */ /* please make sure that you never leave main */ } auto_data[] RAM Z_RAM #pragma data1 data2 FAR_RAM auto_data[] 64bytes 80bytes #pragma test 1 test 2 data3 auto_data 0x40 L1102: Out of allocation space in segment Z_RAM at address 0xb1 Small prm SEGMENTS /* Here all RAM/ROM areas of the device are listed. Used in PLACEMENT below. */ ROM = READ_ONLY 0x1860 TO 0xFFAF; Z_RAM = READ_WRITE 0x0070 TO 0x00FF; RAM = READ_WRITE 0x0100 TO 0x086F; ROM1 = READ_ONLY 0x0870 TO 0x17FF; ROM2 = READ_ONLY 0xFFC0 TO 0xFFCB; END PLACEMENT /* Here all predefined and user segments are placed into the SEGMENTS defined above. */ DEFAULT_RAM INTO RAM; DEFAULT_ROM, ROM_VAR, STRINGS INTO ROM; /* ROM1,ROM2 In case you want to use ROM1,ROM2 as well, be sure the option -OnB=b is passed to the compiler. */ _DATA_ZEROPAGE, MY_ZEROPAGE, INTO Z_RAM; END STACKSIZE 0x50 VECTOR 0 _Startup /* Reset vector: this is the default entry point for an application. */ Tiny DEAFAULT_RAM RAM FAR_RAM RAM
Z_RAM map SEG_END_SSTACK 0x150 0x0100 0x0150 OBJECT-ALLOCATION SECTION Name Module Addr hsize dsize Ref Section RLIB ------------------------------------------------------------------------------------------------- - LABELS: SEG_END_SSTACK 150 0 0 1 small #pragma #pragma DATA_SEG MY_ZEROPAGE unsigned char dir_data1; /* dir_data1 will be allocated in Z_RAM */ #pragma DATA_SEG DEFAULT unsigned char auto_data2; /* auto_data2 will be allocated in DEFAULT_RAM */ tiny small 0x0100 RAM #pragma Tiny 8bit 0x0100 far unsigned char * far ptr; Small 16bit near 8bit 0x0100 unsigned char * near ptr;
1.4. heap segment C C #include <hidef.h> /* for EnableInterrupts macro */ #include "derivative.h" /* include peripheral declarations */ #include <stdlib.h> /* malloc() and free()*/ void main(void) { unsigned char *ptrtest = NULL; // unsigned char i; i = *ptrtest; ptest = malloc(20); i = *ptrtest; for (i = 0; i < 20; i++) { *(ptrtest++) = i; } i = *ptrtest; ptrtest--; i = *ptrtest; free(ptrtest); i = *ptrtest; // (1) // ptest 20bytes // (2) // (3) // (4) ++ ptest // ptest // (5) // // (6) ptest for(;;) { RESET_WATCHDOG(); /* feeds the dog */ } /* loop forever */ /* please make sure that you never leave main */ } unsigned char ptrtest ptest CW5.1 NULL C5651: Local variable ptrtest may be not initialized 6 ptrtest 7 (1) ptrtest (2) ptrtest run-time library malloc() 20bytes ptrtest 20bytes ptrtest (3) ptrtest 20bytes
(4) ++ ptest (5) ptrtest 1 (6) free() ptrtest malloc() ptest 6 (3) (5) ptrtest CW5.1 CW Heap 2000bytes RAM CW 5.1 C libdefs.h LIBDEF_HEAPSIZE hc08_lib.mcp C 08C Heap Heap malloc() Heap free() 08C Heap RAM 08C Heap CPU08 Heap 8bit 1.5. stack segment C DEFAULT DATA_SEG Small 0x0100 static DEFAULT DATA_SEG
C TSX TXS H:X SP 16bit SP H:X TXS _Startup: LDHX # SEG_END_SSTACK ; SEG_END_SSTACK TXS ; H:X SP CLI ; enable interrupts SEG_END_SSTACK 0x150 small 0x100 0 STACK SIZE H:X 0x150 H:X SP SP 0x14F H:X SP 1 SP X 1 SP SP SEG_END_SSTACK Small DEFAULT_RAM 0x0100 5bytes STACKSIZE 0x50 SEG_START_SSTACK 0x105 SEG_END_SSTACK 0x156 16bit SP SP HCS08 RAM BSR JSR routine RTS PC
ORG $F000 _my_init: F000 AD 02 BSR sub_dummy ; sub_dummy return_address: ; 0xF002 F002 A6 55 LDA #$55 ;... sub_dummy: ; 0xF004 F004 9D NOP ; 0xF002 F005 81 RTS ; 0xF002 PC SP RAM SP PRM STACKIZE 0x50 0x14F 0x50 byte SP SP 1 SP 1 HC05 CPU08 0x00FF HC05 RAM 256bytes RAM 0x00FF RSP SP 0x00FF CPU08 0x0000 0x00FF byte DIR DIR SP RAM RSP CPU SP 8bit 0xFF 8bit
RAM Stack Top Stack Size 0x14C 0x14D 0x14E 0x14F 0x150 = SEG_END_SSTACK 2. Stack