MSP430x11x1 T A -40 ~ SOWB 20 TSSOP (DW) (PW) MSP430F110IDW MSP430F110IPW MSP430F112IDW MSP430F112IPW + F11x 30kΩ

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MSP430F11x 1.8-3.6V 1.6uA@4KHz 200uA@1MHz 2.2V 5 ( 0.8uA RAM 0.

1 MSP430F11x V 2.2V 5 ( 0.8uA RAM 0.1uA) 6us 16 RISC 125nS 32KHz / 16 A/D MSP430F110 1KB+128B 128B RAM MSP430F112 4KB+256B 256B RAM 20 (SOWB) 20 (TSSOP) MSP RISC CPU 16 MSP430 6uS RF I/O A/D MSP430x11x I/O

2 MSP430x11x1 T A -40 ~ SOWB 20 TSSOP (DW) (PW) MSP430F110IDW MSP430F110IPW MSP430F112IDW MSP430F112IPW + F11x 30kΩ

3 I/O P1.0/TACLK 13 I/O I/O Timer_A P1.1/TA0 14 I/O I/O Timer_A P1.2/TA1 15 I/O I/O Timer_A P1.3/TA2 16 I/O I/O Timer_A P1.4/SMCLK/TCK 17 I/O P1.5/TA0/TMS 18 I/O TACLK CCI0A OUT0 CCI1A OUT1 CCI2A OUT2 I/O SMCLK I/O Timer_A P1.6/TA1/TDI 19 I/O I/O Timer_A P1.7/TA2/TDO/TDI + 20 I/O P2.0/ACLK 8 I/O I/O ACLK P2.1/INCLK 9 I/O I/O Timer_A P2.2/TA0 10 I/O I/O Timer_A P2.3/TA1 11 I/O I/O Timer_A P2.4/TA2 12 I/O I/O Timer_A OUT0 OUT1 I/O Timer_A OUT2 INCLK CCI0B OUT0 CCI1B OUT1 OUT2 P2.5/Rosc 3 I/O I/O DCO RST /NMI 7 I TEST 1 I JTAG 30KΩ VCC 2 VSS 4 XIN 6 I XOUT/TCLK 5 I/O + JTAG TDO TDI CPU RISC 7 4 CPU 16 CPU 4 12 CPU

4 PC/R0 SP/R1 SR/CG1/R2 CG2/R3 R4 R5 R14 R ADD R4 R5 R4+R5 R5 CALL R8 PC TOS R8 PC JNE B MOV EDE TONI MOV.B EDE TONI ADD #235h &MEM ADD.B #35h &MEM PUSH R5 PUSH.B R5 SWPB R5 2 s d MOV Rs Rd MOV R10 R11 R10 R11 MOV X(Rn) Y(Rm) MOV 2(R5) 6(R6) M(2 + R5) M(6 + R6) (PC ) MOV EDE TONI M(EDE) M(TONI) MOV &MEM TCDAT M(MEM) M(TCDAT) Y(Rm) Tab(R6) M(R10) M(Tab + R6) RM R11 M(R10) R11 R MOV #X TONI MOV #45 TONI #45 M(TONI) R10

5 s = d = Rs/Rd = / Rn = BR CALL 8 16 MSP430 CPU RETI CPU ACLK LFXTCLK/ MCLK CPU SMCLK DCO (LFXT1CLK / DCOCLK) SR CPU SCG1 SCG0 OscOff CPUOff R V SCG1 SCG0 OscOff CPUOFF GIE N Z C rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 CPUOff SCG1 SCG0 OscOff RETI SCG1 SCG1 SMCLK SMCLK SMCLK SCG0 SCG0 DCOCLK MCLK SMCLK DCOCLK DCOCLK MCLK SMCLK SCG0 SCG0 DCOCLK 1 DCOCLK MCLK(CPUOff=0 SELM.1=0) 2 DCOCLK SMCLK(SCG1=0 SELS=0) (SCG0=1) DCOCLK us ( )

6 OscOff OscOff LFXT OscOff MCLK SMCLK LFXT OscOff (ROM) CPUOff CPU MCLK 0FFFFh-0FFE0h 16 WDTIFG( 1) KEYV( 1) NMI NMIIFG( 1 5) OFIFG( 1 5) ACCIVFG( 1 5) 0FFFEH 15 ( ) 0FFFCH 14 ( ) ( ) 0FFFAH 13 0FFF8H 12 0FFF6H 11 WDTIFG 0FFF4H 10 A CCIFG0( 2) 0FFF2H 9 A CCIFG1 CCIFG2 TAIFG( 1 2) 0FFF0H 8 0FFEEH 7 0FFECH 6 0FFEAH 5 0FFE8H 4 I/O P2(8 P2IFG0 P2IFG7( 1 2) 0FFE6H 3 3) I/O P1(8 ) P2IFG0 P2IFG7( 1 2) 0FFE4H 2 0FFE2H 1 0FFE0H P2 11x ( )

7 1 2(IE1 IE2) h NMIIE OFIE WDTIE rw-0 rw-0 rw-0 WDTIE OFIE ACCVIE h rw-0 rw-0 rw-0 1 2(IFG1 IFG2) h NMIIFG OFIFG WDTIFG rw-0 rw-0 rw-0 WDTIFG VCC RST/NMI OFIFG NMIIFG RST/NMI h rw-0 rw-0 rw-0 rw rw-0 PUC SFR

8 (bootstrap loader) ROM F P1.1 (BSLTX) P2.2(BSLRX) ( 0 7) bootstrap loader MSP430 0FFE0h 0FFFFh 256 / ( UART ) 0 7 A B RAM PC UART 9600 P1.1 P2.2 TI 0FFFEh ( 0C00h) P1.1 P2.2

9 TEST RST/NMI Rsel=5 DCO=4 MOD=0 DCOCLK MCLK SMCLK MCLK SMCLK 1( ) Timer_A Timer_A MCLK 1 CCR0 CCIFG0 WDT. GIE=0 NMIIE=0 OFIFG=0 ACCVIFG=0 220H RAM H 0219H RAM 220H 200H 21FH RAM RAM RST /NMI TEST FFFEH( ) RST/NMI TEST RST/NMI TEST 0C00H( ROM) TEST P1.4 P1.5 P1.6 P1.7 JTAG RST/NMI TEST TEST P1.4-P1.7 TEST TEST ( C000H ) RST/NMI RST/NMI TEST JTAG MSP430 VCC POR RST/NMI NMI BR &0C00H

10 0 7 A B 0-7 A B VPP VCC / VCC / / GIE NMIE ACCVIE 0 ( ROM RAM) CPU JMP $ FCTL1 PUC PUC VCC RST/NMI ( MSP430X1XX USER'S GUIDE SLAU049) ( ) FCTL1 ACCVIFG=1 MSP430X1XX USER'S GUIDE SLAU049) FCTL1 FCTL h SEGWRT WRT Res. Res. Res. Meras Erase Res. rw-0 rw-0 r0 r0 r0 rw-0 rw-0 r0 FCTL1 096h FCTL1 0a5h Erase 0128h bit MEras 0128h bit2 0 1 MEras WRT 0128h bit6 WRT WRT ACCVIFG SEGWRT 0128h bit7 SEGWRT MSP430x1xx User's Guide SLAU SEGWRT WRT MEras Erase BUSY WAIT LOCK

11 ( A B) (0-7) (0-7 A B) 1 FCTL2 ( 1) FCTL2 SSEL0 SSEL1 PUC EMEX BUSY FCTL2 ; (ACCVIFG=1) FCTL Ah SSEL1 SSEL0 FN5 FN4 FN3 FN2 FN1 FN0 rw-0 rw-1 rw-0 rw-0 rw-0 rw-0 rw-1 rw-0 FCTL2 096h FCTL2 0a5h FN0-FN5 012Ah bit FN0-FN5 1 SSEL0 SSEL1 012Ah bit6 7 0 ACLK 1 MCLK 2 SMCLK 3 SMCLK PUC EMEX FCTL3

12 FCTL Ch FCTL3 096h FCTL3 0a5h Res. Res. EMEX Lock WAIT ACCVIFG KEYV BUSY r0 r0 rw-0 rw-1 rw-1 rw-0 rw-(0) r(w)-0 BUSY 012Ch bit0 BUSY (BUSY=0) BUSY BUSY BUSY BUSY ' ' 0 1 KEYV 012Ch bit1 0 0A5h( ) 1 0A5h( ) FCTL1 FCTL2 FCTL3 0A5h KEYV PUC. ACCVIFG 012Ch bit2 3 ACCVIFG ACCVIE IE1 ACCVIFG NMI( ) WAIT 012CH bit3 WAIT WAIT WAIT 0 1 LOCK 012Ch bit4 LOCK SEGWRT WAIT LOCK ACCVIFG LOCK 0 1, LOCK ACCVIFG EMEX 012Ch bit FCTL1 EMEX EMEX 0 NMI NMI RST/NMI(NMIIFG) (OFIFG)

13 (ACCVIFG) RETI NMI

14 2 NMI CPU

15 ( ) MCLK ( ) SMCLK ACLK MCLK CPU SMCLK ACLK LFXT1CLK( ) POR DCOCLK DCOR DCO LFXT1CLK MCLK DCOCLK DCOCLK SMCLK LFXT1CLK DCOCLK ACLK LFXT1CLK XT1 XIN VSS XOUT VSS LFXT1 VCC OscOff 1 MCLK ACLK SMCLK EMI (RTC) / LFXT1CLK DCOCLK 3 MSP430 LFXT1CLK LFXT1 LFXT1 -- (LF) (XT1) LFXT1 DCOCLK DCO DCO 8 DCO DCOCLK DCOCLK CPU DCOCLK SCG0 MCLK DCOCLK

16 I/O 8 I/O -- P1 P2 (11x 6 P2I/O ) P1 P2 7 I/O / I/O P1 8 P2 6 / 7 8 P1/P2 8 P1/P2 8 P1/P2 8 P1/P2 8 P1/P2 8 P1/P2 ( ) 8 P1/P2 8 P1 0 P1 7 P2.0 P2.7 P2 6 P2.0 P2.5 P2 WDT (WDTCNT) 16 WDTCNT (WDTCTL) 16 / ( ) WDTCTL WDTCTL 05Ah 05Ah WDTCTL PUC 069h WDTCTL NMI WDTCTL _A( / ) 11x _A / TACLK(SSEL=0) INCLK SSEL=3 ACLK(SSEL=1) SMCLK(SSEL=2) ( ) / / TA0 TA1 TA2 / CCR2 CCI2B ACLK CCISx=2 CCISx=3( 4) PWM D/A /

17 4 MSP430Fx11x Timer_A _A / CCR0 / UART / /

18 + VCC VSS V ( ) VCC+0.3V

19 /-2mA Tstg( ) Tstg( ) ' ' ' VCC( 6) V / VCC V VSS 0 V T A LF XTS= Hz LFXT (LFXT1)( 7) XT1 khz VCC=1.8V DC 2 MHz ( ) MCLK VCC=2.2V DC 5 MHz VCC=3.6V DC 8 MHz f FTG KHz t CPT ( 8) 3 Ms (TCK TMS TDI RST) (XIN XOUT ) (TCK TMS TDI RST) (XIN XOUT ) VSS 0.8VCC VSS+0.6 VCC V IL (XIN XOUT) VSS 0.2VCC XIN XOUT V IL (XIN XOUT) 0.8VCC VCC V V V 6 VCC<2.5V LFXT1 LF 4.1MΩ XOUT VCC>=2.2V LFXT1 XT1 4MHZ VCC>=2.8V LFXT1 XT1 8MHZ 7 LFXT1 LF LFXT1 XT1 8

20 5 ( ) ( VCC f SYSTEM =1MHz) I (AM) TA = 40 C +85 C VCC=2.2V f (MCLK) = f (SMCLK) = 1 MHz MHz f (ACLK) = Hz VCC=3V I (CPUOff) Low power mode (LPM0) I (LPM2) Low power mode (LPM2) I (LPM3) Low power mode (LPM3) I (LPM4) Low power mode (LPM4) TA = 40 C +85 C VCC=2.2V f (MCLK) =f (SMCLK) =f (ACLK) =4096 Hz VCC=3V TA = 40 C +85 C VCC=2.2V ua f (MCLK ) = 0 f (SMCLK) = 1 MHz f (ACLK) = Hz VCC=3V ua TA = 40 C +85 C VCC=2.2V ua f (MCLK) = f (SMCLK) = 0 MHz f (ACLK) =32 768Hz SCG0=0 VCC=3V ua T A =40 C T A =25 C VCC=2.2V T A =85 C T A =-40 C T A =25 C VCC=3V T A =85 C T A =-40 C f MCLK =0MHz T A =25 C f SMCLK =0MHz VCC=2.2/3V T A =85 C f ACLK =0MHz SCG0= ua ua ua ua

21 0 VCC F I AM = I AM[1 MHz] x f system [MHz] F I AM = I AM[3V] + 120uA/V x (VCC-3V) P1 P2;P1.0 P1.7 P2.0 P2.5 V IT+ V IT- VCC=2.2V V VCC=3V VCC=2.2V V VCC=3V V hys (V IT+ -V IT- ) VCC=2.2V VCC=3V V P1 P2;P1.0 P1.7 P2.0 P2.5 V OH I OHMAX =-1.5mA I OHMAX =-6mA I OHMAX =-1.5mA P1 I OHMAX =-6mA V OH I OHMAX =-1.5mA I OHMAX =-6mA I OHMAX =-1.5mA P2 I OHMAX =-6mA V OL I OHMAX =1.5mA I OHMAX =6mA I OHMAX =1.5mA P1 P2 I OHMAX =6mA VCC=2.2V VCC=3V VCC=2.2V VCC=3V VCC=2.2V VCC=3V 9 VCC-0.25 VCC 10 VCC-0.6 VCC 9 VCC-0.25 VCC 10 VCC-0.6 VCC 11 VCC-0.25 VCC 11 VCC-0.6 VCC 11 VCC-0.25 VCC 11 VCC-0.6 VCC 9 VSS VSS VSS VSS VSS VSS VSS VSS+0.6 V V V 9 I OHMAX I OLMAX 10 I OHMAX I OLMAX 11 12mA 48mA I IKG (Px.x) P1.x 0<x<7( 12 13) VCC=2.2V/3V ±50 na P2.x 0<x<5( 12 13) VCC=2.2V/3V ±50 na 12 VSS VCC ( ) 13

22 Px.x t (int) TAx VCC P1 P2 P1..x P2.x 2.2V 62.( 14) 3V 50 t (cap) Timer_A TA0 TA1 TA2.( 15) 2.2/3V /3V V 62 3V 50 ns ns 14 t (int) t (int) Tint MCLK 15 t (cap) t (cap) 16 TAx Timer_A SMCLK VCC f (in) TA0 TA1 TA2 t H =t L 2.2V 8 3V 10 F (TAint) Timer_A SMCLK 2.2V/3V DC f(system) MHz P1.x P2.x TAx VCC f (P20) P2.0/ACLK C L =20pF 2.2V/3V Fsystem f (TAx) t (Xdc) t (TAdc) TA0 TA1 TA2 CL=20pF SMCLK ( 16) P1.4/SMCLK C L =20pF P2.0/ACLK C L =20pF 2.2V/3V DC fsystem f SMCLK =f LFXT1 =f XT1 2.2V/3V 40% 60% f SMCLK =f LFXT1 =f LF 35% 65% f SMCLK = f LFXT1 /n 50% 50% 50% -15ns -15ns f SMCLK =f DCOCLK 2.2V/3V 50% 50% 50% -15ns -15ns f FP20 =f LFXT1 =f XT1 2.2V/3V 40% %60 f FP20 =f LFXT1 =f LF 30% %70 f FP20 =f LFXT1 /n 50% TA0 TA1 TA2 C L =20pF 2.2V/3V 0 ±50 =50% MHz 16. MCLK MCLK SMCLK ns

23 PUC/POR t (POR_delay) us V (POR) V(min) POR TA= V TA= V VCC=2.2V/3V TA= V t(reset) PUC/POR V 2 us 6 7 V (POR) LFXT1 C (XIN) XTS=0 XTS=1 C (XOUT) XTS=0 XTS=1 LF VCC=2.2V/3V 12 XT1 VCC=2.2V/3V( 17) 2 LF VCC=2.2V/3V 12 XT1 VCC=2.2V/3V( 17) 2 pf 17

24 RAM V (RAMh) CPU ( 18) 1.6 V 18 RAM DCO f (DCO03) Rsel=0 DCO=3 MOD=0 DCOR=0 T A =25 f (DCO13) Rsel=1 DCO=3 MOD=0 DCOR=0 T A =25 f (DCO23) Rsel=2 DCO=3 MOD=0 DCOR=0 T A =25 f (DCO33) Rsel=3 DCO=3 MOD=0 DCOR=0 T A =25 f (DCO43) Rsel=4 DCO=3 MOD=0 DCOR=0 T A =25 f (DCO53) Rsel=5 DCO=3 MOD=0 DCOR=0 T A =25 f (DCO63) Rsel=6 DCO=3 MOD=0 DCOR=0 T A =25 f (DCO73) Rsel=7 DCO=3 MOD=0 DCOR=0 T A =25 f (DCO77) Rsel=7 DCO=7 MOD=0 DCOR=0 T A =25 f (DCO47) Rsel=4 DCO=7 MOD=0 DCOR=0 T A =25 VCC=2.2/3V VCC=2.2V VCC=3V VCC=2.2V VCC=3V VCC=2.2V VCC=3V VCC=2.2V VCC=3V VCC=2.2V VCC=3V VCC=2.2V VCC=3V VCC=2.2V VCC=3V VCC=2.2V VCC=3V VCC=2.2V VCC=3V F DCO40 F DCO40 F DCO40 x1.7 x2.1 x2.5 S (Rsel) S R =f (Rsel+1) /f Rsel VCC=2.2/3V S (DCO) SDCO=f (DCO+1) /f DCO VCC=2.2/3V Dt Dv 19 VCC=2.2V Rsel=4 DCO=3 MOD=0( 19) VCC=3V VCC Rsel=7 DCO=7 MOD=0( 19) MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz ratio %/ VCC=2.2/3V %/V

25 8 DCO DCO fdco 0 fdco 7 DCO DCO0 DCO1 DCO2 S DCO MOD0 MOD4 f DCO+1 32 DCOCLK f DCO =f DCO 2 MOD/32 Rsel4 Rsel5 Rsel5 Rsel6 Rsel6 Rsel7 LPMx t LPM0 VCC=2.2V/3V 100 t LPM2 VCC=2.2V/3V 100 ns t LPM3 t LPM4 f MCLK =1MHz VCC=2.2V/3V 6 f MCLK =2MHz VCC=2.2V/3V 6 ( 20) f MCLK =3MHz VCC=2.2V/3V 6 f MCLK =1MHz VCC=2.2V/3V 6 f MCLK =2MHz VCC=2.2V/3V 6 f MCLK =3MHz VCC=2.2V/3V 6 20 DCOCLK MCLK us us JTAG/Programming f TCK I (DD-PGM) I (DD-ERASE) t (retention) TC JTAG/teset VCC=2.2V DC 5 ( 21) VCC=3V DC 10 MHz VCC=2.7V/3.6V 3 5 ma ( 22) VCC=2.7V/3.6V 3 5 ma ( 22) / f TCK 22. / f FTG f FTG t (word write) = 35 x 1/f (FTG)

26 t (segment write byte 0) = 30 1/f (FTG) t (segment write byte 1 63) = 20 1/f (FTG) t (page erase) = 4819 x 1/f (FTG) t (mass erase) = 5297 x 1/f (FTG) P1 P1.0 P1.3 / x= P1 0 3

27 P1 P1.4 P1.7 /

28 P2 P2.0 P2.4 /

29 P2 P2.5 Rosc /

30 P2 P2.6 P2.7 JTAG TEST MSP430 JTAG TEST TEST

MSP430F KB+256B flash 10KB RAM 64 Quad Flat Pack QFP MSP430x1xx SLAU049 MSP430 MSP RISC CPU 16 DCO 6 MSP430x15x/16x/161x A/D 12 D/A

MSP430F KB+256B flash 10KB RAM 64 Quad Flat Pack QFP MSP430x1xx SLAU049 MSP430 MSP RISC CPU 16 DCO 6 MSP430x15x/16x/161x A/D 12 D/A MSP430x15x, MSP430x16x MSP430x161x 1.8V 3.6V 1MHz 2.2V 280 A 1.6 A RAM 0.1 A 6 S 16 125 DMA 12 A/D 12 D/A / 16 A / 16 B USART1 UART SPI USART0 UART SPI I 2 C / Bootstrap Loader MSP430F155: 16KB+256B flash