DISCRETE SEMICONDUCTORS DATA SHEET M3D91 VHF push-pull power MOS transistor Supersedes data of 1997 Dec 17 23 Sep 2
FEATURES PIN CONFIGURATION High power gain Easy power control Good thermal stability Gold metallization ensures excellent reliability. halfpage 1 2 g 2 g 1 d 2 s DESCRIPTION Dual push-pull silicon N-channel enhancement mode vertical D-MOS transistor, designed for large signal amplifier applications in the VHF frequency range. The transistor is encapsulated in a 4-lead SOT262 A1 balanced flange package, with two ceramic caps. The mounting flange provides the common source connection for the transistors. 5 5 3 4 Top view MSB8 Fig.1 Simplified outline and symbol. CAUTION MBB157 This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport and handling. For further information, refer to Philips specs.: SNW-EQ-68, SNW-FQ-32A, and SNW-FQ-32B. d 1 PINNING - SOT262 A1 PIN DESCRIPTION 1 drain 1 2 drain 2 3 gate 1 4 gate 2 5 source WARNING Product and environmental safety - toxic materials This product contains beryllium oxide. The product is entirely safe provided that the BeO discs are not damaged. All persons who handle, use or dispose of this product should be aware of its nature and of the necessary safety precautions. After use, dispose of as chemical or special waste according to the regulations applying at the location of the user. It must never be thrown out with the general or domestic waste. QUICK REFERENCE DATA RF performance at T h = 25 C in a push-pull common source test circuit. MODE OF OPERATION f (MHz) class-ab 225 28 3 >1 >55 175 28 3 typ. 13 typ. 67 V DS (V) P L (W) G p (db) η D (%) 23 Sep 2 2
LIMITING VALUES In accordance with the Absolute Maximum System (IEC 6134). Per transistor section unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V DS drain-source voltage 65 V V GS gate-source voltage ±2 V I D drain current (DC) 25 A P tot total power dissipation T mb 25 C total device; both sections equally loaded 5 W T stg storage temperature 65 15 C THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS VALUE UNIT thermal resistance from junction to total device; both sections.35 K/W mounting base equally loaded. R th j-mb R th mb-h thermal resistance from mounting base to heatsink total device; both sections equally loaded..15 K/W 1 2 MRA933 6 MGP23 I D (A) P tot (W) (2) (1) (2) 4 1 (1) 2 1 1 1 V DS (V) 1 2 5 1 15 T h ( C) (1) Current is this area may be limited by R DSon. (2) T mb =25 C. Total device; both sections equally loaded. Fig.2 DC SOAR. (1) Continuous operation. (2) Short-time operation during mismatch. Total device; both sections equally loaded. Fig.3 Power derating curves. 23 Sep 2 3
CHARACTERISTICS T j =25 C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Per section V (BR)DSS drain-source breakdown voltage V GS = ; I D = 1 ma 65 V I DSS drain-source leakage current V GS =;V DS =28V 5 ma I GSS gate-source leakage current V GS = ±2 V; V DS = 1 µa V GSth gate-source threshold voltage I D = 1 ma; V DS =1V 2 4.5 V V GS gate-source voltage difference of I D = 1 ma; V DS =1V 1 mv both transistor sections g fs forward transconductance I D = 8 A; V DS =1V 5 7.5 S g fs1 /g fs2 forward transconductance ratio of I D = 8 A; V DS =1V.9 1.1 both transistor sections R DSon drain-source on-state resistance I D = 8 A; V GS =1V.1.15 Ω I DSX on-state drain current V GS = 1 V; V DS =1V 37 A C is input capacitance V GS = ; V DS = 28 V; f = 1 MHz 5 pf C os output capacitance V GS = ; V DS =28V; f=1mhz 36 pf C rs feedback capacitance V GS = ; V DS =28V; f=1mhz 46 pf V GS group indicator GROUP LIMITS (V) GROUP LIMITS (V) MIN. MAX. MIN. MAX. A 2. 2.1 O 3.3 3.4 B 2.1 2.2 P 3.4 3.5 C 2.2 2.3 Q 3.5 3.6 D 2.3 2.4 R 3.6 3.7 E 2.4 2.5 S 3.7 3.8 F 2.5 2.6 T 3.8 3.9 G 2.6 2.7 U 3.9 4. H 2.7 2.8 V 4. 4.1 J 2.8 2.9 W 4.1 4.2 K 2.9 3. X 4.2 4.3 L 3. 3.1 Y 4.3 4.4 M 3.1 3.2 Z 4.4 4.5 N 3.2 3.3 23 Sep 2 4
T.C. (mv/k) 1 MGP24 6 I D (A) MGP25 2 4 3 2 4 5 1 1 1 I D (A) 1 5 1 15 2 V GS (V) V DS = 1 V. Fig.4 Temperature coefficient of gate-source voltage as a function of drain current; typical values per section. V DS = 1 V; T j =25 C. Fig.5 Drain current as a function of gate-source voltage; typical values per section. 2 MGP26 15 MGP27 R DSon (mω) C (pf) 1 1 5 C is C os 5 1 15 T j ( C) 1 2 3 4 V DS (V) I D = 8 A; V GS = 1 V. V GS = ; f = 1 MHz. Fig.6 Drain-source on-state resistance as a function of junction temperature; typical values per section. Fig.7 Input and output capacitance as functions of drain-source voltage; typical values per section. 23 Sep 2 5
6 MGP28 C rs (pf) 4 2 1 2 3 4 V DS (V) V GS = ; f = 1 MHz. Fig.8 Feedback capacitance as a function of drain-source voltage; typical values per section. APPLICATION INFORMATION FOR CLASS-AB OPERATION T h = 25 C; R th mb-h =.15 K/W, unless otherwise specified. RF performance in a linear amplifier in a common source class-ab circuit. R GS = 536 Ω per section; optimum load impedance per section =.79 j.11 Ω. MODE OF OPERATION Ruggedness in class-ab operation f (MHz) The is capable of withstanding a load mismatch corresponding to VSWR = 5 through all phases under the following conditions: V DS = 28 V; f = 225 MHz at rated output power. V DS (V) P L (W) G p (db) class-ab 225 28 3 >1 typ. 11.5 η D (%) >55 typ. 65 175 28 3 typ. 13 typ. 67 23 Sep 2 6
2 G p (db) 15 MGP29 8 η D T h = 25 C 7 C η D (%) 6 4 P L (W) 3 T h = 25 C MGP21 1 G p 25 C 7 C 4 2 7 C 5 2 1 1 2 3 4 PL (W) 1 2 3 4 P IN (W) Class-AB operation; V DS = 28 V; I DQ = 2 25 ma; R GS = 536 Ω (per section); Z L =.79 j.11 Ω (per section); f = 225 MHz. Class-AB operation; V DS = 28 V; I DQ = 2 25 ma; R GS = 536 Ω (per section); Z L =.79 j.11 Ω (per section); f = 225 MHz. Fig.9 Power gain and efficiency as functions of load power; typical values. Fig.1 Load power as a function of input power; typical values. 23 Sep 2 7
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.this text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.this text is here inthis text is here in white to force landscape pages to besunstar rotated correctly 微波光电 http://www.rfoe.net/ when browsing through the pdf in the Acrobat reader. white to force landscape pages to be... 23 Sep 2 8 f = 225 MHz. V DD1 5 Ω input L1 L2 L3 R9 C34 IC1 C1 C2 A L4 C3 L5 A C32 C4 C33 C6 L6 L7 C7 C5 R1 R6 C31 R2 R3 L8 L9 R4 C1 R5 C8 C9 C11 D.U.T. handbook, full pagewidth C12 C13 C14 C15 R7 L1 V DD1 R8 C16 C18 L13 L16 L17 C17 C19 C2 C21 L12 L15 C25 L18 L19 L2 C22 C23 C24 C27 C28 L11 V DD2 L14 C26 Fig.11 Test circuit for class-ab operation. MGP211 L21 C29 C3 L22 L24 L23 5 Ω output
List of components class-ab test circuit; (see Figs 11 and 12) COMPONENT DESCRIPTION VALUE DIMENSIONS CATALOGUE NO. C1, C2 multilayer ceramic chip capacitor; 2 56 pf + 18 pf in parallel, 5 V C3 film dielectric trimmer 2 to 9 pf 2222 89 95 C4 multilayer ceramic chip capacitor; 47 pf, 5 V C5 film dielectric trimmer 5 to 6 pf 2222 89 83 C6, C7, C9, multilayer ceramic chip capacitor; 1 nf, 5 V C1, C12, C15, C31, C34 C8, C11, C16, C21, C32 multilayer ceramic chip capacitor 1 nf, 5 V 2222 852 4714 C13, C14, C18, C19 multilayer ceramic chip capacitor; 51 pf, 5 V C17, C2, C33 electrolytic capacitor 1 µf, 63 V C22 multilayer ceramic chip capacitor; 82 pf, 5 V C23 multilayer ceramic chip capacitor; 1 pf + 3 pf in parallel, 5 V C24, C28 film dielectric trimmer 2 to 18 pf 2222 89 96 C25, C26 multilayer ceramic chip capacitor; C27 multilayer ceramic chip capacitor; C29, C3 multilayer ceramic chip capacitor; 39 pf + 47 pf in parallel, 5 V 18 pf, 5 V 3 1 pf in parallel, 5 V L1, L3, L22, L24 stripline; note 2 5 Ω 4.8 8 mm L2, L23 semi-rigid cable; note 3 5 Ω ext. dia. 3.6 mm ext. conductor length 8 mm L4, L5 stripline; note 2 43 Ω 6 32.5 mm L6, L7, L1, L11 stripline; note 2 43 Ω 6 1.5 mm L8, L9 stripline; note 2 43 Ω 6 3mm L12, L15 grade 3B Ferroxcube wide-band HF choke 2 in parallel 4312 2 36642 L13, L14 2 turns enamelled 1.6 mm copper wire 25 nh int. dia. 5 mm leads 2 7mm space 2.5 mm L16, L17 stripline; notes 2 and 4 43 Ω 6 3mm L18, L19 stripline; notes 2 and 4 43 Ω 6 x 35 mm L2, L21 stripline; notes 2 and 4 43 Ω 6 9mm R1, R6 1 turns potentiometer 5 kω R2, R5.4 W metal film resistor 1 kω 23 Sep 2 9
COMPONENT DESCRIPTION VALUE DIMENSIONS CATALOGUE NO. R3, R4.4 W metal film resistor 536 Ω R7, R8 1 W metal film resistor 1 Ω±5% R9 1 W metal film resistor 3.16 kω IC1 78L5 voltage regulator Notes 1. American Technical Ceramics (ATC) capacitor, type 1B or other capacitor of the same quality. 2. L1, L3 to L11, L16 to L22 and L24 are micro-striplines on a double copper-clad printed-circuit board, with glass microfibre PTFE dielectric (ε r = 2.2), thickness 1 16 inch, thickness of copper sheet 2 35 µm. 3. L2 and L23 are soldered on striplines L1 and L24 respectively. 4. A copper strap, thickness.8 mm, is soldered on striplines L16 to L21. 23 Sep 2 1
handbook, full pagewidth 119 13 1 R9 IC1 +V DD1 L1 L2 C34 C8 to R1, R6 C31 C32 C33 slider R1 R2 C9 C6 C13 C18 C12 C16 L12 R7 L12 L13 +V DD1 C17 L22 hollow rivets C1 C2 C3 L4 L5 C5 R3 R4 L6 C4 L7 L8 L9 L1 C22 L11 hollow rivet C25 L16 L18 C23 C27 C24 L17 L19 C26 C29 L2 C28 L21 C3 hollow rivets L3 C11 slider R6 R5 C1 C7 L14 L15 +V DD2 L23 L24 copper strap C19 R8 L15 C14 C15 C21 C2 copper strap MGP213 Dimensions in mm. The circuit and components are situated on one side of the printed circuit board, the other side being fully metallized, to serve as a ground plane. Earth connections are made by means of copper straps and hollow rivets. Fig.12 Component layout for 225 MHz class-ab test circuit. 23 Sep 2 11
5 Z i (Ω) r i x i MGP218 3 Z L (Ω) 2 R L MGP217 5 1 1 X L 15 2 5 1 15 2 25 f (MHz) 1 5 1 15 2 25 f (MHz) Class-AB operation; V DS = 28 V; I D = 2 25 ma; R GS = 536 Ω (per section); P L = 3 W (total device); T h = 25 C. Fig.13 Input impedance as a function of frequency (series components); typical values per section. Class-AB operation; V DS = 28 V; I D = 2 25 ma; R GS = 536 Ω (per section); P L = 3 W (total device); T h = 25 C. Fig.14 Load impedance as a function of frequency (series components); typical values per section. 4 G p (db) MGP216 3 2 1 5 1 15 2 25 f (MHz) Class-AB operation; V DS = 28 V; I D = 2 25 ma; R GS = 536 Ω (per section); P L = 3 W (total device); T h = 25 C. Fig.15 Power gain as a function of frequency; typical values per section. 23 Sep 2 12
scattering parameters V DS = 28 V; I D = 25 ma; f (MHz) s 11 s 21 s 12 s 22 s 11 Φ s 21 Φ s 12 Φ s 22 Φ 5.85 158.7 22.19 97..1 1.4.9 168.9 1.85 168.6 11.27 88.5.1 2.7.85 174.2 2.85 173.2 5.51 79..1 18.2.83 178.2 3.86 174.1 3.57 72..2 8.2.83 179.8 4.87 174.3 2.56 65.9.2.2.83 178. 5.88 174.4 1.96 6.6.2 7.2.85 176.6 6.89 174.6 1.55 55.7.1 13.1.86 175.8 7.9 174.8 1.26 51.3.1 17.8.87 175.3 8.91 175.1 1.5 47.5.1 21.6.89 175. 9.92 175.5.88 44..1 24.6.9 174.9 1.93 175.8.76 4.6.1 27..91 175. 125.95 176.7.53 33.6.1 3.2.93 175.6 15.96 177.6.38 28.9.1 28.2.94 175.6 175.97 178.4.3 25.5. 21.2.96 176. 2.97 179.2.23 22.3. 5.3.97 176.7 25.98 179.4.16 18.6. 47.5.98 177.6 3.98 178.2.11 17.2.1 71.9.98 178.5 35.98 177.1.8 16.7.1 78..99 179.1 4.99 176.2.7 18.9.1 84.9.99 179.9 45.99 175.2.5 21.7.1 88.1.99 179.6 5.99 174.2.5 26.7.1 88.6.99 179. 6.99 172.3.4 38.3.2 89.4 1. 177.9 7.99 17.4.3 5.8.2 9. 1. 176.9 8.99 168.6.3 63.7.3 91. 1. 176. 9.99 166.6.4 71..3 91.6 1. 175. 1.99 164.7.4 77.6.4 92.3 1. 174.1 Note 1. For more extensive s-parameters see internet: http://www.semiconductors.philips.com/markets/communications/wirelesscommunication/broadcast 23 Sep 2 13
PACKAGE OUTLINE Flanged double-ended ceramic package; 2 mounting holes; 4 leads SOT262A1 D A F D 1 U 1 B q C H 1 w 2 M C M c 1 2 H U 2 p E 1 E 5 A w 1 A B 3 4 M M M b w 3 M Q e 5 1 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A b c D D 1 e E E 1 F H H 1 p Q q U 1 U 2 w 1 w 2 w 3 mm inches 5.77 5..227.197 5.85 5.58.23.22.16.1.6.4 22.17 21.46.873.845 21.98 21.71 11.5 1.27 1.5 1.29 1.3.865.855.435.44.45.396.396 1.78 1.52.7.6 21.8 19.56.83.77 17.2 16.51.67.65 3.28 3.2.129.119 2.85 2.59.112.12 27.94 1.1 34.17 33.9 1.345 1.335 9.91 9.65.39.38.25.51.1.2.25.1 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE SOT262A1 99-3-29 23 Sep 2 14
DATA SHEET STATUS LEVEL DATA SHEET PRODUCT STATUS (1) STATUS (2)(3) DEFINITION I Objective data Development This data sheet contains data from the objective specification for product development. reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 6134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify for any damages resulting from such application. Right to make changes reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status Production ), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 23 Sep 2 15
a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 4 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. Koninklijke Philips Electronics N.V. 23 SCA75 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613524/3/pp16 Date of release: 23 Sep 2 Document order number: 9397 75 11586
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