*_* IAP In Applications Program, *_* ROM RAM A/D D/A KELL C51 2 0531-86213622

Micro Controller Unit( ) INTEL MCS-48 MCS-51 MCS-96 51 MCS-51 8 MCS-96 16 INTEL / 51 87 LPC W78L DS87 GSM97 ATMEL 89C51 Flash ROM Flash ROM 8031 8051 89C51 (,89C51 89S51 89S52 89C52) 8051 51 8051, AVR PIC AVR ATMEL 8 RISC 51 51 1000000000 8 51 51 AVR AVR --PIC MICROCHIP 8 RISC 51 51 51 ( ) MOTOROLA MC68H TI MSP430C TOSHIBA HITACH SIEMENS 51 51 WORD PROTEL 5

CPU RAM ROM 89S51 10 ---- PLC 128 P2 KEIL C51 Keil Software MCS-51 www.keil.com V7.09 Uvision2 2K 200 2000 KEIL C51 HEX BIN 500 FLASH ROM 89S52 6

FLASH ROM 1000 8 2 4 1 A/D TLC0831 D/A MAX517 RAM 6264 ROM 29F020 16*16 I2C 24C01 DS18B20 DS1302 T6963 240*128 MCS-51 1 1 2 7

CPU ROM RAM 89C51 1 VCC 40 +5V 2 VSS 20 GND 3 XTL1 19 XTL2 18 XTL2 4 PSEN 29 ROM 5 ALE/PROG 30 /EPROM ---- 6 RST/VPD 9 / 7 EA/VPP 31 / ROM 30 9 / 8

8 P0 39-32 I/O 9 P1 1-8 I/0 10 P2 21-28 I/0 11 P3 10-17 I/O IN/OUT / 32 I/O LED LED1 LED1 P1.0 1 1 LED1 1 LED1 1 1 CLR P1.0 1 SETB P1.0 16 CLR P1.0;( ) -- CLR P1.0 C2H,90H INTEL 0 0 P1.0 1 LED1 SETB P1.0; LED1 2 1 89C51 2 9

ROM ROM 1 ROM Read Only Memory 1 1 0 0 0 0 1 1 0 1 1 00 01 10 11 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 2 10

0 1 BIT 8 256 8 8 BYTE 2 1 ( 4 ) 2 1234 8 1 1 1 1 1 1 00011010 2 4 5 D7-D0 11

D7-D0 / 3 1 2 2 4 3 8 256 8 6264 16 4 8 8 8 8 FFH 00H 8 51 8 BUS 16 51 16 12

5 89C51 Flash ROM Flash ROM ROM ROM ROM -- Flash ROM PROM EPROM EEPROM PROM OTP EPROM BIOS EEPROM FLASH FLASH ---- ROM RAM Random Access Memory ROM RAM 3 1 2 ROM 3 4 8 256 5 89C51 ROM 13

ROM RAM LED LED1 LED1 P1.0 CLR P1.0 SETB P1.0 1 LED1 2 LED1 2 1 1 2 LED1 1 MAIN:SETB P1.0 ; LCALL DELAY ; CLR P1.0 ; LCALL DELAY ; LJMP MAIN ; DELAY:MOV R7,#250 ; D1:MOV R6,#250 ; D2:DJNZ R6,D2 ; DJNZ R7,D1 ; RET ; END. 1. 2. 3. 1 2 3 4 2 5 1 1 LED1 2 4 5 LJMP MAIN LJMP LJMP MAIN 1 MAIN 5 MAIN 1 MAIN 14

JIGUO CHINA 2 4 LCALL DELAY LCALL LCALL --DELAY DELAY 6 LCALL RET RET LCALL 3 9 RET 2 6.7.8.9 10 RET 3 P1.0 LED1 4 6.7.8.9.10 5 LJMP MAIN 1 P1.0 LED1 LED1 DELAY 6 RET END DELAY R7 RAM 123+456 579 123+456+789 123+456 579 579+789=1368 579 ROM RAM R7 RAM R7 LED 6 MOV R7 #250 R7 250 250 R7 250 R7 R7 250 DUBG8051 250 # # 250 MOV R7 #250 MOV R6 #250 8 DJNZ R6 D2 DJNZ D2 R6 D2 D2 R6 1 0 0 250 R6 0 9 DJNZ R7 D1 MOV R6 #250 R7 1 DJNZ R6 #250 15

250*250=62500 MOV R6 #250 255 LED1 DJNZ R6 #250 250*250=62500 DUBG8051 8051 MON51 51 KEIL C51 MON51 DUBG8051 4 1 2 3 4 ROM RAM 5 RET 6 LCALL LJMP DJNZ 7 DUBG8051 16

DJNZ R6 #250 250*250=62500 1 ROM 2 12 12M T=1/f 1/12 12M 12*1/12 1 S MCS-51 4 INTEL DJNZ 2 S 12M 62500*2 S=125000 S 125mS 0.125S LED1 1 17

MCS-51 XTL1 19 XTL2 18 10-30P PCB 2 XTAL2 XTAL1 20 S 6 3AX31 C 15 6 S 5 1 2 3 4 18

I/O 1 LOOP:MOV P1,#0FFH ; LCALL DELAY ; MOV P1,#00H ; LCALL DELAY ; LJMP LOOP ; DELAY:MOV R7,#250 ; D1:MOV R6,#250 ; D2:DJNZ R6,D2 ; DJNZ R7,D1 ; RET ; END 8 LED LED 2 1 SETB P1.0 MOV P1 #0FFH 3 CLR P1 MOV P1 #00H 8 LED P1 P1.7-P1.0 MOV P1 P1.7-P1.0 LED P1 P2 P3 P4 2 I/O 1 MAIN:MOV P3,#0FFH ; LOOP:MOV A,P3 ; MOV P1,A ; LJMP LOOP ; END. 1 1 LED 2 2 LED 2 4 P3.2 P3.3 P3.4 P3.5 1 P3 P3.7-P3.0 MOV P3 #0FFH 2 MOV A P3 MOV P3 A A R7 3 A P1 4 P3.2 19

#0FFH A P1 P1.2 LED3 P3.3-P3.5 LED4-LED6 LED P2.0-P2.7 P4.0-P4.7 P3 P 89C51 32 SFR P0 P1 P2 P3 1 I/O CPU 1 1 0 Q 0 Q^ 1, 1 1 1 1 I/O MCS-51 P0 P1 P2 P3 / P1 P0 P2 P3 2 20

1 P0 P0 P0 2 1 I/O 1 / / 8 8 P0 / I/O / P0 P1 2 P1 P0 P1 I/O P1 P2 P3 3 P2 P2 I/O P0 8 P0 16 64K 8 I/O 4 P3 P3 I/O P1 P3 P3.0 RXD P3.1 TXD P3.2 INTO 0 P3.3 INT1 1 P3.4 T0 0 P3.5 T1 1 P3.6 WR RAM P3.7 RD RAM CPU CPU I/O I/O I/O I/O P0 10mA P1 P2 P3 20mA 1 I/O 20mA 4N25 PC814 P1.0 Q1 P0-P3 I/O 21

4 VDD VCC, 2 I/O 1A/250V 10 - P1.0 SSR TTL CMOS I/O 6 1 P0 P1 P2 P3 2 3 D 22

MOV P3 #0FFH P3 LED R7 MOV R7 #250 #0FFH 1 Decimal Number 0 1 2 3 4 5 6 7 8 9 5847=5*1000+8*100+4*10+7*1 1000 100 10 1 0 1 2 Binary Number 0 1 1100=1*2 3 +1*2 2 +0*2 1 +0*2 0 0 1 0+0=0 1+0=0+1=1 1+1=10 0*0=0 1*0=0*1=0 1*1=1 3 Hexadecimal Number 0 1 2 3 4 5 6 7 8 9 A B C D E F #0FFH #-- H B D 0FFH 0FFH=F*16 1 +F*16 0 255 0 A-F 0 #0FFH 1 1 1011B 1*2 3 +0*2 2 +1*2 1 +1*2 0 =8+2+1=11D FFH 255D 2 23

0 53D 53D=110101B 2 53 2 26 1 2 13 0 2 6 1 2 3 0 2 1 1 0 1 2 16 16 16 4 4 4 0 4 4 0 4 4 1101011B D6H F0FH 111100001111B 0 0000 0 1 0001 1 2 0010 2 3 0011 3 4 0100 4 5 0101 5 6 0110 6 7 0111 7 8 1000 8 9 1001 9 10 1010 A 11 1011 B 12 1100 C 13 1101 D 14 1110 E 15 1111 F 16 10000 10 MOV R7 #250 MOV R7 #OFFH #250 #0FFH 250D FFH #0FFH 11111111 255 A-F 0 24

ROM RAM MCS-51 ROM 1 R0M 89C51 4K FLASH ROM 000H-0FFH 16*16*16 4K ROM ROM ROM RAM RAM 256 00H-FFH 16*16 00H-7FH 128 RAM 128 00H-1FH 4 8 32 R0-R7 PWS RS0 RS1 20H-2FH 16 RAM 20H 0 2FH 7 128 RAM 30H-7FH 80 80H-FFH SFR 89C51 21 8 128 DBUG8051 7 1 2 3 RAM 4 ROM 5 100 250 100H 4AH FFH 6 0001 0011 1111 A0H FFH 7 100 255 00111100 11110101 25

R7 R6 P0 P1 P2 P3 RAM ROM P0-P3 CPU SFR MCS-51 1. ACC A 2. B B 3. PSW CPU CPU 8 7 D7 D6 D5 D4 D3 D2 D1 D0 CY AC F0 RS1 RS0 0V P 1 CY MCS-51 8 2 8 0-255 255 CY 79H+87H 01111001+01010111 =1 00000000 1 CY 2 AC D3 D4 / AC=1 3 F0 4 RS1 RS0 RS1 RS0 0 0 0 00H-07H 0 1 1 08H-0FH 1 0 2 10H-17H 1 1 3 18H-1FH 0-3 RS1 RS0 8 R0-R7 CPU PSW 10 00010001 RS1=1 RS0=0 2 10H-17H RO-R7 10H-17H DUBG8051 RAM 10H-17H 5 0V 26

6 P A 1 P=1 P=0 58H 01011000 1 P=1 4 DPTR DPH DPL 16 RAM ROM 5 SP RAM RAM 51 INTEL SP SP 27H 27H 31H 31H 30H 30H 29H 29H 28H 28H 27H SP 27H 26H 26H 25H 25H 24H 24H MCS-51 27H 28H 27H 6 PCON PCON SFR 8 1 A 2 3 4 PSW 27

1 1 0000H CPU 2 RST 9 24 12M 3 3 1 C RTS 1ms 2 R2 SA 3 X25045,MAX813L 28

LED 4 PC 0000H ACC 00H B 00H PSW 00H SP 07H DPTR 0000H P0-P3 FFH TMOD XX0000B TCON 0X000000B TL0 00H TH0 00H TL1 00H TH1 00H SCON 00H SBUF PCON 0XXX0000B 2 PC=0000 0000H 0000H LJMP START 3 PCON 8 MSB SB SMOD -- -- -- GF1 GF0 PD IDL SMOD GF1 1 GF0 0 PD PD=1 IDL IDL=1 PD IDL 1 1 PCON IDL=1 CPU RAM SP PC PSW ACC 24mA 3.7mA RETI 2 29 :0531-86213622

PCON PD=1 RAM 2V 50uA 10mS 4 51 OTP 9 1 2 3 4 30 :0531-86213622

ROM ) MOV R7 #250 MOV P1 #0FFH MOV R7 P1 #0FFH ( MAIN SETB P1.0 MAIN SETB P1.0 1 MOV 30H #255 LCALL DELAY LCALL DELAY 2 CLR P1.0 CLR P1.0 MOV 30H,#200 LCALL DELAY LCALL DELAY AJMP MAIN AJMP MAIN DELAY MOV R7 #250 DELAY MOV R7 30H D1 MOV R6 #250 D1 MOV R6 #250 D2 DJNZ R6 D2 D2 DJNZ R6 D2 DJNZ R7 D1 DJNZ R7 D1 RET RET END END LED 125mS) 100mS 30H R7 30H MOV R7 30H R7 0 R0 RAM 00H MOV A 00H MOV A R0 00H A 1 2 2 1 1 E5H 00H 2 E8h 12M 1 1000 1 1000000 1S 31

30H 20 A 30H MOV A 30H 31H MOV A 31H 20 20 20 200 2000 200 2000? 30H 31H 31H 1 MOV R7 #20 1 MOV R0 #30H 2 LOOP MOV A @R0 3 INC R0 4 DJNZ R7,LOOP 5 1 20 R7 R7 20 2 30H R0 R0 30H 3 R0 A MOV A 30H 4 R0 1 R0 31H 5 R7 1 0 0 LOOP MOV A @R0 MOV A 31H R0 31H R7 0 20 30H 20 A R0 R1 1 ROM. MOV A 4FH A 4FH RAM 128 2 MOV A R7 A R7 R0-R7 ACC CY DPTR B 3 MOV A @R0 A (R1) R0 R1, DPTR PC 64K RAM 4 MOV A #0FFH A 0FFH 32

5 DPTR MOVC A @A+DPTR ; A (A)+(DPTR) DPTR PC, ROM 6 PC rel SJMP rel 7 PC PC +2+rel SETB bit bit 1 RAM SFR 8 0 8 F 10 1 2 3 4 0AH 20 A 33

111 51 111 28 MOV R1 #250 MOV A R6 1 1 MOV A Rn 2 MOV Rn A 3 MOV A direct 4 MOV A @Ri 5 MOV A #data 1 Rn A Rn R0-R7 Rn R0-R7 2 A 3 A driect 4 A Ri R0 R1 Ri R0 R1 5 A data # DUBG8051 A MOV R7 #250 MOV A R7 R7 250 A R7 B MOV A #250 MOV R7 A A 250 R7 A C MOV 30H #250 MOV A,30H 30H 250 A 30H D MOV 20H #250 MOV R0 #20 MOV A,@R0 R0 A R0 20H 250 A E MOV A,#250 250 A A 250 2 Rn 1 MOV Rn A 2 MOV Rn direct 3 MOV Rn #data A MOV R7 A B MOV R7 30H C MOV R7 #20 3 34

1 MOV direct A MOV 30H A A 30H 2 MOV direct Rn MOV 30H R7 30H 3 MOV direct direct MOV 30H 20H 30H 4 MOV direct @Ri MOV 30H @R0 A R0 20H A 5 MOV direct #data MOV 30H #20 30H 4 1 MOV @Ri,A 2 MOV @Ri,direct 3 MOV @Ri,#data16,,,Ri R0 R1 5 MOV DPTR #data16 51 16 51 8 8 2 8 =0-255 255 1234H 0001 0010 0011 0100 DPTR INTEL DPH DPL 12H( 8 ) DPH 34H( 8 ) DPL MOV DPTR #1234H MOV DPH #12H 1 MOV DPL #34H 2 DUBG8051 1.MOV 12H,#34H 2.MOV R0,#23H 3.MOV R7,#22H 4.MOV R1,12H 5.MOV A,@R0 6.MOV 34H,@R1 7.MOV 45H,34H 8.MOV 12H,DPH 9.MOV R0,DPL DUBG8051 11 1 Rn Ri direct data 2 30H 30H 3 DPTR #data16 35

6 A RAM RAM RAM RAM RAM RAM 89C51 RAM 64K 0000H-FFFFH A 1 MOVX A @Ri 2 MOVX @Ri A 3 MOVX A @DPTR 4 MOVX @DPTR A A 51 RAM A RAM A RAM RAM RAM RAM 100H 200H 100H A 200H CPU RAM MOVX RAM MOV CPU RAM B RAM DPTR Ri R0 R1 8 8 RAM 256 8 C DPTR Ri RAM 100H RAM 200H MOV DPTR #0100H MOVX A @DPTR MOV DPTR,#0200H MOVX @DPTR,A 7 A ROM MOVC A A+@DPTR A RAM ROM A ROM ROM 89C51 4K FLASH ROM 000H-FFFH 64K OOOOH-FFFFH ROM 4K 000H-FFFH 1000H-FFFFH ROM 4K CPU EA 31 EA=1 CPU ROM 4K 4K FFFH ROM EA=0 CPU ROM ROM RAM 0000H-FFFFH CPU ROM 36

RAM 89C51 29 PSEN PSEN=1 CPU ROM RAM WR 16 RD 17 ROM RAM 16 17 P3.6 P3.7 WR RD CPU CPU ROM ROM A ROM RAM MOVC A A+@DPTR A ROM A ROM B ROM DPTR A A DPTR C A A R0 0-5 MOV DPTR #TAB MOV A R0 MOVC A @A+DPTR.. TAB: DB 0,1,4,9,16,25 R0 2 A DPTR TAB ROM TAB+2 TAB+2 4 (Db ) TAB ROM TAB+0 TAB+1 TAB+25 ROM LCALL DELAY DELAY DELAY ROM CPU END 1 DB ROM 8 ORG 2000H TAB DB 45H 48H 10 34H 2000H ROM 2000H =45H 2001H =48H 2002H =0AH 2003H =34H MOV 2000H 45H MOV 2001H 48H DB END DB 2 DW 37

8 ROM 16 51 16 8 16 8 8 ORG 3000H ABC DW 2345H 0A859H 3000H =23H 3001H =45H 3002H =A8 3003H =59H 0A859H A 0 3 DS ROM ORG 2000H ABC DS0 8H LOOP MOV A 30H 2000H 8 ROM LOOP 2008H ROM RAM MOV DPTR #100H MOV A R0 MOVC A @A+DPTR.. ORG 0100H DB 0,1,4,9,16,25 R0 2 100H+2 102H 102H 4 ROM ORG 100H 8 2 1 PUSH direct 2 POP direct 1 direct 2 direct SP 1 SP direct SP RAM MOV SP #5FH MOV A #100 MOV B #20 PUSH ACC PUSH B 38

SP 1 60H A #100 60H PUSH ACC 60H 100 PUSH B SP+1 61H B 61H 61H 20 MOV SP #5FH MOV A #100 MOV B #20 PUSH ACC PUSH B POP B POP ACC POP SP POP direct SP 1 SP 61H 20 B POP B B 20 SP 1 SP 60H POP ACC SP 60H 100 ACC ACC 100 ACC 100 B 20 PUSH B A B A B PUSH ACC MOV 60H A PUSH B MOV 61H B MOV A 60H MOV B 61H POP PUSH POP MOV 9 1 XCH A Rn 2 XCH A direct 3 XCH A @Ri 4 XCHD A,@Ri 5 MOVC A A+PC 4 1 2 3 RAM 4 RAM 4 5 DUBG8051 12 1 RAM ROM ROM ROM 2 39

24 25 1 1 ADD A Rn 2 ADD A @Ri ADD A R7 ADD A @R1 (3) ADD A direct ADD A 30H 4 ADD A #data ADD A #30H A A MOV A 30H ADD A 10H A=40H 2 1 ADDC A Rn 2 ADDC A @Ri ADDC A R7 ADDC A @R1 3 ADDC A direct ADDC A 30H 4 ADDC A #data ADDC A #30H A CY 51 8 8 0-255 2 8 16 0-65535 66+78 6+8 6+7 0-9 16 8 CY PSW CY 2 16 1067H+10A0H 67H+A0H=107H 0FFH A 7 1 PSW CY CY 100H 10H+10H+CY 21H 2107H 3 1 SUBB A Rn 2 SUBB A @Rn 3 SUBB A direct 4 SUBB A #data CY 4 1 MUL AB 40

A B 8 1 16 8 B 8 A FFFFFH 65535 PSW 0V 1 OV 0 CY 0 A =4EH B =5DH MUL AB 1C56H B 1CH A 56H 5 1 DIV AB A/B A 8 B 8 1 2 3 1.2,4.5 13/5 2 3 A B CY OV 0 B 00H 0 0V=1 6 1 1 INC A 2 INC Rn 3 INC direct 30H=20H 4 INC @Ri A=20H INC A A=21H R7=20H INC A R7=21H INC 30H 30H=21H 5 INC DPTR DPTR=20H INC DPTR DPTR=21H INC A ADD A #1 INC A ADD A #1 INC A PSW A =0FFH INC A A =00H CY ADD A #1 A =00H CY 1 1 A A A 1 7 1 1 DEC A 2 DEC Rn 3 DEC direct 30H=20H A=20H DEC A A=19H R7=20H DEC A R7=19H DEC 30H 30H=19H 4 DEC @Ri 1 1 1 1 8 DA A 1 1 A A 1 A 1 CLR A A MOV A #00H MOV A #00H 2 CPL A 41

A A=12H CPL A 12H 00010010 11101101 A=EDH (3) RL A A A=12H RL A 00010010 0010100 24H 7 0 0 1 1 2 4 RLC A CY CY=1 A=12H RLC A CY 1 00010010 0 00100101 CY=0 A=25H 5 RR A A RL A 6 RRC A CY RLC A 7 SWAP A A 4 A =39H SWAP A A 93H 1 4 A =39D H SWAP A A =93 39D 10111 0001 0111 4 0001 4 0111 01110001 71H 113D 2 A 1 ANL A,Rn ANL A,direct ANL A,@Ri ANL A,#data ANL direct,a A Rn ' A A direct ' A A @Ri ' A A data ' A direct A ' direct ANL direct,#data direct data ' direct F=A*B 1 1 0 0 71H 56H 71H 01110001 56H 00100110 00100000 20H 0 1 1 1 1 0 0 71H 56H 77H 0 1 71H 56H 57H 2 ORL A,Rn A Rn ' A ORL A,direct A direct ' A ORL A,@Ri A @Ri ' A ORL A,#data A data ' A ORL direct,a direct A ' direct ORL direct,#data direct data ' direct 3 XRL A,Rn A Rn ' A XRL A,direct A direct ' A 42

XRL A,@Ri A @Ri ' A XRL A,#data A data ' A XRL direct,a direct A ' direct XRL direct,#data direct data ' direct, LED 1 ORG 0000H ; LJMP START ; ORG 30H ; START:MOV SP,#5FH ; MOV A,#80H ; LOOP:MOV P1,A ; RL A ; LCALL DELAY ; LJMP LOOP ; DELAY:MOV R7,#255 ; D1:MOV R6,#255 ; D2:NOP NOP NOP NOP DJNZ R6,D2 ; DJNZ R7,D1 ; RET ; END P1.0-1.7 LED 8 2 ORG 0000H LJMP START ORG 30H START MOV SP #5FH MOV A #80H A MOV P1 A A P1 A 80H P1 80H 10000000 P1.7-P1.0 8 P1.7 LED8 LED RL A A 01H 00000001 P1.0 LED1 NOP LOOP LJMP LOOP P1.1 3 1 2 43

4? DBUG8051 MOV A #24H MOV R0 #37H ORL A R0 XRL A #29H MOV 35H #10H ORL 35H #29H MOV R0 #35H ANL A @R0 13 1 2 3???? 4 68H+ADH 44

17 1 1 AJMP addr11 2 LJMP addr16 3 SJMP rel add11 add16 rel add16 ROM 16 11 ROM 64K add16 64K LJMP add11 2K SJMP 2K rel 8 128 127 ( -128-+127B) *JMP SJMP LOOP SJMP AJMP LJMP LJMP AJMP AJMP ROM LJMP ROM 4 4 JMP @A+DPTR MOV DPTR #TAB TAB DPTR MOV A R0 MOV B #2 MUL A B R0 A 2 JMP A @A+DPTR TAB: AJMP S1 AJMP S2 AJMP S3 9 A G A' 0 B' 1 0 S1 S2 45

AJMP AJMP AJMP AJMP S1 TAB 1 MOV DPTR #TAB DPTR TAB 2 MOV A R0 A R0 0 B R0 1 B 2 A 1 B S2 3 4 A 2 4 A 2 JMP @A+DPTR DPTR TAB A+DPTR TAB+2 TAB+2 TAB+2 AJMP S2 AJMP S2 S2 A C D JMP @A+DPTR 2 LJMP S1,LJMP S2 0 JZ rel 0 JNZ rel (A)=0 JZ MOV A R0 JZ L1 MOV R1,#00H AJMP L2 L1: MOV R1,#0FFH L2: SJMP L2 END 46

R0 0 L1 R1 0FFH R0 0 MOV R1 #00H R1 0 JZ JNZ? A CJNE A #data,rel B CJNE A,direct,rel C CJNE Rn,#data,rel D CJNE @Ri,#data,rel 1 A data rel CJNE A #data, CPU CY A CY=0 CY=1 CY A data MOV A,R0 CJNE A,#10H,L1 MOV R1,#0FFH AJMP L3 L1: JC L2 MOV R1,#0AAH AJMP L3 L2: MOV R1,#0FFH L3: SJMP L3 JC rel, JZ CY 0 1 CY=1 JC CY=0 A =10H R1=0 A 10H L1 L1 A >10H CY=1 MOV R1 #0AAH A <10H L2 MOV R1 #0FFH R0 =10H R1 =00H R0 >10H R1 =0AAH R0 <10H R1 =0FFH 2 A 3 4 CJNE A,10H A 10H CJNE 10H #35H 35H CJNE @R0,#35H R0 35H A DJNZ Rn,rel B DJNZ direct,rel Rn 47

10 5+2 *3 21 1 A LCALL addr16 B ACALL addr11 LCALL ACALL 2 A RET B RETI RET RETI RET 10 NOP 14 1 AJMP LJMP SJMP 2 3 LED1 LED1 0.5 48

MCS-51 1 P1 LED 51 2 MCS-51 00H-FFH 128 RAM 20H-2FH 00H-7FH 2FH 7FH 7EH 7DH 7CH 7BH 7AH 79H 78H 2EF 77H 76H 75H 74H 73H 72H 71H 70H 2DH 6FH 6EH 6DH 6CH 6BH 6AH 69H 68H 2CH 67H 66H 65H 64H 63H 62H 61H 60H 2BH 5FH 5EH 5DH 5CH 5BH 5AH 59H 58H 2AH 57H 56H 55H 54H 53H 52H 51H 50H 29H 4FH 4EH 4DH 4CH 4BH 4AH 49H 48H 28H 47H 46H 45H 44H 43H 42H 41H 40H 27H 3FH 3EH 3DH 3CH 3BH 3AH 39H 38H 26H 37H 36H 35H 34H 33H 32H 31H 30H 25H 2FH 2EH 2DH 2CH 2BH 2AH 29H 28H 24H 27H 26H 25H 24H 23H 22H 21H 20H 23H 1FH 1EH 1DH 1CH 1BH 1AH 19H 18H 22H 17H 16H 15H 14H 13H 12H 11H 10H 21H 0FH 0EH 0DH 0CH 0BH 0AH 09H 08H 20H 07H 06H 05H 04H 03H 02H 01H 00H RAM RAM 80H PC 4 8 21 89C52 26 SFR 8 SFR RAM 49

4 1 A MOV C bit B MOV bit C bit MOV P1.0,CY P1.0 CY MOV P1.0,CY CY 2 A CLR C B CLR bit 1 CY=0 2 0 CLR P1.0 0 3 1 A SETB C B SETB bit 1 CY=1 2 1 SETB P1.0 1 4 A CPL C B CPL bit 1 CY 1 0 0 1 2 CPL P1.0 5 A ANL C,bit B ANL C,/bit 1 CY CY 2 CY CY ANL C,/P1.0 CY=1 P1.0 1 CY=0 P1.0 1 ORG 0000H AJMP START ORG 30H START MOV SP #5FH MOV P1 #0FFH SETB C ANL C /P1.0 MOV P1.1,C P1.1, P1.0 6 A ORL C bit B ORL bit C 7 CY A JC rel 50

B JNC rel CY 1 CY 1 1 JC 2 1 CY=0 0 JNC 8 A JB bit,rel B JNB bit,rel 1 bit 1 JB bit, 2 9 JBC bit rel JB bit rel 1 1 ORG 0000H ; LJMP START ; ORG 30H ; START:MOV SP,#5FH ; MOV P1,#0FFH ; MOV P3,#0FFH ; L1:JNB P3.4,L2 ;P3.4 P3.4=0 JNB P3.5,L3 ;P3.5 P3.5=0 LJMP L1 ; L2:MOV P1,#00H ; LJMP L1 ; L3:MOV P1,#0FFH ; LJMP L1 ; END. 2 P3.4 P1 P3.5 0FFH P3 P3 L1 P3.4 JNB P3.5,L3 P3.5 LJMP L1 P3.4 P3.5 P3.4 L2 MOV P1 #00H L1 P3.5 0 L3 MOV P1 #0FFH L1 P1 P1.0 ORG 0000H ; LJMP START ; ORG 30H ; START:MOV SP,#5FH ; 51

MOV P1,#0FFH ; MOV P3,#0FFH ; L1:JNB P3.4,L2 ;P3.4 P3.4=0 JNB P3.5,L3 ;P3.5 P3.5=0 LJMP L1 ; L2:CLR P1.0 ; LED1 LJMP L1 ; L3:SETB P1.0 ; LED1 LJMP L1 ; END JB 15 1 2 RAM SFR 3 LED 52

VB VC VB VC 1 -- 0 1 0 1 MOV A 40H 11100101 0100000 2 0 1 MOV A 40H 51 PIC C 3 C C 1 C ANSIC C 32 9 2 C KEIL C51 C51 51 I/O 3 C C 4 53

C KEIL C51 C C 5 C 80% C C 1 PID 2 LOOP:SETB P1.0 54

LCALL DELAY CLR P1.0 LCALL DELAY LJMP LOOP DELAY MOV R7 #250 D1 MOV R6 #250 D2 DJNZ R6 D2 DJNZ R7 D1 RET END LED ORG 0000H LJMP START ORG 30H START MOV SP #5FH MOV P1 #0FFH MOV P3 #0FFH L1 JNB P3.5 L2 P3.5 P3.5=0 JNB P3.6 L3 P3.6 P3.6=0 LJMP L1 L2 CLR P1.0 LED1 LJMP L1 L3 SETB P1.0 LED1 LJMP L1 END 55

3 *.HEX *.BIN 1 1 PC 1 I/O RAM 20H 30H R0 R1 MOV A 20H ADD A 30H MOV R0 A CLR A ADDC A #00H MOV R0 A MOV A 30H 56

ADD A R1 MOV R1 A CLR A ADDC A R0 MOV R0 A 2 L1 JNB P3.5 L2 P3.5 P3.5=0 JNB P3.6 L3 P3.6 P3.6=0 P3.5 0 P3.5=0 P3.5=1 JB 51 JB JNB JC JNC JZ JNZ CJNE JBC A RAM 40H 41H 40H 41H 57

MOV A 40H CLR C SUBB A 41H JNC WAIT MOV A 41H XCH A 41H MOV 40H A WAIT SJMP WAIT END MOV A 20H JZ ZERO A=0 A=1 JB ACC 7 STORE A ADD A #3 A 3 SJMP STORE ZERO MOV A #20 STORE MOV 21H A JB ACC.3 STORE ACC.3 A D3 D3 0 20H 10000000 3 --LED DELAY MOV R7 #250 1 D1 MOV R6 #250 2 D2 DJNZ R6 D2 3 DJNZ R7 D1 4 RET 5 END DJNZ A #250 B C 3 4 R6 R7 0 C RET RETI 58

1 DJNZ CLR A MOV R2 20H MOV R1 22H LOOP ADD A @R1 INC R1 DJNZ R2 LOOP MOV 21H A 22H 20H 21H 255 RAM 21H 20H CLR A MOV R0 #21H 21H LOOP CJNZ @R0 #24H NEXT SJMP COMP NEXT INC A 0 1 INC R0 SJMP LOOP COMP MOV 20H A 59

33+65 DELAY MOV R7 #250 D1 MOV R6 #250 D2 DJNZ R6 D2 DJNZ R7 D1 RET END 125mS DELAY MOV R7 #250 DELAY MOV R7 #250 D1 MOV R6 #250 D1 MOV R6 #250 D2 DJNZ R6 D2 D2 MOV R5 #250 DJNZ R7 D1 D3 DJNZ R5 D3 RET DJNZ R6 D2 END DJNZ R7 D1 RET END 2 28* 33+65 +47* 33+65 +875* 33+65 33+65 =98 28+47+875 *98 LOOP:SETB P1.0 LCALL DELAY CLR P1.0 LCALL DELAY LJMP LOOP DELAY:MOV R7,#250 D1:MOV R6,#250 D2:DJNZ R6,D2 DJNZ R7,D1 RET END LED DELAY DELAY LOOP 60

LCALL RET LOOP PUSH 03H 03H PUSH ACC POP ACC ACC POP 03H 03H RET -- 3 16 1 2 3 4 5 61

/ Y/ / 89C51 16 / 89C52 3 / 1 / 1 1 2 89C51 T0 T1 8 RAM 16 2 16 =65536 0-65535 0 P0 P1.0 X0 Y0 3 1 3600 / C/T 62

12 12M 1us 1 4 TF0 0 1 TF0 TF0 0 1 TF0 0 1 5 51 16 0-65535 65535 65536 50 100 1 1 5000 60535 5000 65535 1 65536 65.536 10 10 10000 55536 / / / / / TMOD TCON TMOD TCON 89H 88H TMOD 1 TMOD 89H T1 T0 GATE C/T M1 M0 GATE C/T M1 M0 TMOD 4 T1 T0 / TCON 2 TCON 88H / TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 TCON 4 / 4 TF0 TF0 0 1 TF0 TR0 TR1 TR0 1 TR0 T0 SETB / CLR / TF0 TR0 TF1 TR1 / / / 63

1 0 / 0 13 / TL 0/1 5 TH 0/1 8 13 TL 0/1 3 1 M1M0 / TMOD M1M0 4 2 C/T / C/T=0 C/T=1 / 3 GATE / / A GATE=0 GATE 1 1 INT0 0 TR0 TR0=1 TR0=0 / TR0 B GATE=1 TR0 INT0 TR0=1 INT0 13 16 51 48 1 2 1 1 16 / TMOD M1M0 01 0 3 2 5000 16 65535 -- 60535 5000 5000 0 65535 60535 0 1 2-- T0 T1 8 8 2 8 8 T0 T1 8 8 2 4 3 64

T0 2 / TL0 8 TH0 / T0 TL0 T0 TH0 T1 T1 T1 2 T0 3 / 1 0 13 / 2 13 8192 2 1 16 / 2 16 65536 3 2 3 2 3 8 / 2 8 256 24 24 0 8192-24=8168 / 17 1 89C51 / 2 3 / SFR 4 / 65

CPU 89C51 5 / 1 2 PC 3 5 5 4 5 5 1 CPU CPU CPU 2 CPU 3 CPU CPU 66

89C51 5 89C51 1 1 0 1 12 13 INT0 INT1 P3.2 P3.3 TCON TCON / TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 A IT0 0 INT0 IT0=0 0 IT0=1 0 B IE0 0 INT0 1 CPU 0 IT1 IE1 IT0 IE0 2 0 T0 1 T1 TCON A TF0 T0 T0 TF0 CPU TF0 0 TF1 TF0 3 67

2 IE A8H 8 IE CPU IE 1 0 IE EA ES ET1 EX1 ET0 EX0 1 EA EA=1 EA=0 2 ES ES=1 ES=0 3 ET1 / 1 ET1=1 ET1=0 4 EX1 1 EX1=1 EX1=0 5 ET0 0 ET0=1 ET0=0 6 EX0 0 EX0=1 EX0=0 INT1 T1 IE 10001100 8CH SETB EA SETB ET1 SETB EX1 EA ES ET1 EX1 ET0 EX0 1 0 0 0 1 1 0 0 CPU IE 0 3 IP D8H IP 8 0 0 1 1 IP 1 PS PT1 PX1 PT0 PX0 T1 INT1 T0 INT0 T0 INT1 IP IP 3 000 00000110 IP=06H PS PT1 PX1 PT0 PX0 0 0 0 0 0 1 1 0 5 0 1 0 68

1 4 SCON 98H 1 1 1 2 CPU 1 CPU 2 3 RETI IP IE CPU IP IE 3 CPU RETI 51 1 0 INT0 0003H 2 0 T0 000BH 3 1 INT1 0013H 4 1 T1 001BH 50023H ORG 0000H LJMP START ORG 0030H START ***** ***** ***** 69

END 0000H 8 0003H 000BH LJMP ORG 0000H LJMP START ORG 0003H LJMP AINT0 0 ORG 000BH RETI 0 RETI START ***** ***** ***** AINT0 ***** ***** RETI END RETI CPU PC CPU RET RETI CPU PC ACC PSW / 18 1 51 2 3 4 RET RETI 70

/ LED ORG 0000H ; AJMP START ; ORG 30H ; START:MOV P1,#0FFH ; MOV TMOD,#00000001B ; / 0 1 MOV TH0,#15H ; MOV TL0,#0A0H ; 15AH+0A0H=5536 SETB TR0 ; / 0 LOOP:JBC TF0,NEXT ; TF0 1 TF0 NEXT AJMP LOOP ; LOOP NEXT:CPL P1.0 ; MOV TH0,#15H ; MOV TL0,#9FH ; / AJMP LOOP ; END JBC TF0 / 0 0 1 0 1 JBC -- 1 0 LOOP JBC TF0 NEXT AJMP LOOP DJNZ DJNZ ORG 0000H ; AJMP START ; ORG 000BH ; 0 AJMP TIME0 ; 71

ORG 30H ; START:MOV P1,#0FFH ; MOV TMOD,#00000001B ; / 0 1 MOV TH0,#15H ; MOV TL0,#0A0H ; 5536 SETB EA ; SETB ET0 ; / 0 SETB TR0 ; / 0 LOOP:AJMP LOOP ; TIME0: PUSH ACC ; ACC PUSH PSW ; PSW CPL P1.0 ; P1.0 MOV TH0,#15H ; MOV TL0,#0A0H ; POP PSW ; POP ACC ; RETI ; END TF0 0 1 CPU 000B 8 ORG 000BH ACC PSW 5536 60000 65536-5536 60000 12 60000 60 1 65.536 ORG 0000H ; AJMP START ; ORG 000BH ; 0 AJMP TIME0 ; ORG 30H ; START:MOV P1,#0FFH ; MOV 30H,#00H ; 0 MOV TMOD,#00000001B; / 0 1 MOV TH0,#3CH ; MOV TL0,#0B0H ; 3CH+0BH=15536 SETB EA ; SETB ET0 ; / 0 SETB TR0 ; / 0 72

LOOP:AJMP LOOP ;, TIME0: PUSH ACC ; ACC PUSH PSW ; PSW INC 30H ; MOV A,30H ; CJNE A,#20,TIME1 ;30H 20? CPL P1.0 ; P1.0 MOV 30H,#0 ; TIME1:MOV TH0,#15H ; T0 MOV TL0,#9FH ; POP PSW ; POP ACC ; RETI ; END T0 50 P1.0 1 20 P1.0 20 P1.0 20*50mS 1000 89C51 2 P1.0 1S/ P1.1 2S/ 20 P1.0 40 P1.1 0 ORG 0000H ; AJMP START ; ORG 000BH ; 0 AJMP TIME0 ; ORG 0030H ; START:MOV P1,#0FFH ; MOV 30H,#00H ; 0 MOV TMOD,#00000001B ; / 0 1 MOV TH0,#3CH ; MOV TL0,#0B0H ; 15536 SETB EA ; SETB ET0 ; / 0 SETB TR0 ; / 0 LOOP:AJMP LOOP ;, TIME0: PUSH ACC ; ACC PUSH PSW ; PSW INC 30H ; INC 31H ; 1 73

MOV A,30H ; CJNE A,#20,TNEXT ;30H 20 CPL P1.0 ; P1.0 MOV 30H,#0 ; TNEXT:MOV A,31H ; CJNE A,#40,TRET ;31H 40 CPL P1.1 ; MOV 31H,#0 ; P1.1 TRET:MOV TH0,#15H ; MOV TL0,#9FH ; POP PSW ; POP ACC ; RETI ; END 2 1 3 2 1 3 ORG 001BH ; T1 MOV TH1,R1 ; MOV TL1,R0 ; CPL P3.7 ;P1.0 RETI ; ORG 100H ; START:MOV TMOD,#10H ; T1 1 MOV IE,#88H ; T1 MOV DPTR,#TAB ; LOOP:CLR A ; MOVC A,@A+DPTR ; MOV R1,A ; 8 R1 INC DPTR ; CLR A ; MOVC A,@A+DPTR ; MOV R0,A ; 8 R0 ORL A,R1 ; JZ NEXT0 ; 0 MOV A,R0 ; ANL A,R1 ; 74

CJNE A,#0FFH,NEXT ; 1 SJMP START ; NEXT:MOV TH1,R1 ; MOV TL1,R0 ; SETB TR1 ; SJMP NEXT1 ; NEXT0:CLR TR1 ; NEXT1:CLR A ; INC DPTR ; MOVC A,@A+DPTR ; MOV R2,A ; LOOP1:LCALL D200 ; 200mS DJNZ R2,LOOP1 ; INC DPTR ; AJMP LOOP ; D200:MOV R4,#81H ; 20mS D200B:MOV A,#0FFH ; D200A:DEC A ; JNZ D200A ; DEC R4 ; CJNE R4,#00H,D200B ; RET ; TAB: DB 0FEH,25H,02H,0FEH,25H,02H; DB 0FEH,84H,02H,0FEH,84H,02H; DB 0FEH,84H,04H,0FEH,25H,04H; DB 0FEH,25H,02H,0FEH,84H,02H; DB 0FEH,0C0H,04H,0FEH,0C0H,04H; DB 0FEH,98H,02H,0FEH,84H,02H; DB 0FEH,57H,08H,00H,00H,04H; DB 0FFH,0FFH; END 1=C 1 1 1 5 3 3 3 1 1 3 5 5 4 3 2 12M C 5 6 7 1 2 3 4 5 6 7 Hz 392 440 494 524 588 660 698 784 880 988 ms 1.28 1.14 1.01 0.95 0.85 0.76 0.72 0.64 0.57 0.51 FD80 FDC6 FE07 FE25 FE57 FE84 FE98 FEC0 FEE3 FF01 T1 1 P3.7 D200 200mS 800mS D200 4 2 / 75

500mS P1 8 LED 15 T1 ORG 0000H ; AJMP START ; ORG 0030H ; START:MOV SP,#5FH ; MOV TMOD,#01000000B ; / 1 T0 0 SETB TR1 ; T1 LOOP:MOV A,TL0 ; MOV P1,A ; AJMP LOOP ; END LED 8 LED 00000000 00000001 00000010 00000011 TL0 ORG 0000H ; AJMP START ; ORG 001BH ; AJMP TIMER1 ; 1 ORG 0030H ; START:MOV SP,#5FH ; MOV TMOD,#01010000B ; / 1 1 T0 0 MOV TH1,#0FFH ; MOV TL1,#0FAH ; 6 SETB EA ; SETB ET1 ; 1 SETB TR1 ; / 1 AJMP $ ; TIMER1:PUSH ACC ; 76

PUSH PSW ; CPL P1.0 ; P1.0 MOV TH1,#0FFH ; MOV TL1,#0FAH ; POP PSW ; POP ACC ; RETI ; END 6 P1.0 15 LED 6 P1.0 LED 6 AJMP $ $ START AJMP START AJMP START / P1.1 / / T0 1 T1 1000 T0 60mS LED3 60mS P1.2 T1 T1 1000 P1.1 2 LED2 2 ORG 0000H ; AJMP MAIN ; ORG 000BH ; T0 AJMP T_0 ; T0 ORG 001BH ; T1 AJMP T_1 ; T1 ORG 0030H ; MAIN:MOV TMOD,#51H ;T1 1 T0 1 MOV TH0,#15H ; T0 MOV TL0,#0A0H ; MOV TH1,#0FCH ; T1 MOV TL1,#18H ; MOV IE,#8AH ; T0 T1 SETB TR0 ; T0 SETB TR1 ; T1 LL:SJMP LL ; T_0:MOV TH0,#15H ; T0 MOV TL0,#0A0H ; CPL P1.2 ; P1.2 RETI ; T_1:MOV TH1,#0FCH ; T1 MOV TL1,#18H ; 77

CPL P1.1 ; P1.1 RETI ; END LED3 T0 P1.2 3 P3.5 T1 P1.1 LED2 2 T1 AJMP T_0, T 0 T0 MCS 51 T0 T1 INT RET IP PSW ORG 0000H ; AJMP START ; ORG 0003H ; 0 AJMP INTO ; ORG 30H ; START: MOV SP,#5FH ; MOV P1,#0FFH ; MOV P3,#0FFH ;P3 SETB EA ; SETB EX0 ; AJMP $ ; INTO:PUSH ACC ; PUSH PSW ; CPL P1.0 ; POP PSW ; POP ACC ; RETI ; END S1 P3.2 INT0=0 P1.0 / 78

1 I/O I/O I/O VCC I/O ORG 0000H ; AJMP START ; 79

ORG 0030H ; START:MOV SP,5FH ; MOV P1,#0FFH ; MOV P3,#0FFH ; L1:JNB P3.4,L2 ; P1.0 JNB P3.5,L3 ; P1.1 LJMP L1 ; L2:CPL P1.0 ; LJMP L1 ; L3:CPL P1.1 ; LJMP L1 ; END CPU 2 10 5-10 ORG 0000H ; AJMP START ; ORG 0030H ; START:MOV SP,#5FH ; MOV P1,#0FFH ; MOV P3,#0FFH ; L1:JB P3.4,L2 ;P3.4 1 P3.5 LCALL D10mS ; JB P3.4,L1 ; P3.4 0 CPL P1.0 ; P1.0 L3:JNB P3.4,L3 ; P3.4 L2:JB P3.5,L1 ;P3.5 1 P3.4 LCALL D10mS ; JB P3.5,L2 ; P3.5 0 CPL P1.1 ; P1.1 L4:JNB P3.5,L4 ; P3.5 LJMP L1 ; D10mS:MOV R7,#50 ; 10-20mS D1:MOV R6,#200 ; D2:DJNZ R6,D2 ; 80

DJNZ R7,D1 ; RET ; END 4 P3 P3.3,P3.4,P3.5,P3.6 P3.3,P3.4,P3.5 P3.6 A P3.3 ( ) B P3.4 C P3.5 D P3.6 UpDown EQU 00H ; StartEnd EQU 01H; LampCode EQU 21H; ORG 0000H ; AJMP MAIN ; ORG 30H ; MAIN:MOV SP,#5FH ; MOV P1,#0FFH ; CLR UpDown ; CLR StartEnd ; MOV LampCode,#0FEH; LOOP:ACALL KEY ; JNB F0,LNEXT ; ACALL KEYPROC ; LNEXT:ACALL LAMP ; AJMP LOOP ; DELAY:MOV R7,#100 ; D1:MOV R6,#100 ; DJNZ R6,$ ; DJNZ R7,D1 ; RET ; KEYPROC:MOV A,B ; B JB ACC.2,KeyStart ; 1 JB ACC.3,KeyOver ; JB ACC.4,KeyUp ; JB ACC.5,KeyDown ; AJMP KEY_RET ; KeyStart:SETB StartEnd ; 81

AJMP KEY_RET ; KeyOver:CLR StartEnd; AJMP KEY_RET ; KeyUp:SETB UpDown ; AJMP KEY_RET ; KeyDown:CLR UpDown ; KEY_RET:RET ; KEY:CLR F0 ; F0 ORL P3,#01111000B ; P3 1 MOV A,P3 ; P3 ORL A,#10000111B ; 1 CPL A ; JZ K_RET ; 0 ACALL DELAY ; ORL P3,#01111000B ; MOV A,P3 ; ORL A,#10000111B ; CPL A ; JZ K_RET ; MOV B,A ; B SETB F0 ; K_RET:ORL P3,#01111000B ; MOV A,P3 ; ORL A,#10000111B ; CPL A ; JZ K_RET1 ; 0 AJMP K_RET ; K_RET1:RET ; D500mS: ; PUSH PSW ; SETB RS0 ; MOV R7,#200 ; D51:MOV R6,#250 ; D52:NOP NOP NOP NOP DJNZ R6,D52 ; DJNZ R7,D51 ; POP PSW ; RET ; LAMP:JB StartEnd,LampStart ; StartEnd=1 MOV P1,#0FFH ; AJMP LAMPRET ; LampStart:JB UpDown,LAMPUP ; UpDown=1 82

MOV A,LAMPCODE ; RL A ; MOV LAMPCODE,A ; MOV P1,A ; LCALL D500mS ; AJMP LAMPRET ; LAMPUP:MOV A,LAMPCODE ; RR A ; MOV LAMPCODE,A ; MOV P1,A ; LCALL D500mS ; LAMPRET:RET ; END UpDown EQU 00H StartEnd EQU 01H LampCode EQU 21H EQU ORG 200H ABC EQU R6 MOV A ABC ABC R6 ABC ABC:LJMP START EQU ABC EQU 10H DELAY EQU 05AFH MOV A ABC LCALL DELAY ABC DELAY 16 EQU. A BIT ABC BIT P1.0 ABC P1.0 EQU EQU P1.0 90H P2.0 AOH B RAM DATA 8 RAM ABC DATA 20H RAM 20H ABC C RAM XDADT 8 RAM ABC XDATA 0ACH 89C51 RAM 00H-FFH 83

21 1 2 84

I/O 4*4=16 20 9 4 I/O I/O 85

1 X0-X3 4 4 2 P1 I/O P1 4 P1 4 P1.0-P1.3 4 P1.0-P1.3 P1.4-P1.7 4 4 16 P1.4-P1.7 0 P1.0-P1.3 P1.0-P1.3 1 P1.4-P1.7 4 P1.7 1110 P1.6 1101 P1.5 1011 P1.4 0111 P1.0-P1.3 1 0 CPU ORG 0030H ; SCAN MOV P1,#0FH ; MOV A,P1 ; ANL A,#0FH ; CJNE A,#0FH,NEXT1 ; SJMP NEXT3 ; NEXT1:ACALL D20Ms ; MOV A,#0EFH ; NEXT2:MOV R1,A ; MOV P1,A ; MOV A,P1 ; ANL A,#0FH ; CJNE A,#0FH,KCODE ; MOV A,R1 ; SETB C ; RLC A ; JC NEXT2 ; NEXT3:MOV R0,#00H ; RET ; KCODE:MOV B,#0FBH ; NEXT4:RRC A ; INC B ; JC NEXT4 ; MOV A,R1 ; 86

SWAP A ; NEXT5:RRC A ; INC B ; JC NEXT5 ; NEXT6:MOV A,P1 ; ANL A,#0FH ; CJNE A,#0FH,NEXT6; MOV R0,#0FFH ; RET ; END E-mail 22 1 2 87

LED LED LED LED 8 7 LED 8 LED 8 LED LED 8 h dp gfedcba 8 D7 D6 D5 D4 D3 D2 D1 D0, 8 LED hgfedcba 01110011 P P 73H LED P 10001100 8CH 73H LED 88

LED VCC GND I/O I/O I/O CPU - 74LS164 MCS-51 6 74LS164 6 LED RXD TXD 74LS164 TTL 8 A B 1 2 2 T 8 TXD T 8 8 74LS164 R 9 R=0 0 R=1 Q1 Q8 3-6 10-13 LED hgfedcba 74LS164 T 74LS164 1 2 1 74LS164 0 8 74LS164 6 74LS164 8 RXD 74LS164 8 74LS164 74LS164 8 74LS164 74LS164 8 74LS164 8 74LS164 89

Q8 Q8 0 1 74LS164 0 1 74LS164 74LS164 P3 60H-65H 6 LED1-LED6 6 ORG 0000H ; AJMP START ; ORG 30H ; START:MOV SP,#6FH; MOV 65H,#0 ; MOV 64H,#1 ; MOV 63H,#2 ; MOV 62H,#3 ; MOV 61H,#4 ; MOV 60H,#5 ; LCALL DISP ; SJMP $ ; DISP:MOV SCON,#00H ; 0 MOV R1,#06H ; 6 MOV R0,#65H ;60H-65H MOV DPTR,#SETTAB ; LOOP:MOV A,@R0 ; MOVC A,@A+DPTR ; MOV SBUF,A ; DELAY:JNB TI,DELAY ; CLR TI ; DEC R0 ; DJNZ R1,LOOP ; 6 RET ; SETTAB: ; DB 03H,9FH,27H,0DH,99H,49H,41H,1FH,01H,09H,0FFH; END 543210 90

74LS164 0 0 1 0 A-F D7 D6 D5 D4 D3 D2 D1 D0 A B C D E F G H 0 0 0 0 0 0 0 1 1 03H 1 1 0 0 1 1 1 1 1 9FH 2 0 0 1 0 0 1 1 1 27H 3 0 0 0 0 1 1 0 1 0DH 4 1 0 0 1 1 0 0 1 99H 5 0 1 0 0 1 0 0 1 49H 6 0 1 0 0 0 0 0 1 41H 7 0 0 0 1 1 1 1 1 1FH 8 0 0 0 0 0 0 0 1 01H 9 0 0 0 0 1 0 0 1 09H 9876543210 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 g f a b h c d e 0 11101110/EEH 1 00101000/28H 2 11001101/ CDH 3 01101101/ 6DH 4 00101011/ 2BH 5 01100111/67H 6 11100111/E7H 7 00101100/2CH 8 11101111/EFH 9 00101111/ 2FH A-F 543210 DB 012345 23 1 LED 2 74LS164 3 74LS165 91

COM LED I/O CPU I/O LED 8 h-a COM I/O CPU COM I/O 1ms 89C51 P2 ABCDEFGH P3.5 P3.6 P3.5 P3.6 P3.5 P3.6 P2.0 0 1 FIRST EQU P3.6 ; SECOND EQU P3.5 ; DISPBUFF EQU 5AH ; 5AH ORG 0000H ; AJMP START ; ORG 30H ; START:MOV SP,#5FH ; MOV P0,#0FFH ; MOV P1,#0FFH ; MOV P2,#0FFH ; LED MOV DISPBUFF,#0 ; 0 MOV DISPBUFF+1,#1 ; 1 LOOP:LCALL DISP ; AJMP LOOP ; DISP:PUSH ACC PUSH PSW MOV A,DISPBUFF MOV DPTR,#DISPTAB MOVC A,@A+DPTR MOV P2,A SETB FIRST LCALL DELAY CLR FIRST ;ACC ;PSW ; ; ; 0 ; P2 ; ; 1 ; 92

MOV A,DISPBUFF+1 ; MOV DPTR,#DISPTAB ; MOVC A,@A+DPTR ; 1 MOV P2,A ; P2 SETB SECOND ; LCALL DELAY ; 1 CLR SECOND ; POP PSW ; POP ACC ; RET ; DELAY:PUSH PSW ; SETB RS0 ; MOV R7,#50 ; D1:MOV R6,#10 ; D2:DJNZ R6,$ ; DJNZ R7,D1 ; POP PSW ; RET ; DISPTAB:DB 0EEH 28H; END CPU 1 I/O LED LED LED LED LED COM VCC COM COM GND LED 1-2mA LED 10-20mA 93

1/10 LED 9013 8550 BU208 2003 7406 75452 / - BCD a-g CPU CD4511 74LS47 SPI LED SPI MAX7219 PS7219 zlg7289 94

95

MCS-51 MOV A Rn 1 1 MOV A direct 2 1 MOV A @Ri RAM(8 ) 1 1 MOV A #data 2 1 MOV Rn A 1 1 MOV Rn direct 2 2 MOV Rn #data 2 1 MOV direct Rn 2 1 MOV direct direct 3 2 MOV direct A 2 1 MOV direct @Ri RAM 2 2 MOV direct #data 3 2 MOV @Ri A 1 2 MOV @Ri direct RAM 2 1 MOV @Ri #data RAM 2 2 MOV DPTR #data16 16 3 1 MOVC A @A+DPTR 1 2 MOVC A @A+PC 1 2 MOVX A @Ri RAM(8 ) 1 2 MOVX A @DPTR RAM(16 ) 1 2 MOVX @Ri A RAM(8 ) 1 2 MOVX @DPTR A RAM(16 ) 1 2 PUSH direct 2 2 POP direct 2 2 XCH A,Rn 1 1 XCH A, direct 2 1 XCH A, @Ri RAM 1 1 XCHD A, @Ri RAM 4 1 1 ( ) INC A 1 1 1 INC Rn 1 1 1 INC direct 1 2 1 INC @Ri RAM 1 1 1 INC DPTR 1 1 2 DEC A 1 1 1 DEC Rn 1 1 1 DEC direct 1 2 2 96

DEC @Ri RAM 1 1 1 MUL AB B 1 4 DIV AB B 1 4 DA A 1 1 ADD A,Rn 1 1 ADD A,direct 2 1 ADD A,@Ri RAM 1 1 ADD A,#data 2 1 ADDC A,Rn ( ) 1 1 ADDC A,direct ( ) 2 1 ADDC A,@Ri RAM ( ) 1 1 ADDC A,#data ( ) 2 1 SUBB A,Rn ( ) 1 1 SUBB A,direct ( ) 2 1 SUBB A,@Ri RAM( ) 1 1 SUBB A,#data ( ) 2 1 ( ) ANL A,Rn 1 1 ANL A,direct 2 1 ANL A,@Ri RAM 1 1 ANL A,#data 2 1 ANL direct,a 2 1 ANL direct, #data 3 2 ORL A,Rn 1 2 ORL A,direct 2 1 ORL A,@Ri RAM 1 1 ORL A,#data 2 1 ORL direct,a 2 1 ORL direct, #data 3 1 XRL A,Rn 1 2 XRL A,direct 2 1 XRL A,@Ri RAM 1 1 XRL A,#data 2 1 XRL direct,a 2 1 XRL direct, #data 3 1 CLR A 1 2 CPL A 1 1 RL A 1 1 RLC A 1 1 RR A 1 1 RRC A 1 1 SWAP A 4 1 1 97

( ) JMP @A+DPTR DPTR 1 2 JZ rel 0 2 2 JNZ rel 1 2 2 CJNE A,direct,rel, 3 2 CJNE A,#data,rel, 3 2 CJNE Rn,#data,rel, 2 2 CJNE @Ri,#data,rel RAM, 3 2 DJNZ Rn,rel 1, 0 3 2 DJNZ direct,rel 1, 0 3 2 NOP, 1 1 ACALL add11 2 2 LCALL add16 3 2 RET 1 2 RETI 1 2 AJMP add11 2 2 LJMP add16 3 2 SJMP rel 2 2 ( ) CLR C 1 1 CLR bit 2 1 SETB C 1 1 SETB bit 2 1 CPL C 1 1 CPL bit 2 1 ANL C,bit 2 2 ANL C /bit 2 2 ORL C,bit 2 2 ORL C /bit 2 2 MOV C,bit 2 1 MOV bit, C 2 2 JC rel 1 2 2 JNC rel 0 2 2 JB bit rel 1 3 2 JNB bit rel 0 3 2 JBC bit rel 1 2 2 ORG DB DW 16 EQU 98

2 9 1 8 (MCS-51 ) DATA 8 RAM XDATA 8 RAM BIT END Rn R0-R7 Ri R0 R1 @Ri 8 RAM 00H-FFH #data8 8 #data16 16 addr16 16 64KROM addr11 11 2K Rel 8 SJMP -128 +127 Bit RAM SFR Direct RAM 00H-7FH 80H-FFH $ 1 2 3 4 5 6 7 8 LED1 VCC D D C JP2 P1 9 8 7 6 5 4 3 2 1 GND R1 VCC GND C1 47 F/25v 4.7K SA1-SA4 GND C2 30P*2 C3 XTAL1 12.00 MHz 31 19 18 9 12 13 14 15 1 2 3 4 5 6 7 8 U1 EA/VP X1 X2 RESET INT0 INT1 T0 T1 P1.0/T2 P1.1/T2X P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 DIP40 89C51 P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 RD WR PSEN ALE/P TXD RXD 39 38 37 36 35 34 33 32 21 22 23 24 25 26 27 28 17 16 29 30 11 10 JP5 1 2 3 4 5 6 7 8 9 GND P2 JP1 1 2 3 4 5 6 7 8 9 GND P0 ALE C R11 100 R12 100 R13 100 R14 100 R15 100 R16 100 LED1 LED2 LED3 LED4 LED5 LED6 VCC Q1 R17 100 LED7 R18 100 LED8 VCC U3A 12 13 U3F 5 6 U3C 3 4 U3B U3D 10 U3E 11 C6 1uF 1 3 4 C7 5 1uF 14 7 12 8 U2 VCC VCC C1+ V+ C1- V- C2+ C2- MAX232 T1IN T1OUT T2OUT T2IN R1OUT R1IN R2IN R2OUT 16 15 GND C4 1uF 2 6 C5 1uF GND 14 10 13 9 DS1 DPY a 1 a b 2 b f c 3 g d 4 c d e e 5 f 6 dp g 7 dp 8 DPY_7-SEG_DP Q3 R8 GND DS2 1 a DPY 2 b a 3 c f b 4 d g 5 e e c 6 f d 7 g dp 8 dp DPY_7-SEG_DP Q4 R9 5.1K 5.1K B JP3 9 8 7 6 5 4 3 2 1 R3 100 LS1 SPEAKER GND Q2 R2 5.1K R4 5.1K R5 R7 R6 5.1K 5.1K 5.1K GND JP4 1 11 2 12 3 13 4 14 5 15 6 16 7 17 8 18 9 19 10 20 HEADER 10X2 GND IC-15/P3.5 B P3 GND A A Size FCSM No. DWG No. Rev A3 JiGuo Scale Sheet 0 of 0 1 2 3 4 5 6 7 8 99