8051 111 2K 1 2 3 ' '
1 CPU RAM ROM / A/D D/A PC CPU 40 68 10 20 8 51 PIII 8051 2 MCS51 8051 8031 89C51 8051 8031 89C51? MCS51 INTEL INTEL 8031 8051 8751 8032 8052 8752 8051 8051 8051 MCS51 8031 8031 INTEL MCS51 8051 89C51 ATMEL 89C51
() 89C51 1 5V 40 20 2 18 19 1 3 1 4 EA EA LED LED 5 35 LED 1 1 R1 1 LED 1 LED 1 1 1 51 INTEL P1.0 1 '' ''
SETB CLR P1.0 SETB P1.0 P1.0 CLR P1.0 P10 SETB CLR SETB P1.0 D2H,90H CLR P1.0 C2H,90H 51 --INTEL " " D2H,90H 2? 2 P10 C2H,90H CLR P1.0 P10 ROM READ ONLY MEMORY 89C51 ROM ROM FLASH ROM ROM ROM
37+45 37 45 37 45 82 0 1 1 0 0 0 0 1 1 0 1 1 3 000 001 010 011 100 101 110 111 000 001 101 1 0 1 BIT 0 1 00 01 10 11 0 3 0-7 8 0-255 256 8 8 BYTE 8 1234
2 3 2 12 00001100 3 2 2 27512 65536 6 2 2 4 3 256 8 8 65536 16 4
0FFH 00H 4 4 BUS ROM READ ONLY MEMORY RAM READ RANDOM MEMORY PROM EPROM FLASH EPROM PROM EPROM FLASH ROM
P10 SETB P10 CLR P10 SETB P10 CLR P10 CLR P10 SETB P10 SETB P10 " " LOOP SETB P10 LCALL DELAY CLR P10 LCALL DELAY AJMP LOOP DELAY MOV R7 #250 D1 MOV R6 #250 D2 DJNZ R6 D2 DJNZ R7 D1 RET END LJMP LOOP LOOP LOOP LOOP LOOP A X LJMP LCALL DELAY DELAY LCALL
LCALL RET LCALL RET RET P10 6 7 8 9 10 5 5 1 DELAY RET END " " R1 R1 123+567 690 123+567+562 123+567=690 690 690+562 1552 1552 690 690 ROM ROM RAM RAM MCS-51 RAM
R7 R6 RAM DELAY MOV R7 #250 D1 MOV R6 #250 D2 DJNZ R6 D2 DJNZ R7 D1 RET MOV MOV R7 #250 R7 250 250 R7 R7 250 250 # # 250 MOV R6 DJNZ D2 #250 R6 R6 D2 D2 DJNZ 1 0 0 0 250 DJNZ R6 D2 R6 0 DJNZ R7 D1 MOV R6 #250 R7 1 DJNZ R6 R6 0 D2 250*250=62500 DJNZ R6 D2 62500
�� ROM 12 12M 1/12 12* 1/12 1 6M MCS-51 2 4 INTEL DJNZ 12M 1 DJNZ 2 62500 125000 125 100 1 255 2 5ms RST 5ms 1 RST RST
P1.0 P1.0 1 8031 P1.0 P1.1 P1.2.P1.7 P1 P0 P2 P3 32 7 32 39 P P10 P11��P17 LED MAIN MOV P1 #0FFH LCALL DELAY MOV P1 #00H LCALL DELAY LJMP MAIN DELAY MOV R7 #250 D1 MOV R6 #250 D2 DJNZ R6 D2 DJNZ R7 RET END D1 8 LED P10~P17 P 32 32 LED SETB P1.0 MOV P1 #0FFH CLR P1.0 MOV P1.0 #00H P1 P1.0��P1.7 P1 MOV 2 P1 MOV 32 MAIN MOV P3 #0FFH LOOP MOV A P3 MOV P1 A LJMP LOOP P3 P32 P33 P34 P35
P3 MOV A P3 MOV P3 A A 3 A P1 3 P12 P12 P1 P3 A P1 P3 P12 P3 P32 P32 P12 P3 2 3 4 P3 P 32 P1 CPU 51 2 1 0 0 1 I/O P1 P1 P0 P2
P3
ROM RAM I/O 1 51 CPU I/O P0 P1 P2 P3 ROM RAM / I/O 51 I/O I/O / I/O SFR P1 1 B F0H B ACC E0H PSW D0H IP B8H P3 B0H P3 IE A8H P2 A0H P2 SBUF 99H SCON 98H P1 90H P1 TH1 8DH / 1 8 TH0 8CH / 1 8 TL1 8BH / 0 8 TL0 8AH / 0 8 TMOD 89A / TCON 88H / DPH 83H 8 DPL 82H 8 SP 81H P0 80H P0 PCON 87H 1
SFR 2 ACC A ACC 2 B 3 PSW CPU CPU 2 D7 D6 D5 D4 D3 D2 D1 D0 CY AC F0 RS1 RS0 OV P 2 1 CY 8051 8 8 0-255 255 78H+97H 01111000+10010111 2 AC 57H+3AH 01010111+00111010 3 F0 4 RS1 RS0 5 0V 6 P ALU 1 P=1 0 78H 01111000 1 P=0 / RAM
2 27H 28H 29H 51 RAM 51? 51 SP 2 SP 27H 27H 51 27H 28H 27H SFR