input commom-mode range) output swing (open loop gain) (GBW) ( phase margin) (gain margin)

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涯苦
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1 OP AMP : (Symbol) Folded cascode Fig Miller Vos

2 input commom-mode range) output swing (open loop gain) (GBW) ( phase margin) (gain margin) CMRR PSRR slew rate setup time (THD) Fig 1 Opamp 2

3 Fig 2 cascode Fig 3 Fig 4 Fig 5 Fig 6 Opamp Fig 7 Fig 8 Fig 9 Fig 10 Fig 12 Fig 13 Fig 14 Fig 15 Fig16 Fig 17 Fig 18 Fig 19 Fig 20 VS Fig 21 Fig 22 Fig 23 Fig 24 Fig 25 3

4 OP AMP 1. : OP AMP ( W L ) ( G M ) ( A ol ) (GBW ) ( PM ) (CMRR ) ( PSRR ) ( SR ) ( ST ) OPA SPEC SPEC SPEC 4

5 2. 3.3V 0.35µmCMOS cascode Miller 2.1 : Ta55 Vdd3.3V 5% RL10Kohm CL3pf Gain1-10 ~ 85 chrt0.35u 3.3V CMOS Aol >90 db GBW small signal >60 MHz BWcl gain-1,rf10kohm >55 MHz peakshoot<0.5db small signal CMIR 0~2.4 V CMRR Vcm1.65V f1khz >90 db SWING RL100Kohm 0.3~3.0 V SR gain1,step1.5v >60 V/us TS gain1,step1.5v <120 Ns PSRR Vdd3.3V >60 db Vos <1 mv Ro gain1,f10khz <1 Ohm RL10Kohm gain1 >6 Pf peak overshoot<3db THD RL10Kohm,CL3pf <-75 db Vo Vpp gain1,f100khz Iss <700 ua 5

6 dB flatness -3dB Fig3.1 CMOS - Fig 1 Opamp 6

7 V 0 3.3V PMOS cascode 80dB 90dB OPA 3.3V cascode cascode Fig 2 cascode 0.3-3V M2 M2 Fig 3 Miller 7

8 Vb3 P2 Vb1 N0 N1 Vb2 N2 N3 Fig (Symbol) Fig4 Opamp Fig 5 8

9 Fig 6 Opamp Miller 0-2.4V 0 3.3V PMOS cascode cascode cascode 9

10 Fig 7 PMOS Fig 7 βh βh Fig 8 PM β H ( ω ω1) PH60 PH60 10

11 Miller P1 Miller P2 GBW Opamp Z1 Fig 4 10µA Vb3 P2 P10 Cascode (N6 N7) N0 N1 N2 N3 11

12 Cascode (P3 P4 P5 P6) Fig V 0.35µmCMOS 0.35µm Z 1 g C mιι > c GB g C mι c P 2 g mιι > C ΙΙ GB g C mι c g g mιι mι mι > > 2. 2 C ΙΙ C ΙΙ g C L g C mι c Cc > 0.22C L pF pf 12

13 C c 1 pf 1.PMOS P2 P2 (SR) I SR C 60V µ s 1pF 60 P 2 c µ A 2. N2 N3 I P3 P4 I N 2 I N 3 1.2I P2 1. 5I P2 I N 2 N 3 90µ A 3. N4 700 A I N 4 360µ A GBW 60MHz P0 P1 P2 V DS GBW 100MHz g GBW C 100 M 1pF 2π 628 m Ι c µ s S g 2 (378µ s) 10 60µ A 2 m1 P1 S P0 K P I P2 658 CL g m ΙΙ > 2.2g mι πµ s 4146µ s C c I 360 P 7 µa 13

14 S g 4146µ 2 10µ 360µ A 2 mιι P7 2K P I P R CL + Cc 3pF + 1pF 965 g mιι Cc 4146µ s 1pF Z 1 K V V 0. V V V 0. V V V 0. V DSP3 DSP4 5 DSP5 DSP6 3 DSN 0 DSN1 3 S S 2 I 2 90µ A 2 10 P3 DSP3 DSP4 2 K P VDS ( 0.5) 72 S S 2 I 2 90µ A 2 10 P3 DSP5 DSP6 2 K P VDS ( 0.3) 200 S S 2 I 2 90µ A 2 25 N 0 DSN 0 DSN1 2 K N VDS ( 0.3) 28.8 PMOS P2 I P2 60µ A VDSP2 VDD VIN ( MAX ) VTP V K S S 2 I P2 P2 2 2 K P VDSP2 ( 0.104) P 1109 P0 14

15 I P10 90µ A SP 10 SP I 60µ A P2 I P11 10µ A S P11 S P I 60µ A P2 S N 6 S N 0 S N1 S N 7 S N 2 S N VOS Fig 10 15

16 16

17 Fig 12 17

18 Fig 13 18

19 Fig 14 19

20 Fig 15 Fig16 20

21 Fig 17 21

22 Fig 18 Fig 19 22

23 5.2 Aol > db GBW small signal > MHz CMIR 0~2.4 0~2.4 V Vcm1.65V 95.2 CMRR f1khz >90 db SWING RL100Kohm 0.3~ ~3.0 V SR gain1,step1.5v > V/us TS gain1,step1.5v < ns PSRR Vdd3.3V > db Vos < mv Ro gain1,f10khz < m Ohm RL10Kohm gain1 >6 6 Pf peak overshoot<3db THD RL10Kohm,CL3p < db fvo Vpp gain1,f100khz Iss < ua dB flatness MHz -3dB MHz

24 Fig 20 VS Fig 20 VS Fig 21 24

25 Fig 21 Fig 22 25

26 Fig 23 Fig 24 26

27 Fig chrt0.35u 3.3V CMOS 27

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