HT RAM Mapping 32X8 LCD Controller for I/O MCU

Transcription

1 HT1622 RAM Mapping 328 LCD Controller for I/O MCU Features Operating voltage: 2.7V~5.2V R/W address auto increment Built-in RC oscillator Two selectable buzzer frequencies (2kHz or 4kHz) 1/4 bias, 1/8 duty, frame frequency is 64Hz Power down command reduces power consumption Max. 328 patterns, 8 commons, 32 segments Built-in internal resistor type bias generator 3-wire serial interface 8 kinds of time base or WDT selection Time base or WDT overflow output Built-in LCD display RAM Software configuration feature Data mode and Command mode instructions Three data accessing modes VLCD pin to adjust LCD operating voltage Cascade application 64-pin QFP package General Description HT1622 is a peripheral device specially designed for I/O type MCU used to expand the display capability. The max. display segment of the device are 256 patterns (328). It also supports serial interface, buzzer sound, Watchdog Timer or time base timer functions. The HT1622 is a memory mapping and multi-function LCD controller. The software configuration feature of the HT1622 make it suitable for multiple LCD applications including LCD modules and display subsystems. Only three lines are required for the interface between the host controller and the HT1622. The HT162X series have many kinds of products that match various applications. Selection Table HT162X HT1620 HT1621 HT1622 HT16220 HT1623 HT1625 HT1626 COM SEG Built-in Osc. Crystal Osc. Block Diagram 5 + 1, EI F = O 4 ) + 5 4, 9 4, ) 6 ) + JH 6 E E C + EH? K EJ +,, HEL A H * E= I + EH? K EJ + + % 8,,! , * * 6 A. HA G K A? O / A A H= J H 9 = J? C 6 E A H 6 E A * = I A / A A H= J H 14 3 Rev May 21, 2004

2 & % $ "! HT1622 Pin Assignment +! " $ % & '!! , 9 4, ) 6 ) ,, 8 +, 14 3 * + * 6 6 6! $ $ $! $ "! " $ % & '! " $ % & ' $ & ' % 0 6 $ $ " 3. 2 ) $! " " ' " & " % " $ " " " "! " " "! '! &! %! $!! "!!!!! ' ' & % $ "! ' & % $ "! + % + $ + + " +! + Pad Assignment! " $ % & '!! + 5 4, 9 4, ) 6 ) ,, 8 +, 14 3 *! " $ % & ' "! " ' " & " % " $ " " " "! " " "! '! &! %! $!! "!!!!! ' & % $ "! ' & % * 6 6 6! + +! " $ % & '! " $ % & ' $ "! + % + $ + + " +! + Chip size: (mil) 2 * The IC substrate should be connected to VDD in the PCB layout artwork. Rev May 21, 2004

3 HT1622 Pad Coordinates Unit: mil Pad No. X Y Pad No. X Y Pad Description Pad No. Pad Name I/O Description 1 CS I Chip selection input with Pull-high resistor. When the CS is logic high, the data and command read from or written to the HT1622 are disabled. The serial interface circuit is also reset. But if CS is at logic low level and is input to the CS pad, the data and command transmission between the host controller and the HT1622 are all enabled. 2 RD I READ clock input with Pull-high resistor. Data in the RAM of the HT1622 are clocked out on the falling edge of the RD signal. The clocked out data will appear on the data line. The host controller can use the next rising edge to latch the clocked out data. 3 WR I WRITE clock input with Pull-high resistor. Data on the DATA line are latched into the HT1622 on the rising edge of the WR signal. 4 DATA I/O Serial data input or output with Pull-high resistor 5 VSS Negative power supply, ground 6 OSCI I If the system clock comes from an external clock source, the external clock source should be connected to the OSCI pad. 7 VDD Positive power supply 8 VLCD I LCD operating voltage input pad 9 IRQ O Time base or Watchdog Timer overflow flag, NMOS open drain output 10, 11 BZ, BZ O 2kHz or 4kHz tone frequency output pair 12~14 T1~T3 I Not connected 15~22 COM0~COM7 O LCD common outputs 23~54 SEG0~SEG31 O LCD segment outputs Rev May 21, 2004

4 HT1622 Absolute Maximum Ratings Supply Voltage...V SS 0.3V to V SS +5.5V Input Voltage...V SS 0.3V to V DD +0.3V Storage Temperature...50C to125c Operating Temperature...40C to85c Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maximum Ratings may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. D.C. Characteristics Ta=25C Symbol Parameter V DD Test Conditions Conditions Min. Typ. Max. Unit V DD Operating Voltage V I DD1 I DD2 I STB V IL V IH I OL1 I OH1 I OL1 I OH1 I OL2 I OH2 I OL3 I OH3 R PH Operating Current Operating Current Standby Current Input Low Voltage Input High Voltage BZ, BZ, IRQ BZ, BZ DATA DATA LCD Common Sink Current LCD Common Source Current LCD Segment Sink Current LCD Segment Source Current Pull-high Resistor 3V No load or LCD ON A 5V On-chip RC oscillator A 3V No load or LCD OFF 8 30 A 5V On-chip RC oscillator A 3V 1 8 A No load, Power down mode 5V 2 16 A 3V V DATA, WR, CS, RD 5V V 3V V DATA, WR, CS, RD 5V V 3V V OL =0.3V ma 5V V OL =0.5V ma 3V V OH =2.7V ma 5V V OH =4.5V ma 3V V OL =0.3V A 5V V OL =0.5V A 3V V OH =2.7V A 5V V OH =4.5V A 3V V OL =0.3V A 5V V OL =0.5V A 3V V OH =2.7V A 5V V OH =4.5V A 3V V OL =0.3V A 5V V OL =0.5V A 3V V OH =2.7V 6 13 A 5V V OH =4.5V A 3V DATA, WR, CS, RD k 5V k Rev May 21, 2004

5 HT1622 A.C. Characteristics Ta=25C Symbol f SYS1 f SYS2 f LCD1 f LCD2 System Clock System Clock Parameter LCD Frame Frequency LCD Frame Frequency V DD Test Conditions Conditions Min. Typ. Max. Unit 3V On-chip RC oscillator khz 5V khz 3V External clock source 32 khz 5V 32 khz 3V On-chip RC oscillator Hz 5V Hz 3V External clock source 64 5V 64 t COM LCD Common Period n: Number of COM n/f LCD sec f CLK1 f CLK2 t CS Serial Data Clock (WR pin) Serial Data Clock (RD pin) Serial Interface Reset Pulse Width (Figure 3) 3V Duty cycle 50% 150 khz 5V 300 khz 3V Duty cycle 50% 75 khz 5V 150 khz CS 250 ns t CLK WR, RDInput Pulse Width (Figure 1) t r,t f t su t h t su1 t h1 Rise/Fall Time Serial Data Clock Width (Figure 1) Setup Time for DATA to WR, RDClock Width (Figure 2) Hold Time for DATA to WR, RD, Clock Width (Figure 2) Setup Time for CS to WR, RDClock Width (Figure 3) Hold Time for CS to WR, RD Clock Width (Figure 3) 3V Write mode 3.34 s Read mode V Write mode 1.67 Read mode 3.34 s 3V 5V 120 ns 3V 5V 120 ns 3V 5V 120 ns 3V 5V 100 ns 3V 5V 100 ns 9 4 4, +? J B ' /, J + J H J + 8,,, * 8 ) 1,, ) 6 ) J I K J D 8,, /, Figure , +? 8,, /, Figure J + 5 8,, /, J I K J D 9 4 4, +? ? ) 5 6 +? 8,, /, Figure 3 Rev May 21, 2004

6 HT1622 RC Oscillator Frequency Deviation Operating Temperature 40C 0C 25C 70C 75C 80C 85C Average Deviation 19.85% 2.98% % 22.50% 23.82% 25.35% Functional Description Display Memory RAM Structure The static display RAM is organized into 644 bits and stores the display data. The contents of the RAM are directly mapped to the contents of the LCD driver. Data in the RAM can be accessed by the READ, WRITE and READ-MODIFY-WRITE commands. The following is a mapping from the RAM to the LCD patterns. Time Base and Watchdog Timer (WDT) The time base generator and WDT share the same divided (256) counter. TIMER DIS/EN/CLR, WDT DIS/EN/CLR and IRQ EN/DIS are independent from each other. Once the WDT time-out occurs, the IRQ pin will remain at logic low level until the CLR WDT or the IRQ DIS command is issued. If an external clock is selected as the source of system frequency, the SYS DIS command turns out invalid and the power down mode fails to be carried out until the external clock source is removed. Buzzer Tone Output A simple tone generator is implemented in the HT1622. The tone generator can output a pair of differential driving signals on the BZ and BZ which are used to generate a single tone. + % + $ + + " +! + + +! "! % HA I I $ * EJI ) ) " )! $! H, = J=, = J= " * EJI,!,,,,!,,,, = H RAM Mapping +? 5 K H? A 6 E A * = I A $ 8,, , 15 9, 6 -, E A H 9, 6 ", , , 6 Timer and WDT Configurations Rev May 21, 2004

7 HT1622 Command Format The HT1622 can be configured by the software setting. There are two mode commands to configure the HT1622 resource and to transfer the LCD display data. The following are the data mode ID and the command mode ID: Operation Mode ID READ Data WRITE Data READ-MODIFY-WRITE Data COMMAND Command If successive commands have been issued, the command mode ID can be omitted. While the system is operating in a non-successive command or a non-successive address data mode, the CS pin should be set to 1 and the previous operation mode will be reset also. The CS pin returns to 0, a new operation mode ID should be issued first. Name Command Code Function TONE OFF X Turn-off tone output TONE 4K 010X-XXXX-X Turn-on tone output, tone frequency is 4kHz TONE 2K 0110-XXXX-X Turn-on tone output, tone frequency is 2kHz Timing Diagrams READ Mode (Command Code :1 1 0) ,, ) 6 ) ) ) " )! ) ) ),,,,! ) ) " )! ) ) ),,,,! A HA I I ), = J= ) A HA I I ), = J= ) READ Mode (Successive Address Reading) ,, ) 6 ) ) ) " )! ) ) ),,,,! A HA I I ), = J= ),,,,!,,,,!,,,,!,, = J= ), = J= ), = J= )! Rev May 21, 2004

8 HT1622 WRITE Mode (Command Code :1 0 1) , ) 6 ) ) ) " )! ) ) ),,,,! A HA I I ), = J= ) ) ) " )! ) ) ),,,,! A HA I I ), = J= ) WRITE Mode (Successive Address Writing) , ) 6 ) ) ) " )! ) ) ),,,,! A HA I I ), = J= ),,,,!,,,,!,,,,!,, = J= ), = J= ), = J= )! READ-MODIFY-WRITE Mode (Command Code :1 0 1) ,, ) 6 ) ) ) " )! ) ) ),,,,! A HA I I ), = J= ),,,,!, = J= ) ) ) " )! ) ) ),,,,! A HA I I ), = J= ) EAD-MODIFY-WRITE Mode (Successive Address Accessing) ,, ) 6 ) ) ) " )! ) ) ),,,,! A HA I I ), = J= ),,,,!,,,,!,,,,!,,,,!,, = J= ), = J= ), = J= ), = J= ) Rev May 21, 2004

9 HT1622 Command Mode (Command Code :1 0 0) , ) 6 ) + & + % + $ + + " +! & + % + $ + + " +! E + H, = A Mode (Data and Command Mode) , ) 6 ) + H, = HA I I = J= + H, = HA I I = J= + H, = HA I I = J= 4, Rev May 21, 2004

10 HT1622 Application Circuits , 9 4, ) 6 ) 0 6 $ 8,, 8 +, * %! * 2 EA " * E= I &, K JO +, 2 = A Note: The connection of IRQ and RD pin can be selected depending on the requirement of the MCU. The voltage applied to V LCD pin must be lower than V DD. Adjust VR to fit LCD display, at V DD =5V, V LCD =4V, VR=15k20%. Adjust R (external pull-high resistance) to fit users time base clock. Command Summary Name ID Command Code D/C Function Def. READ 110 A5A4A3A2A1A0D0D1D2D3 D Read data from the RAM WRITE 101 A5A4A3A2A1A0D0D1D2D3 D Write data to the RAM READ-MODIFY- WRITE 101 A5A4A3A2A1A0D0D1D2D3 D Read and Write data to the RAM SYS DIS X C Turn off both system oscillator and LCD bias generator SYS EN X C Turn on system oscillator LCD OFF X C Turn off LCD display Yes LCD ON X C Turn on LCD display TIMER DIS X C Disable time base output Yes WDT DIS X C Disable WDT time-out flag output Yes TIMER EN X C Enable time base output WDT EN X C Enable WDT time-out flag output TONE OFF X C Turn off tone outputs Yes CLR TIMER X C Clear the contents of the time base generator CLR WDT X C Clear the contents of WDT stage RC 32K XX-X C System clock source, on-chip RC oscillator Yes EXT 32K XX-X C System clock source, external clock source TONE 4K X-XXXX-X C Tone frequency output: 4kHz TONE 2K XXXX-X C Tone frequency output: 2kHz IRQ DIS X-0XXX-X C Disable IRQ output Yes IRQ EN X-1XXX-X C Enable IRQ output Yes Rev May 21, 2004

11 HT1622 Name ID Command Code D/C Function Def. F X-0000-X C F X-0001-X C F X-0010-X C F X-0011-X C F X-0100-X C F X-0101-X C F X-0110-X C F X-0111-X C Time base clock output: 1Hz The WDT time-out flag after: 4s Time base clock output: 2Hz The WDT time-out flag after: 2s Time base clock output: 4Hz The WDT time-out flag after: 1s Time base clock output: 8Hz The WDT time-out flag after: 1/2s Time base clock output: 16Hz The WDT time-out flag after: 1/4s Time base clock output: 32Hz The WDT time-out flag after: 1/8s Time base clock output: 64Hz The WDT time-out flag after: 1/16s Time base clock output: 128Hz The WDT time-out flag after: 1/32s Yes TEST X C Test mode, user dont use. NORMAL X C Normal mode Yes Note: X : Dont care A5~A0 : RAM address D3~D0 : RAM data D/C : Data/Command mode Def. : Power on reset default All the bold forms, namely 110, 101, and 100, are mode commands. Of these, 100indicates the command mode ID. If successive commands have been issued, the command mode ID except for the first command will be omitted. The source of the tone frequency and of the time base or WDT clock frequency can be derived from an on-chip 32kHz RC oscillator or an external 32kHz clock. Calculation of the frequency is based on the system frequency sources as stated above. It is recommended that the host controller should initialize the HT1622 after power on reset, for power on reset may fail, which in turn leads to the malfunctioning of the HT1622. Rev May 21, 2004

12 HT1622 Package Information 64-pin QFP (1420) Outline Dimensions +,!! 0 / 1!. ) * - $ " = ' Symbol Dimensions in mm Min. Nom. Max. A B C D E 1 F 0.40 G H 3.40 I 0.10 J K Rev May 21, 2004

13 HT1622 Holtek Semiconductor Inc. (Headquarters) No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan Tel: Fax: Holtek Semiconductor Inc. (Taipei Sales Office) 4F-2, No. 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan Tel: Fax: Fax: (International sales hotline) Holtek Semiconductor Inc. (Shanghai Sales Office) 7th Floor, Building 2, No.889, Yi Shan Rd., Shanghai, China Tel: Fax: Holtek Semiconductor Inc. (Shenzhen Sales Office) 43F, SEG Plaza, Shen Nan Zhong Road, Shenzhen, China Tel: Fax: ISDN : Holtek Semiconductor Inc. (Beijing Sales Office) Suite 1721, Jinyu Tower, A129 West Xuan Wu Men Street, Xicheng District, Beijing, China Tel: , , Fax: Holmate Semiconductor, Inc. (North America Sales Office) Fremont Blvd., Fremont, CA Tel: Fax: Copyright 2004 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holteks products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at Rev May 21, 2004

14 特色 : 工作电压 : V 内建 256KHz RC oscillator 可外接 KHz 石英震荡器或 256KHz 频率 可选择 1/2,1/3 偏压, 也可选择 1/2,1/3 或 1/4 的 COM 周期 两种蜂鸣器频率 (2KHz/4KHz) 省电模式 内建 time base generator 以及 WDT SG1621A 32*4 液晶驱动 IC 8 种的 time base/wdt 的时钟输入 32X4 LCD 驱动器 内建 32X4 bit 显示记忆体 3-wire serial interface 软件程控 资料及指令模式 自动增加读写位址 Time base or WDT 溢位输出 VLCD 脚位可用来调整 LCD 输概述 : SG1621A 是一个 32*4 的 LCD 驱动器, 可软体程控使其适用于多样化的 LCD 应用线路, 仅用到 3 至 4 条讯 号线便可控制 LCD 驱动器, 除此之外也可介由指令使其进入省电模式方块图 Note: CSB: 晶片致能 BZ,BZB: 蜂鸣器输出 WRB,RDB,DATA: 控制讯号线 COM0~COM3,SEG0~SEG31:LCD 输出 IRQB:Time base or WDT 溢位输出 脚位描述 Pad No. Pad Name I/O function 晶片 致能 输入, 内建 pull high 电阻, 当 CS 为 1 CSB I 选辑 1 时, 资料及指令皆无法接收, 当 CS 为选辑时, 资料及指令始能接收 2 RDB I 资料 读出 输入, 内建 pull high 电阻 显示记忆体内的资料在 RDB 负缘时会被输出至 DATA 这个脚位 3 WRB I 资料 写入 输入, 内建 pull high 电阻 写入显示记忆体内的资料在 WRB 正缘时会被输写入 4 DATA I/O 连续的讯号输入输出脚位 5 VSS - 负电源 6 OSCI I 使用 KHz crystal 时,OSCI 以及 OSCO 都必须接 7 OSCO O 使用 256KHz Oscillator 时, 只要接 OSCI 使用内建振荡器时,OSCI 以及 OSCO 皆可浮接 深圳力威电子科技有限公司 1 of 8

15 SG1621A 32*4 液晶驱动 IC 8 VLCD I LCD 电源 9 VDD - 正电源 10 IRQB O Time base or WDT 溢位旗标,NMOS open drain 输出 BZ,BZB O 2KHz 或 4KHz 蜂鸣器输出 COM0-COM3 O LCD common 输出 SEG31-SEG0 O LCD segment 输出 直流特性 D.C.Characteristics Symbol Parameter Istb Standby Current 5V Test Conditions VDD Conditions Min Typ. Max Unit No load Power down mode A lo LCD Common Sink Current 5V VOL=2.5V 2.36 ma lcd Common Source Current 5V VOH=2.5V 1.51 ma LCD Segment Sink Current 5V VOL=2.5V 1.58 ma LCD Segment Source Current 5V VOH=2.5V 0.9 ma 交流特性 : 功能描述 : Symbol Parameter Vdd Min Typ. Max Unit Fint3 Internal RC oscillator 3V 256 KHz Fint5 Internal RC oscillator 5V 133 KHz Fext5 External input clock 5V 3.5 MHz Trdbl3 Minimum read low pulse 3V 350 ns Trdbl5 Minimum read low pulse 5V 350 ns Twrbl3 Minimum write low pulse 3V 350 ns Twrbl5 Minimum write low pulse 5V 350 ns Tcsbh5 Minimum CSB high pulse 5V 50 ns 显示记忆体 : 显示记忆体共计可存 32X4 bits 资料, 显示记忆体的资料可介由 READ, WRITE, and 深圳力威电子科技有限公司 2 of 8

16 SG1621A 32*4 液晶驱动 IC READ-MODIFY-WRITE 等指令存取 以下是显示记忆体的资料与 common,segment 间的对照表 Data 4 bits (D3.D2.D1.D0) RAM mapping 系统振荡器 SG1621A 系统的时脉是用以产生 time base/watchdog,common,segment 以及蜂呜器所需的频率 系 统时脉的来源可介由指令换成内建的 RC oscillator (256KHz), crystal oscillator (32.768KHz), 或者 是 external 256KHz clock. 在下达 SYS DIS 这个指令后, 系统时脉便会停止 ( 当使用的时脉是内 建的 RC oscillator 或是 crystal oscillator 时 ),LCD 的偏压线路也会关掉, 一旦时脉停止,LCD 显 示器便显示空白,time base/wdt 也失去功能 LCD OFF 这个指令可用来将偏压线路关掉,SYS DIS 这个指令可以让 LCD 驱动器进入省电模式, 但是如果使用 external 256K oscillator 时便无法 达到省电功能 刚通电时 LCD 驱动器是在 SYS DIS 的状态 Time base and Watchdog Time (WDT) Time base generator 是由 8 节的计数器所组成, 其功能是用来产生正确的时基 The watch dog timert(wdt) 则是由 8 节的计数器以及另外的 2 节计数器共同组成, 其功能是中断控制器或其他副 系统的不正常状态, 例如不想要的跳跃, 程式执行错误 The WDT time out 会设定内部的 WDT time out 旗标 Time base generator 以及 WDT time out 旗蒜的输出为 IRQ 这个讯号脚位 总共有 8 种不同的频率可供 Time base generator 以及 WDT 使用 WDT 的输出频率为 方程式中的 n 范围从 0 到 7 可介由指令控制, 方程式中的 32KHz 是 LCD 驱动器系统时脉的来源有 3 种 :crystal oscillator of32.768khz, 内建 RC chip oscillator(256 KHz), 或是 extermal frequency of 256 KHz, 使用与 Time base generator 以及 WDT 相关的指令时, 须注意这两个功能共用一组 8 节的计数器, 举例来说, 使用到 WDT DIS 也会把 time base generator 关掉, 但是执行 WDT EN 指令时同时致能 time base generator 以及 WDT 执行 TIMER EN 这个指令后 WDT 与 IRQ 间连线会呈断路而与 time base generator 的输出连接 WDT 可介由 CLR WDT 深圳力威电子科技有限公司 3 of 8

17 SG1621A 32*4 液晶驱动 IC 或 CLR TIMER 等两个指令做清除 这个指令做清除的动作,time base generator 可 介由 CLR WDT Name Command Function LCD OFF X Tum off LCD outputs LCD ON X Tum off LCD outputs C=0:1/2 bios option C=0:1/3bios option BIAS&COM abXcX Ab=00:2 commons option Ab=01:3commons option Ab=10:4 commons option CLR WDT 或 CLR TIME 应该在 WDT EN 或 TIME EN 等两个指令前执行, 执行 IRQ EN 前, 应该先执行 CLR WDT 或 CLR TIME, 从 WDT 模式切换到 time base 模式前应该先执行 CLR TIME. 一旦 WDT time out 发生,IRQ 会持续在选辑 0 的准位直到执行 CLR WDT 或 IRQ DIS, IRQ 输出可介由 IRQ 或 IRQ DIS 来到能或关闭,IRQ EN 可使得 time base generator 或 WDT time out 棋标的输在 IRQ 这个脚位上 蜂鸣器输出在 SG1621A 里有一个简单的蜂鸣产生器 蜂鸣产生器在 BZ 和 BZB 上能输出一对反向的驱动号, 用来产生 single tone 在执行时,TONE4K 和 TONE2K 指令可先二音调频率输出,TONE4 和 TONE2K 的指令设定频率分别为 4KHz 和 2KHz TONE ON 和 TONR OFF 指令可打开或关掉蜂鸣器的输出 命令形式 SG1621A 有二种模式, 其中一种叫做命令模式 命令模式的 ID 为 命令模式的指令包括了系统组态 系统频率选择,LCD 组态, 蜂鸣器频率,time/WDT 设定, 和操作等等, 资料模式包含读, 写, 和读 - 修改 - 写的操作下列为资料模式和信念模式的 ID: Operation Mode Id Read Data 110 WRITE Data 101 READ-MODIFY-WRITE Data 101 COMMAND Command 100 命令模式在资料或指令之前应该被发布, 如果连续的命令已经补发存 命令模式 ID 即 100 可以 被忽略 当系统在非连续的命令或者非连续的位址资料模式操作时,CS 脚应该被设定为 1, 以 前的操作模式也应该被重置, 一旦 CS 脚回至 0 时, 新的操作模式应该首先被发存 应用线路 : 深圳力威电子科技有限公司 4 of 8

18 SG1621A 32*4 液晶驱动 IC NOTE: VLCD 的应用电压, 必须小于 VDD 调整 VR 适合 LCD 显示, 在 V DD =5V,V LCD =4V,VR 约 24Kohm 调整 R 适合使用者的时基脉波 指令索引 : Name ID Command Code D/C Function Def. READ 110 A5A4A3A2A1A0D D 从 RAM 读取资料 0D1D2D3 WRITE 101 A5A4A3A2A1A0D D 从 RAM 写入资料 0D1D2D3 READ- 101 A5A4A3A2A1A0D D 读取和写入资料到 RAM MODIFY-WRITE 0D1D2D3 SYS DIS X C 将系统振荡器和 LCD bias 产生器关掉 SYS EN X C 打开系统振荡器 LCD OFF X C 关掉 LCD bias 产生器 Yes LCD ON X 打开 LCD bias 产生器 TIMER DIS X C 不使 time base 输出 WDT DIS X C 不使 WDT 暂停旗标输出 TIMER EN X C 使 time base 输出 WDT EN X C 使 WDT time-out flag 输出 TONE OFF X C 关掉蜂鸣器输出 Yes TONE ON X C 打关蜂鸣器输出 CLR TIMER X C 清除 Time base 产生器 CLR WDT X C 清除 WDT XTAL 32K XX-X C 系统时脉来自晶体振荡 RC 256K XX-X C 系统时脉来自 RC 振荡 Yes EXT 256K XX-X C 系统时脉来自外部振荡 BIAS 1/ abX0-X C 选择 LCD 1/2 bias Ab=00:2 commons option Ab=01:3 commons option Ab=10:4 commons option 深圳力威电子科技有限公司 5 of 8

19 SG1621A 32*4 液晶驱动 IC BIAS 1/ abX1-X C 选择 LCD 1/3 bias Ab=00:2 commons option Ab=01:3 commons option Ab=10:4 commons option TONE 4K X-XXXX-X C 蜂鸣器频率,4KHz TONE 2K X-XXXX-X C 蜂鸣器频率,2KHz IRQ DIS X-0XXX-X C 不使 IRQ 输出 IRQ EN X-1XXX-X C 使 IRQ 输出 F X-X000-X C Time base/wdt 时脉输出 : 1Hz 在暂停旗标之后 :4S F X-X001-X C Time base/wdt 时脉输出 :2Hz The WDT 在暂停旗标之后 :2s F X-X010-X C Time base/wdt 时脉输出 : 4Hz 在暂停旗标之后 :1s F X-100X-X C Time base/wdt 时脉输出 : 8Hz 在暂停旗标之后 :1/2s F X-X100-X C Time base/wdt 时脉输出 :16Hz The WDT 在暂停旗标之后 :1/4s F X-X101-X C Time base/wdt 时脉输出 : 32Hz 在暂停旗标之后 :1/8s F X-X110-X C Time base/wdt 时脉输出 : YES 64Hz 在暂停旗标之后 :1/16s F X-X111-X C Time base/wdt 时脉输出 : 128Hz 在暂停旗标之后 :1/32s TEST X C 测试模式使用者不使用 NORAML X C 标准模式 YES Note: X: Don t care D/C: 资料 / 命令模式 A5-A0: RAM 位址 Def: 电源重置预设 D3-D0:RAM 资料 110,101, 和 100, 是模式指令 脚位图 深圳力威电子科技有限公司 6 of 8

20 SG1621A 32*4 液晶驱动 IC SG1621A 脚位座标 No Name X Y No Name X Y 1 CSB SEG RDB SEG WRB SEG DATA SEG VSS SEG OSCO SEG OSCI SEG VLCD SEG VDD SEG IRQB SEG BZ SEG BZB SEG COM SEG COM SEG COM SEG COM SEG SEG SEG 深圳力威电子科技有限公司 7 of 8

21 SG1621A 32*4 液晶驱动 IC 18 SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG LOGO History Date Name Version Comment 2003/2/9 C.c kuo 1.0 Initial 2003/2/13 C.c kuo /3/17 C.c kuo 1.2 Insert the package information 2003/6/10 C.c kuo 2.0 Create Chinese version 2003/9/25 C.c kuo 2.1 Modify the pin assignment 深圳力威电子科技有限公司 8 of 8

22 HT48 & HT46 MCU HT1621 C HA0103S HT48 & HT46 MCU HT C HT LCD RAM LCD LCD HT HT48R05A-1 HT1621 turn ON turn OFF LCD HT LCD SYSTEM ENABLE LCD ONSYSTEM ENABLE XX Don t care bit LCD ON X X Don t care bit SYSTEM DISABLE LCD DATA INPUT WR RAM A5 A4 A3 A2 A1 A0 D0 D1 D2 D3 101 A5~A0 D0~D3 LCD turn ON turn OFF LCD 1621 LCD HT1621 HT1621 Rev

23 include <ht48r05a-1.h> define uchar unsigned char HT48 & HT46 MCU HT1621 C define BIAS 0x24 define SYSEN 0x01 define LCDOFF 0x02 define LCDON 0x03 define cs _pa0 define wr _pa2 define dat _pa3 void SendBit_1621(uchar data,uchar cnt) { uchar i; for(i =0; i <cnt; i ++) { if((data&0x80)==0) dat=0; else dat=1; wr=0; _nop(); wr=1; data<<=1; } } //data cnt HT1621 void SendDataBit_1621(uchar data,uchar cnt) { uchar i; for(i =0; i <cnt; i ++) { if((data&0x01)==0) dat=0; else dat=1; wr=0; _nop(); wr=1; data>>=1; } } //data cnt HT1621 Rev

24 void SendCmd(uchar command) { cs=0; SendBit_1621(0x80,3); } HT48 & HT46 MCU HT1621 C // "100" SendBit_1621(command,9); // 9, 8 command, 1 cs=1; void Write_1621(uchar addr,uchar data) { cs=0; SendBit_1621(0xa0,3); // "101" SendBit_1621(addr<<2,6); // 6 addr SendDataBit_1621(data,4); // data 4 cs=1; } void WriteAll_1621(uchar addr,uchar *p,uchar cnt) { uchar i; cs=0; SendBit_1621(0xa0,3); // "101" SendBit_1621(addr<<2,6); // 6 addr for(i =0; i <cnt; i ++,p++) // { SendDataBit_1621(*p,8); } cs=1; } void main() { uchar a[10]; a[0]=0x21;a[1]=0x43;a[2]=0x65;a[3]=0x87;a[4]=0xa9; _pac=0; // SendCmd(BIAS); // SendCmd(SYSEN); // SendCmd(LCDON); // LCD Write_1621(0x09,0x01); // 0x09 0x01 WriteAll_1621(0,a,5); // 0 5 //a 5 SendCmd(LCDOFF); // LCD } Rev

25 HT48 MCU HT1621 LCD HT48 MCU HT1621 LCD HA0018s HT LCD RAM LCD LCD HT HT48R30A-1 HT1621, LCD HT LCD SYSTEM ENABLE LCD ONSYSTEM ENABLE XX Don t care bit LCD ON XX Don t care bit) SYSTEM DISABLE LCD DATA INPUT WR, RAM A5 A4 A3 A2 A1 A0 D0 D1 D2 D3 101 A5~A0 D0~D3 LCD LCD 1621 LCD LCD HT1621 ;1621driver.asm ; HT48R30A-1 HT1621 ; ; PB1 -- datum ; PB2 -- WRB ; PB3 -- CSB ; PB4 -- RDB 1

26 ; OSC : Ext. Crystal ; WDT clock source: Disable WDT ; input type PA: Sshmitt Trigger ; Pull-high PA: Pull-high PA ; Pull-high PB: Pull-high PB ; BZ/BZB : BZ ENABEL/BZB DISABLE ; Fsys: 4M ; HT48 MCU HT1621 LCD include ht48r30a-1.inc csb equ pb.3 csbc equ pbc.3 wrb equ pb.2 wrbc equ pbc.2 datum equ pb.1 datumc equ pbc.1 rdb equ pb.4 rdbc equ pbc.4 lig equ pc.3 ; num_mem equ [7fh] ; ; ;, 5 macro jmp $+1 jmp $+1 nop endm ; lcddriver.section 'data' count db? ; code_datum db? ;command code or memory datum bits code_datum1 db? ;only used in read_modify_write mode mem_addr db? ;memorty address for selecting segment temp_da db? t_addr_h db? ;just a buffer ; lock.section 'CODE' 2

27 org 00h HT48 MCU HT1621 LCD jmp org reti org reti start 04h 08h start: clr pb ;Initial set csb clr pbc set pbc.0 clr pc clr pcc clr intc mov mov mov mov a, 50h num_mem, a a, 20h mp0, a clr_ram: clr r0 inc mp0 sdz num_mem jmp clr_ram ; ini_status: mov a, 87h mov tmrc, a ;initial ram show_k: set lig ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; mov a, 0e3h ;NORMAL mov code_datum, a call send_command ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; mov a, 01h ;SYS ENABLE mov code_datum, a call send_command LO: 3

28 mov a, 029h ;4com;1/3bias mov code_datum, a call send_command HT48 MCU HT1621 LCD mov a, 3 ;LCD On mov code_datum, a call send_command call clr_lcm ;cls lcd jmp $+1 jmp $+1 call show_lcm ;light all dots clr code_datum ;reading then writing in the same address mov a, 4 mov mem_addr, a call read mov a, 07h xor a, code_datum snz z jmp error mov a, 2 mov code_datum, a call send_command jmp $+1 jmp start ;do it repeat error: jmp $ ;****************************************** ;Purpose : send command ;Parameter: ; code_datum : byte ;Return : none ;Modified : acc, status ;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ send_command proc clr CSB clr datumc set datum clr WRB ;COMMAND ID '100' set WRB ;1 4

29 nop clr datum ;00 clr WRB set WRB nop CLR WRB set WRB HT48 MCU HT1621 LCD LOOP1: mov A, 8 ; send code mov count, A clr datum sz code_datum.7 set datum rl code_datum clr WRB set WRB sdz count jmp loop1 clr WRB set WRB nop set CSB ;close csb signal,not selecting the chip ret send_command endp ; ;Purpose : write datum to 1621 ;Parameter: ; code_datum : byte ; mem_addr : byte ;Return : none ;Modified : acc, status ;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ write: clr CSB clr datumc set datum 5

30 clr WRB ;WRITE mode ID '101' set WRB HT48 MCU HT1621 LCD clr clr set datum WRB WRB set clr set datum WRB WRB mov a, 6 mov count, a writeloop1: clr datum sz mem_addr.5 ;sending memory address for selecting segment set datum clr WRB set WRB rl mem_addr sdz count jmp writeloop1 mov a, 4 mov count, a writeloop2: clr datum sz code_datum.0 ;sending memory content for deciding comments's state set datum clr WRB set WRB rr code_datum sdz count jmp writeloop2 set CSB ret ; ;Purpose : read datum from

31 ;Parameter: ; mem_addr : byte ;Return : ; code_datum : byte ;Modified : acc, status ;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ read proc clr CSB clr datumc HT48 MCU HT1621 LCD set datum clr WRB ;READ mode ID '110' set WRB clr set WRB WRB clr clr set datum WRB WRB mov a, 6 mov count, a readloop1: clr datum sz mem_addr.5 ;sending memory address for selecting segment set datum clr WRB set WRB rl mem_addr sdz count jmp readloop1 set datumc mov a, 4 mov count, a readloop2: clr RDB 7

32 HT48 MCU HT1621 LCD set RDB rr code_datum clr code_datum.3 sz datum ;sending memory content for deciding comments's state set code_datum.3 sdz count jmp readloop2 mov andm a, 0fh a, code_datum set CSB ret read endp ; ;Purpose : read datum from 1621, then write a datum in the same register ;Parameter: ;mem_addr : byte ;Return : none ;Modified : acc, status ;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ rm_write proc clr CSB clr datumc set datum ;READ-MODIFY-WRITE mode ID 101 clr WRB set WRB clr clr set datum WRB WRB set clr set datum WRB WRB mov a, 6 mov count, a rmwloop1: 8

33 HT48 MCU HT1621 LCD clr datum sz mem_addr.5 ;sending memory address for selecting segment set datum clr WRB set WRB rl mem_addr sdz count jmp rmwloop1 set datumc mov a, 4 mov count, a rmwloop2: clr RDB set RDB rr code_datum1 clr code_datum1.3 sz datum ;read memory content out set code_datum1.3 sdz count jmp rmwloop2 mov andm a, 0fh a, code_datum1 clr datumc mov a, 4 mov count, a mov a, temp_da andm a, code_datum rmwloop3: clr datum sz code_datum.0 ;sending memory content for deciding comments's state set datum clr WRB set WRB rr code_datum sdz count jmp rmwloop3 set CSB 9

34 ret rm_write endp ; show_lcm: mov a, 00h mov t_addr_h, a mov a, 31h mov num_mem, a clr_n1: mov a, t_addr_h mov mem_addr, a mov a, 07h mov code_datum, a call write inc t_addr_h sdz num_mem jmp clr_n1 ret ; clr_lcm: mov a, 00h mov t_addr_h, a mov a, 31h mov num_mem, a clr_n: mov a, t_addr_h mov mem_addr, a mov a, 0h mov code_datum, a call write inc t_addr_h sdz num_mem jmp clr_n ret HT48 MCU HT1621 LCD 10