查询 MC1455/D 供应商捷多邦, 专业 PCB 打样工厂,24 小时加急出货 Order this document by MC1455/D The MC1455 monolithic timing circuit is a highly stable controller capable

Size: px

Start display at page:

Download "查询 MC1455/D 供应商捷多邦, 专业 PCB 打样工厂,24 小时加急出货 Order this document by MC1455/D The MC1455 monolithic timing circuit is a highly stable controller capable"

焚桃高
4 years ago
Views:

查询 M4/D 供应商捷多邦, 专业 PB 打样工厂,4 小时加急出货 Order this document by M4/D The M4 monolithic timing circuit is a highly stable controller capable of producing accurate time delays or oscillation.

For astable operation as an oscillator, the freerunning frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor.

1 查询 M4/D 供应商捷多邦, 专业 PB 打样工厂,4 小时加急出货 Order this document by M4/D The M4 monolithic timing circuit is a highly stable controller capable of producing accurate time delays or oscillation. Additional terminals are provided for triggering or resetting if desired. In the time delay mode, time is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the freerunning frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output structure can source or sink up to 00 ma or drive MTTL circuits. Direct Replacement for NE Timers Timing from Microseconds through Hours Operates in Both Astable and Monostable Modes Adjustable Duty ycle High urrent an Source or Sink 00 ma an Drive MTTL Temperature Stability of 0.00% per Normally ON or Normally OFF TIMING IRUIT SEMIONDUTOR TEHNIAL DATA P SUFFIX PLASTI PAKAGE ASE D SUFFIX PLASTI PAKAGE ASE (SO) Figure. Second Solid State Time Delay Relay ircuit 0 k 0. µf 0.0 µf 4 M4 t =.; R and = sec Time delay (t) is variable by changing R and (see Figure )..0 k R.0 µf MT 0 M G MT N440 Load 0 V N400. k 0 V 0 µf + Vac/0 Hz Device M4P M4D M4BD M4BP ORDERING INFORMATION Operating Temperature Range TA = 0 to +0 TA = 40 to + Figure. General Test ircuit Package Plastic DIP SO SO Plastic DIP V R I V Threshold ontrol Voltage Figure. Representative Block Diagram k k k V + omp A + omp B Gnd R S Flip Flop Q Inhibit/ 4 Discharge µf V O 4 00 V ontrol Discharge Voltage M4 Threshold I.0 k V S th I Gnd Sink I Source Test circuit for measuring D parameters (to set output and measure parameters): a) When V S / V, V O is low. b) When V S / V, V O is high. c) When V O is low, Pin sinks current. To test for, set V O c) high, apply voltage, and test for current flowing into Pin. c) When is not in use, it should be tied to V. Motorola, Inc. 999 Rev 4, 0/999

2 M4, B MAXIMUM RATINGS (TA = +, unless otherwise noted.) Rating Symbol Value Unit Power Supply Voltage V + Vdc Discharge urrent (Pin ) I 00 ma Power Dissipation (Package Limitation) P Suffix, Plastic Package Derate above TA = + D Suffix, Plastic Package Derate above TA = + Operating Temperature Range (Ambient) M4B M4 PD PD TA to + 0 to +0 mw mw/ mw /W Storage Temperature Range Tstg to +0 ELETRIAL HARATERISTIS (TA = +, V = +.0 V to + V, unless otherwise noted.) haracteristics Symbol Min Typ Max Unit Operating Supply Voltage Range V 4. V Supply urrent V =.0 V, RL = V = V, RL =, Low State (Note ) Timing Error (R =.0 kω to 00 kω) (Note ) Initial Accuracy = 0. µf Drift with Temperature Drift with Supply Voltage Threshold Voltage/Supply Voltage Vth/V / Voltage V = V V =.0 V urrent IT 0. µa Voltage VR V urrent IR 0. ma Threshold urrent (Note ) Ith µa Discharge Leakage urrent (Pin ) Idischg 00 na ontrol Voltage Level V = V V =.0 V Voltage Low ISink = 0 ma (V = V) ISink = 0 ma (V = V) ISink = 00 ma (V = V) ISink = 00 ma (V = V) ISink =.0 ma (V =.0 V) ISink =.0 ma (V =.0 V) Voltage High V = V (ISource = 00 ma) V = V (ISource = 00 ma) V =.0 V (ISource = 00 ma) I VT VL VOL VOH Rise Time Differential tr 00 ns Fall Time Differential tf 00 ns NOTES:. Supply current when output is high is typically.0 ma less.. Tested at V =.0 V and V = V Monostable mode.. This will determine the maximum value of R A + R B for V operation. The maximum total R = 0 MΩ ma % PPM/ %/V V V V V

3 M4, B 0 Figure 4. Pulse Width 0 Figure. Supply urrent PW, PULSE WIDTH (ns min) I, SUPPLY URRENT (ma) VT (min), MINIMUM TRIGGER VOLTAGE (x V = Vdc) V, SUPPLY VOLTAGE (Vdc).0 Figure. High Voltage 0 Figure. Low V =.0 Vdc V V OH (Vdc) V V V ISource (ma) V OL, LOW OUTPUT VOLTAGE (Vdc).0 0. ISink (ma) Figure. Low V = 0 Vdc 0 Figure 9. Low V = Vdc V OL, LOW OUTPUT VOLTAGE (Vdc).0 0. V OL, LOW OUTPUT VOLTAGE (Vdc) ISink (ma) ISink (ma)

4 M4, B.0 Figure 0. Delay Time versus Supply Voltage.0 Figure. Delay Time versus Temperature td, DELAY TIME NORMALIZED td, DELAY TIME NORMALIZED V, SUPPLY VOLTAGE (Vdc) TA, AMBIENT TEMPERATURE ( ) Figure. Propagation Delay versus Voltage 00 t pd, PROPAGATION DELAY TIME (ns) VT (min), MINIMUM TRIGGER VOLTAGE (x V = Vdc)

5 M4, B Figure. Representative ircuit Schematic V Threshold omparator 4. k 0 4. k omparator.0 k ontrol Voltage FlipFlop. k.0 k Threshold.0 k.9 k 0 k c b.0 k e 4. k c b 0 00 k.0 k 4. k Discharge Gnd Discharge 00 The M4 is a monolithic timing circuit which uses an external resistor capacitor network as its timing element. It can be used in both the monostable (oneshot) and astable modes with frequency and duty cycle controlled by the capacitor and resistor values. While the timing is dependent upon the external passive components, the monolithic circuit provides the starting circuit, voltage comparison and other functions needed for a complete timing circuit. Internal to the integrated circuit are two comparators, one for the input signal and the other for capacitor voltage; also a flipflop and digital output are included. The comparator reference voltages are always a fixed ratio of the supply voltage thus providing output timing independent of supply voltage. Monostable Mode In the monostable mode, a capacitor and a single resistor are used for the timing network. Both the threshold terminal and the discharge transistor terminal are connected together in this mode (refer to circuit in Figure 4). When the input voltage to the trigger comparator falls below / V, the comparator output triggers the flipflop so that its output sets low. This turns the capacitor discharge transistor off and drives the digital output to the high state. This condition allows the capacitor to charge at an exponential rate which is set by the R time constant. When the capacitor voltage reaches / V, the threshold comparator resets the flipflop. This action discharges the timing capacitor and returns the digital output to the low state. Once the flipflop has been triggered by an input signal, it cannot be retriggered GENERAL OPERATION until the present timing period has been completed. The time that the output is high is given by the equation t =. RA. Various combinations of R and and their associated times are shown in Figure. The trigger pulse width must be less than the timing period. A reset pin is provided to discharge the capacitor, thus interrupting the timing cycle. As long as the reset pin is low, the capacitor discharge transistor is turned on and prevents the capacitor from charging. While the reset voltage is applied the digital output will remain the same. The reset pin should be tied to the supply voltage when not in use. RL Figure 4. Monostable ircuit RL +V (.0 V to V) 4 M4 V Discharge RA Threshold ontrol Voltage 0.0 µf

6 M4, B Figure. Monostable Waveforms 00 Figure. Time Delay, APAITANE ( µ F) t = 0 µs/cm (RA = 0 kω, = 0.0 µf, RL =.0 kω, V = V) µs 00 µs.0 ms 0 ms 00 ms td, TIME DELAY (s) Figure. Astable ircuit Figure. Astable Waveforms +V (.0 V to V) RL 4 V RA Discharge RL M4 Threshold ontrol Voltage RB t = 0 µs/cm (RA =. kω, = 0.0 µf, RL =.0 kω; RB =.9 kω, V = V) Astable Mode In the astable mode the timer is connected so that it will retrigger itself and cause the capacitor voltage to oscillate between / V and / V. See Figure. The external capacitor changes to / V through RA and RB and discharges to / V through RB. By varying the ratio of these resistors the duty cycle can be varied. The charge and discharge times are independent of the supply voltage. The charge time (output high) is given by: t = 0.9 (RA + RB) The discharge time (output low) is given by: t = 0.9 (RB) Thus the total period is given by: T = t + t = 0.9 (RA +RB).44 The frequency of oscillation is then: f = = T (RA +RB) and may be easily found as shown in Figure 9. The duty cycle is given by: D = RB RA +RB To obtain the maximum duty cycle RA must be as small as possible; but it must also be large enough to limit the discharge current (Pin current) within the maximum rating of the discharge transistor (00 ma). The minimum value of RA is given by:, APAITANE ( µ F) RA V (Vdc) V (Vdc) I (A) 0. Figure 9. Free Running Frequency (RA + RB) k 0 k 00 k f, FREE RUNNING FREQUENY (Hz)

7 M4, B APPLIATIONS INFORMATION Linear Voltage Ramp In the monostable mode, the resistor can be replaced by a constant current source to provide a linear ramp voltage. The capacitor still charges from 0 V to / V. The linear ramp time is given by: t = V, where I = V VB VBE RE If VB is much larger than VBE, then t can be made independent of V. Missing Pulse Detector The timer can be used to produce an output when an input pulse fails to occur within the delay of the timer. To accomplish this, set the time delay to be slightly longer than the time between successive input pulses. The timing cycle is then continuously reset by the input pulse train until a change in frequency or a missing pulse allows completion of the timing cycle, causing a change in the output level. Figure 0. Linear Voltage Sweep ircuit V Figure. Missing Pulse Detector +V (.0 V to V) Digital 4 M4 V RE R RL N440 or Equiv VE VB I Sweep 0.0 µf ontrol Voltage R Input 4 M4 V Discharge Threshold ontrol Voltage 0.0 µf RA N440 or Equiv Figure. Linear Voltage Ramp Waveforms Figure. Missing Pulse Detector Waveforms t = 00 µs/cm t = 00 µs/cm (RE = 0 kω, R = 00 kω, R = 9 kω, = 0.0 µf, V = V) (RA =.0 kω, RL =.0 kω, = 0.0 µf, V = V)

8 M4, B Pulse Width Modulation If the timer is triggered with a continuous pulse train in the monstable mode of operation, the charge time of the capacitor can be varied by changing the control voltage at Pin. In this manner, the output pulse width can be modulated by applying a modulating signal that controls the threshold voltage. Figure. Pulse Width Modulation Waveforms Figure 4. Pulse Width Modulator +V (.0 V to V) lock Input RL 4 M4 RA Modulation Input t = 0. ms/cm (RA = 0 kω, = 0.0 µf, V = V) Test Sequences Several timers can be connected to drive each other for sequential timing. An example is shown in Figure where the sequence is started by triggering the first timer which runs for 0 ms. The output then switches low momentarily and starts the second timer which runs for 0 ms and so forth. Figure. Sequential Timer V (.0 V to V) 9. k k 9. k k. k µf µf 0.0 µf M4 M4 M4.0 µf 0.00 µf.0 µf 0.00 µf.0 µf Load Load Load

9 M4, B OUTLINE DIMENSIONS P SUFFIX PLASTI PAKAGE ASE 0 ISSUE K NOTE T SEATING PLANE H B 4 F A L J N M D K G 0. (0.00) M T A M B M NOTES:. DIMENSION L TO ENTER OF LEAD WHEN FORMED PARALLEL.. PAKAGE ONTOUR OPTIONAL (ROUND OR SQUARE ORNERS).. DIMENSIONING AND TOLERANING PER ANSI Y4.M, 9. MILLIMETERS INHES DIM MIN MAX MIN MAX A B D F G.4 BS 0.00 BS H J K L. BS 0.00 BS M 0 0 N

10 M4, B OUTLINE DIMENSIONS D SUFFIX PLASTI PAKAGE ASE 0 (SO) ISSUE T A E B A e D B 4 H A 0. M B S A S 0. M B M SEATING PLANE 0.0 h X 4 L NOTES:. DIMENSIONING AND TOLERANING PER ASME Y4.M, DIMENSIONS ARE IN MILLIMETER.. DIMENSION D AND E DO NOT INLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0. PER SIDE.. DIMENSION B DOES NOT INLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0. TOTAL IN EXESS OF THE B DIMENSION AT MAXIMUM MATERIAL ONDITION. MILLIMETERS DIM MIN MAX A.. A B D E e. BS H.0.0 h L

11 M4, B NOTES

12 M4, B Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; JAPAN: Motorola Japan Ltd.; SPD, Strategic Planning Office, 4, P.O. Box 40, Denver, olorado or NishiGotanda, Shinagawaku, Tokyo, Japan. 44 ustomer Focus enter: 004 Mfax : RMFAX0@ .sps.mot.com TOUHTONE ASIA/PAIFI: Motorola Semiconductors H.K. Ltd.; Silicon Harbour entre, Motorola Fax Back System US & anada ONLY 0044, Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. 4 HOME PAGE:

T stg -40 to 125 C V cc 3.8V V dc RH 0 to 100 %RH T a -40 to +125 C -0.3 to 3.6V V -0.3 to VDD+0.3 V -10 to +10 ma = 25 = 3V) VDD

1/16 T stg -40 to 125 C V cc 3.8V V dc RH 0 to 100 %RH T a -40 to +125 C -0.3 to 3.6V V -0.3 to VDD+0.3 V -10 to +10 ma (@T = 25 C, @Vdd = 3V) VDD 1.8 3.0 3.6 V (1) 0.08 0.3 µa Idd 300 450 500 µa 0.25

查询 MC1455/D 供应商 捷多邦, 专业 PCB 打样工厂,24 小时加急出货 Order this document by MC1455/D The MC1455 monolithic timing circuit is a highly stable controller capable

查询 MC1455/D 供应商捷多邦, 专业 PCB 打样工厂,24 小时加急出货 Order this document by MC1455/D The MC1455 monolithic timing circuit is a highly stable controller capable