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2 近代 電子學電子學 主要探討課題為 微電子電路設計原理電子電路設計原理 本教材分三部份 : 基礎 設計原理及應用 基礎部份 ( 電子學 (1) 電子學 (2)): 簡介 理想運算放大器 二極体 場效應電晶体 場效應電晶体 (MOSFET) 及雙極接面電晶体 (BJT) 原理部份 ( 電子學 (3) 電子學 (4)): 單級放大器 差動放大器 負回授 運算放大器電路電路及 CMOS 組合邏輯電路 應用部份 ( 電子學 (5)): 正反器 多諧振盪器及記憶體 ; 濾波器及調諧放大器 ; 信號產生器及波形整形 2

3 本教材內容, 主要為依據書為依據書本 Microelectronic circuits,, by Sedra/Smith, Fifth edition, 2004 所編撰講義, 僅供選課學生參考 3

4 其他參考 : Microelectronic circuit design by Jaeger/Blalock, Second edition, 2003 Introductory circuits for electrical and computer engineering by Nilsson/Riedel, 2002 Electronic principles: Physicals, Models, and Circuits by Gray/Searle, 1969 Physics and technology of semiconductor devices by A. S. Grove, 4

5 網路講義檔案兩種 :.pdf 一般講義檔只有文字說明.pcm 有聲動態講義檔有文字及語音說明對象 1. 課本閱讀困難 2. 上課無法充分理解 3. 自習用 可由 PowerCam 軟體讀取 PowerCam 可由學校義守大學 > 電算中心 > 電 算中心首頁 > 校內授權軟體 安裝 或由 powercam.com.tw/ 安裝 5

6 如何使用 PowerCam 請參考下步驟 Step 1 Step 2 6

7 Step 1 7

8 Step 2 8

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10 教材左上符號 * Supplementary pages for illustration use. 補充教材 ~ The subject will not be covered in our current lecture. 目前略去 Examples in the Chapter will only be discussed on the class. 10

11 Chapter Three Diode 二極體 11

12 In the previous chapter we dealt almost entirely with linear circuits; any nonlinearity, such as that introduced by amplifier output saturation, was considered a problem to be solved by the circuit designer. 在前章所介紹為線性電路 任何非線性, 例如, 放大器輸出飽和所引起所引起非線性, 則要由設計者解決 12

13 However, there are many other signal-processing functions that can be implemented only by nonlinear circuits. Examples include the generation of dc voltages from the ac power supply and the generation of signals of various waveforms (e.g.. sinusoids, square waves, pulse, etc.). 但有許多信號處理功能, 則僅能利用非線性電路來達成 例如,ac, 電源供應來產生 dc 電壓, 或各種信號信號波形產生 ( 如正弦波 方波 脈波等 ) Also, digital logic and memory circuits constitute a special class of nonlinear circuits. 另外, 數位邏輯及記憶體電路, 則為另類的非線性電路 13

14 The simplest and most fundamental nonlinear circuit element is the diode. 二極體為最簡單及最基本非線性元件 Just like a resistor, the diode has two terminals; but unlike the resistor, which has a linear (straight-line) relationship between the current flowing through it and the voltage appearing across it, the diode has a nonlinear i-v characteristic. 如電阻般, 二極體有兩端子 但與電阻的電流流過產生電壓的線性 ( 直線 ) 關係不一樣, 二極體具有非線性 i-v 特徵 14

15 3.1 The ideal diode 理想二極體 15

16 3.1.1 Current-voltage characteristic 電流電壓特性 The ideal diode may be considered the most fundamental nonlinear circuit element. 理想二極體可看成最基本非線性元件 It is a two terminal device have the circuit symbol of Fig. 3.1(a) and the i-v characteristic shown in Fig. 3.1(b). 其為兩端子兩端子裝置, 電路符號如圖 3.1a 所示, i-v 特性如圖 3.1b 所示 16

17 Figure 3.1 The ideal diode: (a) diode circuit symbol; (b) i v characteristic; 17

18 The positive terminal of the diode is called the anode and the negative terminal the cathode. 二極體正端稱為陽極, 負端稱為端稱為陰極 The nonlinear characteristic of ideal diode consists of two straight-line segments. It is said to be piecewise linear. 二極體非線性特徵由兩直線組成 此稱分段線性 18

19 The terminal characteristic of the ideal diode can be interpreted as follows: 理想二極體端子特性如下 : 1. If a negative voltage (relative to the reference direction in Fig. 3.1a) is applied to the diode, no current flow and the diode behaves as an open circuit (Fig. 3.1c). 若加上負電壓 ( 參考方向依圖 3.1a ) 於二極體, 沒電流流動 二極體形如開路 Diode operated in this mode are said to be reverse biased,, or operated in the reverse direction. 操作於此模式二極體稱逆向偏位 或操作於逆方向 An ideal diode has zero current when operate in the reverse direction and is said to be cutoff, or simply off. 當操作於逆向, 沒電流的理想二極體, 稱截止或斷路 19

20 Figure 3.1 The ideal diode: (c) equivalent circuit in the reverse direction. 20

21 2. If a positive current (relative to the reference direction in Fig. 3.1a) is applied to the ideal diode, zero voltage drop appears across the diode. 若於理想二極體於理想二極體加上正電流 ( 依圖 3.1a 方向 ), 在二極體兩端電位降為零 The ideal diode behaves as a short circuit in the forward direction (Fig. 3.1d); it pass any current with zero voltage drop. 正方向理想二極體形如短路 通過任何電流電壓降為零 A forward-biased diode is said to be turned on,, or simply on. 正偏位二極體稱打開或開啟 21

22 Figure 3.1 The ideal diode: (d) equivalent circuit in the forward direction. 22

23 The external circuit must be designed to limit the forward current through a conducting diode, and the reverse voltage across a cutoff diode, to predetermined values. 外部電路設計必須限制, 在二極體導通時, 正向流過二極體電流量 量 及逆向及逆向時時, 跨過斷路二極體的電壓電壓值 Figure 3.2 shows two diode circuits that illustrate this point. 圖 3.2 說明兩二極體電路此點 23

24 Figure 3.2 The two modes of operation of ideal diodes and the use of an external circuit to limit the forward current (a) and the reverse voltage (b). 24

25 3.1.2 A simple application: The rectifier 一簡單應用 : 整流器 A fundamental application of the diode, one that make use of its reverse nonlinear i-v curve, is the rectifier circuit shown in Fig. 3.3(a). 二極體基本應用之一, 為利用其非線性 i-v 曲線 圖 3.3a 所示為整流器電路 The input voltage v I is the sinusoid shown in Fig. 3.3(b). During the positive half-cycle of the input sinusoid, the circuit will have the equivalent shown in Fig. 3.3(c). During the negative half-cycle of the input sinusoid, the circuit will have the equivalent shown in Fig. 3.3(d). The output voltage will have the wave form shown in Fig. 3.3(e). 25

26 Figure 3.3 (a) Rectifier circuit. (b) Input waveform. (c) Equivalent circuit when v I 0. (d) Equivalent circuit when v I <0. (e) Output waveform. 26

27 Example 3.1 Fig. 3.4(a) shows a circuit for charging a 12-V V battery. 圖 3.4a 所示為 12-V 電池充電電路 27

28 Figure 3.4 Circuit and waveforms for Example

29 3.1.3 Another application: Diode logic gates 另應用 : 二極體邏輯閘 Figure 3.5 shows two diode logic gates. 圖 3.5 所示為兩邏輯閘 Logic OR function (Fig. 3.5(a)) Y=A+B+C Logic AND function (Fig. 3.5(b)) Y=A B C 29

30 Figure 3.5 Diode logic gates: (a) OR gate; (b) AND gate (in a positive-logic system). 30

31 Example

32 Figure 3.6 Circuits for Example

33 3.2 Terminal characteristics of junction diodes 接面二極體端子特性 In this section we study the characteristics of real diodes specifically, semiconductor junction diodes made of silicon. 本節介紹實際二極體特性, 此處特指由矽所製成半導體接面二極體 33

34 Fig. 3.7 shows the i-v characteristic of a silicon junction diode. 圖 3.7 所示為矽接面二極體 i-v 特性 The characteristic curve consists of three distinct regions: 特性曲線由三不同區域組成 1. The forward-bias region, determined by v > 0. 正向偏位區, 由 v > 0 決定 2. The reverse-bias region, determined by v < 0. 逆向偏位區, 由 v < 0 決定 3. The breakdown region, determined by v < V ZK. 崩潰區, 由 v < V ZK 決定 34

35 Figure 3.7 The i v characteristic of a silicon junction diode. 35

36 The same characteristic is shown in Fig. 3.8 with some scales expanded and others compressed to reveal details. 圖 3.8 所示為相同特性, 但做了但做了尺度放大及壓縮, 以呈現詳細內容 36

37 尺度壓縮 尺寸放大Figure 3.8 The diode i v relationship with some scales expanded and others compressed in order to reveal details. 37

38 3.2.1 The forward-bias region The forward-bias or simply forward region of operation is entered when the terminal voltage v is positive. 當端子電壓 v 為正, 則進入正向偏位正向偏位或正向操作區 38

39 In the forward region the i-v relationship is approximated by / i = I ( e v nv T 1) (3.1) s 1. The current I is called the saturation current or scale current. S For small-signal diode, which are small-size diode intended for low-power applications, I is of the order of 10 S -15 A. It also shows a very strong temperature dependence, with double in value for every 5 C rise in temperature. 39

40 2. Diodes made using the standard integrated-circuit fabrication process exhibit n = 1 when operated under normal conditions. 3. The voltage V is a constant called the V T kt = q T thermal voltage. where -23 k = Boltzmann's constant = joules / kelvin T = the absolute temperature in kelvins = temperature in C -19 q = the magnitude of electronic charge = coulomb At room temperature (20 C) : V 25mV T 40

41 For appreciable current i in the forward direction, i >> I and S, i I e S v/ nv T It can be expressed in logarithmic form v = nv T ln i I S 41

42 Now considering two different voltage V and V are applied to the diode. Then we have I = I e 1 S V / nv 1 T 1 2 and I = I e 2 S V 2 / nv T Combined these two equations we get I I 2 1 = e ( V V )/ nv 2 1 T 42

43 which can be rewritten as V V = nv 2 1 T ln I I 2 1 or, in terms of base-10 logarithms, V V = 2.3nV log 2 1 T I I 2 1 This equation states that for a decade (factor of 10) change in current, the diode voltage drop changes by approximately 60mV for n = nV T, which is That means, the current will have significant change for any small variation in voltage. 43

44 A glance at the i-v characteristic in the forward region (Fig. 3.8): 正偏位區 i v 特性 : For v smaller than 0.5V, the current is negligible. This voltage is usually referred to as the cut-in voltage. 當 v 小於 0.5 V, 電流可忽略 For a full conducting diode, the voltage drop lies in a narrow range of 0.6 to 0.8 V. 在二極體全導電時, 電壓降在 0.6 至 0.8 V 小範圍 In general, we model the conducting diode with 0.7 V as its on voltage. 一般, 以 0.7 V 模型, 當二極體導通 44

45 尺度壓縮 尺寸放大Figure 3.8 The diode i v relationship with some scales expanded and others compressed in order to reveal details. 45

46 Example

47 Since both I S and V T are functions of temperature, the forward i-v characteristic varies with temperature, as illustrated in Fig 因 I S 及 V T 兩者皆為溫度函數, 正向 i v 特性會隨溫度變化 如圖 3.9 所示 47

48 Figure 3.9 Illustrating the temperature dependence of the diode forward characteristic. At a constant current, the voltage drop decreases by approximately 2 mv for every 1 C increase in temperature. 48

49 3.2.2 The reverse-bias region 逆向偏位區 For v is negative and a few times larger than V T (~25mV) in magnitude, the diode current becomes (see Fig. 3.8) i I S. 在 v 為負, 並大於數倍並 V T (~25mV), 則二極體電流 變成 i I S That is, the current in the reverse direction is constant and equal to I S. This constancy is the reason behind the term saturation current. 此指在逆向時, 電流為等於 I S 之常數 故此稱飽和電流 The reverse current is in order smaller than 1nA. 逆向電流電流次方, 小於 1nA The reverse current doubles for every 10 rise in temperature. 逆向電流隨溫度, 每上升 10 加一倍 49

50 尺度壓縮 尺寸放大Figure 3.8 The diode i v relationship with some scales expanded and others compressed in order to reveal details. 50

51 3.2.3 The breakdown region 崩潰區 The breakdown region is entered when the magnitude of the reverse voltage exceeds a threshold value called breakdown voltage. 當逆向電壓超過一臨界值, 二極體進入崩潰區 此電壓稱崩潰電壓 This is the voltage at the knee of the i-v curve in Fig 此電壓為在圖 3.8 i-v 曲線的屈折位置 It is denoted as V ZK, where Z stands for zener and K denotes knee. 以電壓 V ZK 表之 此 Z 表齊納納,K, 表屈折 51

52 尺度壓縮 尺寸放大Figure 3.8 The diode i v relationship with some scales expanded and others compressed in order to reveal details. 52

53 Diode breakdown is normally not destructive provided that the power dissipated in the diode is limited to a safe level. 當二極體崩潰, 若功率消耗在限制內, 則一般不會燒壞 This characteristic can be used in voltage regulation. 此特性可用於電壓調用於電壓調節上節上 53

54 3.3 Modeling the diode forward characteristic 二極體正向特性模型 Having studied the diode terminal characteristics we now consider the analysis of circuits employing forward- conducting diode. 己了解二極體端子特性後, 以下討論正向導通二極體電路分析 Fig shows such a circuit. 圖 3.10 示此電路 54

55 Figure 3.10 A simple circuit used to illustrate the analysis of circuits in which the diode is forward conducting. 55

56 3.3.1 The exponential model The most accurate description of the diode operation in the forward region is provided by the exponential model. 最精確二極體正向區操作描述, 為指數模型 To illustrate, let s s analyze the circuit in Fig using the exponential model. 今以圖 3.10 電路, 利用指數模型來分析 56

57 Figure 3.10 A simple circuit used to illustrate the analysis of circuits in which the diode is forward conducting. 57

58 Assuming that V is greater than 0.5V or so, the diode current DD will be much greater than I, and we can represent the diode i-v D VD / nvt = ISe (3.6) S characteristic by the exponential relationship, resulting in I The other equation that governs circuit operation is obtained by writing a Kirchhoff loop equation, resulting in V V R DD D I D= (3.7) 58

59 Assuming that the diode parameters I and n are known, then, the above two equations have two unknown quantities I and V. The unknown quantities thus can be solved. S D D Two alternative ways for obtaining the solution are graphical analysis and iterative analysis. 59

60 3.3.2 Graphical analysis using the exponential model 指數模型的圖形分析 The solution can be obtained as the coordinates of the point of intersection of two graphs. 可利用兩圖形座標交點, 來求答案 A sketch of the graphical construction is shown in Fig 圖 3.11 所示為圖形構造描繪 The curve represents the exponential diode equation Eq. (3.6) and the straight line represents Eq.. (3.7). 曲線表二極體指數方程式 Eq.. (3.6) 直線表 Eq.. (3.7) The straight line is known as the load line. 此直線稱負載線 60

61 Figure 3.11 Graphical analysis of the circuit in Fig using the exponential diode model. 61

62 The load line intersects the diode curve at point Q, which represents the operating point of the circuit. 負載線與二極體曲線交於點 Q 此代表電路操作點 ( 或工作點 ) Its coordinates gives the values of I D and V D. 由此點座標, 可求得 I D 及 V D 62

63 Figure 3.11 Graphical analysis of the circuit in Fig using the exponential diode model. 63

64 3.3.3 Iterative analysis using the exponential model 利用指數模型的反復推演 Equations (3.6) and (3.7) can be solved using a simple iterative procedure, as illustrated in the following example. 式 (3.6) 及 (3.7) 可以簡單反復推演程序來求答案 此以下例做說明 64

65 Example

66 3.3.4 The need for rapid analysis 快速分析的需要 The iterative procedure is simple and yields accurate results. 反復推演程序簡單, 並可求得精確結果 If one is doing a pencil-and and-paper design of a relatively complex circuit, rapid analysis is necessary. 但若吾人以筆及紙設計一相當複雜電路, 快速分析有其必要 To speed up the analysis process, we must find simpler models for the diode forward characteristics. 為加速加速分析過程, 吾人必須找尋較簡單的二極體正向特性模型 66

67 3.3.5 The piecewise-linear model 分段線性模型 The analysis can be greatly simplified if we can find linear relationships to describe the diode terminal characteristics. 若能找能找得線性關係來描述二極體端子特性, 則分析可大為簡化 A method is illustrated in Fig. 3.12, where the exponential curve is approximated by two straight lines, line A with zero slope and line B with a slope of 1/r D. 圖 3.12 說明一方法, 於此指數曲線以二直線來近似表示 線 A 斜率為零, 線 B 斜率為 1/r D 67

68 Figure 3.12 Approximating the diode forward characteristic with two straight lines: the piecewise-linear model. 68

69 The straight lines can be described by i = 0, v V D D D0 i = ( v V ) / r, v V ( 3.8 ) D D D0 D D D0 where V is the intercept of line B on the voltage axis and r D0 is the inverse of the slope of line B. D For the example shown, V = 0.65 V and r = 20 Ω. D0 D 69

70 The piecewise-linear model can be represented by the equivalent circuit shown in Fig 分段線性模型可以圖 3.13 等效電路表示 Note that an ideal diode is included in this model to constrain i D to flow in the forward direction only. 注意, 模型內理想二極體僅用於限制正方向 i D 流動 This model is also known as the battery-plus plusresistance model. 此模型亦稱, 電池加電阻模型 70

71 Figure 3.13 Piecewise-linear model of the diode forward characteristic and its equivalent circuit representation. 71

72 Example

73 Figure 3.14 The circuit of Fig with the diode replaced with its piecewise-linear model of Fig

74 3.3.6 The constant-voltage voltage-drop model 固定電壓降模型 An even simpler model of the diode forward characteristics can be obtained if we use a vertical straight line to approximate the fast- rising part of exponential curve, as shown in Fig 若利用一垂直直線來近似指數曲線的快速上升部分, 二極體正向特性可以可以一更簡單模型表示 如圖 3.15 所示 The resulting model says that a forward- conducting diode exhibits a constant voltage drop V D (= 0.7V). 此所得模型顯示, 正向導通二極體呈現一固定電壓降 V D (= 0.7V) 74

75 Figure 3.15 Development of the constant-voltage-drop model of the diode forward characteristics. A vertical straight line (B) is used to approximate the fast-rising exponential. Observe that this simple model predicts V D to within ±0.1 V over the current range of 0.1 ma to 10 ma. 75

76 The constant-voltage voltage-drop model can be represented by the equivalent circuit shown in Fig 固定電壓降模型, 可以可圖 3.16 所示等效電路表之 76

77 Figure 3.16 The constant-voltage-drop model of the diode forward characteristics and its equivalent-circuit representation. 77

78 3.3.7 The ideal-diode diode model 理想二極體模型 In applications that involve voltages much greater than the diode voltage drop ( V), 0.8V), we may neglect the diode voltage drop altogether while calculating the diode current. 在某些應用, 若電壓極大於二極體電壓降 ( V), 吾人可完全完全忽略二極體電壓降, 來計算二極體電流 The result is the ideal-diode diode model, which we studied in Section 3.1. 此結果相當於前 3.1 節所學習的理想二極體模型 78

79 The greatest utility of the ideal-diode diode model is in determining which diodes are on and which are off in a multidiode circuit, such as those considered in Section 3.1. 理想二極體模型的最大用處, 為在一多二極體電路, 決定那些二極體為關, 那些為開 如於 3.1 節所討論 79

80 3.3.8 The small-signal signal model 小信號模型 There are applications in which a diode is biased to operate at a point on the forward i-v characteristic and a small ac signal is superimposed on the dc quantities. 於某些應用, 二極體操作操作偏位點為設定於正向 i-v 特性, 同時有一小 ac 信號加於 dc 量上 For this situation, we first have to determine the dc operating point (V D and I D ) of the diode using one of the models discussed above. 此時, 吾人首先須先須以先前所討論二極體模型, 決定其 dc 操作點 V D 及 I D 80

81 Consider the conceptual circuit in Fig. 3.17(a) and the corresponding graphical representation in Fig. 3.17(b). 此以圖 3.17a 電路及對應 3.17b 圖示, 來做概念說明 81

82 Figure 3.17 Development of the diode small-signal model. Note that the numerical values shown are for a diode with n = 2. 82

83 A dc voltage V D, represented by a battery, is applied to the diode, and a time-varying signal v d (t), assumed (arbitrarily) to have a triangular waveform, is superimposed on the dc voltage V D. dc 電壓 V D 表一加於二極體加於二極體電池電池 同時有一隨時間化信號 v d (t), 假設為三角波者, 加於 dc 電壓 V D 上 In the absence of the signal v d (t) the diode voltage is equal to V D, and correspondingly, the diode will conduct a dc current I D. 當 v d (t) 不存在時, 二極體電壓等於 V D, 而二極體對應有 dc 電流 I D 導通 83

84 For a diode conducting a dc current I, the dc current is I D = I e S V D / nv T D When the signal v diode voltage v v = V + v D D d D d () t is applied, the total instantaneous () t is given by Thus, total instantaneous diode current i (t) will be i = I e = I e = I e e = I e vd/ nvt ( V + v )/ nv VD / nvt v / nv v / nv D S S S D D d T d T d T D (3.12) 84

85 Now if the ampltude of the signal v small such that v d nv T d () t is kept sufficiently << 1, then we may expand the exponential of Eq. (3.12) in a series and truncate the series after the first two terms to obtain the approximate expression i D I D + v 1 d nv T This is the small - signal approximation. 85

86 It is valid for signals whose amplitudes are smaller than 10mV for the case n = 2 and 5mV for n = 1(recall that V =25mV). I i = I + v D D D d nvt T Thus, superimposed on the dc current I, we have a signal current component directly proportional to the signal voltage v That is i = I + i D D d D d. where i d I D = nv T v d 86

87 From this relationship we get a diode small - signal resistance, or incremental resistance, r d = nv I D T Note that it is different from r that we have derived for piecewise-linear model. D The value of r is inversely proportional to the bias current I. d D 87

88 Let us return to the graphical representation in Fig. 3.17(b). 再回圖 3.17b 來看 It is easy to see that using the small-signal signal approximation is equivalent to assuming that the signal amplitude is sufficiently small such that the excursion along the i-v curve is limited to a short almost-linear linear segment. 此可看出, 利用小信號近似, 相當於假設信號大小夠小, 而將其於 i-v 曲線的移動, 看成限於一短的的, 幾近直線片段內 88

89 Figure 3.17 Development of the diode small-signal model. Note that the numerical values shown are for a diode with n = 2. 89

90 The slope of this segment, which is equal to the slope of the tangent to the i-v curve at the operating point Q, is equal to the small-signal signal conductance. 此片段斜率為等於 i-v 曲線, 操作點 Q 的正切, 此等於小信號電導 The slope of the i-v curve at i = I D is equal to I D /nv T, which is 1/r d ; that is, 在 i-v 曲線 i = I D 斜率為等於 I D /nv T 此為 1/r d, 或表為 r d i D = 1 v D i = I D D 90

91 From the preceding we conclude that superimposed on the quantities V D and I D that define the dc bias point, or quiescent point,, of the diode will be small-signal signal quantities v d (t) ) and i d (t), which are related by the diode small-signal signal resistance r d evaluated at the bias point. 依上述, 加於定義二極體二極體偏位點 ( 或靜態點 ) V D 及 I D, 小信號 v d (t) 及 i d (t), 為與此偏位點的二極體小信號電阻 r d 相關 91

92 After the dc analysis is performed, the small- signal equivalent circuit is obtained by eliminating all dc sources (i.e., short-circuiting dc voltage sources and open-circuiting dc current sources ) and replacing diode by its small-signal signal resistance. 於 dc 分析後, 在去除所有 dc 電源後 (dc 電壓電源為短路,dc, 電流電源為開路 ), 可得小信號等效電路 此時以小信號電阻替代二極體 92

93 Example

94 Figure 3.18 (a) Circuit for Example 3.6. (b) Circuit for calculating the dc operating point. (c) Small-signal equivalent circuit. 94

95 3.3.9 Use of the diode forward drop in voltage regulation 二極體正向位降的電壓調節 A voltage regulator is a circuit whose purpose is to provide a constant dc voltage between its output terminals. 電壓調節調節電路目的, 在輸出端子輸出端子輸出定輸出定 dc 電壓 95

96 The output voltage is required to remain as constant as possible in spite of (a) changes in the load current drawn from the regulator output terminal and (b) changes in the dc power-supply voltage that feeds the regulator circuit. 輸出電壓保持固定, 不論 a. 從調節 b. 輸入調節調節器 dc 調節器輸出端子器輸出端子負載電流的改變 dc 電源供應電壓的改變 96

97 Since the forward voltage drop of the diode remains almost constant at approximately 0.7 V while the current through it varies by relatively large amounts, a forward-biased diode can make a simple voltage regulator. 因二極體當電流相當大量下, 正向電壓降保持幾近 0.7 V, 正向偏位二極體可當成一簡單電壓調節調節器 Regulator voltages greater than 0.7 V can be obtained by connecting a number of diodes in series. 調節器電壓若要高於 0.7 V, 則可以數個二極體串聯達成 97

98 Example

99 Figure 3.19 Circuit for Example

100 Summary Table

101 101

102 102

103 103

104 Ideal diode 104

105 Small-signal model 105

106 3.4 Operation in the reverse breakdown region zener diodes 逆向崩潰區操作 -- 齊納二極體 The very steep i-v curve that the diode exhibits in the breakdown region and the almost- constant voltage drop that this indicates suggest that diodes operating in the breakdown region can be used in the design of voltage regulators. 二極體在崩潰區, 呈極陡峭呈 i-v 曲線 此時幾近固定電壓降的特性, 顯示崩潰區可用於電壓調節調節器設計 106

107 Special diodes are manufactured to operate specifically in the breakdown region, such diodes are called breakdown diodes or, more commonly, zener diodes 製造用於崩潰區的特殊二極體, 稱崩潰二極體, 或普通稱之齊納二極體 107

108 Figure 3.20 Circuit symbol for a zener diode. 108

109 3.4.1 Specifying and modeling the zener diode Fig shows details of the diode i-v characteristics in the breakdown region. 圖 3.21 為二極體在崩潰區的 i-v 特性 We observe that for currents greater than the knee current I ZK, the i-v characteristic is almost a straight line. 當電流大屈拆屈拆點電流 I ZK, i-v 特性呈現幾近直線 109

110 Figure 3.21 The diode i v characteristic with the breakdown region shown in some detail. 110

111 Corresponding to current change ΔI the zener voltage changes by ΔV, which is related by Δ V = rδi z where r is the inverse of the slope of the almost-linear z i-v curve at point Q. Resistance r is the at operating point Q. z incremental resistance of the zener diode It is also known as the dynamic resistance of the zener, and its value is specified on the device data sheet. 111

112 The almost-linear i-v characteristic of the zener diode suggests that the device can be modeled as an equivalent circuit model of Fig V = V + r I Z Z0 z Z and it applies for I > I and, obviously, V > V. Z Z0 Z Z0 112

113 Figure 3.22 Model for the zener diode. 113

114 3.4.2 Use of the zener as a shunt regulator 齊納的分路調節調節器 We illustrate, by way of an example, the use of zener diode in the design of shunt regulators, so named because the regulator circuit appears in parallel (shunt) with the load. 齊納二極體二極體的分路的分路調節器, 此以例子說明 如其名所示, 此時調節器調節器電路與負載呈現並聯 ( 分路 ) 114

115 Example

116 Line regulation ( ΔV O + / ΔV ) Load regulation ( ΔV O / ΔV ) L 116

117 Figure 3.23 (a) Circuit for Example 3.8. (b) The circuit with the zener diode replaced with its equivalent circuit model. 117

118 3.4.3 Temperature effects 溫度效應 The dependence of the zener voltage V Z on temperature is specified in terms of temperature coefficient TC, or temco as it is commonly known, which is usually expressed in mv/ C C. 齊納電壓 V Z 對溫度依存, 可以溫度係數 TC,, 或一般熟知 temco 表示 以 mv/ C 表之 In circuit design, the value TC should be kept as low as possible. 於電路設計,TC, 愈低愈好 118

119 3.4.4 A final remark Zener diodes have been replaced in voltage-regulator design by specially designed integrated-circuits (ICs) in recent years. 近年來, 齊納二極體在電壓電壓調節器設計上, 已被 IC 型取代 119

120 3.5 Rectifier circuits 整流器電路 One of the most important applications of diodes is in the design of rectifier circuits. 二極體最重要應用之一為在最重要應用之一為在整流器電路設計 A diode rectifier forms an essential building block of the dc power supplies required to power electronic equipment. 用於電子設備的 dc 電源供應器, 二極體整流器為其主要構建方塊主要構建方塊 120

121 A block diagram of such a power supply is shown in Fig 圖 3.24 所示為電源供應器方塊圖 The power supply is fed from ac line, and it delivers a dc voltage V O to an electronic circuit represented by the load block. 電源供應器由 ac 線饋入, 而輸送 dc 電壓 V O 至電子電路, 此相當於負載方塊 The dc voltage V O is required to be as constant as possible in spite of variations in the ac line voltage and in the current drawn by the load. 不論 ac 線電壓及負載電流的及負載電流的變動,dc, 電壓 V O 要求愈固定愈好 121

122 Power transformer Figure 3.24 Block diagram of a dc power supply. 122

123 The first block in a dc power supply is the power transformer. 電源供應器內第一個方塊為電源變壓器 The primary winding, having N 1 turns, is connected to ac supply, and the secondary winding, having N 2 turns, is connected to the circuit of the dc power supply. 主繞線有 N 1 圈, 其連至 ac 供應 次繞次繞線有 N 2 圈, 其連至 dc 供應電路 123

124 By selecting an appropriate turns ratio (N 1 /N 2 ) for the transformer, we can step down line voltage to the value required to yield the particular dc voltage output of the supply. 由選取變壓器變壓器適當線圈 (N 1 /N 2 ) 比, 可將線電壓降至所要至所要電壓, 來產生某來 dc 電壓輸出 The power transformer also provides electrical isolation between the electronic equipment and the power-line circuit. 電源變壓器, 亦提供電子設備與電源線電路的電隔離 124

125 Power transformer Figure 3.24 Block diagram of a dc power supply. 125

126 The diode rectifier converts the input sinusoidal v S to a unipolar output, which can have the pulsating waveform indicated in Fig 二極體整流器可轉變正弦性信號 v S 為單極輸出, 如圖 3.24 所示, 脈衝式波形 The variation in the magnitude of the rectifier output can be reduced by the following filter block in Fig 整流器輸出大小變化, 可以隨後濾波器方塊來降低 The output of the rectifier filter, though much more constant than without the filter, still contains a time- dependent component, known as ripple. 整流器濾波輸出後, 雖比沒濾波者更平坦, 但仍有隨時間變化成分, 此稱漣波 126

127 To reduce the ripple and to stabilize the magnitude of the dc output voltage of the supply against variations caused by changes in load current, a voltage regulator is employed. 要減少漣波, 並穩定 dc 供應器輸出輸出電壓電壓大小, 以對抗負載電流變化, 則利用調節器來做 This regulator can be the one such as we mentioned zener shunt configuration. 調節器可以前所述齊納分所述齊納分路架構 127

128 Power transformer Figure 3.24 Block diagram of a dc power supply. 128

129 3.5.1 The half-wave rectifier 半波整流器 In selecting diodes for rectifier design, two important parameters must be specified; 在整流器二極體選擇, 要考慮兩重要參數 ; (a) the current-handling capability required of the diode, determined by the largest current the diode is expected to conduct. 所須電流處理能力 此電流處理能力 此由二極體預估導過最大電流量決定 (b) the peak inverse voltage (PIV) that the diode must be able to withstand without breakdown, determined by the largest reverse voltage that is expected to appear across the diode. 逆電壓峰值 (PIV) 此為二極體在不崩潰下, 能承受最大跨接的跨接的逆向偏壓 129

130 Figure 3.25(a) and (b) show the circuit of a half-wave rectifier and its equivalent circuit. 圖 3.25a 及 b 所示為, 半波整流器電路及其等效電路 130

131 Figure 3.25 (a) Half-wave rectifier. (b) Equivalent circuit of the half-wave rectifier with the diode replaced with its battery-plusresistance model. 131

132 From which we can write v = 0, v < V O S D0 R R v = v V, v V O S DD S D0 R+ rd R+ rd The transfer characteristic represented by these equations is sketched in Fig. 3.25(c). 132

133 Figure 3.25 (c) Transfer characteristic of the rectifier circuit. 133

134 In many applications, r can be simplified to v v V O S D0 D R and the second equation where V D0 = 0.7 V or 0.8 V. Figure 3.25(d) shows the output voltage obtained when the input v is a sinusoid. S The peak inverse voltage PIV = V s (PIV) is equal to the peak of v, S 134

135 Figure 3.25 (d) Input and output waveforms, assuming that r D << R. 135

136 Two remarks: First, it is possible to use the diode exponential characteristic to determine the exact transfer characteristic of the rectifier. However, the amount of work involved is usually not justified in practice. Second, this circuit does not function properly when the input signal is small. For instance, it can not be used to rectify an input sinusoidal of 100-mV amplitude. For such application we can use diodes in conjunction with op amps to improve precision. 136

137 3.5.2 The full-wave rectifier 全波整流器 The full-wave rectifier utilizes both halves of the input sinusoid. 全波整流器利用到輸入正弦的兩半輸入正弦的兩半波形波形 One possible implementation is shown in Fig. 3.26(a). 圖 3.26a 為一實作 137

138 Figure 3.26 Full-wave rectifier utilizing a transformer with a center-tapped secondary winding: (a) circuit; 138

139 Fig. 3.26(b) shows the transfer characteristic assuming a constant-voltage voltage-drop model for diodes. ( 固定電壓降模型 ) The PIV of the diodes in the full-wave rectifier circuit is, PIV = 2V s V ( D 全波整流器電路, 二極體 PIV) which is approximately twice that for the case of the half-wave rectifier. 此近似半波整流器的二倍 139

140 Figure 3.26 Full-wave rectifier utilizing a transformer with a center-tapped secondary winding: (b) transfer characteristic assuming a constant-voltage-drop model for the diodes; 140

141 Figure 3.26 Full-wave rectifier utilizing a transformer with a center-tapped secondary winding: (a) circuit; 141

142 Fig. 3.26(c) indicates that the current through R always flows in the same direction and v O will be unipolar. 142

143 Figure 3.26 Full-wave rectifier utilizing a transformer with a center-tapped secondary winding: (c) input and output waveforms. 143

144 3.5.3 The bridge rectifier 橋式整流器 An alternative implementation of the full- wave rectifier is shown in Fig. 3.27(a). 圖 3.27a 所示為另一全波整流器實作 This is a bridge rectifier because of the similarity of its configuration to that of the Wheatstone bridge. It does not require a center-tapped tapped transformer. 因其利用類似惠斯頓電橋架構, 而稱橋式整流器 此不需用中抽式變壓器 144

145 Figure 3.27 The bridge rectifier: (a) circuit; 145

146 Fig. 3.27(b) shows the input and output waveforms. 146

147 Figure 3.27 The bridge rectifier: (b) input and output waveforms. 147

148 The disadvantage is v will be lower than v by two diode drops. O S 148

149 To determine the peak inverse voltage (PIV) of each diode, consider the circuit during the positive half-cycles. 要決定每二極體所受 PIV 值, 例如, 可由整流時的正半波來看 The reverse voltage across D 3 can be determined from the loop formed by D 3, R and D 2 as v D3 (reverse) = v O + v D2 (forward) Thus the maximum value of v D3 occurs at the peak of v O and is given by PIV = V s -2V D + V D =V s -V D 149

150 Figure 3.27 The bridge rectifier: (a) circuit; 150

151 The advantages of bridge rectifier circuity: 1. Does not require a center-tapped transformer. 2. The PIV of each diode is about half the value for the fullwave rectifier with a center tapped transformer one. 3. The secondary winding of the transformer is about half as many turns as that is required for center tapped trasnformer one. 151

152 3.5.4 The rectifier with a filter capacitor The peak rectifier 帶濾波電容器的整流器 -- 峰值整流器 A simple way to reduce the variation of the output voltage is to place a capacitor across the load resistor. 減少輸出電壓變化的簡單方法, 為加一電容來加一電容來跨接於負載電阻上 This filter capacitor serves to reduce substantially the variations in the rectifier output voltage. 此濾波電容可大大大大降低整流器輸出電壓變化 Fig shows a simple circuit of this rectifier. 152 圖 3.28 顯示此簡單整流器電路

153 Figure 3.28 (a) A simple circuit used to illustrate the effect of a filter capacitor. (b) Input and output waveforms assuming an ideal diode. Note that the circuit provides a dc voltage equal to the peak of the input sine wave. The circuit is therefore known as a peak rectifier or a peak detector. 153

154 Fig. 3.29(a) shows a more practical situation where a load resistance R is connected across the capacitor C. 圖 3.29a 顯示一更實際情形, 此時負載電阻 R 跨接電容 C 154

155 Figure 3.29 Voltage and current waveforms in the peak rectifier circuit with CR >> T. The diode is assumed ideal. 155

156 Fig. 3.29(b) shows the steady-state state input and output voltage waveforms under assumption that CR >> T. 圖 3.29b 顯示, 在假設 CR >> T, 穩態輸入及輸出電壓波形 156

157 Figure 3.29 Voltage and current waveforms in the peak rectifier circuit with CR >> T. The diode is assumed ideal. 157

158 Fig. 3.29(c) shows the diode conduction current and load current. 圖 3.29c 顯示二極體導通電流及負載電流 158

159 Figure 3.29 Voltage and current waveforms in the peak rectifier circuit with CR >> T. The diode is assumed ideal. 159

160 The waveforms of load current i = v / R L O and of the diode current (when it is conducting) are shown in Fig. 3.29(c). i = i + i D C L dv = + dt I C i L (3.25) 160

161 The diode conducts for a brief interval, Δt, near the peak of the input sinusoid and supplies the capacitor with charge equal to that lost during the much longer discharge interval. 二極體在輸入正弦波電壓大於輸出電壓期間導通 ( 假設理想二極體 ) 導通時間 Δt 內, 二極體電流對電容充電, 同時有電流流經負載 R 導通在輸入達峰值後結束 而後電容器開始經由 R 放電 161

162 When V is small, v is almost constant and equal to r O V. Thus i is almost constant with dc component, then p L dv dv i = C + i = C + I dt dt I I D L L where I L = V p R A more accurate expression can be obtained as V = V V 1 O p 2 r 162

163 V r : During the diode-off interval, v can be expressed as v O = V e p t/ CR O At the end of the discharge interval we have V V V e p r p T/ CR Since CR T, we can approximate e T/ CR 1 T / CR and obtain V r = T Vp CR 163

164 V r : To keep V small we must select a capacitance C so that CR T. r For f = 1/ T, the ripple voltage V can be expressed as Vp IL Vr = = or IL = fcvr (3.29 b) fcr fc r 164

165 Δt : Assuming diode conduction ceases almost at the peak of v, we can determine the conduction interval Δt from I V cos[ ω( T Δ t)] = V V p p r Or V cos( ωδ t) = V V p p r With cos( ωδt Δt the above equation can be 1 2 ) 1 2 ( ω ), rearranged to obtain ωδt 2 V / V (3.30) r p 假設二極體導通停止時間為在 v I 輸入峰值處, 則導通時間 Δt 可由式子關係求得 165

166 i Dav : To determine the average diode current during conduction, i supplied Cav Dav, supplies to the capacitor, Q = i Δt we equate the charge that the diode to the charge that the capacitor loses during the discharge interval, Q lost = CV r We then have CV = i Δt and r Cav i Cav CV 2π fcv 2π fcv = = = Δt 2π fδt ωδt r r r 166

167 i Dav : From Eq. (3.29b) and (3.30), we have i Cav 2π I L = = π 2 V / V r p 2V V r p I L Thus i = i + i = i + I can be further expressed as Dav Cav L Cav L i = I (1+ π 2 V / V ) Dav L p r With V V, the average diode current during conduction r p is much greater than the dc load current. 167

168 i Dmax : For the input signal v = V cos ωt, and during diode conduction interval, we have dvi C = VpCωsinωt dt I p dvi At t = Δt, C has maximum value and since sin ωδt ωδt, dt we can obtain dvi C (max) = VpCωsinωΔ t = VpCω ωδ t = VpCω dt I L = VC p 2π f 2 Vr / Vp = Vp 2π 2 Vr / Vp V = 2π 2 V / V I p r L r 2 V / V r p 168

169 i Dmax : Thus the peak value of the diode current, i max be obtained as dvi idmax = C (max) + IL = IL(1 + 2π 2 Vp / Vr) dt, can For V V, i 2i. r p Dmax Dav This can be approximated by considering a right-angle 1 triangle with area relation of i Δ t = i Δt thus i = 2 i. Dmax Dav 2 Dmax Dav, 169

170 Example

171 The circuit of Fig. 3.29(a) is known as a half-wave peak rectifier. 圖 3.29a 電路通稱半波峰值整流器 171

172 Full-wave peak rectifier 全波峰值整流器 The full-wave rectifier circuits of Figs. 3.26(a) and 3.27(a) can be converted to peak rectifiers by including a capacitor across the load resistor. 圖 3.26a 及 3.27a 的全波整流器電路, 可藉由加一跨接電容於負載, 而轉變為峰值整流器 As in the half-wave case, the output dc voltage will be almost equal to the peak value of the input sine wave (Fig. 3.30). 如半波整流情形, 輸出 dc 電壓將幾乎等於輸入正弦波峰值 ( 圖 3.30) 172

173 Figure 3.30 Waveforms in the full-wave peak rectifier. 173

174 The peak-to-peak ripple voltage can be derived using a procedure identical to that above but with the discharge period T replaced by T/2, resulting in V r = V p 2 fcr and i = I + i ( half-wave) = I (1 + π V /2 V ) 1 Dav L 2 Cav L p r 1 dvi and using the equation id = 2 C + I L, we have dt i = I (1+ 2 π V / 2 V ) Dmax L p r 174

175 Comparing this one with the half-wave case, we note that for the same values of V p, f, R, and V r (and thus the same I L ), we need a capacitor half the size of that required in the half-wave rectifier. 此與半波情形比較, 在相同 V p, f, R, 及 V r ( 故而相同 I L ), 所需電容大小為半波整流器之半 Also, the current in each diode is approximately half that which flows in the diode of the half-wave circuit. 同時, 每二極體電流電流為近似半波電路二極體之半 175

176 The peak-rectifier circuit can be used as a peak detector in the demodulation of amplitude-modulation modulation (AM) signal. 峰值整流器電路, 可用來當成峰值檢波器 用來解調振幅調變 (AM) 信號 176

177 3.5.5 Precision half-wave rectifier The super diode 精確半波整流器 -- 超二極體 Fig (a) shows a precision half-wave rectifier circuit consisting of a diode placed in the negative-feedback path of an op amp, with R being the rectifier load resistance. 圖 3.31a 所示為一精確半波整流器電路 由 op amp 加一負回授二極體組成,R, 為整流器負載電阻 177

178 Figure 3.31 The superdiode precision half-wave rectifier and its almost-ideal transfer characteristic. Note that when v I > 0 and the diode conducts, the op amp supplies the load current, and the source is conveniently buffered, an added advantage. Not shown are the op-amp power supplies. 178

179 For the circuit shown, and for positive v, we have v = v 0.7( diode drop). O A I From v = v, and v is the op amp output, then O + v = ( v v ) A 0.7 or + v A= (1 + A) v A Thus + v A 0.7 vo = v = 1+ A 1+ A + For A 1, and since v = v, we then have v O = v I I 179

180 The circuit works as follows: If v goes positive, the output voltgae v of the op amp will go I positive and diode will conduct, thus establishing a closed feedback path between the op amp's output terminal and the negative terminal. A The negative-feedback path will cause a virtual short circuit to appear between the two input terminals. Thus the voltage at the negative input terminal, which is also output voltage v, will equal (to within a few millivolts) that at the O I I O positive input terminal, which is the input voltage v, v = v v 0 I the 180

181 For the op-amp circuit to start operation, v I has to exceed only a negligibly small voltage equal to the diode drop divided by the op amp s s open-loop gain. 要啟動 op amp,v I 必要微超出二極體壓降除以 op amp 開路增益所得所得電壓 181

182 For the circuit shown, and for positive v, we have v = v 0.7( diode drop). O A I From v = v, and v is the op amp output, then O + v = ( v v ) A 0.7 or + v A= (1 + A) v A Thus + v A 0.7 vo = v = 1+ A 1+ A + For A 1, and since v = v, we then have v O = v I I 182

183 For the op-amp circuit to start operation, v I has to exceed only a negligibly small voltage equal to the diode drop divided by the op amp s s open-loop gain. 要啟動 op amp,v I 必要微超出二極體壓降除以 op amp 開路增益所得所得電壓 183

184 When v goes negative, the op amp's output voltage v will tend to I follow and go negative. A This will reverse-bias the diode, and no current will flow through resistance R, causing v to remain equal v = 0 v < 0 O I O to 0 V. Thus Since in this case the diode is off, the op amp will be operating in an open-loop fashion, and its output will be at the negative saturation level. 184

185 3.6 Limiting and clamping circuits 限制及夾鉗夾鉗電路 185

186 3.6.1 Limiter circuits 限制電路 Fig shows the general transfer characteristic of a limiter circuit. 圖 3.32 所示為一般限制電路轉移特性 The general transfer characteristic of Fig is a double limiter that is, a limiter that works on both the positive and negative peaks of an input waveform. 圖 3.32 所示轉移特性為雙向限制器 此限制器工作在輸入波形工作在輸入波形正及負峰值 186

187 Figure 3.32 General transfer characteristic for a limiter circuit. 187

188 If an input waveform such as that shown in Fig is fed to a double limiter, its two peaks will be clipped off. The limiters therefore are sometimes referred to as clippers. 若將圖 3.33 波形輸入此雙向限制器, 其兩峰值會被切剪 因之, 限制器亦稱切剪器 188

189 Figure 3.33 Applying a sine wave to a limiter can result in clipping off its two peaks. 189

190 The limiter whose characteristics are depicted in Fig is described as a hard limiter. 限制器特性若如圖 3.32 所示, 稱之硬限制器 Soft limiting is characterized by smoother transitions between the linear region and the saturation regions and a slope greater than zero in the saturation regions, as illustrated in Fig 軟限制器特性為線性區及飽和區呈現平滑轉變, 在飽和區斜率大於零 如圖 3.34 所示 190

191 Figure 3.34 Soft limiting. 191

192 Diodes can be combined with resistors to provide simple realizations of the limiter function. 簡單限制器功能, 可以二極體與電阻組合而得 A number of examples are depicted in Fig 圖 3.35 所示為一些例子 192

193 Figure 3.35 A variety of basic limiting circuits. 193

194 3.6.2 The clamped capacitor or DC restorer 夾鉗電容或 DC 回復器 If in the basic peak-rectifier circuit the output is taken across the diode rather than across the capacitor, the circuit is called a dc restorer, as shown in Fig 若基本峰值整流器輸出為由基本峰值整流器輸出為由跨接跨接二極體二極體所得, 而非由電容, 則此電路稱 dc 回復器如圖 3.36 所示 回復器 194

195 Figure 3.36 The clamped capacitor or dc restorer with a square-wave input and no load. 195

196 Because of the polarity in which the diode is connected, the capacitor will charge to a voltage v C and equal to the magnitude of the most negative peak of the input signal. 因二極體連接極性關係, 電容器充電至電壓 v C, 此大小大小等於輸入信號負峰值 The output voltage is given by v O = v I + v C 196

197 Another way of visualizing the operation is to note that because the diode prevent the output voltage from going below 0 V, the output waveform will therefore have its lowest peak clamped to 0 V. 另由於二極體可防輸出電壓降至零以下, 輸出波形最低峰值被夾鉗於 0 V The circuit is called a clamped capacitor. 此稱夾鉗電容電路 If we reverse the diode polarity the output waveform will have highest peak clamped to 0 V. 若二極體極性反向, 輸出波形最高峰值將被夾鉗於 0 V 197

198 As an application, consider a pulse signal being transmitted through a capacitively coupled or ac- coupled system. 例如, 以一脈波信號傳經一電容耦合或 ac 耦合系統 The capacitive coupling will cause the pulse train to lose whatever dc component it originally had. 電容耦合將使脈波列失去原有 dc 成分 Feeding the resulting pulse waveform to a clamping circuit provides it with a well-determined dc component. 若將所得脈波波形輸入夾鉗電路, 則可恢復則 dc 成分 198

199 This process is known as dc restoration and the circuit is also called a dc restorer. 此程序稱 dc 回復, 而電路稱 dc 回復器 199

200 Restoring dc is useful because the dc component or average value of the pulse waveform is an effective measure of its duty cycle. (Duty cycle is the proportion of each cycle occupied by the pulse.) 在脈波波形,dc, 成分或平均值為一有效量測責任週期方法 直流回復可直流回復可用於此於此量測量測 The duty cycle of a pulse waveform can be modulated (in a process called pulse width modulation) and made to carry information. 通訊上, 可利用脈波波形脈波波形的責任週期調的責任週期調變 ( 於脈波寬度調變 ), 來傳送資訊 In such a system, detection or demodulation could be achieved by feeding the received pulse waveform to a dc restorer and then using a simple RC low-pass filter to separate the average of the output waveform. 於此系統, 可將接收到脈波波形輸入一 dc 回復器 然後, 由一簡單 RC 低通濾波器, 來分出輸出波形的平均, 而偵測或解調 200

201 When a load resistance R is connected across the diode in a clamping circuit, as shown in Fig. 3.37, it will cause the capacitor to discharge and the output voltage to fall. 若在夾鉗電路, 負載電阻 R 為連至二極體, 如圖 3.37,, 則使電容放電, 輸出電壓下降 201

202 Figure 3.37 The clamped capacitor with a load resistance R. 202

203 During the interval t 0 to t 1, the output voltage fall exponentially with time constant CR. 在 t 0 至 t 1 間, 輸出電壓以時間常數 CR 指數下降 At t 1 the input decreases by V a volts, and the output attempts to follow. 在 t 1 輸入下降 V a 伏特, 而輸出要跟上 This causes the diode to conduct heavily and quickly charge the capacitor. 此使二極體大量大量導通, 而迅速對電容充電 At the end of the interval t 1 to t 2, the output voltage would be a few tenths of a volt negative (e.g., -0.5 V). 在 t 1 至 t 2 間隔後, 輸出電壓將呈現微負 ( 例如, -0.5 V) Then, as the input rises by V a volts (at t 2 ), the output followers. 然後, 輸入上升 V a 伏特 ( 在 t 2 ), 輸出再跟上 203

204 3.6.3 The voltage doubler 倍電壓器 Fig. 3.38(a) shows a circuit composed of two sections in cascade: a clamp formed by C 1 and D 1, and a peak rectifier formed by D 2 and C 2. 於圖 3.38a 電路由兩段組成 一由 C 1 及 D 1 形成的夾鉗, 及一由 D 2 及 C 2 形成的峰值整流器 204

205 Figure 3.38 Voltage doubler: (a) circuit; (b) waveform of the voltage across D

206 When excited by a sinusoid of amplitude V p the clamping section provides the voltage waveform shown, assuming the ideal diodes, in Fig. 3.38(b). In response to this waveform, the peak- detector section provides across capacitor C 2 a negative dc voltage of magnitude 2V p. 206

207 Because the output voltage is double the input peak, the circuit is known as a voltage doubler. 因輸出電壓為輸入峰值二倍, 此電路稱倍電 壓器 The technique can be extended to provide output dc voltages that are higher multiples of V p. 此方法可延伸, 來產生高出 V p 數倍的 dc 輸出電壓 207

208 3.7 Physical Operation of Diodes 二極體物理工作工作原理 208

209 Having study the terminal characteristics and circuit applications of junction diodes, we will now briefly consider the physical processes that give rise to the observed terminal characteristics. 在學習接面二極體端子特性及電路應用後, 此對所觀察到端子特性的此對所觀察到端子特性的物理過程物理過程做簡介 209

210 3.7.1 Basic semiconductor concepts 基本半導體概念 210

211 Electronics Milestones Braun invents the solid-state state rectifier. 1906DeForest invents triode vacuum tube First radio circuits de-veloped from diodes and triodes Lilienfeld field-effect effect device patent filed. 1947Bardeen and Brattain at Bell Laboratories invent bipolar transistors. 1952Commercial bipolar transistor production at Texas Instruments. 1956Bardeen Bardeen, Brattain,, and Shockley receive Nobel prize Integrated circuit developed by Kilby and Noyce 1961First commercial IC from Fairchild Semiconductor 1963IEEE formed from merger or IRE and AIEE 1968First commercial IC opamp 1970One transistor DRAM cell invented by Dennard at IBM Intel microprocessor introduced. 1978First commercial 1-kilobit 1 memory microprocessor introduced. 1984Megabit memory chip introduced Alferov, Kilby,, and Kromer share Nobel prize 211

212 The Start of the Modern Electronics Era Bardeen, Shockley, and Brattain at Bell Labs - Brattain and Bardeen invented the bipolar transistor in The first germanium ( 鍺 ) bipolar transistor. Roughly 50 years later, electronics account for 10% (4 trillion dollars) of the world GDP. 212

213 The Inventors of the Integrated Circuit Jack Kilby Andy Grove, Robert Noyce, and Gordon Moore with Intel 8080 layout. 213

214 The Kilby Integrated Circuit Active device Semiconductor die Electrical contacts 214

215 Evolution of Electronic Devices Vacuum Tubes Discrete Transistors SSI and MSI Integrated Circuits VLSI Surface-Mount Circuits 215

216 Solid-State State Electronic Materials Electronic materials fall into three categories: Insulators ( 絕緣體 ) Resistivity (ρ) > 10 5 Ω-cm Semiconductors ( 半導體 ) 10-3 < ρ < 10 5 Ω-cm Conductors ( 導體 ) ρ < 10-3 Ω-cm 216

217 (cont.) Elemental semiconductors are formed from a single type of atom Compound semiconductors ( 混合物半導體 ) are formed from combinations of column III and V elements or columns II and VI. Germanium was used in many early devices. Silicon quickly replaced germanium due to its higher bandgap ( 帶隙 ) energy, lower cost, and is easily oxidized to form silicon-dioxide insulating layers. 217

218 Semiconductor Materials (cont.) Semiconduct or Carbon (diamond) Bandgap Energy E G (ev) 5.47 Silicon 1.12 Germanium 0.66 Tin Gallium arsenide 1.42 Gallium nitride 3.49 Indium phosphide 1.35 Boron nitride 7.50 Silicon carbide 3.26 Cadmium selenide

219 Covalent Bond Model Silicon diamond lattice unit cell. Corner of diamond lattice showing four nearest neighbor bonding. View of crystal lattice along a crystallographic axis. 219

220 Silicon Covalent Bond Model (cont.) Near absolute zero, all bonds are complete. Each Si atom contributes one electron to each of the four bond pairs. Increasing temperature adds energy to the system and breaks bonds in the lattice, generating electron-hole pairs. 220

221 Intrinsic Carrier Concentration 本質載子濃度 The density of carriers in a semiconductor as a function of temperature and material properties is: n 2 i = BT 3 exp E G kt cm -6 E G = semiconductor bandgap energy in ev (electron volts) k = Boltzmann s constant, 8.62 x 10-5 ev/k T = absolute termperature,, K B = material-dependent parameter, 1.08 x K -3 cm -6 for Si Bandgap energy is the minimum energy needed to free an electron by breaking a covalent bond in the semiconductor crystal. 221

222 The pn junction pn 接面 The semiconductor diode is basically a pn junction, as shown schematically in Fig 半導體二極體基本上為一 pn 接面 如圖 3.39 所示 Appendix A provides a brief description of the process employed in the fabrication of pn junctions. 附錄 A 簡述製造 pn 接面的面的製程 222

223 Intrinsic silicon 本質矽 Today, almost all semiconductor devices are manufactured on silicon. 現今大部分半導體裝置為製造於矽上 A crystal of pure or intrinsic silicon has a lattice structure where the atoms are held in their position by bonds, called covalent bonds, formed by four valence electrons associated with each silicon atom. Fig shows a two-dimensional representation of such a structure. 純或本質矽晶体具格子結構 其原子以鍵, 或稱共價鍵, 來保持位置 每矽原子以四個價電子來以四個價電子來形成連接 圖 3.40 為此架構的二度空間表示 223

224 Observe that each atom shares each of its four valence electrons with a neighboring atom, with each pair of electrons forming a covalent bond. 每原子的四個價電子與隔鄰原子共用 每電子對形成一共價鍵 At sufficient low temperatures, all covalent bonds are intact and no (or very few) free electrons are available to conduct electric current. 在極低低溫下, 所有共價鍵保持完好, 幾乎沒自由電子釋出可形成導電電流 224

225 Hole 電洞 When a covalent bond is broken, an electron leaving its parent atom; thus a positive charge, equal to the magnitude of electron charge, is left with the parent atom. 當一共價鍵打斷斷, 電子離親原子 此時親原子有一與電子電荷相同正電荷留下 An electron from a neighboring atom may be attracted to this positive charge, leaving its parent atom. This action fills up the hole that existed in the ionized atom but creates a new hole in the other atom. 從鄰近原子釋出電子, 可被此正電荷吸引 此填充此填充離子化原子 洞 的動作, 則造成另原子產生一新洞 This process may repeat itself, with the result that we effectively have a positively charged carrier, or hole, moving through the silicon crystal structure and being available to conduct electric current. 此過程繼續重復, 而形成一效應, 為正帶電荷載子, 流經矽晶 225 架構, 而可導電流

226 Figure 3.41 At room temperature, some of the covalent bonds are broken by thermal ionization. Each broken bond gives rise to a free electron and a hole, both of which become available for current conduction. 226

227 Thermal ionization results in free electrons and holes in equal numbers and hence equal concentrations. 熱離子化導致自由電子及等量電洞, 故兩者濃度相等 These free electrons and holes move randomly through the silicon crystal structure, and in the process some electrons may fill some of holes. This process, called recombination,, results in the disappearance of free electrons and holes. 此些自由電子及電洞隨機於矽晶架構移動, 在過程中有些電子可能填入電洞中, 此程序稱復合 合 復合可導致自由合可導致自由電子及電洞消失 227

228 Intrinsic silicon For intrinsic silicon the concentration of free electrons n and concentration of holes p are given as n= p= n n = 2 3 i i BT e E G / kt (3.36) = 10 3 At T 300K, n i carrier/cm. To place this number in perspective, we note that the 22 3 silicon crystal has about 5 10 atoms/cm. 228

229 Diffusion and drift 擴散及漂移 There are two mechanisms by which holes and current move through a silicon crystal diffusion and drift. 有兩機制可使電洞及電流在矽晶移動 - 擴散及漂移 229

230 Diffusion is associated with random motion due to thermal agitation. 擴散與熱激造成與熱激造成的隨機運動有隨機運動有關 In a piece of silicon with uniform concentrations of free electrons and holes, this random motion does not result in a net flow of charge (i.e., current). 自由電子及電洞濃度均勻的一塊矽, 隨機運動不會造成靜電荷流動 ( 電流 ) On the other hand, if by some mechanism the concentration of, say, free electron is made higher in one part of the piece of silicon than in another, then electron will diffuse from the region of high concentration to the region of low concentration. 但若某機制, 致使電子電子濃度在矽的某處高於它處, 電子將由高濃度高濃度處擴散至低濃度擴散至低濃度處 Fig shows a concentration profile. 圖 3.42 所示為濃度描繪 230

231 Diffusion Figure 3.42 A bar of intrinsic silicon (a) in which the hole concentration profile shown in (b) has been created along the x-axis by some unspecified mechanism. 231

232 Diffusion current and diffusion constant Diffusion current from holes: J p = qdp dx p dp where J is the current density (i.e., the current per unit area 2 of the plane perpendicular to the x axis) in A/cm, q is the -19 magnitude of electron charge = C, and D is a constant called the diffusion constant or diffusivity of holes. p A similar relationship can be obtained for diffusion current from electron current density: J n = dn qdn dx 232

233 The other mechanism for carrier motion in semiconductor is drift. Carrier drift occurs when an electric field is applied across a piece of silicon. 另致使半導體內載子運動機制為漂移 當一矽塊有電場加上, 則會產生載子漂移 233

234 Drift current and mobility ( 移動率 ) Free electrons and holes are accelerated by the electric field and acquire a velocity component (superimposed on the velocity of their thermal motion) called drift velocity in cm/s. v drift = μe, 2 where μ is the mobility in cm /Vs, E is the electric field strenght in V/cm. 234

235 For holes of density p: J = qpμ E μ p drift p p 2 : hole mobility 480 cm /Vs = For free electrons of density n: J = qnμ E μ n drift n n 2 : electron mobility = 1350 cm / Vs Total drift current density is equal to J = q( pμ + nμ ) E drift p n 235

236 By the form of Ohm's law, the resistivity (in units of Ω cm) can be expressed as ρ = 1/[ q( pμ + nμ )] p n A relationship, know as Einsten relationship, exists between the carrier diffusivity and mobility, D μ n n = Dp V μ = p T where V is the thermal voltage. At room temperature, T V 25 mv. T 236

237 Doped semiconductors 參雜半導體 Doped semiconductor are materials in which carriers of one kind (electrons or holes) predominate. 參雜半導體為材料中, 某載子 ( 電子或電洞 ) 為多數 Doped silicon in which the majority of charge carriers are the negatively charged electrons is called n type,, while silicon doped so that the majority of charge carriers are the positively charged holes is called p type. 參雜半導體多數電荷載子為負電荷電子, 稱 n 型 而多數電荷載子為正電荷電電荷電洞, 稱 p 型 Doping of a silicon crystal to turn it into n type or p type is achieved by introducing a small number of impurity atoms. 介由引入少量雜原子, 可使矽晶參雜, 轉變成 n 型或 p 型 237

238 For instance, introducing impurity atoms of a pentavalent element such as phosphorus results in n- n type silicon, because the phosphorus atoms that replace some of the silicon atoms in the crystal structure have five valence electrons, four of which form bonds with the neighboring silicon atoms while the fifth becomes a free electron (Fig. 3.43). 例如, 介入五價五價雜原子, 如磷如磷, 可得 n 型矽 由於由於五價電子的磷原子, 於晶架構取代一些矽原子, 其中四電子與鄰近矽原子形成鍵, 而第五個電子則成自由電子 ( 圖 3.43) Thus each phosphorus atom donates a free electron to the silicon crystal, and the phosphorus impurity is called donor. 每磷原子可捐贈一自由電子至捐贈一自由電子至矽晶 磷晶 磷雜質稱質稱之施子 238

239 Figure 3.43 A silicon crystal doped by a pentavalent element. Each dopant atom donates a free electron and is thus called a donor. The doped semiconductor becomes n type. 239

240 For donor, if the concentration of donor atoms is N, in thermal equilibrium the concentration of free electrons in the n-type silicon will be, n n0 N D D where the additional subscript 0 denotes thermal equilibrium. From semiconductor physics, under thermal equilibrium n p = n, 2 n0 n0 i and the concentration of minority holes will be p n0 n N 2 i D 240

241 Since n i is a function of temperature (Eq. 3.36, p.192), it follows that the concentration of the minority holes will be a function of temperature whereas that of the majority electrons is independent of temperature. 241

242 To produce a p-type p semiconductor, silicon has to be doped with a trivalent impurity such as boron. 要得 p 型半導體, 矽要參雜三價雜質, 如硼 Each of the impurity boron atoms accepts one electron from the silicon crystal, so that they may form covalent bonds in the lattice structure. 雜質硼原子可從矽晶接受一電子, 而在格子架構形成共價鍵 Thus, as shown in Fig. 3.44, each boron atom gives rise to a hole, and the majority holes in p-type p silicon, under thermal equilibrium, is approximately equal to the concentration N A of the acceptor (boron) impurity. 如圖 3.44 所示, 每硼原子形成一電洞 在熱平衡時,p, 型矽的多數電洞近似等於受子 ( 硼 ) N A 雜質濃度 242

243 Figure 3.44 A silicon crystal doped with a trivalent impurity. Each dopant atom gives rise to a hole, and the semiconductor becomes p type. 243

244 For acceptor, the concentration of majority holes is p p0 N. A Similarly, under thermal equilibrium, the concentration of minority electrons is n p0 n N 2 i A 244

245 It should be emphasized that a piece of n-type or p-type silicon is electrically neutral; the majority free carriers (electrons in n-type silicon and holes in p-type silicon) are neutralized by bound charges associated with the impurity atoms. 245

246 3.7.2 The pn junction under open- circuit conditions 開路時 pn 接面 Fig 3.45 shows a pn junction under open- circuit conditions that is, the external terminals are left open. 圖 3.45 所示為一開路時 pn 接面, 此時外部端子打開 246

247 The + signs in the p-type p material denote the majority holes. In the n-type n material the majority electrons are indicated by signs. + 符號指多數者為電洞的 p 型材料 指多數者為電子的 n 型材料 247

248 The diffusion current I D 擴散電流 I D Because the concentration of holes is high in the p region and low in the n region, holes diffuse across the junction from p side to the n side; similarly, electrons diffuse across the junction from n side to the p side. 在 p 區因電洞濃度高, 而 n 區低, 電洞會經由接面由 p 側擴散至 n 側 同樣, 電子會經由接面, 由 n 側擴散至 p 側 These two current components add together to form the diffusion current I D, whose direction from the p side to the n side, as indicated in Fig 此兩電流成分相加形成擴散電流 I D 電流方向為由 p 至 n,, 如圖 3.45 所示 248

249 249

250 The depletion region 空乏區 The holes that diffuse across the junction into the n region quickly recombine with some of the majority electrons present there and thus disappear from the scene. 電洞經由接面擴散至 n 區後, 快速與 n 區多數載子電子復合, 而消失 This recombination process results in the disappearance of some free electrons from the n-type n material. 此復合過程, 導致 n 型材料一些自由電子消失 Thus some of the bound positive charge will no longer be neutralized by free electrons, and this charge is said to have been uncovered. 此使一些束縛一些束縛正電荷, 不再因自由電子中和, 而呈中性而呈中性 此電荷呈現呈現末遮蓋末遮蓋 250

251 Since recombination takes place close to the junction, there will be a region close to the junction that is depleted of free electrons and contains uncovered bound positive charge. 因復合發生合發生靠近靠近接面處, 故接面處有一區域為排空自由電子, 僅含未遮蓋正電荷 Similarly, in the p material close to the junction, there will be a region depleted of holes and containing uncovered bound negative charge, as indicated in Fig 仿此, 在 p 材料靠近接面, 亦有一電洞被排空, 而含未遮蓋束縛負束縛負電荷電荷區 如圖 3.45 所示 251

252 From the above it follows that a carrier-depletion region will exist on both side of the junction, with the n side of the region positively charged and the p side negatively charged. 依上所述, 載子排空區存於接面兩側 在 n 側為帶正電荷, 在 p 側為帶負電荷 This carrier-depletion region or, simply, depletion region is also called the space charge region. 此載子排空區, 或簡稱空乏區, 亦可稱為可稱為空電荷區 252

253 The charges on both sides of the depletion region cause an electrical field to be established across the region; hence a potential difference results across the depletion region, with the n side at a positive voltage relative to the p side, as shown in Fig. 3.45(b). 空乏區兩側電荷電荷會造成一電場 因此有電位差造成一電場 因此有電位差跨過跨過空乏區, n 側相對於 p 為正電位 Thus the resulting electric field oppose the diffusion of holes into the n region and electrons into the p region. 此電場形成抗拒電洞擴散進 n 區, 抗拒電子擴散進 p 區 The voltage drop across the depletion region acts as a barrier that has to be overcome for holes to diffuse into the n region and electrons to diffuse into the p region. 跨空乏區的電壓降形成一障礙 若電洞要擴散入 n 區, 或電子要擴散入 p 區, 則必要克服此障礙 253

254 The drift current I s and equilibrium 漂移電流 I s 及平衡 In additional to the current component I D due to majority-carrier diffusion, a component due to minority-carrier drift exists across the junction. 除由多數載子擴散的由多數載子擴散的電流電流成分 I D 外, 另電流另成分為由少數載子漂移通過接面造成 254

255 Specifically, some of the thermally generated holes in the n material diffuse through the n material to the edge of depletion region. There they experience the electric field in the depletion region, which sweeps them across that region into the p side. 一些在 n 材料內熱激發電洞, 擴散至 n 材料的空乏區邊沿 其受空乏區電場影響, 快速掃過而進入 p 側 Similarly, some of minority thermally generated electrons in the p material diffuse to the edge of the depletion region and get swept by the electric field in the depletion region across that region into the n side. 相仿, 一些在 p 材料內熱激發電子, 擴散至 p 材料的空乏區邊沿 其受空乏區電場影響, 快速掃過而進入 n 側 These two components add together to form the drift current I s, whose direction is from the n side to the p side of the junction. 此兩成分相加形成 I s, 其電流方向為由接面 n 側流向 p 側 255

256 Under open-circuit condition, (Fig. 3.45) no external current exists; thus two opposite currents across the junction should be equal in magnitude, that is I D = I s. 在開路情況下 ( 圖 3.45 ),), 沒外電流存在, 故兩流過接面流過接面反向電流大小相等, 此為 I D = I s 256

257 257

258 The junction built-in in voltage 接面內建電壓 With no external voltage applied, the voltage V 0 across the junction can be shown to be given by V 0 VT ln N N A = 2 ni D where N A and N D are the doping concentrations of the p side and n side of the junction, respectively. (See page 156, A. S. Grove, Physics and technology of semiconductor devices) 258

259

260 The width of depletion region x = x + x, where x < d n p p 0. Due to electrical neutrality, qn x = qn x D n A p. de( x) From Gauss's law, = dx E A A p D n E0 = de = 0 dx= = xp εsi εsi εsi 0 0 qn qn ε Si qn x qn x φ v = 0 D E ( x + x ) 0 n 2 p 260

261 Thus V 0 depends both on doping concentrations and on temperature. It is known as the junction built-in in voltage. V 0 與參雜濃度及溫度有關 此稱接面內建電壓 Typically, for silicon at room temperature, V 0 is in the range of 0.6 V to 0.8 V. 矽在室溫時, V 0 在 0.6 V 至 0.8 V When the pn junction terminal are left open- circuited, the voltage measured between them will be zero. 當 pn 接面端保持開路, 由端子所量測到電壓為零 261

262 Width of the depletion region 空乏區寬度 If we denote the width of the depletion region in the p side by x and in the n side by x, the charge-equality condition p can be stated as n qx AN xn = qx A N, = x p A n D p N N A D 262

263 The width of depletion region is given by 2ε s 1 1 Wdep = xn + xp = + V q NA ND 0 where ε is the electrical permittivity of silicon = 11.7ε s /. = F cm Typically, W is in the range of 0.1 to 1μm. dep Permittivity: 透電率 263

264 3.7.3 The pn junction under reverse-bias conditions 逆偏位時的 pn 接面 The behavior of the pn junction can be explained by exciting the junction with a constant-current current source, as shown in Fig pn 接面行為, 可以一固定電流源定電流源偏流來說明, 如圖 3.46 所示 偏位 (bias) : 表電路的靜態點電壓或電流值 可由偏電壓或偏電流來設定 264

265 Figure 3.46 The pn junction excited by a constant-current source I in the reverse direction. To avoid breakdown, I is kept smaller than I S. Note that the depletion layer widens and the barrier voltage increases by V R volts, which appears between the terminals as a reverse voltage. 265

266 The drift current I S, being independent of the barrier voltage, will remain constant. 漂移電流 I S 與障礙電壓無關, 為定電流 The voltage across the depletion layer will increase by the applied external voltage V R. (note: where V R is smaller than the breakdown voltage V ZK ) 跨空乏層電壓, 則隨外加電壓 V R 而增 於此設 V R 小於崩潰電壓 V ZK Finally, equilibrium (steady state) will be reached when I S I D = I I S 當達 I S I D = I I S, 則呈現平衡 ( 穩態 ) (After initial charging for depletion region, the current I will remain constant and eventually, I D (diffusion current) can be neglected.) 266

267 The current I S is in the order of A, but actual diode has a reverse current of the order of 10-9 A. I S 在 A 次方大小 但實際反向電流下的二極體電流大小為 10-9 A 267

268 The depletion capacitance 空乏電容 From the above we observe the analogy between the depletion layer of a pn junction and a capacitor. 依上觀察,pn, 接面空乏層與電容類似 Fig shows a sketch of typical charge-versus versus-external- voltage characteristic of a pn junction for reverse-bias condition. 圖 3.47 所示為逆向偏位 pn 接面, 電荷與外電壓特性圖 268

269 Under reverse-biased condition the depletion width can be derived as 2ε s 1 1 Wdep = + ( V0 + VR ) q NA ND 269

270 However, a linear-capacitance approximation can be used if the device is biased and the signal swing around the bias point is small, as illustrated in Fig Under the small-signal approximation, the depletion capacitance (also called the junction capacitance ) is the slope of the q V curve at the bias point Q, C j = dq J dv R V = V R Q J R 270

271 We can treat the depletion layer as a parallel-plate capacitor and obtain the expression of junction capacitance as C j ε A s = = W dep C j0 V 1+ V R 0 where C is the C with zero applied voltage, j0 j C j0 2ε s NAN D 1 = A ( ) q NA + ND V0 271

272 For graded junction, a more general formula for C is C j ε s A C j0 = = Wdep VR 1+ V0 m (3.57) j where m is a constant whose value depends on the manner in which the concentration changes from the p to the n side of the junction. It is called the grading coefficient, and its value ranges from to

273 3.7.4 The pn junction in the breakdown region 崩潰區的 pn 接面 Assuming the pn junction be excited by a current source that causes a constant current I greater than I s to flow in the reverse direction, as shown in Fig 設 pn 接面所加電流源, 使逆向逆向定電流 I 大於 I s 如圖 3.48 所示 273

274 Depending on the pn junction material, structure, and so on, two possible breakdown mechanisms can occur. They are the zener effect and avalanche effect. 依 pn 接面材料 結構等, 有兩可能崩潰會發生 其為齊納效應及雪崩效應 The pn junction breakdown is not a destructive process if the maximum specified power is not exceeded. 若崩潰時, 不超過額定最大功率,pn, 接面崩潰不會造成損壞 274

275 Zener effect (V Z < 5 V): 齊納效應 In some specially designed devices, when electric field in the depletion layer increases to the point where it can break covalence bonds and generate electron- hole pairs. 有些特殊設計裝置, 利用空乏層電場增空乏層電場增大至共價鍵崩潰點, 來產生電子 - 電洞對 此為齊納效應 275

276 Avalanche effect (V Z > 7V): 雪崩效應 When the minority carriers that cross the depletion region under the influence of the electric field gain sufficient kinetic energy to be able to break covalent bonds in atoms with which they collide. This process occurs in the fashion of an avalanche. 當少數載子流經少數載子流經空乏區, 受電場影響, 可獲足夠動能而來打破, 其所撞擊原子共價鍵 此種過程為雪崩效應 276

277 For junctions that breakdown between 5 V and 7 V, the breakdown mechanism can be either the zener or the avalanche effect or a combination of the two. 接面崩潰電壓在 5 V 至 7 V, 崩潰機制可為齊納或雪崩效應, 或兩者組合 277

278 3.7.5 The pn junction under forward- bias conditions 正偏位 pn 接面 We can explain its physical operation by exciting the junction with a constant-current current source supplying a current I in the forward direction, as shown in Fig 接面加上一正向定電流源 I, 則可以圖 3.49 說明其物理工作原理 278

279 The diffusion current I D increases until equilibrium is achieved with I D I S = I, the external supplied forward current. 擴散電流 I D 增加, 至達外加正向電流達外加正向電流平衡點, I D I S = I The barrier voltage is lower than V 0 by an mount V that appears between the diode terminals as a forward voltage drop. 障礙電壓則由 V 0 下降 V 伏特, 此為二極體端子的正向電壓降 Owing to the decrease in the barrier voltage or, alternatively, because the forward voltage drop V, holes are injected across the junction into the n region and electrons are injected across the junction into the p region. 由於障礙電壓下降, 或相當於加正向電壓降 V,, 電洞跨過跨過接面注入 n 區, 而電子則跨過則跨過接面注入 p 區 279

280 The holes injected into the n region will cause the minority-carrier concentration there, p n, to exceed the thermal equilibrium value, p n0. 電洞注入 n 區導致少數載子濃度增加, 超出熱平 衡值 p n0 The excess concentration ( (p n p n0 ) will be highest near the edge of the depletion layer and will decrease (exponentially) as one moves away from the junction, eventually reaching zero. 超出濃度差 (p n p n0 ) 在空乏層邊緣最高, 而以指數以指數沿接面外下降, 最後至零 Fig shows such a minority-carrier distribution. 圖 3.50 所示為少數載子分佈 n0 280

281 Conceptual view of concentration variations 281

282 (By readjust x = 0 point) Figure 3.50 Minority-carrier distribution in a forwardbiased pn junction. It is assumed that the p region is more heavily doped than the n region; N A >> N D. 282

283 In the steady state the concentration profile of excess minority carriers remains constant, and such a distribution causes the increase of diffusion current I D above the value I S. 在穩態時時, 多出的少數載子濃度輪廓呈常數 如此分佈導致擴散電流 I D 增加超過 I S This is because the distribution shown causes injected minority holes to diffuse away from the junction into the n region and disappear by recombination. 於所示分佈下, 注入 n 區少數載子少數載子從接面接面擴散後, 則因復合而消失 To maintain equilibrium, an equal number of electrons will have to be supplied by the external circuit, thus replenishing the electron supply in the n material. 為保持平衡, 從外部電路要輸入等量電子, 來補充 n 材料電子 283

284 Similar statement can be made about the minority electrons in the p material. 相仿, 在 p 材料少數電子亦如上述呈反向擴散 The diffusion current I D is, of course, the sum of the electron and hole components. 最後擴散電流 I D 為電子及電洞成分的和 284

285 The current-voltage relationship 電流電壓關係 We now show how the diode i-v relationship of Eq.. (3.1) arises. Repeated here for Eq.. (3.1). / i = I ( e v nv T 1) (3.1) S Here we assume n = 1 for standard integrated-circuit process. 285

286 At the edge of the depletion region, for a forward voltage V, we have V / VT n( n) = n0 p x p e This is known as the law of the junction. 286

287 Distribution of excess hole concentration in the n region can be expressed as n n0 n n n0 ( x x )/ L n p p ( x) = p + [ p ( x ) p ] e where L is a constant that determines the steepness of p the exponential decay. It is called the diffusion length of hole in the n-type silicon. 287

288 In fact, L is related to another semiconductor parameter p known as excess-minority carrier life time, τ. p It is the average time it takes for a hole injected into the n region to recombine with a majority electron. The relationship is L = D τ p p p where D is the diffusion constant for the hole. p 288

289 From Eq (p.193), we have dp Jp = qd p. dx In our case, p=p current in the n region as Dp Jp = q p e e L p n ( x ). We then have the hole diffusion V / V ( x xn)/ L T p n0( 1) In steady state, the largest J will occur at p x = x. n Thus the current density due to hole injection is given by p V/VT J = q p (e -1) p D L p n0 289

290 A similar analysis for the J n D L n T = q n n p V / V 0 ( e 1) electrons injection 290

291 For a cross section A, the total current is given by qdppn0 qdnn p0 V / V I = A + ( e T 1) Lp L n 291

292 Substituting for p = n / N and n = n / N, we can express I as 2 2 n0 i D p0 i A I = Aqn D + D e = I e 2 p n V / VT V / VT i ( 1) S( 1) LN p D LN n A where I S D 2 p = Aqni + LN D n LN p D n A This is the equation (3.1) that we used early. 2 It shows that I is proportional to the junction area A and n, S the later is a strong function of temperature. i 292

293 Diffusion capacitance 擴散電容 If the terminal voltage of a forward pn junction changes, the charge stored in the junction will have to change. 若正偏 pn 接面的端電壓改變, 存儲於接面電荷亦會改存變 This charge-storage phenomenon gives rise to another capacitive effect, distinctly different from that due to charge storage in the depletion region (depletion capacitance or junction capacitance mentioned early in reverse-bias condition). 此電荷存儲存儲現象, 造成另電容效應 此與空乏區電荷存儲不同 ( 前所提, 逆向偏位時, 空乏區電容或接面電容 ) 293

294 The excess minority-carrier stored charge is given by Q ( ) p = Aq shaded area under the pn x exponential = Aq [p (x )-p ]L n n n0 p or Q p = L D 2 p p I p This charge can also be expressed with the hole life time as Q p = τ pi p 294

295 Similar expression can be developed for electron as Q = τ I n n n. The total excess minority-carrier charge can be obtained as Q= τ I + τ I p p n n. With diode current I = I + I, the charge can be expressed as Q = τ I T p n where τ is called the mean transit time of the diode. T 295

296 For small change around a bias point, we can define the diffusion capacitance C as C d dq = dv d and can show that C d τ I T = VT where I is the doide current at the bias point. Note that C is directly proportional the diode current I and thus d negligibly small when the diode is reverse biased. 296

297 Junction capacitance 接面電容 The depletion-layer layer or junction capacitance under forward-bias conditions can be found by replacing V R with V V in Eq.. (3.57). 在正向偏位的空乏層或接面電容, 可於式可 Eq.. (3.57), 以 V 替代 V R 來求 It turns out, however, that the accuracy of this relationship in the forward-bias region is rather poor. 但在正偏位區, 此公式關係並不精確 As an alternative, circuit designers use the following rule of thumb: 替代而言, 電路設計常以下經驗法則來做 : C j 2C j0 297

298 3.7.6 Summary Table 3.2 summarizes the important equations for pn junction operation. 298

299 299

300 300

301 301

302 Integrated Circuit Fabrication Overview Figure A.1 Silicon ingot and wafer slices. 302

303 Figure A.2 (a) An 8-pin plastic dual-in-line IC package, (b) A 16-pin surface mount package. 303

304 Top view of an integrated pn diode. 304

305 Integrated Circuit Fabrication (cont.) (a) First mask exposure, (b) post-exposure and development of photoresist, (c) after SiO2 etch, and (d) after implantion/diffusion of acceptor dopant. 305

306 Integrated Circuit Fabrication (cont.) (e) Exposure of contact opening mask, (f) after resist development and etching of contact openings, (g) exposure of metal mask, and (h) After etching of aluminum and resist removal. 306

307 Diode Layout Chap