zu1-a1a-1102 rev06.opj

ZU SYSTEM LOK IGRM VI / hrontel (only for ezock) Page LOK GENERTOR K Page Merom ufpg Page, PU Thermal Sensor Page PI EVIE MR TI ISEL# REQ# / GNT# Interrupts REQ# / GNT# INT# REQ# / GNT# INT# REQ# / GNT# INTE# LOK K/PI K/PI K/PI S-VIEO ONN L ONN (."WXG) Page RT Port H (ST) O (PT) Finger Printer US Page Page Page Page US Port x US~ Page luetooth US US Page Page Page SVO TV LVS VG ST PT US. zalia N restline (GM) S IHM ur PL FS / Mhz Page ~ X MI interface Page ~ LP Page ual hannel R / MHz PI-Express PI us Super I/O NS P Page RII SO-IMM SO-IMM Page, Mini ard / WLN Page PIE- PMI ontroller ( ) Page RJ Page Transformer Giga Lan (M ) (MR) Page Page PIE- ard Reader ontroller Page ontroller (TI ) Page SPI ROM Touch Pad K/ ONN FIR PMI ard Reader ONN Page Page Page Page Page Page Page HP Page INT SPK Page Line in & MI Page HP MP Page SPK MP Page udio odec (L) Page ezockii/ii+ onnector PIE, Lan, Ser & Par Port PS, VG, VI SPIF,SM US Mediaay Express ard PI-Express VI US * TV out / RT udio PIE- US Switch Page V/V (ISL) Page VORE(ISL) Page VTT.V (S) Page.V.V.V ischarge Page Page harger (ISL) Page (/):() Re-name. () Gerber out M. Page Page //G Switch Page.V (TPS) Page PROJET : ZU Quanta omputer Inc. Size ocument Number Rev lock iagram Thursday, November, ate: Sheet of PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn

lock Generator +V L KPHS-T_.U_ lock Gen I :(/) IS FE suggest to change, from.uf to uf :(/) Reverse R footprint for EMI, PI_LK_ PI_LK_ PLK_ PLK_ PI_LK_SIO PLK_IH LKUS_ M_IH SIO_M +V +V +V U_ R R R LK_SEL LK_SEL LK_SEL U_ V_K_V_PI V_K_V_ V_K_V_SR V_K_V_REF V_K_V_SR V_K_V_PU GLK_SM GT_SM LK_PU_LK_R LK_PU_LK#_R LK_MH_LK_R LK_MH_LK#_R R _ PI_LK R LK_PIE_GPLL#_R RP X PI/R#_ SR# LK_PIE_GPLL_R R _ PI_LK R SR PI/R#_ PIE_LK_RS_R R _ R _ PLK R SR/R#_H PIE_LK_RS#_R R _ PI/TME SR#/R#_G FS +.V_V :(/) remove STLKREQ function, change R value from ohm to ohm R R *K_ K_ :(/) FE : (M_IH and SIO_M) signals trace should be equal length _ R R R R R *K_ K_ R _ R _.U_.U_.U_.U_.U_ K_.K_ K_ R _ R _ R _ R _ :(/) IS FE suggest R change from to ohm :(/) change R value from ohm to ohm(intel check list.) PLK R PI_LK_SIO_R PLK_IH_R G_XIN G_XOUT FS U V_PI V_ V_PLL V_REF V_SR V_PU I(P)SLGSPTTR(TSSOP) V IO V_PLL_IO V_SR_IO_ V_SR_IO_ V_SR_IO_ V_PU_IO PI PI/SR_EN PIF/ITP_EN XTL_IN XTL_OUT US_/FS FS/TEST/MOE REF/FS/TESTSEL VSS_PI VSS_ VSS_IO VSS_PLL VSS_PU VSS_SR VSS_SR VSS_SR VSS_REF K ISLPRSGLFT SLGSPT: LSPK IO_VOUT SLK S SR/PI_STOP# SR#/PU_STOP# PU PU# PU PU# SR/ITP SR#/ITP# SR SR# SR/SE SR#/SE SR/R#_F SR#/R#_E SR SR# SR SR# SR#/R#_ SR/R#_ SR/ST SR#/ST# SR/OT SR#/OT# KPWRG/PWRWN# :(/) remove IO_VOUT LK_PIE_EZ_R LK_PIE_EZ#_R LK_PIE_IH_R LK_PIE_IH#_R LK_PIE_MINI_R LK_PIE_MINI#_R LK_PIE_LN_R LK_PIE_LN#_R LK_PIE_ST_R LK_PIE_ST#_R REFSSLK_R REFSSLK#_R REFLK_R REFLK#_R ISLPRSGLFT/ SLGSPT RP RP RP RP RP RP RP RP RP X X X X X X X X X uring initial power-up be used to sample FS speed with FS// PM_STPPI# PM_STPPU# LK_PU_LK LK_PU_LK# LK_MH_LK LK_MH_LK# LK_PIE_GPLL# LK_PIE_GPLL LK_MH_OE# PIE_LKREQ# PIE_LK+ PIE_LK- LK_PIE_IH LK_PIE_IH# LK_PIE_MINI LK_PIE_MINI# LK_PIE_LN LK_PIE_LN# LK_PIE_ST LK_PIE_ST# REFSSLK REFSSLK# REFLK REFLK# K_PWRG,,,,,,,, PT_SM PLK_SM Pin +V Q RHUN ctive Low Low Q RHUN +V +V ontrol signal SR/# SR/# R PIE_LKREQ# K_ GT_SM K_ GLK_SM :(/) ase on above table, SWP SR and SR R K_ :(/) dd PIE_LKREQ# PU to +V R P_ P_ <check list> XTL length < mils G_XIN Y.MHZ G_XOUT <check list> ()PI/TME: PU be used, the K cannot over clock any of the clock for Trust Mode security purposes. ()PI/SR_EN: PU be used, the K will be configured to use Pin/ to SR clock. If P be detect at powe-on,the K will setting Pin / to PI_STOP/UP_SOTP (efault is setting to PI_STOP/UP_SOTP) ()PIF/ITP_EN: PU be used, the K will be configured to use Pin/ to PU ITP clock. If P be detect at powe-on,the K will setting Pin / to SR (efault is setting to SR) lock Gen ifferential IO power +.V_V +.V L KPHS-T_ EMI FILTER KPHS-T(,.) *U_ *U_ *U_ U_.U_.U_.U_.U_.U_.U_.U_ PLK_EUG R *_ PLK R IOS/ ERI IF M/ NEE LP EUG PORT, \THEN STUFF THIS RESITER. ()SLGSP Pin select Pin, output is LLK or M, P is LLK, PU is M, Pin, will fixed be use PU_Stop and PI_Stop. ()SLGY K Standar parts follow standar setting.u close to each V_IO Power pin PU lock select PU_SEL R _ LK_SEL MH_SEL SEL Frequency Select Table FS FS FS Frequency +.V_PU R *_ Mhz R K_ : (/) stuff Mhz PU_SEL R _ LK_SEL MH_SEL Mhz +.V_PU R R *_ K_ : (/) Remove ohm Mhz Mhz : (/) stuff PU_SEL +.V_PU R _ R *_ R K_ : (/) stuff LK_SEL MH_SEL Mhz Mhz PROJET : ZU Quanta omputer Inc. Size ocument Number Rev LK. GEN./ K Thursday, November, ate: Sheet of PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn

PU(HOST) H_STPLK# +.V_PU R K_ R K_ H_#[:] H_ST# H_REQ#[:] H_#[:] H_#[:] H_ST# H_M# H_FERR# H_IGNNE# H_STN# H_STP# H_INV# H_#[:] H_STN# H_STP# H_INV# H_INTR H_NMI H_SMI# T T T T T T T T T T <heck list & R> Layout note: Z= ohm H_GTLREF<." T T T R _ PU_SEL PU_SEL PU_SEL R R H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_REQ# H_REQ# H_REQ# H_REQ# H_REQ# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_STPLK_R# TP_PU_RSV TP_PU_RSV TP_PU_RSV TP_PU_RSV TP_PU_RSV TP_PU_RSV TP_PU_RSV TP_PU_RSV TP_PU_RSV TP_PU_RSV H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_GTLREF *K_PU_TEST *K_PU_TEST PU_TEST *.U_ PU_TEST PU_TEST PU_TEST J L L K M N J N P P L P P R M K H K J L Y U R W U Y U R T T W W Y U V W V M N T V F E F E G F G E E K G J J H F K H J H H N K P R L M L M P P P T R L T N L M N F F U []# []# []# []# []# []# []# []# []# []# []# []# []# []# ST[]# REQ[]# REQ[]# REQ[]# REQ[]# REQ[]# R GROUP R GROUP []# []# []# []# []# []# []# []# []# []# []# []# []# []# []# []# []# []# []# ST[]# M# FERR# IGNNE# STPLK# LINT LINT SMI# RSV[] RSV[] RSV[] RSV[] RSV[] RSV[] RSV[] RSV[] RSV[] RSV[] IH RESERVE XP/ITP SIGNLS ONTROL THERML H LK Merom all-out Rev a U []# []# []# []# []# []# []# []# []# []# []# []# []# []# []# []# STN[]# STP[]# INV[]# []# []# []# []# []# []# []# []# []# []# []# []# []# []# []# []# STN[]# STP[]# INV[]# GTLREF TEST TEST TEST TEST TEST TEST SEL[] SEL[] SEL[] T GRP S# NR# PRI# EFER# RY# SY# R# IERR# INIT# LOK# RESET# RS[]# RS[]# RS[]# TRY# HIT# HITM# PM[]# PM[]# PM[]# PM[]# PRY# PREQ# TK TI TO TMS TRST# R# PROHOT# THERM THERM THERMTRIP# T GRP MIS LK[] LK[] T GRP T GRP Merom all-out Rev a H E G H F E F H F F G G G E []# []# []# []# []# []# []# []# []# []# []# []# []# []# []# []# STN[]# STP[]# INV[]# []# []# []# []# []# []# []# []# []# []# []# []# []# []# []# []# STN[]# STP[]# INV[]# OMP[] OMP[] OMP[] OMP[] PRSTP# PSLP# PWR# PWRGOO SLP# PSI# H_IERR# XP_TK XP_TI XP_TMS XP_TRST# XP_RESET# H_PROHOT_R# H_THERM H_THERM THERMTRIP#_PWR R U Y H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# OMP OMP OMP OMP R R R R R LK_PU_LK LK_PU_LK# : (/) Remove XP/ITP signals R _ R R H_#[:] H_STN# H_STP# H_INV# H_#[:] H_STN# H_STP# H_INV# H_PSLP# H_PWR# H_PUSLP# PSI# H_S# H_NR# H_PRI# H_EFER# H_RY# H_SY# H_REQ# +.V_PU H_INIT# H_LOK# H_PURST# H_RS# H_RS# H_RS# H_TRY# H_HIT# H_HITM# +.V_PU SYS_RST# H_PROHOT# <check list> efault PU ohm if no use. Serial R N, If connect to power side PU ohm. Serial R.K._._._._._._ *.K_ <heck list & R> Layout note: L<." OMP/ Z=.ohm OMP/ Z=. <R & esign guide> Layout Note:onnect from S and daisy chain to PU ORE VR.Not use T connect.(s/vr/pu/n) IH_PRSTP#,, : (/) Remove H_PWRG_XP PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn Y V V V T U U Y W Y W W Y U E E F E F E F E E H_PWRG PU Thermal monitor :(/) change from MLK/MNT to N_MLK/N_MT PUFN#_ON XP_TMS XP_TI XP_TK XP_TRST# N_MLK N_MT THERM_LERT# PU FN PUFN# +V PU/P (ITP) +V +V +V +V +.V_PU : (/) <checklist> Retain the termination resistors on these signals even when ITPFlex is not implemented. : (/) dd (U/Pin) PU to V : (/) remove, already PU in IH PUFN#_ON_R,, +V : (/) dd PUFN#_ON to (U/PIN) : (/) dd iode and PU +V for (U/Pin) K_ R S R _ R _ R _ R _ Q RHUN Q RHUN R R *_ K_ U /FON G THERMTRIP#_PWR *K_ THERM_LERT#_R FNPWR =.*VSET Thermal Trip VIN VSET R ELY_VR_PWRGOO PUFN#_ON VO GN GN GN GN R K_ +.V_PU R._ R K_ FNSIG U +V SLK S LERT# OVERT# MX RESS: H TH_FN_POWER U_ +.V_PU V XP XN GN Thursday, November, ate: Sheet of LMV +V SYS_SHN# PM_THRMTRIP#, <R & esign guide> Layout Note: Thermal trip should connect to IH & GMH without T-ing (ZS default N) H_THERM H_THERM <check list> Layout Note:Routing : mils and away from noise source with ground gard : (/) change FN ONN (follow Z) R R _.U_ Q FVN *_ *.U_ R *K_ PROJET : ZU *U_ Quanta omputer Inc. Size ocument Number Rev PU( of )/FN/Thermal R K_ P_ N PTI_WY-GZ : (/) change name from THERM_SYS_PWR to SYS_SHN# Q MMT.U_ *S

PU(Power) V_ORE U_ U_ U_ U_ + U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ U_ :(/) stuff, unstuff (base on layout location) U_ U_ U_ U_ + U_ U_ U_ ESIGN GUIE HNGE FROM UF * TO UF * <heck list> Option:U*(ESR=.m ohm aggregate, ESL=.nH/) and U*(ESR=mohm typ/, ESL=.nH/) Option:U*(ESR=.m ohm aggregate, ESL=.nH/) and U*(ESR=mohm typ/, ESL=.nH/) U_ U_ U_ HME P HIP UF.V(+-%,XR,) + *U_U_ U_ U_ U_ U_ U_ U_ U V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] V[] E V[] V[] E V[] V[] E V[] V[] E V[] V[] E V[] V[] E V[] V[] E V[] V[] E V[] V[] F V[] V[] F V[] V[] F V[] V[] F V[] V[] F V[] V[] F V[] V[] F E V[] V[] F V[] V[] E V[] E G E V[] VP[] V V[] VP[] E J V[] VP[] E K E V[] VP[] M V[] VP[] E J V[] VP[] E K V[] VP[] F M F V[] VP[] N V[] VP[] F N V[] VP[] F R F V[] VP[] R V[] VP[] F T V[] VP[] F T F V[] VP[] V V[] VP[] F W V[] VP[] V[] V[] V[] V[] V[] V[] V[] VI[] F V[] VI[] E V[] VI[] F V[] VI[] E V[] VI[] F V[] VI[] E V[] VI[] V[] V[] V[] VSENSE F V[] V[] V[] VSSSENSE E Merom all-out Rev a. PU_G PU_V +V_PRO <R> R for test only R _ R _ H_VI H_VI H_VI H_VI H_VI H_VI H_VI <REV.NO../REF.NO.> Ivcc Max Ivccp Max (VP supply before Vcc stable) Max (VP supply after Vcc stable) Ivcca Max m +.V_PU.U_ +.V_PU + <heck list> U_ ESR=m ohm V_ORE R _ R _.U_.U_ <R>.U near to ball.u_ U_.U_ R _ R _.U_ +.V +.V VSENSE VSSSENSE.U_ <emo board> Routing.ohm with mils spacing PU/P near to PU " U VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] F VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] E VSS[] E VSS[] E E VSS[] VSS[] E VSS[] E E VSS[] VSS[] E VSS[] E F VSS[] VSS[] F VSS[] F VSS[] F F VSS[] VSS[] F VSS[] F F VSS[] VSS[] F VSS[] G G VSS[] VSS[] G VSS[] G VSS[] H H VSS[] VSS[] H VSS[] H VSS[] J VSS[] J VSS[] J J VSS[] VSS[] K VSS[] K VSS[] K K VSS[] VSS[] L VSS[] L VSS[] L VSS[] L VSS[] M VSS[] M VSS[] M VSS[] M VSS[] N N VSS[] VSS[] N VSS[] N P VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] P P P R R R R T T T T U U U U V V V V W W W W Y Y Y Y E E E E E E E E E F F F F F F F F Merom all-out Rev a. PROJET : ZU Quanta omputer Inc. Size ocument Number Rev PU( of ) PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn Thursday, November, ate: Sheet of

N(HOST) +.V_GMH R R _ R _._ +.V_GMH R._ +.V_GMH R._ H_SWING H_ROMP H_SOMP H_SOMP#.U_ +.V_GMH R K_ R K_ <check list>.u close to <check list> : mils(width:spacing) <check list> Impedance ohm <check list> Impedance ohm.u_ H_#[:] H_PURST# H_PUSLP# <check list>.u close to H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_SWING H_ROMP H_SOMP H_SOMP# H_VREF H_VREF U E H_#_ G H_#_ G H_#_ M H_#_ H H_#_ H H_#_ G H_#_ F H_#_ N H_#_ H H_#_ M H_#_ N H_#_ N H_#_ H H_#_ P H_#_ K H_#_ M H_#_ W H_#_ Y H_#_ V H_#_ M H_#_ J H_#_ N H_#_ N H_#_ W H_#_ W H_#_ N H_#_ Y H_#_ Y H_#_ P H_#_ W H_#_ N H_#_ H_#_ E H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ Y H_#_ H_#_ E H_#_ H_#_ G H_#_ J H_#_ H H_#_ J H_#_ E H_#_ E H_#_ H H_#_ J H_#_ H H_#_ J H_#_ E H_#_ J H_#_ J H_#_ E H_#_ J H_#_ H H_#_ H H_#_ H_SWING H_ROMP W H_SOMP W H_SOMP# H_PURST# E H_PUSLP# H_VREF H_VREF RESTLINE_p HOST H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_S# H_ST#_ H_ST#_ H_NR# H_PRI# H_REQ# H_EFER# H_SY# HPLL_LK HPLL_LK# H_PWR# H_RY# H_HIT# H_HITM# H_LOK# H_TRY# H_INV#_ H_INV#_ H_INV#_ H_INV#_ H_STN#_ H_STN#_ H_STN#_ H_STN#_ H_STP#_ H_STP#_ H_STP#_ H_STP#_ H_REQ#_ H_REQ#_ H_REQ#_ H_REQ#_ H_REQ#_ H_RS#_ H_RS#_ H_RS#_ J M F L G K L J K P R H L M N J E E N G H G E F M M H K E G K L E M K H L K J M E H E H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_INV# H_INV# H_INV# H_INV# H_STN# H_STN# H_STN# H_STN# H_STP# H_STP# H_STP# H_STP# H_REQ# H_REQ# H_REQ# H_REQ# H_REQ# H_RS# H_RS# H_RS# H_#[:] H_#[:] are not supported in alero Interposer restline support bit address H_S# H_ST# H_ST# H_NR# H_PRI# H_REQ# H_EFER# H_SY# LK_MH_LK LK_MH_LK# H_PWR# H_RY# H_HIT# H_HITM# H_LOK# H_TRY# H_INV#[:] H_STN#[:] H_STP#[:] H_REQ#[:] H_RS#[:] PROJET : ZU Quanta omputer Inc. :(/) remove R ( ohm) Size ocument Number Rev GMH HOST( of ) ate: Thursday, November, Sheet of PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn

EXP OMPX PEG_RXN PEG_RXP _PEG_TXN _PEG_TXN _PEG_TXN _PEG_TXN _PEG_TXP _PEG_TXP _PEG_TXP _PEG_TXP TP_MH_N TP_MH_N TP_MH_N TP_MH_N TP_MH_N TP_MH_N TP_MH_N TP_MH_N TP_MH_N TP_MH_N TP_MH_N TP_MH_N TP_MH_N TP_MH_N TP_MH_N TP_MH_N MI_TXN MI_TXN MI_TXP MI_TXP MI_TXP MI_RXN MI_RXN MI_RXN MI_RXN MI_RXP MI_RXP MI_RXP MI_RXP MI_TXN MI_TXN MI_TXP REFLK# REFLK REFSSLK# REFSSLK M_ROMP# M_ROMP M_ROMP# M_ROMP SMR_VREF_MH SM_ROMP_VOL SM_ROMP_VOH SM_ROMP_VOH SM_ROMP_VOL PM_EXTTS#_R PM_MUSY#_R MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_RSV MH_FG_ MH_FG_ MH_FG_ MH_FG_ MH_FG_ MH_FG_ MH_FG_ MH_FG_ MH_FG_ MH_FG_ MH_FG_ LK_MH_OE# PM_EXTTS# PM_EXTTS# GMH_TEST GMH_TEST +.V_L_VREF INT_RT_RE HSYN INT_RT_GRN INT_RT_RE INT_RT_GRN INT_RT_LU INT_RT_LU RTIREF VSYN INT_TV_Y/G INT_TV_/R INT_TV_OMP LVS_IG IH_PRSTP#_R RST_IN#_MH PM_PRSLPVR_GMH LK_MH_OE# INT_TV_/R INT_TV_Y/G INT_TV_OMP _PEG_TXP _PEG_TXN _PEG_TXP _PEG_TXP _PEG_TXP _PEG_TXN _PEG_TXN _PEG_TXN PM_THRMTRIP#_GMH MH_RSV TV_ONSEL_ TV_ONSEL_ M_LK_R M_LK_R M_LK_R M_LK_R M_LK_R# M_LK_R# M_LK_R# M_LK_R# M_KE, M_KE, M_KE, M_KE, M_S#, M_S#, M_S#, M_S#, M_OT, M_OT, M_OT, M_OT, PM_MUSY# PM_THRMTRIP#, PM_EXTTS# ELY_VR_PWRGOO,, PM_EXTTS# MH_SEL MH_SEL MH_SEL MH_FG_ MH_FG_ LK_MH_OE# MH_IH_SYN# SVO_TRLLK SVO_TRLT L_LK L_T L_RST# INT_RT_RE INT_RT_LU INT_RT_GRN INT_VSYN INT_HSYN INT_RT_LK INT_RT_T INT_TV_/R INT_TV_Y/G INT_TV_OMP INT_LVS_IGON INT_LVS_EILK INT_LVS_EIT IH_PRSTP#,, PLTRST#_N PM_PRSLPVR, MPWROK MH_FG_ MH_FG_ MH_FG_ MH_FG_ MH_FG_ INT_TXLLKOUT+ INT_TXLLKOUT- INT_TXLOUT- INT_TXLOUT+ INT_TXLOUT- INT_TXLOUT+ INT_TXLOUT- INT_TXLOUT+ INT_LVS_LON SVO_R+ SVO_G+ SVO_+ SVO_R- SVO_LK+ SVO_LK- SVO_G- SVO_- LK_PIE_GPLL# LK_PIE_GPLL REFLK# REFSSLK# REFLK REFSSLK M, M, PEG_RXN PEG_RXP INT_LVS_PWM MI_RXP[:] MI_TXP[:] MI_TXN[:] MI_RXN[:] +V_PEG +.VSUS_GMH +.VSUS_GMH +.VSUS_GMH +V +.V_X +V SMR_VREF +V Size ocument Number Rev ate: Sheet of GMH MI/VIEO( of ) Thursday, November, R _ T T T T T R _ T T R _ R *_ R.K_ T PM MIS N R MUXING LK MI FG RSV GRPHIS VI ME U RESTLINE_p SM_K_ V SM_K_ RSV F SM_K_ SM_K#_ W SM_K#_ RSV G SM_K#_ W SM_KE_ E SM_KE_ Y SM_KE_ SM_KE_ G SM_S#_ G SM_S#_ K SM_S#_ G SM_S#_ E RSV H SM_OT_ H SM_OT_ J SM_OT_ J SM_OT_ E SM_ROMP L SM_ROMP# K SM_VREF_ R SM_VREF_ W FG_ L FG_ N FG_ N FG_ P FG_ N FG_ L FG_ FG_ FG_ F FG_ N FG_ G FG_ J FG_ FG_ R FG_ L FG_ J FG_ E FG_ E FG_ K FG_ M FG_ M PM_M_USY# G PM_EXT_TS#_ L PM_EXT_TS#_ J PWROK W RSTIN# V PLL_REF_LK PLL_REF_LK# PLL_REF_SSLK H PLL_REF_SSLK# H MI_RXN_ N MI_RXN_ J MI_RXN_ N MI_RXN_ N MI_RXP_ M MI_RXP_ J MI_RXP_ N MI_RXP_ N MI_TXN_ J MI_TXN_ J MI_TXN_ M MI_TXN_ M MI_TXP_ J MI_TXP_ J MI_TXP_ M MI_TXP_ M RSV R RSV L RSV M RSV M RSV J RSV K RSV F RSV H RSV K PM_PRSTP# L SM_K_ V SM_K#_ W RSV RSV RSV W RSV K RSV R RSV R RSV M RSV N RSV P RSV P RSV R RSV N GFX_VI_ E GFX_VI_ GFX_VI_ GFX_VI_ GFX_VR_EN E RSV J SM_ROMP_VOH K SM_ROMP_VOL L THERMTRIP# N PRSLPVR G RSV J L_LK M L_T K L_PWROK T L_RST# N L_VREF M RSV RSV RSV RSV RSV J RSV E RSV N_ J N_ K N_ K N_ L N_ L N_ L N_ L N_ K N_ J N_ E N_ N_ N_ N_ N_ SVO_TRL_LK H SVO_TRL_T K LK_REQ# G RSV IH_SYN# G RSV H RSV RSV RSV RSV RSV PEG_LK# K PEG_LK K TEST_ N_ K TEST_ R T T.U_ T T T R _.U_.U_ T R _.U_ T R *K_.U_.U_ T R.K_ Quanta omputer Inc. PROJET : ZU T T T R K_ T R _ T T R _ T T R _ T R _ T R _ T T T R._ T.U_ T R _ T T R K_ T T T T LVS PI-EXPRESS GRPHIS TV VG U RESTLINE_p PEG_OMPI N PEG_OMPO M PEG_RX#_ J PEG_RX#_ L PEG_RX#_ N PEG_RX#_ T PEG_RX#_ T PEG_RX#_ U PEG_RX#_ Y PEG_RX#_ Y PEG_RX#_ PEG_RX#_ W PEG_RX#_ PEG_RX#_ PEG_RX#_ G PEG_RX#_ H PEG_RX#_ G PEG_RX#_ G PEG_RX_ J PEG_RX_ L PEG_RX_ M PEG_RX_ U PEG_RX_ T PEG_RX_ T PEG_RX_ W PEG_RX_ W PEG_RX_ PEG_RX_ Y PEG_RX_ PEG_RX_ PEG_RX_ H PEG_RX_ G PEG_RX_ H PEG_RX_ G PEG_TX#_ N PEG_TX#_ PEG_TX#_ N PEG_TX#_ R PEG_TX#_ T PEG_TX#_ Y PEG_TX#_ W PEG_TX#_ W PEG_TX#_ PEG_TX#_ U PEG_TX#_ PEG_TX#_ PEG_TX#_ H PEG_TX#_ E PEG_TX#_ H PEG_TX#_ U PEG_TX_ M PEG_TX_ T PEG_TX_ T PEG_TX_ N PEG_TX_ R PEG_TX_ U PEG_TX_ W PEG_TX_ Y PEG_TX_ Y PEG_TX_ PEG_TX_ PEG_TX_ PEG_TX_ PEG_TX_ G PEG_TX_ E PEG_TX_ H L_TRL_LK E L_TRL_T E L LK L T L_V_EN K LVS_IG L LVS_VG L LVS_VREFH N LVS_VREFL N LVS_LK# LVS_LK LVS_T#_ G LVS_T#_ E LVS_T#_ F LVS_T_ E LVS_T_ F LVS_LK# LVS_LK E LVS_T#_ G LVS_T#_ LVS_T#_ LVS_T_ LVS_T_ L_KLT_EN H TV_ E TV_ G TV_ K TV_RTN F TV_RTN J TV_RTN L RT_LUE H RT_LUE# G RT LK K RT T G RT_GREEN K RT_GREEN# J RT_HSYN F RT_TVO_IREF RT_RE F RT_RE# E RT_VSYN E LVS_T_ G LVS_T_ E L_KLT_TRL J TV_ONSEL_ M TV_ONSEL_ P T.U_.U_.U_ R _ T T T T T T T T R *_ R *_ R _ R _ T T T R _ T T R K_ T R K_.U_ T T R K_ R K_ R.K_ R K_ T T T R.K_ R.K_ R _ T R _.U_ T T T T R _ T T T T T T R K_.U_ T R K_ T T R *K_.U_ PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn

M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q TP_S_RVEN# M M M M M M M M M M M M M M M M M QS M QS M QS M QS M QS M QS M QS M QS M QS# M QS# M QS# M QS# M QS# M QS# M QS# M QS# M M M M M M M M M M M M M M M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M M QS# M M QS# M M M QS# M M QS# M M M M QS# TP_S_RVEN# M M QS M QS# M M M M M M QS M M M M M QS M M QS M QS M M QS M M M M QS M QS M M M M M QS# M QS# M M M M Q[:] M S#, M S#, M S#, M M[:] M QS[:] M QS#[:] M [:], M RS#, M WE#, M S#, M Q[:] M S#, M S#, M S#, M M[:] M QS[:] M QS#[:] M [:], M RS#, M WE#, M S#, Size ocument Number Rev ate: Sheet of MH R( of ) Thursday, November, N(Memory controller) T R SYSTEM MEMORY UE RESTLINE_p S_Q_ P S_Q_ R S_Q_ S_Q_ E S_Q_ S_Q_ Y S_Q_ F S_Q_ F S_Q_ J S_Q_ J S_Q_ J S_Q_ L S_Q_ W S_Q_ K S_Q_ K S_Q_ K S_Q_ K S_Q_ J S_Q_ L S_Q_ J S_Q_ J S_Q_ K S_Q_ J S_Q_ W S_Q_ L S_Q_ K S_Q_ K S_Q_ E S_Q_ K S_Q_ S_Q_ S_Q_ E S_Q_ S_Q_ G S_Q_ N S_Q_ J S_Q_ L S_Q_ K S_Q_ L S_Q_ K S_Q_ K S_Q_ J S_Q_ J S_Q_ F S_Q_ H S_Q_ N S_Q_ G S_Q_ S_Q_ K S_Q_ E S_Q_ S_Q_ J S_Q_ S_Q_ S_Q_ R S_Q_ T S_Q_ V S_Q_ Y S_Q_ Y S_Q_ U S_Q_ T S_Q_ V S_Q_ S_Q_ S_S_ Y S_S_ G S_S_ G S_S# E S_M_ R S_M_ S_M_ K S_M_ L S_M_ H S_M_ J S_M_ F S_M_ W S_QS_ T S_QS_ S_QS_ K S_QS_ K S_QS_ J S_QS_ L S_QS_ E S_QS_ V S_QS#_ U S_QS#_ S_QS#_ L S_QS#_ K S_QS#_ K S_QS#_ K S_QS#_ F S_QS#_ V S_M_ S_M_ G S_M_ G S_M_ E S_M_ S_M_ G S_M_ G S_M_ W S_M_ F S_M_ E S_M_ S_M_ S_M_ Y S_M_ S_RS# V S_RVEN# Y S_WE# Quanta omputer Inc. PROJET : ZU T R SYSTEM MEMORY U RESTLINE_p S_Q_ R S_Q_ W S_Q_ G S_Q_ J S_Q_ S_Q_ G S_Q_ H S_Q_ E S_Q_ W S_Q_ E S_Q_ G S_Q_ E S_Q_ S_Q_ F S_Q_ H S_Q_ G S_Q_ F S_Q_ R S_Q_ W S_Q_ T S_Q_ W S_Q_ W S_Q_ Y S_Q_ Y S_Q_ V S_Q_ T S_Q_ V S_Q_ T S_Q_ W S_Q_ V S_Q_ U S_Q_ T S_Q_ S_Q_ S_Q_ R S_Q_ E S_Q_ S_Q_ S_Q_ Y S_Q_ G S_Q_ W S_Q_ S_Q_ S_Q_ S_Q_ Y S_Q_ R S_Q_ T S_Q_ T S_Q_ Y S_Q_ S_Q_ R S_Q_ R S_Q_ R S_Q_ N S_Q_ M S_Q_ N S_Q_ T S_Q_ T S_Q_ N S_Q_ M S_Q_ N S_Q_ W S_Q_ S_Q_ F S_S_ S_S_ K S_S_ F S_S# L S_M_ T S_M_ S_M_ S_M_ W S_M_ W S_M_ G S_M_ Y S_QS_ T S_QS_ E S_QS_ S_QS_ S_QS_ S_QS_ H S_QS_ S_QS_ P S_M_ N S_QS#_ T S_QS#_ S_QS#_ S_QS#_ S_QS#_ S_QS#_ H S_QS#_ S_QS#_ P S_M_ J S_M_ S_M_ S_M_ E S_M_ G S_M_ J S_M_ K S_M_ H S_M_ L S_M_ K S_M_ J S_M_ J S_M_ L S_M_ S_RS# E S_RVEN# Y S_WE# PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn

VSM_LF VSM_LF VSM_LF VSM_LF VSM_LF VSM_LF VSM_LF +.V_V_GMH_V VGFPLLOW +VGFX_ORE_INT +VGFX_ORE_INT +.VSUS_GMH +.V_V_GMH +.V +.V_V_GMH +.V +VGFX_ORE_INT +.V_V_GMH +V_VSYN +.VSUS +.V +.V Size ocument Number Rev ate: Sheet of GMH Power-( of ) Thursday, November, N(Power-) ohm THEY ONLY USE IN UM (GM OR GML) :(/) hange +V_FXORE_INT to +.V (/): Short R,R (/): Short R U_ U_ U_.U_ Quanta omputer Inc. PROJET : ZU.U_ U_.U_ U_.U_ + U_ + U_ + U_.U_ POWER V NTF VSS NTF VSS S V XM V XM NTF UF RESTLINE_p V_NTF_ V_NTF_ K V_NTF_ P V_NTF_ U V_NTF_ F V_NTF_ F V_NTF_ H V_NTF_ H V_NTF_ H V_NTF_ H V_NTF_ J V_NTF_ K V_NTF_ K V_NTF_ K V_NTF_ V_NTF_ L V_NTF_ L V_NTF_ V_NTF_ P V_NTF_ R V_NTF_ R V_NTF_ T V_NTF_ T V_NTF_ T V_NTF_ U V_NTF_ V_NTF_ U V_NTF_ U V_NTF_ U V_NTF_ U V_NTF_ V V_NTF_ V V_NTF_ V V_NTF_ V_NTF_ V_NTF_ VSS_NTF_ T VSS_NTF_ T VSS_NTF_ U VSS_NTF_ U VSS_NTF_ V VSS_NTF_ V VSS_NTF_ VSS_NTF_ VSS_NTF_ V_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ F VSS_NTF_ K VSS_NTF_ M VSS_NTF_ P VSS_NTF_ R VSS_NTF_ R VSS_NTF_ R V_NTF_ Y V_XM_ K V_XM_ K V_XM_ J V_XM_ J V_XM_NTF_ L V_XM_NTF_ L V_XM_NTF_ L V_XM_NTF_ M V_XM_NTF_ M V_XM_NTF_ M V_XM_NTF_ M V_XM_NTF_ P V_XM_NTF_ P V_XM_NTF_ R V_NTF_ Y V_NTF_ Y V_NTF_ Y V_NTF_ Y VSS_S VSS_S VSS_S VSS_S L VSS_S L VSS_S V_NTF_ V_NTF_ V_NTF_ V_NTF_ J V_NTF_ VSS_NTF_ F V_NTF_ J V_XM_ K V_XM_NTF_ L V_XM_NTF_ L V_XM_NTF_ L VSS_NTF_ M V_XM_NTF_ M V_XM_NTF_ M V_NTF_ M VSS_NTF_ P V_XM_NTF_ P V_XM_NTF_ P V_XM_NTF_ R V_XM_NTF_ R V_XM_ T V_XM_ T V_NTF_ V.U_ POWER V ORE V SM V GFX V GFX NTF V SM LF UG RESTLINE_p V_ V_ K V_ J V_ J V_ H V_ H V_ H V_ F V_ T V_ V_SM_ V_SM_ F V_SM_ J V_SM_ W V_SM_ Y V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ E V_SM_ E V_SM_ E V_SM_ U V_SM_ F V_SM_ G V_SM_ G V_SM_ G V_SM_ H V_SM_ H V_SM_ H V_SM_ J V_SM_ J V_SM_ U V_SM_ K V_SM_ K V_SM_ K V_SM_ K V_XG_NTF_ U V_XG_NTF_ U V_XG_NTF_ U V_XG_NTF_ U V_XG_NTF_ U V_XG_NTF_ U V_XG_NTF_ V V_XG_NTF_ V V_XG_NTF_ V V_XG_NTF_ V V_XG_NTF_ T V_XG_NTF_ V V_XG_NTF_ V V_XG_NTF_ V V_XG_NTF_ Y V_XG_NTF_ Y V_XG_NTF_ Y V_XG_NTF_ Y V_XG_NTF_ Y V_XG_NTF_ Y V_XG_NTF_ Y V_XG_NTF_ T V_XG_NTF_ Y V_XG_NTF_ Y V_XG_NTF_ Y V_XG_NTF_ Y V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ T V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ F V_XG_NTF_ F V_XG_NTF_ H V_XG_NTF_ H V_XG_NTF_ H V_XG_NTF_ H V_XG_NTF_ T V_XG_NTF_ J V_XG_NTF_ J V_XG_NTF_ J V_XG_NTF_ K V_XG_NTF_ K V_XG_NTF_ L V_XG_NTF_ L V_XG_NTF_ L V_XG_NTF_ L V_XG_NTF_ L V_XG_NTF_ T V_XG_NTF_ L V_XG_NTF_ M V_XG_NTF_ M V_XG_NTF_ M V_XG_NTF_ M V_XG_NTF_ M V_XG_NTF_ P V_XG_NTF_ P V_XG_NTF_ P V_XG_NTF_ T V_XG_NTF_ P V_XG_NTF_ P V_XG_NTF_ P V_XG_NTF_ U V_XG_NTF_ U V_SM_ L V_SM_ V V_SM_ W V_XG_NTF_ T V_ T V_SM_ U V_XG_ R V_XG_ T V_XG_ W V_XG_ W V_XG_ Y V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ F V_XG_ F V_XG_ H V_XG_ H V_XG_ H V_XG_ H V_XG_NTF_ P V_XG_NTF_ P V_XG_NTF_ R V_XG_NTF_ R V_XG_NTF_ R V_XG_NTF_ R V_XG_NTF_ R V_ R V_XG_ H V_XG_ J V_XG_ N V_SM_LF W V_SM_LF V_SM_LF E V_SM_LF V_SM_LF V_SM_LF W V_SM_LF T V_XG_ V_XG_ V_ H V_XG_NTF_ M V_SM_ U V_XG_NTF_ V V_XG_NTF_ V V_XG_NTF_ V V_XG_NTF_ Y.U_.U_ R _.U_.U_.U_ U_ U_.U_ R _ U_.U_.U_.U_ + U_ U_ PZ..U_.U_ PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn

N(Power-) IN HIP UH(%,M,LTMR) +.V L UH_ RT/TV isable/enable guideline +V_VSYN External VG with EV@part,Internal VG with IV@ part +V R _ If SVO isable If SVO enable If SVO enable all Enable isable all Enable isable Signal LVS isable LVS isable LVS enable <FE>.U_ V_RT.V GN V TVO.V GN V_LVS GN.V.V INT VG disable VSYN connect to GN V_RT.V GN V_TVO.V.V V_LVS GN GN.V LVS isable/enable guideline + U_.U_ +V L KPHS-T_ *U_.U_ N_ R *_ VQ_RT.V V TVO.V V TVO.V GN GN GN UH VG_ VSSG_ V_SYN.V GN.V GN GN GN +.V_GMH VTX_LVS GN EXTERNL GN.V INTERNL +.V +V +.V U_ L UH_ + U_ EMI FILTER KPHS-T(,.) L L KPHS-T_ U_ L U_ V.M_MPLL_R +.V.U_.U_.U_.U_ +V_TV_ KPHS-T_ N_ N_ +V_TV_ R._ +.V U_ KPHS-T_ + U_ N_ R _ R *_ R *_ R *_ R _.U_.U_ *U_ R _ +V.U_ *U_ +.V +.V.U_ R _ U_ P_.U_ U_ R *_ +V_V_RT_ +V_V G +.V_V_PLL +.V_V_PLL +.VM_V_HPLL +.VM_V_MPLL +.VSUS_V_TX_LVS +V_V_PEG_G +.V_V_PEG_PLL +.VM_V_SM +.VM_MH_V_HPLL +.V_V_PEG_PLL +.V_V_XF +.V_V_MI +.VSUS_V_SM_K +V._SMK_R *U_ U_.U_ +.VSUS_V_TX_LVS L UH_ +.VM_V_SM_K V_TX_LVS V_SM_K_ V_SM_K_ +V_V_HV + V_HV_ V_TV V_HV_ P_ U_ V_TV V_TV V_TV V_PEG_ W V_TV V_PEG_ W +V_PEG R *_ V_TV V_PEG_ V V_PEG_ V R _ +.V_V_RT V_PEG_ M +.V_V_TV V_RT L V_TV H +.V_V_Q V_RXR_MI_ N H V_Q V_RXR_MI_ L N_ R _.U_ KPHS-T_ R.U_ J H L M K K U W V U U U T T T T T R R N U J H VSYN V_RT V_RT V G VSS G V_PLL V_PLL V_HPLL V_MPLL V_LVS VSS_LVS V_PEG_G VSS_PEG_G V_PEG_PLL V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_NTF_ V_SM_NTF_ V_HPLL V_PEG_PLL V_LVS_ V_LVS_ RESTLINE_p RT PLL K SM PEG LVS POWER TV TV/RT LVS X XF SM K MI PEG VTT HV VTTLF VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_NTF V_XF_ V_XF_ V_XF_ V_MI V_SM_K_ V_SM_K_ V_SM_K_ V_SM_K_ VTTLF VTTLF VTTLF U U U U U U U U U U T T T T T T T T T R R R T U U T T T R J K K J J F H +.V_X.U_.U_.U_.U_ U_.U_.U_ *U_ U_ U_.U_.U_ U_ : (/) Remove R ohm R _ L.U_ R _ R _ R _ U_ UH_ + + U_ +.V L U_ +.V +.V +.V (/): Short R +.VSUS_GMH nh U_ +.V <FE> V_RXR_MI and V_PEG connect to+.v +.VSUS _.U_ +V.S_PEGPLL_F +.V R _ U_ : (/) Remove +V_RXR_MI.U_ N_ +.VSUS R _ +.V_V_LVS +.V PZ.+.V_S R +V_V_HV R _ :(/) INTEL R V_Q Filter Modification: change L to R(ohm), change R(* ohm) to (uf).u_ N_ U_ U_ *U_ +V <R> +.V N +.M shall be +.V for alero Interposer _ R _.U_ PROJET : ZU Quanta omputer Inc. Size ocument Number Rev GMH Power-( of ) PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn Thursday, November, ate: Sheet of

VSS_GMH_R VSS_GMH_T VSS_GMH_T VSS_GMH_T Size ocument Number Rev ate: Sheet of GMH Power-( of ) Thursday, November, N(Power-) Quanta omputer Inc. PROJET : ZU VSS UJ RESTLINE_p VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ E VSS_ E VSS_ E VSS_ E VSS_ E VSS_ E VSS_ F VSS_ F VSS_ F VSS_ F VSS_ F VSS_ G VSS_ G VSS_ G VSS_ G VSS_ G VSS_ G VSS_ G VSS_ G VSS_ G VSS_ G VSS_ G VSS_ G VSS_ H VSS_ H VSS_ H VSS_ H VSS_ J VSS_ J VSS_ J VSS_ J VSS_ J VSS_ J VSS_ J VSS_ J VSS_ K VSS_ K VSS_ K VSS_ L VSS_ L VSS_ L VSS_ L VSS_ L VSS_ L VSS_ L VSS_ L VSS_ M VSS_ M VSS_ M VSS_ M VSS_ M VSS_ M VSS_ M VSS_ N VSS_ N VSS_ N VSS_ N VSS_ N VSS_ N VSS_ N VSS_ N VSS_ N VSS_ N VSS_ P VSS_ P VSS_ P VSS_ P VSS_ P VSS_ R VSS_ T VSS_ T VSS_ T VSS_ U VSS_ U VSS_ U VSS_ W VSS_ W VSS_ W VSS_ W VSS_ W VSS_ W VSS_ Y VSS_ Y VSS_ Y VSS_ V VSS_ V VSS_ Y VSS_ Y VSS_ Y VSS_ Y VSS_ Y VSS_ P VSS_ T VSS_ T VSS_ T VSS_ R VSS_ VSS_ VSS_ VSS_ F VSS_ F VSS_ T VSS_ V VSS_ H R _ VSS UI RESTLINE_p VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ E VSS_ E VSS_ E VSS_ F VSS_ F VSS_ F VSS_ F VSS_ G VSS_ G VSS_ G VSS_ G VSS_ G VSS_ H VSS_ H VSS_ H VSS_ H VSS_ H VSS_ J VSS_ J VSS_ J VSS_ J VSS_ J VSS_ J VSS_ J VSS_ J VSS_ J VSS_ K VSS_ K VSS_ K VSS_ K VSS_ K VSS_ K VSS_ L VSS_ M VSS_ M VSS_ M VSS_ M VSS_ M VSS_ M VSS_ N VSS_ N VSS_ N VSS_ N VSS_ N VSS_ N VSS_ P VSS_ P VSS_ P VSS_ R VSS_ R VSS_ R VSS_ R VSS_ R VSS_ R VSS_ T VSS_ T VSS_ T VSS_ T VSS_ W VSS_ W VSS_ W VSS_ W VSS_ W VSS_ W VSS_ Y VSS_ Y VSS_ Y VSS_ Y VSS_ Y VSS_ Y VSS_ Y VSS_ Y VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ E VSS_ E VSS_ E VSS_ E VSS_ E VSS_ E VSS_ E VSS_ F VSS_ F VSS_ F VSS_ G VSS_ G VSS_ G VSS_ G VSS_ G VSS_ G VSS_ G VSS_ G VSS_ H VSS_ H VSS_ H VSS_ H VSS_ H VSS_ J VSS_ J VSS_ J VSS_ J VSS_ J VSS_ J VSS_ K VSS_ K VSS_ K VSS_ K VSS_ U VSS_ U VSS_ U VSS_ U VSS_ U VSS_ U VSS_ U VSS_ V VSS_ V VSS_ W VSS_ W VSS_ K VSS_ K VSS_ K VSS_ L VSS_ L VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ K VSS_ K VSS_ L VSS_ L VSS_ L VSS_ L VSS_ VSS_ VSS_ R _ R _ R _ PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn

Strap table ll strap are sampled with respect to the leading edge of the GMH Power OK(PWROK) Signal FG[:] Have internal Pull-up FG[:] Have internal Pull-down ny FG signal strapping option not list below should be left N Pin Pin Name Strap description onfiguration FG[:] FS Frequency Select = FS MHz = FS MHz FG[:] FG MI X Select = MI X = MI X(efault) FG FG PU Strap = = Mobile PU(efault) FG Low power PI Express = Normal mode = Low Power mode FG PI Express Graphics Lane Reversal = Reverse Lanes = Normal operation(efault) FG[:] FG[:] XOR/LLZ = = XOR Mode Enable = ll-z Mode Enabled = Normal operation(efault) FG[:] FG FS ynamic OT = ynamic OT disable = ynamic OT Enable(efault) FG[:] SVO_TRLT SVO Present = No SVO ard present(efault) = SVO ard Present FG MI Lane Reversal = Normal operation(efault) = Reverse Lanes FG SVO/PIe concurrent = Only SVO or PIE x is operation(efault) = SVO and PIE x are operating simultaneously via the PEG port MI X Select MI Lane Reversal XOR /LLz /lock Un-gating PI Express Graphics SVO Present MH_FG_ Low = MIX High = IMIX(efault) MH_FG_ Low = Normal operation(efault) High = Reverse Lane MH_FG_MH_FG_ onfiguration lock gating disable MH_FG_ Low = Reverse Lane High = Normal operation(efault) Strap define at External VI control page MH_FG_ +V XOR Mode Enable MH_FG_ R *.K_ R *.K_ LL-z Mode Enable Normal operation(efault) R *.K_ FS ynamic OT MH_FG_ SVO/PIE oncurrent operation MH_FG_ Low = OT isable High = OT Enable(efault) MH_FG_ Low = Only SVO or PIE X is operational(efault) High = SVO andpie X are operating simultaneously via the PEG port MH_FG_ +V MH_FG_ MH_FG_ R *.K_ R *.K_ R *.K_ R *.K_ PROJET : ZU Quanta omputer Inc. MH_FG_ Size ocument Number Rev GMH Strap( of ) PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn Thursday, November, ate: Sheet of

R ual channel / PU RII HNNEL M [..] M [..] M [..], M [..], RII HNNEL SMR_VTERM SMR_VTERM.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_ Place one cap close to every pull-up resistor terminated to SMR_VTERM M M RP X SMR_VTERM M M RP X M M RP X SMR_VTERM M M RP X,, M_KE M S# RP X, M_KE M RP X,, M S# M_OT RP X M M RP X,, M_OT M_S# RP X,, M S# M_KE RP X, M S# M RP X, M S# M RP X,, M WE# M_S# RP X,, M RS# M_S# RP X, M S# M RP X SMR_VTERM,, M WE# M S# RP X M M RP X, M_KE M RP X, M S# M RP X,, M_S# M RS# RP X M M RP X, M_OT M RP X M M RP X, M_OT M RP X M M RP X M M RP X INTEL FE (/) M FOR UL LYERS RM,, M M R _ R _ SMR_VTERM PROJET : ZU Quanta omputer Inc. PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn Size ocument Number Rev R RES. RRY ate: Thursday, November, Sheet of

M M M M QS M QS# M M Q M M M Q M Q M QS M Q M M Q M M M M QS# M QS M Q M Q M M M M M M M Q M QS# M Q M M M Q M Q M Q M M Q M Q M QS# M M Q M M Q M Q M Q M Q M Q M QS M Q M Q M QS M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M QS# M QS M Q M Q M Q M Q M Q M Q M QS# M Q M Q M Q M Q M QS# M QS M QS# M Q M Q M Q M Q M Q M Q M M M M QS M QS# M M Q M M M M M Q M Q M QS M Q M M Q M M M M QS# M M QS M Q M Q M Q M M M M M M M Q M QS M QS# M Q M M M Q M Q M Q M M Q M Q M QS# M M Q M M Q M Q M Q M Q M Q M M M Q M Q M Q M QS M Q M Q M Q M QS M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M QS# M QS M Q +V M Q M Q M Q M Q M Q M QS# M Q M Q M Q M Q M Q M QS# M QS M QS# M Q M Q M Q M Q M Q M Q M Q M M M Q M QS M Q M Q M Q M M M Q M Q M Q M Q M Q M Q M Q M Q M M M M M Q M Q M Q M Q M Q M M M M RLK_SM RT_SM RT_SM +V M RLK_SM RLK_SM RT_SM M Q[..] M M[..] M Q[..] M M[..] M [..], M [..], M WE#, M QS#[..] M QS[..] M_S#, M S#, M_S#, M QS#[..] M S#, M_OT, M_OT, M_LK_R M_LK_R# M RS#, M QS[..] M S#, M WE#, M_S#, M S#, M_S#, M S#, M_OT, M_OT, M_LK_R M_LK_R# M RS#, M_KE, M_KE, M_KE, M S#, M_KE, M S#, M_LK_R# M_LK_R M_LK_R# M_LK_R PM_EXTTS# M S#, PM_EXTTS# PLK_SM,,,, PT_SM,,,, M, M, SMR_VREF_IMM +V +.VSUS SMR_VREF_IMM +V SMR_VREF_IMM +V +.VSUS +.VSUS +.VSUS +.VSUS +.VSUS +.VSUS +.VSUS +V SMR_VREF_IMM +.VSUS SMR_VREF_IMM +V +V SMR_VREF Size ocument Number Rev ate: Sheet of R SO-IMM(P) Thursday, November, LOK, LOK, KE, KE, H:.mm H:.mm SO-IMM SP ddress is x SO-IMM TS ddress is x SO-IMM SP ddress is x SO-IMM TS ddress is x R ual channel / ONN lose to IMM lose to IMM INTEL FE (/) M FOR UL LYERS RM INTEL FE (/) M FOR UL LYERS RM :(/) no stuff R, stuff R,R.U_ R K_.U_.U_ R K_.U_ R K_.U_ R K_ Quanta omputer Inc. PROJET : ZU.U_ + U_.U_.U_.U_.U_.U_.U_.U_.U_.U_.U_ R K_.U_ P R SRM SO-IMM (P) N FOX_S-NRN-F VREF VSS Q Q VSS QS# QS VSS Q Q VSS Q Q VSS QS# QS VSS Q Q VSS VSS Q Q VSS QS# QS VSS Q Q VSS Q Q VSS M N VSS Q Q VSS KE V N _ V V V /P WE# V S# S# V OT VSS Q Q VSS QS# QS VSS Q Q VSS Q Q VSS Q Q VSS M VSS Q Q VSS Q Q VSS M VSS K K# VSS Q Q VSS VSS Q Q VSS N M VSS Q Q VSS Q Q VSS QS# QS VSS Q Q VSS KE V V V V RS# S# V OT V N VSS Q Q VSS M VSS Q Q VSS Q Q VSS VSS M VSS Q Q VSS Q Q VSS NTEST VSS QS# QS VSS Q Q Q Q VSS M VSS Q Q VSS S SL V(SP) QS# QS VSS Q Q VSS Q Q VSS K K# VSS M VSS Q Q VSS Q Q VSS QS# QS VSS Q Q VSS S S VSS.U_ Q RHUN.U_.U_.U_.U_ + U_.U_.U_ R *_.U_.U_ Q RHUN R K_ P R SRM SO-IMM (P) N FOX_S-NRN-F VREF VSS Q Q VSS QS# QS VSS Q Q VSS Q Q VSS QS# QS VSS Q Q VSS VSS Q Q VSS QS# QS VSS Q Q VSS Q Q VSS M N VSS Q Q VSS KE V N _ V V V /P WE# V S# S# V OT VSS Q Q VSS QS# QS VSS Q Q VSS Q Q VSS Q Q VSS M VSS Q Q VSS Q Q VSS M VSS K K# VSS Q Q VSS VSS Q Q VSS N M VSS Q Q VSS Q Q VSS QS# QS VSS Q Q VSS KE V V V V RS# S# V OT V N VSS Q Q VSS M VSS Q Q VSS Q Q VSS VSS M VSS Q Q VSS Q Q VSS NTEST VSS QS# QS VSS Q Q Q Q VSS M VSS Q Q VSS S SL V(SP) QS# QS VSS Q Q VSS Q Q VSS K K# VSS M VSS Q Q VSS Q Q VSS QS# QS VSS Q Q VSS S S VSS R K_ R K_ PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn

RT VRT +VPU HH- VRT U_ HNGE FROM PF TO PF VRT_ HH- R K_ <check list> elay ~ms P_ R K_ +VPU N S_-L : (/) change RT ONN (follow Z) R R.K_ R K_.K_ VRT_ ST isable R M_ MOS Setting lear MOS Keep MOS R VRT_ G Short Open VRT_.onnect to GN: ST[:]RXp/n, STRIS, STRIS#, ST_LKP, STLKN.N: ST[:]TXp/n, STLE#.VccSTPLL should be connected directly to Vcc_,Filter cap are not required.ios disable K_ Q G *SHORT_P MMT U_ +V +V R *K_ ST_RXN ST_RXP ST_TXN ST_TXP R +.V_PIE *K_ Y RST_RY# RYON#.KHZ P_ Z_SIN Z_SIN ST_LE# LK_PIE_ST# LK_PIE_ST <check list> L<mils LK_KX LK_KX RTRST# : / Remove GLN R P_ P_ P_ P_ T T SM_INTRUER# IH_INTVRMEN LN_SLP GLN_OMP_S Z_LK Z_SYN Z_RST# Z_SIN Z_SIN Z_SOUT RST_RY# RYON# ST_LE# ST_RXN_ ST_RXP_ ST_TXN_ ST_TXP_ : (/) Remove ST/ST R R M_ *._._ ST_IS G F F F E H J J E J H H E E G F F F H H G G J J F F E E G G U RTX RTX RTRST# INTRUER# INTVRMEN LN_SLP GLN_LK LN_RSTSYN LN_RX LN_RX LN_RX LN_TX LN_TX LN_TX GLN_OK#/GPIO GLN_OMPI GLN_OMPO H_IT_LK H_SYN H_RST# H_SIN H_SIN H_SIN H_SIN H_SOUT H_OK_EN#/GPIO H_OK_RST#/GPIO STLE# STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP ST_LKN ST_LKP STRIS# STRIS IHM REV. IH LN / GLN RT IE PU LP ST FWH/L FWH/L FWH/L FWH/L FWH/LFRME# LRQ# LRQ#/GPIO GTE M# PRSTP# PSLP# FERR# PUPWRG/GPIO IGNNE# INIT# INTR RIN# NMI SMI# STPLK# THRMTRIP# TP S# S# IOR# IOW# K# IEIRQ IORY REQ E F G F G E F G F E G F E H G E V U V T V T T T R T V V U V U Y Y W W Y Y Y W LRQ# GTE H_PRSTP#_R H_PSLP#_R H_PWRG_R RIN# H_SMI#_R H_THERMTRIP_R IH_TP P P P P P P P P P P P P P P P P P P P L,, L,, L,, L,, LFRME#,, LRQ# T GTE H_M# R _ R _ R _ R _ PS# PS# R _ T P[:] P[:] PIOR# PIOW# PK# IRQ PIORY PREQ +.V_V_PU_IO R *._ R H_PWRG H_IGNNE# H_INIT# H_INTR RIN# H_NMI H_SMI# *._ H_STPLK# UR FE: RIN# OESN'T NEE PU RIN# GTE IH_PRSTP#,, H_PSLP# +.V_V_PU_IO R._ R Placement close S L<" +V +V R K_ +.V_V_PU_IO *_ R._ R.K_ H_FERR# PM_THRMTRIP#, : (/) RIN# PU K S Strap IH-M Internal VR Enable strap (Internal VR for Vccsus_,VccSus_ and VccL_) IH-M LN_SLP Strap (Internal VR for VccLN_ and VccL.) XOR hain Entrance Strap IH_RSV H_SOUT escription H : / base on Intel design guide, add it. Z_SOUT R _ Z_SOUT_UIO INTVRMEN Low = Internal VR disable High = Internal VR enable(efault) LN_SLP Low = Internal VR disable High = Internal VR enable(efault) RSV R _ Z_SOUT_M Enter XOR hain Z_SYN R _ Z_SYN_UIO Normal opration(efault) R _ Z_SYN_M Set PIE port config bit Z_LK R _ IT_LK_UIO VRT VRT +V R _ IT_LK_M R *K_ R _ IH_INTVRMEN : (/) hange INTVRMEN from PU to P R *K_ R _ LN_SLP : / isable the internal VR powering VccLN_, and VccL_ R *K_ Z_SOUT R *K_ IH_TP Z_RST# R _ Z_RST#_UIO, R _ Z_RST#_M PROJET : ZU Quanta omputer Inc. Size ocument Number Rev IHM HOST( of ) PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn Thursday, November, ate: Sheet of

S-PIE/US/MI PIE_RXN PIE_RXP PIE_TXN PIE_TXP to ocking PIE_RXN PIE_RXP to LN PIE_TXN PIE_TXP PIE_RXN PIE_RXP PIE_TXN PIE_TXP to WLN.U_ PIE_TXN_.U_ PIE_TXP_.U_ PIE_TXN_.U_ PIE_TXP_.U_ PIE_TXN_.U_ PIE_TXP_ : / remove SPI interface USO# USO# USO# USO# USO# USO# USO# USO# USO# USO# P P N N M M L L K K J J H H G G F F E E E F J G G E F G J H U PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN/GLN_RXN PERP/GLN_RXP PETN/GLN_TXN PETP/GLN_TXP SPI_LK SPI_S# SPI_S# SPI_MOSI SPI_MISO O# O#/GPIO O#/GPIO O#/GPIO O#/GPIO O#/GPIO O#/GPIO O#/GPIO O# O# PI-Express irect Media Interface SPI US MIRXN MIRXP MITXN MITXP MIRXN MIRXP MITXN MITXP MIRXN MIRXP MITXN MITXP MIRXN MIRXP MITXN MITXP MI_LKN MI_LKP MI_ZOMP MI_IROMP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USRIS# USRIS V V U U Y Y W W T T Y Y G G H H H H J J K K K K L L M M M M N N F F USP- USP+ USP- USP+ USP- USP+ US_RIS_PN MI_RXN MI_RXP MI_TXN MI_TXP MI_RXN MI_RXP MI_TXN MI_TXP MI_RXN MI_RXP MI_TXN MI_TXP MI_RXN MI_RXP MI_TXN MI_TXP LK_PIE_IH# LK_PIE_IH MI_IROMP_R +.V_PIE R._ USP- <R> USP+ USP- MI_IROMP_R<mils USP+ USP- USP+ USP- to ocking USP+ USP- to luetooth USP+ T :(/) Remove US T USP- to finger printer USP+ T :(/) Remove US T USP- to USP+ T T SWP Override strap PI_GNT# Low = swap override enabled High = efault GNT# R *K_ IHM REV. <R> US_RIS_PN<mils R._ S-PI RP +V,, [..] INT# INT# T T INT# INT# INT# INT# U E E G F E E E E F PI REQ# GNT# REQ#/GPIO GNT#/GPIO REQ#/GPIO GNT#/GPIO REQ#/GPIO GNT#/GPIO /E# /E# /E# /E# IRY# PR PIRST# EVSEL# PERR# PLOK# SERR# STOP# TRY# FRME# PLTRST# PILK PME# Interrupt I/F PIRQ# PIRQE#/GPIO PIRQ# PIRQF#/GPIO PIRQ# PIRQG#/GPIO PIRQ# PIRQH#/GPIO IHM REV. E F E F E G F G G F G F REQ# GNT# REQ# GNT# REQ# GNT# REQ# GNT# IRY# EVSEL# PERR# LOK# SERR# STOP# TRY# FRME# PLT_RST-R# PLK_IH INTE# INTF# INTG# INTH# R *_ REQ# GNT# REQ# GNT# REQ# GNT# E#,, E#,, E#,, E#,, IRY#,, PR,, PIRST#,, EVSEL#,, PERR#,, SERR#,, STOP#,, TRY#,, FRME#,, R _ PLK_IH PI_PME#,, INTE# U RT_SENSE#,, PLT_RST-R# TSHFU +V PLTRST#_N.U_ PLTRST#,,,,,,,, R K_ +V +V_S +V +V SERR# REQ# INTH# INT# INT#.KX +V_S RP USO# USO# USO# USO# USO# USO# USO# USO#.KX USO# R.K_ +V_S USO# R.K_ +V_S +V RP REQ# EVSEL# REQ# FRME# TRY# STOP# INTG#.KX +V RP LOK# IRY# INTE# PERR# INT# INTF# REQ# INT#.KX PROJET : ZU Quanta omputer Inc. Size ocument Number Rev IHM PIE( of )/ IOS Thursday, November, ate: Sheet of PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn

S-GPIO PLK_SM,,,, PLK_SM PT_SM NEW SM OF L,,,, PT_SM L_RST# L_RST# <FE> NEW L_RST# FOR WLN R STP_PI# PU is no stuff. :(/) no support imt, remove SM_LK_ME,SM_T_ME R STP_PU# always keeps high to +V ensure ME alive in M state. RI# (LK_MH_LK/# must keep alive to : (/) Remove RI# make ME work) I think there will be update for this design, LP_P# SYS_RST# I suggest you to keep PU and SYS_RST# isolation resistors for this signal. PM_MUSY# R R *K_ *K_ SM_LERT# MH_IH_SYN# PM_STPPI# PM_STPPU# : (/) change name from VR_PWRG_LKEN# to VR_PWRG_K# U VR_PWRG_K#,, LI# OKIN# : (/)change neme to OKIN# +V NSZ R _ LI# OR_I OR_I OR_I +V R R.U_ K_ S *K_ <check list> internal P R _ R _, LKRUN#, PIE_WKE#,,, SERIRQ THERM_LERT# KSMI# SI# : (/) Remove LN_PHYP : (/) Remove STLKREQ# RST_H# Z_SPKR IH_TP T T T PM_STPPI_IH# PM_STPPU_IH# LKRUN# PIE_WKE# SERIRQ THERM_LERT# VR_PWRG_LKEN IH_TP KSMI# OKIN#_R SI# GPIO IH_GPIO IH_GPIO IH_GPIO GPIO RST_H# IH_GPIO IH_GPIO Z_SPKR MH_IH_SYN#_R J G E F F G G E G H E F J J J J H E G H E G H G F J J J U SMLK SMT LINKLERT# SMLINK SMLINK RI# SUS_STT#/LPP# SYS_RESET# MUSY#/GPIO SMLERT#/GPIO STP_PI#/GPIO STP_PU#/GPIO LKRUN#/GPIO WKE# SERIRQ THRM# VRMPWRG TP TH/GPIO TH/GPIO TH/GPIO GPIO GPIO TH/GPIO GPIO GPIO SLOK/GPIO QRT_STTE/GPIO QRT_STTE/GPIO STLKREQ#/GPIO SLO/GPIO STOUT/GPIO STOUT/GPIO SPKR MH_SYN# TP IHM REV. SM ST GPIO SYS GPIO locks Power MGT MIS GPIO ontroller Link STGP/GPIO STGP/GPIO STGP/GPIO STGP/GPIO LK LK SUSLK SLP_S# SLP_S# SLP_S# S_STTE#/GPIO PWROK PRSLPVR/GPIO TLOW# PWRTN# LN_RST# RSMRST# K_PWRG LPWROK SLP_M# L_LK L_LK L_T L_T L_VREF L_VREF L_RST# MEM_LE/GPIO ME_E_LERT/GPIO E_ME_LERT/GPIO WOL_EN/GPIO J J F G G G G F H E J E H G E E J F E F F H J J J F G OR_I RYI RYI M_IH LKUS_ IH_SIO_K IH_PWROK PM_PRSLPVR_R PM_TLOW#_R NSWON# PM_LN_ENLE_R RSMRST#_R L_VREF_S L_VREF_S IH_GPIO : (/) Remove LN_WOL_EN circuit EMIL LE OUT THT IS TIVE LOW. EMIL_LE# M_IH LKUS_ T SLP_S# R _ SLP_S# R _ SLP_S# T : (/) Remove S_STT#, need be confirm? R _ NSWON# R _ K_PWRG MPWROK L_LK L_T L_RST# : (/) Remove ()ME_E_LERT# ()E_ME_LERT SIO/ P OES NOT NEE KHz PM_PRSLPVR PLTRST# SUS# SUS# L_LK L_T <FE> Since your PU VRM has no PRSTP# pin, connect PM_PRSLPVR to IMVP is correct PM_PRSLPVR, LKUS_ M_IH If no use internal LN M connect LN_RST# to PLTRST# Use internal LN M connect LN_RST# to RSMRST# : / change to PLTRST# should go high no sooner than ms after both VccLN_ and VccLN_ have reached their nominal voltages. PLTRST#,,,,,,,, :(/) need be confirm? Remove SUSM# used to control power planes to the Intel MT +V_S sub-system FOR ONTROLLER LINK L US R _ R.K_.U_ R *_ *P_ +V R *_ *P_ R.K_ R _.U_ :(/) change from +V to +VSUS +VSUS (Refer to Z).U_ ontroller Link VREF for IMT support only :(/) no support imt, remove N_MLK,N_MT,Q,Q,, ELY_VR_PWRGOO PWROK_E ELY_VR_PWRGOO PWROK_E U IH_PWROK R K_ TSHFU :(/) Refer to Z, dd IH_PWROK circuit +V_S INTEL R NEE THOSE PU & P. +V INTEL FE (/) "dd RSMRST# isolation (important!!! See ww Santa Rosa MoW)" +VSUS SYS_RST# No Reboot strap H_SPKR Low = efault High = No Reboot NSWON# IH_GPIO OKIN#_R PM_LN_ENLE_R INTEL R SHOW IT RSMRST#_R TO IH Q MMT RSMRST# FROM ur(e) +V :(/) change OKIN#_R PU from +V to +V_S +V Z_SPKR INTEL R: PU +V LI# KSMI# R R K_ K_ IOS/ ERI: UNSTUFF SI# IH_GPIO R K_ R R *K_ Internal Pull up R *K_ R.K_ R K_.K_ R K_ R *K_ V R K_ R K_ GPIO R THERM_LERT# R SERIRQ R LKRUN# R K_.K_ K_.K_ +V IH_GPIO IH_GPIO RST_H# RYI RYI PM_PRSLPVR R R R R R R K_ K_ K_.K_.K_ K_ INTEL R SHOW IT PM_LN_ENLE_R R ISLE LN: STUFF *_ R.K_ V +V_S IH_PWROK R K_ EN INTEL R V. L_RST# NO NEE PU. RI# L_RST# R R K_ *K_ oard I I I I I +V +V +V +V :(/) no support imt, remove PU +V_S circuit (R/R) PLK_SM PT_SM SM_LERT# PIE_WKE# PM_TLOW#_R GPIO R R R R R R.K_.K_ K_ K_.K_ K_ With EZ ock W/O EZ ock RSV RSV RSV R *K_ OR_I R K_ R *K_ OR_I R K_ R *K_ OR_I R K_ R *K_ OR_I R K_ PROJET : ZU Quanta omputer Inc. Size ocument Number Rev IHM GPIO( of ) Thursday, November, ate: Sheet of PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn

+V.S_VPORE_IH +.V_S VMIPLL_IH +.V_MI +V._ST_IH +V.S_IE_IH +V_.V_H_IO_IH TP_VSUS IH_ TP_VSUS IH_ TP_VSUS IH_ TP_VSUS IH_ TP_VL IH +V._IH +V._US_IH +V.S_PI_IH +V.M_IH VL INT_IH +VREF_S +VREF_SUS_S +.V_US +.V_PLL +.V_ST +.V_ST TP_VLN IH_ TP_VLN IH_ +V_VLN +.V_VGLNPLL +V_GLN +V._MI_IH +VSUSH TP_VLN IH_ TP_VLN IH_ TP_VL IH TP_VSUS IH_ TP_VSUS IH_ TP_VSUS IH_ TP_VSUS IH_ +.V_PLL_RR +.V +.V +.V +.V +V +V +V_S VRT +V +V +V_S +V_S +.V +.V +V +.V +.V_PIE +V +.V_PIE +V +.V_V_PU_IO +V_S +.V +.V_S Size ocument Number Rev ate: Sheet of IHM Power( of ) Thursday, November, Intel use.uh inductor : (/) hange back R to ohm :(/) EMI suggest c from.u to uf :(/) change to +.V :(/) dd +.V_S R _.U_.U_.U_ R _.U_ U_.U_ R _ T U_.U_.U_ L FMJHS-T_.U_.U_.U_ U_ R _ UE IHM REV. VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] E VSS[] E VSS[] E VSS[] E VSS[] VSS[] E VSS[] E VSS[] E VSS[] E VSS[] F VSS[] F VSS[] F VSS[] F VSS[] F VSS[] G VSS[] G VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] F VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] J VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] E VSS[] E VSS[] E VSS[] E VSS[] F VSS[] E VSS[] F VSS[] F VSS[] F VSS[] G VSS[] E VSS[] G VSS[] G VSS[] G VSS[] G VSS[] G VSS[] G VSS[] G VSS[] H VSS[] H VSS[] H VSS[] H VSS[] H VSS[] J VSS[] J VSS[] J VSS[] J VSS[] J VSS[] J VSS[] K VSS[] K VSS[] K VSS[] K VSS[] K VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] L VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] M VSS[] N VSS[] N VSS[] N VSS[] N VSS[] N VSS[] N VSS[] N VSS[] N VSS[] N VSS[] N VSS[] N VSS[] N VSS[] N VSS[] N VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] P VSS[] R VSS[] R VSS[] R VSS[] R VSS[] R VSS[] R VSS[] R VSS[] R VSS[] R VSS[] R VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] T VSS[] U VSS[] U VSS[] U VSS[] U VSS[] U VSS[] U VSS[] U VSS[] U VSS[] U VSS[] U VSS[] U VSS[] V VSS[] V VSS[] V VSS[] V VSS[] W VSS[] W VSS[] W VSS[] Y VSS[] Y VSS[] Y VSS[] VSS_NTF[] VSS_NTF[] VSS_NTF[] VSS_NTF[] VSS_NTF[] H VSS_NTF[] H VSS_NTF[] J VSS_NTF[] J VSS_NTF[] J VSS_NTF[] J VSS_NTF[] VSS_NTF[] VSS[] VSS[] VSS[] VSS[] VSS[] U VSS[] K VSS[] W R _ L UH_ IN HIP UH +-% M TRMR R _ PZ. R _.U_ R _ U_.U_ L UH_ VMN T R _ U_.U_.U_ ORE VGP TX RX IE US ORE PI GLN POWER VP_ORE VPSUS VPUS UF IHM REV. VREF[] VREF[] T VREF_SUS G V [] V [] V [] V [] V [] V [] V [] V [] V [] E V [] E V [] E V [] F V [] F V [] G V [] H V [] H V [] J V [] J V [] K V [] K V [] L V [] L V [] L V [] M V [] M V [] N V [] N V [] N V [] P V [] P V [] R V [] R V [] R V [] R V [] T V [] T V [] T V [] T V [] T V [] U V_[] F VMIPLL R V [] E V [] F V [] G V [] H V [] J VSTPLL J V_[] V [] V [] V [] V [] V [] VUSPLL VLN_[] F VLN_[] G V_[] V_[] V_[] V_[] V_[] V_[] E V_[] F V_[] G V_[] L V_[] L V_[] L V_[] L V_[] L V_[] L V_[] M V_[] M V_[] P V_[] P V_[] T V_[] T VLN_[] F VLN_[] G VH VSUSH V_PU_IO[] V_PU_IO[] V_[] V_[] U V_[] V V_[] W V_[] W V_[] W V_[] Y V_[] V_[] V_[] V_[] V_[] V_[] V_[] V_[] E V_[] E V_[] F VRT VSUS_[] VSUS_[] VSUS_[] VSUS_[] G VSUS_[] H VSUS_[] P VSUS_[] P VSUS_[] VSUS_[] N VSUS_[] P VSUS_[] P VSUS_[] P VSUS_[] P VSUS_[] P VSUS_[] R VSUS_[] R VSUS_[] R V [] V [] V [] V [] V [] G V [] G VSUS_[] J VSUS_[] F V [] F V [] L V [] L V [] M V [] M VSUS_[] V_[] V [] W V_[] U V_[] V V_[] V V_[] V V_[] U V_[] V V_[] V V_[] V VGLN_[] VGLN_[] VGLN_[] VGLN_[] VGLN_[] VGLN_ VGLNPLL V_[] F V_[] V_[] E V_[] VSUS_[] R V [] H VSUS_[] V [] V [] VSUS_[] J V_MI[] E V_MI[] E VL_ G VL_[] G VL_[] F VL_ V [] W V [] V V [] U V [] Y V [] V V [] V R _ *.U_.U_ N_ U_.U_ R _.U_ R _ R _ R _ R _.U_ R _ R _ R _.U_ R _ + U_ U_ U_ T.U_.U_.U_.U_ R _ R *_ R _ U_ U_ PZ..U_ R *_.U_ R _ Quanta omputer Inc. PROJET : ZU U_.U_.U_.U_.U_ U_ L UH_ IN HIP UH +-% M TRMR PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn

Giga LN NM :(/) hange +V_LN_S to +V, PIE_WKE# +V_S Q TEU R.K_ PIE_WKE_R# VUX_ PIE_RXP PIE_RXN PIE_TXP PIE_TXN,,,,,,,, PLTRST# LK_PIE_LN LK_PIE_LN# :(/ M recommend) Pull up pin (Vmainprsnt) to the system main power (.v), but not the standby power. :(/) PULL up +V_S on S side : (/ M recommend) hange pull-up resistor value to -k. at pin (SM)LK) and pin (SM_T) as the SM-us isn't used..u-v_.u-v_.u-v_.u-v_ L L L L +V_S +V,,,,,,,, P-V_ P-V_.U-V_.U-V_ LMS_ LMS_ R _ PLK_SM PT_SM XTLO_R Y Mhz.U-V_.U-V_ LMS_ LMS_ VUX_ VUX_ R R.U-V_.U-V_.U-V_.U-V_.U-V_.U-V_.U-V_.U-V_ K_ K_ R _ VL.U-V_ GPHY_PLLV.U-V_ PIE_PLLV.U-V_ PIE_SS_V.U-V_ TXP_ TXN_ PIE_WKE_R# -LN_RST UX_PRES VM_PRES R.K_ LN_SM LN_SM XTLO XTLI VUX_ R +V_S U MMKMLG R V V V V V V : (/ M recommend) change to.k as default T N(LK_REQ#).U-V_.U-V_.K_ VL VL VL VL GPHY_PLLV PIE_PLLV PIE_V PIE_V PIE_GN VUXPRSNT VMINPRSNT LOW_PWR SM_LK SM_T XTLO XTLI R VIO VIO VIO VIO VIO +V_S.U-V_ MM mm X mm -Pin QFN GN.U-V_ VP VP Package ody.u-v_ VUX_ ISV XTLV V V V LINKLE# SPLE# SPLE# TRFFILE# GPIO S# SI M_SL LINKLE# # #.U-V_ URT_MOE GPIO_SERILI GPIO_SERILO SLK SI SO S# N/(ENERGY_ET) REGTL REGTL REG_GN XTLV LINKLE# # # LN_M_TLE# SI S# ISV V_F LN REGTL LN REGTL S S S M_WP M_RESET# M_SL M_S LN_M_LINKLE# VP+V).U-V_.U-V_.U-V_ T T T T T L L L.U-V_ R VUX_ LMS_ LMS_ LMS_ R *.K_.K_.K_ :(/) the chip already integrate internal terminators R : (/) Internal PU Q MMJT Q MMJT +V_S R.K_ M_S M_SL M_RESET# S# LN_REG_V.U-V_.U-V_ U/V_ TXN TXP TXN TXP TXN TXP TXN TXP VUX_.U-V_ U SI SK RESET# S#.U-V_ GN SO V WP# SI T-S(LN FLSH) M_WP U-.V_ +V_S VUX_ OKIN# : (/ M recommend) hange capacitance value from -uf to -uf..u_ U_ :(/) EMI suggest c from.u to uf +V_S.U-V_ +V_S VUX_ R K_ TXP TXN TXP TXN TXP TXN TXP TXN : (/) dd iode for isolation LN_M_TLE# LN_M_LINKLE# LN_OKIN# : to : to +V_S :(/) change from LN_M_TLE#, LN_M_LINKLE# to SYS_TLE#, SYS_LINKLE# +V_S : / chnage from MX to PIL L S LMS_.U-V_.U-V_.U-V_.U-V_ :(/) hange the pin name from GN to MGN LE LE LE SEL N +V_.V_LN TXP_SYS TXN_SYS +V_.V_LN TXP_SYS TXN_SYS +V_.V_LN TXP_SYS TXN_SYS +V_.V_LN TXP_SYS TXN_SYS R _ SYS_TLE# V V V V V V V PIL GN GN GN GN GN GN GN GN GN GN GN X-TXN X-TXP X-TXN X-TXN X-TXP X-TXP X-TXN X-TXP MGN U : (/) hange from +V_S to +V_LN_S GN GN GN NSP N LE LE LE LE LE LE R _ P-KV_ YELLOW P YELLOW_N RX+ TX+ RX+ PIE_TXP PIE_TXN PIE_RXP PIE_RXN WKE# PERST# REFLK+ REFLK- TR- TR+ TR- TR+ TR- TR+ TR- TR+ TT T+ T- TT T+ T- TT T+ T- TT T+ T- MT MX+ MX- MT MX+ MX- MT MX+ MX- MT MX+ MX- RX- RX- TX- TX- TX+ GN GN TXP_PR TXN_PR TXP_PR TXN_PR TXP_PR TXN_PR TXP_PR TXN_PR TXP_SYS TXN_SYS TXP_SYS TXN_SYS TXP_SYS TXN_SYS TXP_SYS TXN_SYS SYS_TLE# SYS_LINKLE# R _ to ocking TXP_PR TXN_PR TXP_PR TXN_PR TXP_PR TXN_PR TXP_PR TXN_PR LN_TLE# LN_LILE# :(/) dd SYS_TLE#, SYS_LINKLE# U PIL (LN SW) R _ R _ X-TXP X-TXN X-TXP X-TXN X-TXP X-TXN X-TXP X-TXN.U-V_.U-V_ P-KV_ R.K_ R *.K_ R.K_ R *.K_.U-V_ U-.V_ +V_S R _ SYS_LINKLE# MGN GREEN_P :(/) hange the pin name from GN to MGN in N. GREEN_N S# LN_REG_V R._ +V_S OP_--L R *_ VUX_ :dd diode for /M & M led control :(/) hange ONN (refer to Z) EEPROM Strapping SO SI S# SLK : (/ M recommend) in order to pull up / and Q pin to V_LN rail. c T PROJET : ZU Quanta omputer Inc. Size ocument Number Rev GigaLN (MM) / RJ Thursday, November, ate: Sheet of PF 文件使用 "pdffactory Pro" 试用版本创建 www.fineprint.cn