Microsoft PowerPoint - MTK RF Solutions
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1 MediaTek Wireless RF Solutions Vince Liu MediaTek Inc
2 Outline MTK GSM/GPRS RF HW Solution MT612X Functional Block and Feature Rx/Tx Architecture Hardware and Register Control L1 Driver Timing Control RF Application Schematic and Layout Rx/Tx Performance RF 2nd Source Component Qualification 2
3 MTK GSM/GPRS RF HW Solution MT612X Functional Block and Feature Rx/Tx Architecture Hardware and Register Control L1 Driver Timing Control RF Application Schematic and Layout Rx/Tx Performance 3
4 MTK GSM/GPRS RF HW Solution MTK MT6219 GSM/GPRS Baseband Flash+SRAM MCP MTK MT6305 PMIC RFMD 3146 PA MTK MT6129 RF Transceiver ( Integrated TXVCO, LPF) 4
5 MT612X GPRS Platform MTK MT612X RF Transceiver Low-IF Architecture Integrated TXVCO,, RF VCO Integrated TXLPF, SXLPF( ( need one exter nal capacitor) Internal Regulators Triple band LNAs(MT6120 Quad-band), Mixers, Frequency Synthesizer, etc QFN56 with 8mm*8mm Area: 425mm^2 BOM: R: 12, C: 33, L: 9, VCTCXO: 1, TRSW:1, SAW: 3, PA: 1, TRX: 1 PA Module 7mmx7mm Size Quad-band PA & Controller Area: 170mm^2 5
6 MTK GSM/GPRS RF HW Solution MT612X Functional Block and Feature Rx/Tx Architecture Hardware and Register Control L1 Driver Timing Control RF Application Schematic and Layout Rx/Tx Performance 6
7 MT612X Radio Transceiver Block Diagram SAW Capacitors M Vreg Vreg Vreg Control 3 BSI 3 wire Interface RF Test Port M SAW SAW Antenna Switch Module M M Loop Filter ~ Receiver Chain Synthesizer PLL OSC Analog IQ interface VAFC in LBTX HBTX PCSRX Band Control Lines LPF LPF Power Amplifier + TXVCO ~ ~ Loop Filter OPLL Modulator MT612X 26MHz out APC APC in TXEN TX band select 7
8 MT612X Functional Block 1 IQ Tx 3-wires Rx Sx BB TCVCXO 8
9 MT612X Functional Block 2 9
10 Feature Summary - Receiver Receiver Very low IF architecture ( No DC offset cancellation and calibration needed. Improves AM suppression and blocking rejection ) Quad band differential input LNA s for 850, 900, 1800, 1900MHz application ( 8 pins ) Fully integrated channel filter, no extra components required Maximum more than 100dB gain with 78dB gain control range Fast settling time of gain setting to support class12 (4Down/4Up/5sum) Image-reject mixers and filters to eliminate interference Analog IQ base-band output without external frequency conversion components 10
11 Feature Summary - Transmitter / Synthesizer Transmitter Hi-precision IQ modulator Translation Loop OPLL with SPURIOUS FREE Rx bands noise. Fully integrated TXVCO (128 sub-band to cover process and temperature variation) Fully integrated TXLPF Support Quad-bands operation ( 850, 900, 1800, 1900 ) Frequency synthesizer Single integrated, fully programmable fractional-n synthesizer Fully integrated wideband RF VCO : 1.7(850Rx) ~ 2.15(PCSTx)GHz Integrated 4 components of LPF (need one external cap. 1.5nF) Fast settling time suitable for multi-slot GPRS application Class 12. (4Rx or 4Tx) 11
12 Feature Summary - Aux. Part Build in low noise 3 Low-DropOuts for RF. No external regulator needed for transceiver. Multiplexed IQ interface with baseband. Reduced hardwire number Fully 3-wire control interface with simplified control registers, no try and error is needed. QFN (Quad-Flat Non-lead) package 56 pins Low Power consumption RX mode : 68mA (29mA without Synthesizer and RFVCO) TX mode : 120mA (77mA without TxVCO) Sleep mode : 10uA Clock reference output : 26MHz / 13MHz 0.35um BiCMOS process 12
13 MTK GSM/GPRS RF HW Solution MT612X Functional Block and Feature Rx/Tx Architecture Hardware and Register Control L1 Driver Timing Control RF Application Schematic and Layout Rx/Tx Performance 13
14 Receiver Very Low IF Architecture 14
15 Receiver GSM Band Example PCS MT612X Receiver Block Diagram Channel Filter and PGA IF Mixer 949MHz (Ch.70) DCS GSM Quadrature Generator 948.9MHz I Q 100KHz 3-wire control I Q I Q 100KHz 260 I Q AMPS RF Mixer 2 26MHz LO : MHz 15
16 Low-IF Receiver vs. Image Rejection 1 16
17 Low-IF Receiver vs. Image Rejection 2 C/I IRR= 32dB Image Rejection in low IF receiver will dominate the adjacent channel rejection performance. MT6129 provides good enough image rejection figure, IRR > 34dBc Channel Filter Rejection khz Offset +/- 200KHz Rejection 17dB High rejection channel filter design will prevent the saturation by interference Signal. DSP set point for analog baseband output can then be increased and down-fading margin is also increased. +/- 400KHz +/-600KHz +/-1.6MHz +/- 3MHz 40dB 62dB 80dB >100dB 17
18 Transmitter OPLL Architecture Down path Mod path Reference divider path PFD and Loop filter 18
19 Transmitter GSM Band Example TxVCO I Tx 904MHz (Ch.70) APD/ PFD/CP 113MHz QG Q 904MHz 1017MHz D2 / 2 from RFVCO D1 / 9 and /2 226MHz 113MHz LO : 2034MHz 19
20 Tx Frequency Plan Divider 11 is first priority IF fractional-n synthesizer fraction number < 400 ( 2MHz ), than it will change divider from divider 11 to divider 9 Divider Priority Lo frequency range D0 D1 D2 MHz GSM 2 11 or ~ DCS 1 11 or ~ PCS 1 11 or ~ Example: GSM band ARFCN Range TX Frequency (MHz) TXDIV9_11 LO Formula LO Frequency LO Frequency = 2 x (TX Frequency) x TXDIV / (TXDIV 1) 975 ~ ~ /11 2 x FTX x 11/ ~ ~ /9 2 x FTX x 9/ ~ ~ /11 2 x FTX x 11/10 0 ~ ~ /11 2 x FTX x 11/10 37 ~ ~ /9 2 x FTX x 9/8 46 ~ ~ /11 2 x FTX x 11/10 96 ~ ~ /9 2 x FTX x 9/8 105 ~ ~ /11 2 x FTX x 11/10 20
21 MTK GSM/GPRS RF HW Solution MT612X Functional Block and Feature Rx/Tx Architecture Hardware and Register Control L1 Driver Timing Control RF Application Schematic and Layout Rx/Tx Performance 21
22 Hardware Control Pin Description Name ENREG ENRFVCO VCXOCXR VCXOFRQ Setting Power off Regulator1 and 2 Power on Regulator 1 and 2 Power off RFVCO Power on RFVCO Select internal VCXO Description Select external TCVCXO Note: Connect to VCCVCXO Reference output buffer 13 MHz Reference output buffer 26 MHz Note: Connect to VCCVCXO 22
23 3-Wire Control Word CW0 & CW1 DATA BITS ADDRESS BITS D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A3 A2 A1 A0 POR VCO TXOPG[1:0] GPO R E G T [1 :0 ] SEL AFC[4:0] FLT0 DIEN SYN PW SYN C P[1:0] Name POR Setting 0 (default) 1 Description No software Power-On-Reset Software Power-On-Reset action D19 TRX D18 DATA BITS ADDRESS BITS D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A3 A2 A1 A0 N_INT[5:0] N_FRA[12:0] Name TRX Setting 0 (default) 1 Description Turn on receiver VCO buffers Turn on transmitter VCO buffers 23
24 Synthesizer Frequency Programming for Rx Mode 24
25 Example for Rx Mode 25
26 Synthesizer Frequency Programming for Tx Mode 26
27 Example for Tx Mode 27
28 3-Wire Control Word CW2 D18 P G A I[1 :0 ] D A T A B IT S ADDRESS BITS D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A3 A2 A1 A0 PGAT[3:2] PGAT[1:0] TXDIV 9_11 M O D E [2 :0 ] B A N D [1 :0 ] PGA[5:0] LN A GAIN Name Setting Description Name Setting Description TXDIV9_11 Name 0 (default) 1 Setting [0 0 0](default) Reference divider divide by 9 Reference divider divide by 11 Description Sleep mode BAND[1:0] [0 0] [0 1] (Default) [1 0] [1 1] Reserved GSM band DCS band PCS band MODE[2:0] [0 1 0] [0 0 1] [0 1 1] [1 0 0] Stand-by mode Warm-up mode Receive (Rx) mode Transmit (Tx) mode Name LNAGAIN Setting 0 1 (default) Low gain High gain Description [1 0 1] Reserved [1 1 0] [1 1 1] Reserved Reserved GainPGA = (1-PGA[5 :5]_setting) * 18 + (PGA[4 :0]_setting) * 2 (db) 28
29 Control State Diagram 29
30 MTK GSM/GPRS RF HW Solution MT612X Functional Block and Feature Rx/Tx Architecture Hardware and Register Control L1 Driver Timing Control RF Application Schematic and Layout Rx/Tx Performance 30
31 Timing Definition for Rx Window PR1 : disable PR2 : Set TRSW Mode (Rx mode) SR1 : Set PLL frequency ( TRx warm-up) SR2 : Set TRx RX Mode, gain setting 31
32 Rx Timing GSM example (ASM) 32
33 Timing Definition for Tx Window PT1 : Set PA Band Selection PT2 : Set TRSW Mode, PA Enable ST1 : Set PLL frequency ( TRx warm-up) ST2 : Set TRx TX Mode, Enable TXVCO 33
34 Tx Timing GSM Example ( PA ASM ) 34
35 Low Power Timing 3 ~ 4 Frames 35
36 MTK GSM/GPRS RF HW Solution MT612X Functional Block and Feature Rx/Tx Architecture Hardware and Register Control L1 Driver Timing Control RF Application Schematic and Layout Rx/Tx Performance 36
37 MT612X RF Application Schematic Tx output matching Antenna matching PA output matching Rx matching 37
38 MT612X Layout Guideline 38
39 RF Circuit Layout Layer1 39
40 RF Circuit Layout Layer2 40
41 RF Circuit Layout Layer3 41
42 RF Circuit Layout Layer4 42
43 MTK GSM/GPRS RF HW Solution MT612X Functional Block and Feature Rx/Tx Architecture Hardware and Register Control L1 Driver Timing Control RF Application Schematic and Layout Rx/Tx Performance 43
44 RF Specification - 1 Tx Path Frequency Error : 0.1ppm Phase Error Peak Phase Error : 20 degree RMS Phase Error : 5 degree ORFS (Output Radio Frequency Spectrum) 200KHz : -30dB 250KHz : -33dB 400KHz : -60dB 600KHz~1.8MHz : -60dB 44
45 RF Specification - 2 Switching Spectrum GSM PCL5 400KHz : -19dBm 600KHz : -21dBm 1.2MHz : -21dBm 1.8MHz : -24dBm DCS PCL0 400KHz : -22dBm 600KHz : -24dBm 1.2MHz : -24dBm 1.8MHz : -27dBm Rx Path Rx Sensitivity RBERII=2.4% 45
46 GSM Rx Performance GSM Band ETSI SPEC. Chapter Item Mode Unit NVNT Condition dbm % 14.2 Reference Sensitivity RA250 dbm RBERII, Ch70 HT100 TU50 Static dbm RBERIb, Ch70 dbm FER, Ch70 dbm RBERII, Ch70 dbm RBERIb, Ch70 dbm FER, Ch70 dbm RBERII, Ch70 dbm RBERIb, Ch70 dbm FER, Ch70 dbm RBERII, Ch70 dbm RBERIb, Ch70 dbm FER, Ch Usable Receiver Input Level Range EQ50 dbm BERII =3.25% 14.4 Co-channel Rejection 14.5 Adjacent Channel Rejection TU3/Non hopping dbc Wanted=-82dBm, RBERII dbc Wanted=-82dBm, RBERIb dbc Wanted=-82dBm, FER +200K, RBERII dbc Wanted=-82dBm and interferer TU50 fading +200K, RBERIb dbc K, FER dbc K, RBERII dbc K, RBERIb dbc K, FER dbc K, RBERII dbc K, RBERIb dbc K, FER dbc K, RBERII dbc K, RBERIb dbc K, FER dbc Wanted=-82dBm TU50 fading, Interferer static 46
47 GSM Rx Performance DCS Band ETSI SPEC. Chapter Item Mode Unit NVNT Condition dbm % 14.2 Reference Sensitivity RA130 dbm RBERII, Ch700 HT100 TU50 Static dbm RBERIb, Ch700 dbm FER, Ch700 dbm RBERII, Ch700 dbm RBERIb, Ch700 dbm FER, Ch700 dbm RBERII, Ch700 dbm RBERIb, Ch700 dbm FER, Ch700 dbm RBERII, Ch700 dbm RBERIb, Ch700 dbm FER, Ch Usable Receiver Input Level Range EQ50 dbm BERII =3.25% 14.4 Co-channel Rejection TU1.5/Non hopping dbc Wanted=-82dBm, RBERII 14.5 Adjacent Channel Rejection dbc Wanted=-82dBm, RBERIb dbc Wanted=-82dBm, FER +200K, RBERII dbc Wanted=-82dBm and interferer TU50 fading +200K, RBERIb dbc K, FER dbc K, RBERII dbc K, RBERIb dbc K, FER dbc K, RBERII dbc K, RBERIb dbc K, FER dbc K, RBERII dbc K, RBERIb dbc K, FER dbc Wanted=-82dBm TU50 fading, Interferer static 47
48 GPRS Rx Performance GSM Band Test Channel CScheme Fading Spec Blocks Level Result P/F FBLER CS1 STATIC Pass FBLER CS2 STATIC Pass FBLER CS3 STATIC Pass FBLER CS4 STATIC Pass FBLER CS1 TU_High Pass FBLER CS2 TU_High Pass FBLER CS3 TU_High Pass FBLER CS4 TU_High Pass FBLER CS1 RA Pass FBLER CS2 RA Pass FBLER CS3 RA Pass FBLER CS1 HT Pass FBLER CS2 HT Pass FBLER CS3 HT Pass USF CS1 STATIC Pass USF CS2 STATIC Pass USF CS3 STATIC Pass USF CS4 STATIC Pass USF CS1 TU_High Pass USF CS2 TU_High Pass USF CS3 TU_High Pass USF CS4 TU_High Pass USF CS1 RA Pass USF CS2 RA Pass USF CS3 RA Pass USF CS4 RA Pass USF CS1 HT Pass USF CS2 HT Pass USF CS3 HT Pass 48
49 GPRS Rx Performance GSM Band FBLER CS1 TU_Low Pass FBLER CS2 TU_Low Pass FBLER CS3 TU_Low Pass FBLER CS4 TU_Low Pass FBLER CS1 TU_High Pass FBLER CS2 TU_High Pass FBLER CS3 TU_High Pass FBLER CS4 TU_High Pass FBLER CS1 RA Pass FBLER CS2 RA Pass FBLER CS3 RA Pass USF CS1 TU_Low Pass USF CS2 TU_Low Pass USF CS3 TU_Low Pass USF CS4 TU_Low Pass USF CS1 TU_High Pass USF CS2 TU_High Pass USF CS3 TU_High Pass USF CS4 TU_High Pass USF CS1 RA Pass USF CS2 RA Pass USF CS3 RA Pass USF CS4 RA Pass 49
50 GPRS Rx Performance DCS Band Chapter Channel CScheme Fading Spec Blocks Level Swp Result P/F FBLER CS1 STATIC N 0 Pass FBLER CS2 STATIC N 0 Pass FBLER CS3 STATIC N 0 Pass FBLER CS4 STATIC N 0 Pass FBLER CS1 TU_High N Pass FBLER CS2 TU_High N Pass FBLER CS3 TU_High N Pass FBLER CS4 TU_High N Pass FBLER CS1 RA N Pass FBLER CS2 RA N Pass FBLER CS3 RA N Pass FBLER CS1 HT N Pass FBLER CS2 HT N Pass FBLER CS3 HT N Pass FBLER CS3 STATIC N 0 Pass FBLER CS3 STATIC N 0 Pass FBLER CS3 STATIC N 0 Pass USF CS1 STATIC N 0 Pass USF CS2 STATIC N 0 Pass USF CS3 STATIC N 0 Pass USF CS4 STATIC N 0 Pass USF CS1 TU_High N Pass USF CS2 TU_High N Pass USF CS3 TU_High N Pass USF CS4 TU_High N Pass USF CS1 RA N Pass USF CS2 RA N Pass USF CS3 RA N Pass USF CS4 RA N 0.01 Pass USF CS1 HT N Pass USF CS2 HT N Pass USF CS3 HT N Pass USF CS4 HT N Pass 50
51 GPRS Rx Performance DCS Band FBLER CS1 TU_Low N Pass FBLER CS2 TU_Low N Pass FBLER CS3 TU_Low N Pass FBLER CS4 TU_Low N Pass FBLER CS1 TU_High N Pass FBLER CS2 TU_High N Pass FBLER CS3 TU_High N Pass FBLER CS4 TU_High N Pass FBLER CS1 RA N Pass FBLER CS2 RA N Pass FBLER CS3 RA N Pass USF CS1 TU_Low N Pass USF CS2 TU_Low N Pass USF CS3 TU_Low N Pass USF CS4 TU_Low N Pass USF CS1 TU_High N Pass USF CS2 TU_High N Pass USF CS3 TU_High N Pass USF CS4 TU_High N Pass USF CS1 RA N Pass USF CS2 RA N Pass USF CS3 RA N Pass USF CS4 RA N Pass 51
52 Rx GSM/DCS Static Sensitivity GSM Static BER vs. ARFCN DCS Static BER vs. ARFCN 52
53 Tx Performance Phase Error in GSM Band MT612X + MT6218 solution, ETSI 13.1 Phase Error RMS < 5 deg., Peak < 20 deg. deg GSM Phase Error - NTNV channel RMS Max Peak Max RMS Average Peak Average
54 MT612X + MT6218 solution, ETSI 13.1 Frequency Error < 90Hz (0.1ppm) Max GSM Frequency Error - NTNV Average 45 Hz Tx Performance Freq. Error in GSM Band channel 54
55 MT612X + MT6218 solution, ETSI 13.1 Phase Error RMS < 5 deg., Peak < 20 deg. deg Tx Performance Phase Error in DCS Band DCS Phase Error - NTNV channel RMS Max Peak Max RMS Average Peak Average
56 MT612X + MT6218 solution, ETSI 13.1 Frequency Error < 180Hz (0.1ppm) Max DCS Frequency Error - NTNV Average 90 Hz Tx Performance Freq. Error in DCS Band channel 56
57 ORFS in Extreme Condition in GSM/DCS Band GSM Band Offset\Cond Normal HTHV HTLV HTNV LTHV LTLV LTNV 200KHz KHz KHz KHz KHz KHz KHz Above DCS Band Offset\ Cond Normal HTHV HTLV HTNV LTHV LTLV LTNV 200KHz KHz KHz KHz KHz KHz KHz Above 57
58 Tx Performance Rx Band Noise G2G, G2D GSM to GSM Ref -20 dbm * Att 0 db * RBW 100 khz * VBW 100 khz SWT 10 ms Marker 1 [T1 ] dbm MHz GSM to DCS Ref -20 dbm * Att 0 db * RBW 100 khz * VBW 100 khz SWT 10 ms Marker 1 [T1 ] dbm GHz 1 SA VIEW -20 Offset 7 db Marker 2 [T1 ] dbm MHz A Marker 3 [T1 ] GAT 1 SA dbm TRG VIEW MHz LVL -20 Offset 7 db A GAT TRG LVL PRN 1-60 PRN SWP 100 of 100 SWP 100 of Center MHz 3.5 MHz/ Span 35 MHz -120 Center GHz 7.5 MHz/ Span 75 MHz Date: 6.MAR :06:32 Date: 6.MAR :13:40 58
59 Tx Performance Rx Band Noise D2G, D2D DCS to DCS Ref -19 dbm -20 Offset 8 db * Att 0 db * RBW 100 khz * VBW 100 khz SWT 10 ms Marker 1 [T1 ] dbm GHz DCS to GSM Ref -19 dbm * Att 0 db -20 Offset 8 db * RBW 100 khz * VBW 100 khz SWT 10 ms 1 SA VIEW A 1 SA GAT VIEW TRG LVL A GAT TRG LVL PRN -60 PRN -70 SWP of SWP 100 of Center GHz 7.5 MHz/ Span 75 MHz Start 925 MHz 3.5 MHz/ Stop 960 MHz Date: 6.MAR :12:05 Date: 6.MAR :34:48 59
60 Transceiver Performance Summary Technology Package Rx/Tx Mode Cur. 68/120mA All bands Rx NF 4/4/5.5/5.5dB All bands Rx IIP2 44/44/26/26dBm All bands, static Tx Phase Error Tx ORFS 0.35µm BiCMOS 56-pin QFN 1.5/1.5/1.7/2 All bands, rms 5/5/5.5/6 All bands, peak All bands, RBW=30kHz All bands, RBW=100kHz All bands, RBW=100kHz Tx Output Power > 5dBm All bands Sx Locking Time < 180µs All bands, error < 1kHz All numbers are listed in 850/900/1800/1900MHz order. 60
61 MT612X RF Transceiver Benefits Low Rx power consumption to ensure long standby time Ease of use with universal baseband interface Designed and fabricated in Taiwan Cost and time effective to the market MediaTek full support Real time system application support in Taiwan Full baseband and software team support Mass production ready Q Fully FTA proven with low design risk 61
62 MTK GSM/GPRS RF HW Solution MT612X Functional Block and Feature Rx/Tx Architecture Hardware and Register Control L1 Driver Timing Control RF Application Schematic and Layout Rx/Tx Performance RF 2nd Source Component Qualification 62
63 RF 2 nd Source Component Qualification RF SAW Return Loss from Antenna (S11 parameter) Rx Sensitivity Attenuation Performance Blocking Test ASM (Antenna Switch Module) Rx Sensitivity Tx Output Power Tx Harmonic for High Order Term Isolation VCTCXO Frequency Error Phase Error (Peak, RMS) ORFS (200K, 400K, 800K, 1.8MHz) In Extreme Condition 63
64 Antenna Switch Module ASM Components List Company Bnad Size Used Project Part No. Qualification Dual 5.4x4.0 KLM SHS-M090C OK Hitachi Metal Triple 5.4x4.0 SHS-M090TK OK Triple 4.5x3.2 Cannon+ SHS-C085TK OK Murata Dual Triple 5.4x x4.0 FP2120 Chicago LMSP54AA-097 LMSP-0043TEMP OK OK Daul 5.4x4.0 Bull600 ASM T-2406 OK (by Kevin) TDK Triple 5.4x4.0 Bull100 ASM-2419 OK (by Kevin) Triple 4.5x3.2 Bull888 ASM T-2510A OK (by Kevin) 64
65 RF SAW Filter RF SAW Components List Company Bnad Part No. Size Impedence Qualification GSM B7820 5pin 2.0x OK EPCOS DCS B7821 5pin 2.0x OK PCS B7825 5pin 2.0x OK GSM H942MS1 5pin 2.0x OK (by JP) SEMCO DCS HG42JS1 5pin 2.0x OK (by JP) PCS SFHG60PS101 5pin 2.0x OK but need re-matching (by JP) Temex GSM DCS TMXS004 TMXS005 5pin 2.0x1.4 5pin 2.0x OK (by JP) OK (by JP) GSM FAR-F5EB-942M50-B28E 5pin 2.0x OK but need re-matching (by Kevin) Fujitsu DCS FAR-F6E8-1G8425-B2BG 5pin 2.0x OK but need re-matching (by Kevin) PCS FAR-F6EB-1G9600-B2BE 5pin 2.0x OK (by JP) GSM EFCH942MTCA7 5pin 2.0x OK but need re-matching (by JP) Panasonic DCS EFCH1842TCA7 5pin 2.0x OK but need re-matching (by JP) PCS EFCH1960TCA7 5pin 2.0x OK (by JP) 65
66 VCTCXO 26MHz 26MHz VCTCXO Components List Company Size Part No. TEW 5.0x3.2 TTS14VA-26Mhz 3.2x2.5 TTS18VSA-A5-26Mhz Kyocera 5.0x3.2 KT18B-ECU27A M-T 3.2x2.5 KT21P-DCU28A M-T KDS 5.0x3.2 DSA535SB-1XTQ26000RDA 3.2x2.5 DSA321SA-1XTV26000RCA 5.0x3.2 TOB2600DPI4CNB SEMCO 3.2x2.5 TOH2600DPI4KRD 3.2x2.5 TOH2600DPM4DKA Murata 5.0x3.2 HFX323QN26M0A1 3.2x2.5 HFX423QN26M0A3 Toyocom 3.2x2.5 TCO-5871 HDK 3.2x2.5 VT-R32250FR NDK 3.2x2.5 ENG3049A Delta 3.2x2.5 V26.00Y2C3 Qualification OK OK OK(by JP) OK(by JP) OK (by JP) OK (by JP) OK (by JP) OK (by JP) OK (by JP) OK (by JP) OK (by JP) OK (by JP) OK (by JP) OK (by JP) OK (by JP) 66
67 Thank You 67
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