Thurman UM chematics ocument ufp Mobile Merom Intel restline-m + IHM 00-- REV : - (ELL:00) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM ize ocument Number Rev OVER PE - ate: Friday, January, 00 heet of
Thermal ensor EM00 RT L HMI LINE OUT / HP MI IN igital MI LINE OUT / HP INT. PKR * Mus HMI L PIF igital MI amera ZLI lock enerator YLFX T H O ay Headphone MP. MX0 zalia OE T 0 Headphone MP. MX IL L Module R T LV VO PT IE ZLI IO PI FLH Mb K Int. K Touch M EE0 Pad Intel Mobile PU Merom M F:/ 00 Mhz HOT U,,0,,,, PI Express ports () High efinition udio T / 00 T () PI PI 0,,,, PI F /00MHz restline-m TL+ PU I/F R Memory I/F EXTERNL RHPI MI x Intel IH-M Enhanced U.0/. ports (0) LP I/F PI. PI/PI RIE LP E M ME0 P/ Thurman UM lock iagram RII /MHz RII /MHz -LINK0 PI U PI Express () U.0 () IO Expander M EE0 IR Project code:.0.00 P P/N :0 REVIION : 00-PIN R OIMM UNUFFERE R OIMM ocket UNUFFERE R OIMM ocket Power witch Touch Pad Module PIE# U# U# U#0 U# PIE# U# PIE# PIE# U# iometric U# Ricoh R in card reader Express ard lot mm uletooth. U* left side Mini-ard 0.a/g/n LN M0 0/00 NI amera U* Right side Mini-ard WWN in ONN in ONN RJ ONN ize ocument Number Rev IM ONN ystem / TP0 INPUT +PWR_R ystem / TP +PWR_R R / TP +PWR_R LO TP00 +.V_U LO KTRT +PWR_R attery harger MX INPUT +PWR_R PU / IL0 INPUT +PWR_R ate: Wednesday, November 0, 00 heet of OUTPUT +V_LW +V_U +.V_U +.V_RT_LO +.0V_P +.V_RUN +.V_U +0.V_R_VTT V_R_MH_REF +.V_RUN OUTPUT +VHR OUTPUT +_ORE P LYER L:TOP L:N L:ignal L:ignal L: L:ignal L:N L:OT,0 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM LOK IRM -
IH Mus lock iagram K Mus lock iagram +.V_LW +.V_RUN +.V_U +.V_RUN IH-M MLK MT IH_MLK IH_MT RNKJ--P IH_MLK IH_MT IH_MLK IH_MT N00W-F-P Express ard M_LK M_T N00W-F-P +.V_RUN +.V_WLN RNKJ--P L (Reverse Type) MEM_LK L (Reverse Type) MEM_T Mus ddress : MEM_LK M_LK MEM_T M_T WWN Minicard +.V_U RNKJ--P WLN MEM_LK MEM_T IMM Mus ddress : 0 IMM Minicard M_LK M_T KO/PIO/H_T K_MT KO/PIO0/H_LK K_MLK IO ME0 _T OK_MT OK_MLK _LK PIO/_T PT_MT PIO/_LKPT_MLK +V_LW +.V_LW RNKJ--P +.V_LW RNKJ--P RNKJ--P N00W-F-P N00W-F-P 00RF-L-P-U 00RF-L-P-U +.V_RUN +V_RUN +V_RUN RNKJ--P RNKJ--P OK_MT_ OK_MLK_ PT_MLK LK_T LK_LK PT_MT LK_M T_M L LK EN. T LK Mus address: T LK apacity utton oard harger Mus address: Mus address: attery onn. Mus address: RNKJ--P PIO0/E_LK THRM_MLK PIO/E_T THRM_MT +.V_LW MLK MT Thermal Mus address:e RNKJ--P _LK/PIO _T/PIO L_MLK L_MT +.V_RUN Mus address: INVERTER LV RNKJ--P +V_RUN L_LK L_T L_LK L_T +.V_RUN restline-m HMI_T VO_TRL_LK VO_TRL_T HMI_LK RNKJ--P Mus address: L il L RNKJ-P L HMI ONN Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM ize ocument Number Rev Mus lock iagram - Wednesday, November 0, 00 ate: heet of
LOK EN Y M_/L_00M ELETION TLE YTE IO_VOUT[,,0] YTE 0 it it 0 pread pectrum [:0] 0-0.%(efault) 0 -.0% 0 -.% -.0% PIN FTEL 0 UM PIN OTT PIN OT PIN L00/T PIN L00/ EL F EL F EL0 F PIE LN REVERL.Rising Edge of PWROK. No Reboot. Rising Edge of PWROK. XOR hain Entrance. Rising Edge of PWROK. I. M_Nonpread M_pread RT_0 R_0 PU F 0 00M X 0 0 M X 0 M M 0 0 00M 00M INTEL IH-M TRP PIN ignal H_OUT H_YN NT# PIO0 NT# NT0# PI_# INTVRMEN LN00_LP TLE# PKR TP PIO/ H_OK_EN# Usage/When ampled XOR hain Entrance/ PIE Port onfig bit, Rising Edge of PWROK PIE Port onfig bit0, Rising Edge of PWROK. PIE Port onfig bit0, Rising Edge of PWROK. Reserved Top-lock wap Override. Rising Edge of PWROK. oot IO estination election. Rising Edge of PWROK. Integrated Vccus_0 Vccus_ and VccL_ VRM Enable/isable.lways sampled. Integrated VccLN_0 VccL_0 VRM enable /isable. lways sampled. Flash escriptor ecurity Override trap Rising Edge of PWROK. it it it0 IO_VOUT[,,0] IO_VOUT IO_VOUT IO_VOUT0 0 0 0 0.V 0 0 0.V 0 0 0.V 0 0.V 0 0 0.V 0 0.V(efault) 0 0.V.0V omment llows entrance to XOR hain testing when TP pulled low at rising edge of PWROK.When TP not pulled low at rising edge of PWROK,sets bit of RP.P(onfig Registers:offset h) ets bit0 of RP.P(onfig Registers:Offset h) ets bit of RP.P(onfig Registers:Offset h) Weak Internal PULL-OWN.NOTE:This signal should not be pull HIH. ampled low:top-lock wap mode(inverts for all cycles targeting FWH IO space). Note: oftware will not be able to clear the Top-wap bit until the system is rebooted without NT# being pulled down. ontrollable via oot IO estination bit (onfig Registers:Offset 0h:bit :0). NT0# is M, 0-PI, 0-PI, -LP. Enables integrated VccLN_0,VccL_0 VRM when sampled high This signal has weak internal pull-up. set bit of MP.LR(evice:Function0:Offset ) If sampled high, the system is strapped to the "No Reboot" mode(ihm will disable the TO Timer system reboot feature). The status is readable via the NO REOOT bit.(offset:0h:bit) This signal should not be pull low unless using XOR hain testing. Internal Pull-Up.If sampled low,the Flash escriptor ecurity will be overidden.if high,the ecurity measures defined in the Flash escriptor will be in effect. This should only be used in manufacturing environments XOR hain Entrance trap IH_RVtp Z_OUT_IH escription 0 0 0 RV Enter XOR hain 0 Normal Operation(default) et PIE port cofig bit swap override strap PI_NT# OOT IO trap PI_NT#0 PI_# OOT IO Location 0 PI 0 PI LP(efault) EFULE HIH No Reboot trap PKR LOW = efaule High=No Reboot.K PULL HIH INTEL RETLINE TRP PIN * Enables integrated Vccus_0,Vccus_ and VccL_ VRM when sampled high is efault setting F trap Low F MI X F Moby ick F T/Transportable PU F Reserved Lane F 0 Reserved F alistoga F F ynamic OT isabled * F elect F MI Lane Reserved.0V Normal Operation low = swap override enable high = default integrated Vccus_0,Vccus_,VccL_ M_INTVRMEN High=Enable Low=isable integrated VccLan_0VccL_0 LN00_LP High=Enable Low=isable * * * * High MI X alistoga Mobile PU Normal Operation Enabled.V Reserved Lane F 0 Only PIE or VO PIE and VO PIE/VO elect is operation are operation simu VO_TRLT No VO evice VO evice present present F[:] LL Reserved LH XOR Mode Enabled HL ll Z Mode Enabled HH Normal Operation * Mobility Reserved * * PIE Routing LNE LNE LNE LNE LNE LNE Miniard WWN Miniard WLN No use Express ard No use 0/00 LOM PI ROUTIN / Mediaard IEL INT U TLE Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM Table of ontent - ize ocument Number Rev REQ NT IH U0 U U U U U U U U U INTEL IH-M INTERTE PULL-UP and PULL-OWN INL H_IT_LK H_RT# H_IN[:0] H_OUT H_YN NT[:0] PIO[0] L[:0]#/FHW[:0]# LN_RX[:0] LRQ[0] LRQ[]/PIO PME# PWRTN# TLE# PI_# PI_LK PI_MOI PI_MIO TH_[:0] PKR TP[] U[:0][P,N] L_RT# Resistor Type/Value PULL-OWN 0K NONE PULL-OWN 0K PULL-OWN 0K PULL-OWN 0K PULL-UP 0K PULL-OWN 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-UP 0K PULL-OWN 0K PULL-UP 0K PULL-OWN K T U U iometric amera Express ard T MINI ard WWN ate: Wednesday, November 0, 00 heet of
PU ITP onn. TK(PIN ) TK(PIN ) FO(PIN ) +.V_RUN +.0V_P 00 ITP_TI ITP_TM ITP_TRT# ITP_TK ITP_TO LK_PU_ITP# LK_PU_ITP, H_REET# ITP_PM# ITP_PM# ITP_PM# ITP_PM# ITP_PM# ITP_PM#0,, ITP_REET# ITP_TI ITP_TM ITP_TRT# ITP_TO LK_PU_ITP# LK_PU_ITP ITP_PM# ITP_PM# ITP_PM# ITP_PM# ITP_PM# ITP_PM#0 R 0RJ--P R0 0RF--P R RF-L-P ITP_TK R RF-L-P ITP_REET# R RF--P ITP_REET# R RF-L-P R RF--P +.0V_P R RF-L-P R 0RF--P 0 0 ITP Y 0 MLX-ON--P 0.K0.0 H_PURT# use pull-up Resistor close ITP connector 00 mil ( max ) +.0VRUN use ecoupling apacitor close ITP connector 00 mil ( max ) ITP ebug onn. Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM ize ocument Number Rev ITP ebug - ate: Wednesday, November 0, 00 heet of
T_LKREQ# MINILK_REQ# MINILK_REQ# +.V_RUN +.V_RUN R R Enable TMP :0 LKREQ PULL HIH H_TP_PU# H_TP_PU# 0 LK_PLLREQ# Enable ITP 0 P0-P 0KRJ--P PI_IH R_LK_REQ# LK_PLLREQ# LOM_LKREQ# 0KRJ--P PI_PR H_TP_PI# RN 0 P0VJN--P :0 RN0KJ-L-P P0-P :0 H_TP_PI# P0-P :0 +.V_RUN R0 LK_PU_LK# LK_PU_LK LK_MH_LK# LK_MH_LK :00 delete :00 delete :0 LK_IH_M LK_PI_IH LK_PI_PR LK_PI_0 0 P0VJN-P L +.V_RUN +K_V_MIN LMP00N-P 0ohm 00MHz 000m 0.0ohm UVKX-P LK_PU_LK# LK_PU_LK RN LK_MH_LK# LK_MH_LK T_LKREQ# LK_IH_M LK_PI_IH LK_PI_PR LK_PI_0 LK_IH_M +K_V_ RN RF-L-P LOM_LKREQ# R_LK_REQ# MINILK_REQ# MINILK_REQ# For wireless performance lose to LK EN R R 0UVMX-P 0 0U0VKX-P PU_LK# PU_LK RNJ--P-U MH_LK# MH_LK RNJ--P-U T_LKREQ# MH_PLL_REQ# LOM_LKREQ# R_LK_REQ# MINILK_REQ# MINILK_REQ# PU_MH_EL RJ--P F RJ--P PI_IH :0 R0 RJ--P R0 RJ--P :0 Place near 0 PI_TPM +K_V_REF R RF-P +K_V_ R RJ--P LK_XTL_IN X LK_XOUT LK_XTL_OUT R 0RJ--P X-M-P :0 P0VJN-P P0VJN--P U0VKX-P U0VKX-P PU0 PUT0 0 PU PUT U0 PU_TP# LKREQ# LKREQ# LKREQ# LKREQ# LKREQ# LKREQ# LKREQ# LKREQ# LKREQ# F/TET_MOE M/F PIF0/ITP_EL PI_TP# PI/FTEL PI_PR PI PI_IO PI PI/TME XIN XOUT 0 R0 +K_V_ 0 V V_ V_R V_R V_R REF0/F_TET_EL REF RJ--P 0 LKREF F V_PI V_PI V_REF V_PU _REF _PU V_R _R _R R VTT_PWR#/P _PI _PI 0UVMX-P :0 LK_PWR PMOE R0 0KRJ--P LK_T LK_LK LK_OTT LK_OT +K_V_MIN LK_PWR +.V_RUN OT_ OT_# PIE_T PIE_T# MH_PLL MH_PLL# PIE_LOM PIE_LOM# PIE_EXPR PIE_EXPR# PIE_IH PIE_IH# PIE_MINI PIE_MINI# PIE_MINI PIE_MINI# PU_ITP PU_ITP# older Thermal Pad to N add min vias I:.0.0 ILPRKLFT :0 _PU _ N U0VKX-P RJ--P U0VKX-P Y Y T LK RT_0/L00MT R_0/L00M RT_ 0 R_ RT_ R_ RT_ R_ RT_ R_ RT_ 0 R_ RT_ R_ RT_ R_ RT_ 0 R_ RT_ R_ PUT_ITP/RT_0 PU_ITP/R_0 OTT/M_N OT/M_ YLFXT-P U0VKX-P R00 0KRJ--P LK_IH_M U0VKX-P 0 L LMP00N-P 0 U0VKX-P +.V_RUN 0ohm 00MHz 000m 0.0ohm UVKX-P Pull low to ecide VTT_PWRO Low active LK_T LK_LK RN RN0 RN RN RN RN RN RN0 RN RN0 RN RNKJ--P +K_V_REF +K_V_ REF_LK REF_LK# RNJ--P-U LK_PIE_T LK_PIE_T# RNJ--P-U LK_MH_PLL LK_MH_PLL# RNJ--P-U LK_PIE_LOM LK_PIE_LOM# RNJ--P-U LK_PIE_EXPR LK_PIE_EXPR# RNJ--P-U LK_PIE_IH LK_PIE_IH# RNJ--P-U LK_PIE_MINI LK_PIE_MINI# RNJ--P-U LK_PIE_MINI LK_PIE_MINI# RNJ--P-U LK_PU_ITP LK_PU_ITP# RNJ--P-U MH_REFLK MH_REFLK# RNJ--P-U +.V_RUN 0U0VKX-P 0U0VKX-P REF_LK 0 REF_LK# 0 LK_PIE_T 0 LK_PIE_T# 0 LK_MH_PLL 0 LK_MH_PLL# 0 LK_PIE_LOM LK_PIE_LOM# LK_PIE_EXPR LK_PIE_EXPR# LK_PIE_IH LK_PIE_IH# LK_PIE_MINI LK_PIE_MINI# LK_PIE_MINI LK_PIE_MINI# LK_PU_ITP LK_PU_ITP# MH_REFLK 0 MH_REFLK# 0 F F R R0 EL F EL F KRJ--P PU_MH_EL0 PU_MH_EL KRJ--P PU_MH_EL EL0 F PU PU_MH_EL0,0 PU_MH_EL,0 PU_MH_EL,0 F 0 00M X 0 0 M X 0 M M 0 0 00M 00M E:0 delete +.V_RUN Y R0 0KRJ--P PI_TPM R0 0KRJ--P PIN FTEL 0 UM PIN PIN OTT OT PIN L00/T PIN L00/ I. M_Nonpread M_pread RT_0 R_0 PIN PMOE 0 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM LK_EN Y - ize ocument Number Rev PIN IRIPTION VTT_PWR#/P KPWR/P#(EFULT) ate: Wednesday, November 0, 00 heet of
H_#[..] U OF TP0 H_# J H_# +.0V_P H_# # # H H_# L H_NR# H_# # NR# E H_NR# L H_PRI# H_# # PRI# H_PRI# K H_# # M H_EFER# H_# # EFER# H R H_EFER# N H_RY# H_# # RY# F RJ--P H_RY# J H_Y# H_#0 # Y# E H_Y# H_#[0..] N H_# 0# P H_R0# H_# # R0# F H_R0# P H_# # L H_IERR# H_# # IERR# 0 P H_INIT# H_# # INIT# H_INIT# 0 P U OF H_# # R H_LOK# H_T#0 # LOK# H H_LOK# H_REET# H_#0 H_# H_T#0 M T0# REET# H_REET#, E H_# 0# # Y H_# H_REQ#[0..] H_R#[0..] F H_REQ#0 H_R#0 H_# # # K H_# H_REQ# REQ0# R0# F E H_R# H_# # # V H H_# H_REQ# REQ# R# F H_R# H_# # # V K H_# H_REQ# REQ# R# F H_TRY# H_# # # V J H_# H_REQ# REQ# TRY# H_TRY# H_# # # T L H_# REQ# E H_HIT# H_# # # U H_# H_# HIT# H_HIT# E H_HITM# H_# # # U Y H_#0 H_# # HITM# E H_HITM# K H_# # 0# Y U H_# H_# # ITP_PM#0 H_#0 # # W R H_# H_#0 # PM0# ITP_PM#0 J ITP_PM# H_# 0# # Y W H_# H_# 0# PM# ITP_PM# J ITP_PM# H_# # # W U H_# H_# # PM# ITP_PM# H ITP_PM# H_# # # W Y H_# ITP_PM# H_# # PM# F ITP_PM# H_# # # U H_# H_# # PRY# ITP_PM# K ITP_PM# H_# # # R H_# H_# # PREQ# ITP_PM# H ITP_TK H_TN#0 # # T H_TN# ITP_TK H_TN#0 H_TN# H_# # TK J ITP_TI H_TP#0 TN0# TN# Y T H_TP# ITP_TI H_TP#0 H_TP# H_# # TI H ITP_TO H_IV#0 TP0# TP# W H_IV# H_# # TO ITP_TM ITP_TO H_IV#0 H INV0# INV# U H_IV# W ITP_TM H_# # TM Y ITP_TRT# ITP_TRT# H_#0 # TRT# U ITP_REET# H_# H_# H_# 0# R# 0 ITP_REET#,, N H_# # # E V K H_# H_# # H_# # # W H_#0 H_THRM P H_# # H_# # 0# R H_# H_# # THERML H_#0 # # H_# H_# # E_PU_PROHOT# H_# H_# E_PU_PROHOT# H_T# H_THRM Y L 0# # # PROHOT# M 00P0VKX-P H_# # # H_# H_T# V T# THRM L H_THRM H_# # # 0 M H_# H_0M# THRM H_# # # E H_# 0 H_0M# H_FERR# 0M# H_THERMTRIP# H_THRM P H_# # # F H_# 0 H_FERR# H_INNE# FERR# THERMTRIP# H_THERMTRIP# P H_# # # H_# 0 H_INNE# INNE# P +.0V_P +.0V_P H_# # # E T H_# H_TPLK# H_# # # H_#0 0 H_TPLK# R RJ--P R H_INTR# TPLK# LK_PU_LK H_# # 0# H_# 0 H_INTR# LK_PU_LK L H_NMI# LINT0 HLK LK0 LK_PU_LK# H_#0 # # H_# 0 H_NMI# LK_PU_LK# T H_MI# LINT LK R H_# 0# # F H_# 0 H_MI# MI# N KRF--P H_TN# # # H_TN# H_TN# L H_TN# PU_RV0 H_TP# TN# TN# E TP M H_TP# H_TP# M H_TP# PU_RV0 H_IV# TP# TP# F TP RV#M N H_IV# +.0V_P H_IV# N H_IV# TP PU_RV0 RV#N INV# INV# 0 T TP PU_RV0 RV#T V V_PU_TLREF OMP0 PU_RV0 TET TLREF OMP0 R R0 RV#V RF-L-P TP TP OMP R RF-L-P TP PU_RV0 RV# TP TET TET MI OMP U OMP R RF-L-P PU_RV0 RV# layout note:zo = R TET TET OMP TP OMP PU_RV0 KRF--P TP TET TET OMP Y R0 RV# RF-L-P R TP Y F 00RF-L-P TP PU_RV0 RV# ohm, 0." MX for TET TET F H_PRTP# H_PRTP# 0,0, PU_RV0 TLREF TP TET TET PRTP# E TP RV# F H_PLP# RV#F TET PLP# H_PLP# 0 H_PWR# H_PWR# PU_MH_EL0 PWR# H_PWROO KEY_N,0 PU_MH_EL0 PU_MH_EL EL0 PWROO H_PULP#,0 PU_MH_EL H_PULP# PU_MH_EL EL LP# KT-PUP-P H_PI#,0 PU_MH_EL EL PI# E H_PI# H_PWROO 0.00.0 REERVE R ROUP 0 XP/ITP INL ONTROL R ROUP IH T RP0 T RP T RP T RP Use old ymbol replace New P/N original value:kt-pup-p TP TP KT-PUP-P.00.0 +.0V_P R R R R Y Y H_PLP# RJ--P H_PRTP# RJ--P H_FERR# RJ--P E_PU_PROHOT# RJ--P TET and TET For the purpose of testability, route thes signals through a ground referenced Zo=ohm trace that ends in a via that is near a N via and is accessible through an oscilloscope connection. Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM ize ocument Number Rev PU-F(/) - ate: Wednesday, November 0, 00 heet of
U OF F E E E E E E E E E F F F F F F F F F H H H H J J J J K K K K L L L L M M M M N N N N P KT-PUP-P.00.0 P P P R R R R T T T T U U U U V V V V W W W W Y Y Y Y E E E E E E E E E F F F F F F F F 0UVMX-P 0UVMX-P 0UVMX-P 0 0UVMX-P 0 :00 Y 0UVMX-P 0UVMX-P 0UVMX-P 0UVMX-P :0 Y 0UVMX-P 0UVMX-P 0UVMX-P 00 0UVMX-P 0UVMX-P 0UVMX-P 0UVMX-P 0 0UVMX-P :0 Y 0UVMX-P 0 0UVMX-P :0 Y 0UVMX-P 0 0UVMX-P 0 Y 0UVMX-P 0UVMX-P 0UVMX-P 0UVMX-P 0uF 00 XR -> degree, Or better such s X and XR 00 0 0UVMX-P 0UVMX-P 0UVMX-P 0UVMX-P :0 Y 0 0UVMX-P 0UVMX-P 0UVMX-P 0UVMX-P +_ORE U OF 0 0 0 0 0 0 E E E0 E E E E E E0 F F F0 F F F F F F0 0 0 0 0 P P P P P P P P P P P P P P P P VI0 VI VI VI VI VI VI ENE ENE KT-PUP-P.00.0 0 0 E E0 E E E E E E0 F F0 F F F F F F0 V J K M J K M N N R R T T V W F E F E F E F E +_ORE VI0 VI VI VI VI VI VI ENE ENE U0VKX-P VI[0..] U0VKX-P VI[0..] ENE R ENE +.0V_P Layout note: Place R and R within " of PU. Routing _ENE and _ENE at. ohms with 0 mils spacing. U0VKX-P R0 U0VKX-P U0VKX-P 0UVKX-P 00RF-L-P-U 00RF-L-P-U +.V_RUN +_ORE U0VKX-P 0 Y T T0UVM-P 0 0UVMX-P Layout note: place near PIN Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM ize ocument Number Rev 0.PU-POWER (/) - ate: Wednesday, November 0, 00 heet of
H_REF ecoupling restline close restline 00 mil +.0V_P R KRF--P R KRF--P H_#[0..], H_REET# H_PULP# H_REF U0VKX-P H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_WIN H_ROMP H_OMP H_OMP# H_REET# H_PULP# U OF 0 E H_#0 H_# H_# M H_# H H_# H H_# H_# F H_# N H_# H H_# M0 H_#0 N H_# N H_# H H_# P H_# K H_# M H_# W0 H_# Y H_# V H_# M H_#0 J H_# N H_# N H_# W H_# W H_# N H_# Y H_# Y H_# P H_# W H_#0 N H_# H_# E H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# Y H_# H_# E H_# H_# H_# J H_# H H_# J H_#0 E H_# E H_# H H_# J H_# H H_# J H_# E H_# J H_# J H_# E H_#0 J H_# H H_# H H_# H_WIN H_ROMP W H_OMP W H_OMP# H_PURT# E H_PULP# H_VREF H_VREF hange to.ret.m0 HOT.RET.00U RETLINE-P-U H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_T#0 H_T# H_NR# H_PRI# H_REQ# H_EFER# H_Y# HPLL_LK HPLL_LK# H_PWR# H_RY# H_HIT# H_HITM# H_LOK# H_TRY# H_INV#0 H_INV# H_INV# H_INV# H_TN#0 H_TN# H_TN# H_TN# H_TP#0 H_TP# H_TP# H_TP# H_REQ#0 H_REQ# H_REQ# H_REQ# H_REQ# H_R#0 H_R# H_R# J M F L K L J K P R H0 L M N J E E N H 0 E F 0 M M H K E 0 K L E H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_T#0 H_T# H_NR# H_PRI# H_R0# H_EFER# H_Y# LK_MH_LK LK_MH_LK# H_PWR# H_RY# H_HIT# H_HITM# H_LOK# H_TRY# H_IV#0 H_IV# H_IV# H_IV# M H_TN#0 K H_TN# H_TN# H H_TN# L H_TP#0 K H_TP# H_TP# J0 H_TP# M H_REQ#0 E H_REQ# H_REQ# H H_REQ# H_REQ# E H_R#0 H_R# H_R# H_#[..] H_# H_T#0 H_T# H_NR# H_PRI# H_R0# H_EFER# H_Y# LK_MH_LK LK_MH_LK# H_PWR# H_RY# H_HIT# H_HITM# H_LOK# H_TRY# H_IV#0 H_IV# H_IV# H_IV# H_TN#0 H_TN# H_TN# H_TN# H_TP#0 H_TP# H_TP# H_TP# H_REQ#[0..] H_R#[0..] H_WIN routing Trace width and pacing use 0 / 0 mil H_WIN Resistors and apacitors close aliistoga 00 mil ( MX ) From chematic esign hecklit v.0 % pull high 00 % pull low +.0V_P +.0V_P H_WIN H_OMP and H_OMP# Resistors and apacitors close aliistoga 00 mil ( MX ) Zo=ohms R R0 H_ROMP routing Trace width and pacing use 0 / 0 mil R H_OMP RF-L-P H_OMP# RF-L-P H_ROMP RF-L-P +.0V_P U0VKX-P R RF--P R 00RF-L-P-U Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM ize ocument Number Rev MH-F LI (/) - ate: Wednesday, November 0, 00 heet of
* is efault setting F trap Low F MI X F Moby ick F T/Transportable PU F Reserved Lane F 0 Reserved F alistoga F F ynamic OT isabled * F elect F MI Lane Reserved PM_MUY# _N_PIE_RT# R Y 0RJ--P,0, H_PRTP# PM_EXTT#0 PM_EXTT#, IH_PWR PLTRT#,,,,, PLTRT# R 00RJ--P R THERMTRIP_MH#,, PRLPVR 0R00-P.0V Normal Operation F[:] LL Reserved LH XOR Mode Enabled HL ll Z Mode Enabled HH Normal Operation * F[..0] F elect LHL F 00 LHH F Other Reserved +.V_RUN * * * * +.0V_P High MI X alistoga Mobile PU Normal Operation Mobility Reserved Enabled.V Reserved Lane F 0 Only PIE or VO PIE and VO PIE/VO elect is operation are operation simu No VO evice VO evice present VO_TRLT present, PU_MH_EL0, PU_MH_EL, PU_MH_EL Layout Note: Location of all MH_F strap resistors needs to be close to minmize stub. RN R PM_EXTT# PM_EXTT#0 RN0KJ--P PM_MUY# H_PRTP# PM_EXTT#0 PM_EXTT# IH_PWR THERMTRIP_MH# PRLPVR_R * * PU_MH_EL0 PU_MH_EL PU_MH_EL RJ--P U OF 0 P RV#P P RV#P R RV#R N RV#N R RV#R R RV#R M RV#M N RV#N J RV#J R RV#R M RV#M L RV#L M RV#M 0 RV#0 H0 RV#H0 RV# J0 RV#J0 K RV#K F RV#F H0 RV#H0 K RV#K J RV#J F RV#F RV# RV# RV# H RV#H W0 RV#W0 K0 RV#K0 RV# RV# RV# RV# RV# RV# RV# P F0 N F N F F F F F N F F J0 F 0 F R F0 L F J F E F E0 F K F M0 F M F L F N F L F0 PM_M_UY# L PM_PRTP# L PM_EXT_T#0 J PM_EXT_T# W PWROK V0 RTIN# N0 THERMTRIP# PRLPVR J N#J K N#K K0 N#K0 L0 N#L0 L N#L L N#L L N#L K N#K J N#J E N#E N# N# 0 N#0 0 N#0 N# K N#K RETLINE-P-U RV F PM N R MUXIN M_K0 M_K M_K M_K M_K#0 M_K# M_K# M_K# M_KE0 M_KE M_KE M_KE M_#0 M_# M_# M_# M_OT0 M_OT M_OT M_OT M_ROMP M_ROMP# M_VREF#R M_VREF#W PLL_REF_LK PLL_REF_LK# PLL_REF_LK PLL_REF_LK# LK M_ROMP_VOH M_ROMP_VOL MI MI ME RPHI VI PE_LK PE_LK# MI_RXN0 MI_RXN MI_RXN MI_RXN MI_RXP0 MI_RXP MI_RXP MI_RXP MI_TXN0 MI_TXN MI_TXN MI_TXN MI_TXP0 MI_TXP MI_TXP MI_TXP FX_VI0 FX_VI FX_VI FX_VI FX_VR_EN L_LK L_T L_PWROK L_RT# L_VREF VO_TRL_LK VO_TRL_T LKREQ# IH_YN#.RET.00U TET TET V V W0 W W E Y 0 K E H J J E L K R W H H K K N J N N M J N N J J M0 M M_LK_R0 M_LK_R M_LK_R M_LK_R M_LK_R#0 M_LK_R# M_LK_R# M_LK_R# R_KE0_IMM R_KE_IMM R_KE_IMM R_KE_IMM R_0_IMM# R IMM# R IMM# R IMM# M_OT0 M_OT M_OT M_OT K M_ROMP_VOH L M_ROMP_VOL J J M M E E M_ROMP M_ROMP# LK_MH_PLL LK_MH_PLL# MI_MRX_ITX_N0 MI_MRX_ITX_N MI_MRX_ITX_N MI_MRX_ITX_N MI_MRX_ITX_P0 MI_MRX_ITX_P MI_MRX_ITX_P MI_MRX_ITX_P MI_MTX_IRX_N0 MI_MTX_IRX_N MI_MTX_IRX_N MI_MTX_IRX_N MI_MTX_IRX_P0 MI_MTX_IRX_P MI_MTX_IRX_P MI_MTX_IRX_P LK_PLLREQ# MH_IH_YN# TET_MH R TET_MH R R MH_REFLK MH_REFLK# REF_LK REF_LK# M_LK_R0 M_LK_R M_LK_R M_LK_R M_LK_R#0 M_LK_R# M_LK_R# M_LK_R# R_KE0_IMM R_KE_IMM R_KE_IMM R_KE_IMM R_0_IMM# R IMM# R IMM# R IMM# M_OT0 M_OT M_OT M_OT LOE PIN L K 0RF-P +.V_U 0RF-P V_R_MH_REF MH_REFLK MH_REFLK# REF_LK REF_LK# LK_MH_PLL LK_MH_PLL# MI_MRX_ITX_N0 MI_MRX_ITX_N MI_MRX_ITX_N MI_MRX_ITX_N MI_MRX_ITX_P0 MI_MRX_ITX_P MI_MRX_ITX_P MI_MRX_ITX_P MI_MTX_IRX_N0 MI_MTX_IRX_N MI_MTX_IRX_N MI_MTX_IRX_N MI_MTX_IRX_P0 MI_MTX_IRX_P MI_MTX_IRX_P MI_MTX_IRX_P Layout Note: MH_LVREF ~= 0.0V Width/pacing = / M L_LK0 K0 L_T0 T IH_L_PWROK N IH_L_RT0# M0 MH_LVREF H K 0 L_LK0 L_T0 IH_L_PWROK, IH_L_RT0# VO_TRLLK VO_TRLT LK_PLLREQ# MH_IH_YN# R 0KRJ-L-P R 0R00-P U0VKX-P +.V_RUN +.V_RUN R KRF--P R RF-P RN0 RNKJ--P :0 UVMX--P UVMX--P VO_TRLLK VO_TRLT ate: Wednesday, November 0, 00 heet 0 of +.V_U Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM MH-MI/R (/) - ize ocument Number Rev 0 0UVKX-P 0UVKX-P R KRF--P R K0RF--P R KRF--P
R [0..] R [0..] R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R U OF 0 R _Q0 W _Q _Q Y _Q R _Q R _Q T _Q W _Q _Q F _Q _Q0 J _Q _Q 0 _Q H _Q E _Q W _Q E _Q _Q E0 _Q F _Q0 H _Q 0 _Q F0 _Q R0 _Q W0 _Q T _Q W _Q W _Q Y _Q V _Q0 T _Q V _Q T _Q W _Q V _Q U _Q T _Q _Q _Q E0 _Q0 0 _Q _Q Y _Q 0 _Q W _Q _Q _Q _Q Y _Q T _Q0 T _Q Y _Q _Q R _Q R _Q R _Q N _Q M _Q N0 _Q T _Q0 N _Q M _Q N _Q R YTEM MEMORRY _0 _# _M0 _M _M _M _M _M _M _M _Q0 _Q _Q _Q _Q _Q _Q _Q _Q#0 _Q# _Q# _Q# _Q# _Q# _Q# _Q# _M0 _M _M _M _M _M _M _M _M _M _M0 _M _M _M _M _R# _RVEN# _WE# K F L T W W Y N T E H P T H P J 0 K H L K J J L E 0 J J E Y0 R 0 R R R # R M0 R M R M R M R M R M R M R M R Q0 R Q R Q R Q R Q R Q R Q R Q R Q#0 R Q# R Q# R Q# R Q# R Q# R Q# R Q# R M0 R M R M R M R M R M R M R M R M R M R M0 R M R M R M R M R R# M RVEN# R WE# R [0..] R M[0..] R Q[0..] R Q#[0..] R M[0..] R R# TP R WE# R [0..] R [0..] R # R M[0..] R Q[0..] R Q#[0..] R M[0..] R [0..] R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R UE OF 0 P _Q0 R _Q W0 _Q W _Q N _Q N0 _Q V0 _Q V _Q 0 _Q 0 _Q _Q0 E0 _Q _Q Y _Q F0 _Q F _Q J0 _Q J _Q J _Q L _Q K _Q0 K _Q K _Q K _Q J _Q L _Q J _Q J _Q K _Q J0 _Q L _Q0 K _Q K _Q E _Q K _Q _Q _Q E _Q _Q _Q J0 _Q0 L _Q K _Q L _Q K _Q K0 _Q J _Q J _Q F _Q H _Q _Q0 _Q K _Q E _Q _Q J _Q _Q _Q R _Q T _Q Y _Q0 Y _Q U _Q T _Q R YTEM MEMORY _0 _# _M0 _M _M _M _M _M _M _M _Q0 _Q _Q _Q _Q _Q _Q _Q _Q#0 _Q# _Q# _Q# _Q# _Q# _Q# _Q# _M0 _M _M _M _M _M _M _M _M _M _M0 _M _M _M _M _R# _RVEN# _WE# Y E R0 K L H J F W T0 0 K K J L E V U0 0 L K K K F V R 0 R R R # R M0 R M R M R M R M R M R M R M R Q0 R Q R Q R Q R Q R Q R Q R Q R Q#0 R Q# R Q# R Q# R Q# R Q# R Q# R Q# R M0 R M R M W R M F R M E R M R M R M Y R M R M R M0 E R M R M R M E R M V R R# Y M RVEN# R WE# R [0..] R M[0..] R Q[0..] R Q#[0..] R M[0..] TP R R# R WE# R [0..] R # R M[0..] R Q[0..] R Q#[0..] R M[0..] RETLINE-P-U.RET.00U RETLINE-P-U.RET.00U Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM ize ocument Number Rev MH-R (/) - ate: Wednesday, November 0, 00 heet of
+.0V_P UF OF 0 +.V_RUN +_MH_L R 0RJ--P RV-0--P +.0V_P FOR ORE N NTF +.V_U UVMX-P Place on the Edge 00 UVKX-P UVMX-P 0 FOR M Place P where LV and R taps 00 U0VKX-P Latout notice Inside MH cavity for _X T T0UVM-P 00 U0VKX-P 00 0UVMX-P 000 U0VKX-P 00 UVMX-P U0VKX-P +.0V_P T T H K J J H H H F R0 ORE U _M U _M U _M V _M W _M W _M Y _M _M _M _M _M _M _M _M _M _M E _M E _M E _M F _M F _M _M _M _M H _M H _M H _M J _M J _M J _M K _M K _M K _M K _M L _M U0 _M R0 _X T _X W _X W _X Y _X 0 _X _X _X _X _X _X _X 0 _X _X _X _X _X _X _X 0 _X _X _X _X F _X F _X _X H0 _X H _X H _X H _X H _X _X J0 _X N _X POWER M FX FX NTF M LF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _X_NTF _M_LF _M_LF _M_LF _M_LF _M_LF _M_LF _M_LF RETLINE-P-U.RET.00U T T T T T T T U U U U U0 U U U V V V V0 V V V Y Y Y Y Y0 Y Y Y Y Y Y F F H H H H J J J K K L L L L0 L L M M M M0 M M P P P P P0 P P P R0 R R R R V V V Y W E W T M_LF M_LF M_LF M_LF M_LF M_LF M_LF T0 T0UVM-P T0 T0UVM-P T0 T0UVM-P Latout notice 0 mils from edge 0 U0VKX-P 0 U0VKX-P U0VKX-P 0 mils from the Edge +.0V_P +.0V_P T T0UVM-P upply ignal roup Icc-max +.0V_P. +.0V_P _NTF +.0V_P VTT 0. +.0V_P _PE. +.0V_P _RXR_MI 0. +.0V_P _TX.m +.V_U _M. +.V_U _M_K 0. +.V_RUN _HPLL 0.0 +.V_RUN _MPLL 0. +.V_RUN _M 0. +.V_RUN _M_NTF U0VKX-P +.V_RUN +.V_RUN +.V_RUN +.V_RUN +.V_RUN +.V_RUN +.V_RUN +.V_RUN +.V_RUN +.V_RUN UVKX-P UVMX-P U0VKX-P _M_K Place on the Edge 0 U0VKX-P 0.0 _HPLL 0. _X _X_NTF _PE_PLL /_PE_PLL _XF _MI _TV _PE HV U0VKX-P 0. 0. 0. 0. 0.0 0.00 0. U0VKX-P oupling P oupling P Inside MH cavity (Non-MT) (MHz) (MHz) FOR XM NTF N XM U0VKX-P UVMX-P U0VKX-P U0VKX-P U0VKX-P U0VKX-P U0VKX-P _NTF _NTF _NTF _NTF _NTF _NTF _NTF _NTF F _NTF F _NTF H _NTF H _NTF H _NTF H _NTF J _NTF J _NTF K _NTF K _NTF K _NTF K _NTF _NTF J _NTF M _NTF L _NTF L _NTF _NTF _NTF _NTF P _NTF P _NTF R _NTF R _NTF Y _NTF Y _NTF Y _NTF Y _NTF Y _NTF T0 _NTF T _NTF T _NTF U _NTF U _NTF U _NTF U _NTF U _NTF U _NTF V _NTF V _NTF V _NTF V _NTF L _XM_NTF L _XM_NTF L _XM_NTF M _XM_NTF M _XM_NTF M _XM_NTF M _XM_NTF M _XM_NTF M _XM_NTF P _XM_NTF P _XM_NTF P _XM_NTF P _XM_NTF L _XM_NTF L _XM_NTF L _XM_NTF R _XM_NTF R _XM_NTF R _XM_NTF U OF 0 +.0V_P Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM MH-POWER (/) - ize ocument Number Rev NTF RETLINE-P-U NTF _NTF T _NTF T _NTF U _NTF U _NTF V _NTF V _NTF _NTF _NTF _NTF _NTF _NTF F _NTF F _NTF K _NTF M _NTF M _NTF P _NTF P _NTF R _NTF R _NTF R POWER XM XM NTF -:0 NTF TP TP _ NTF _ TP0 TP NTF _ TP TP NTFL TP TP _ L NTFL TP TP _ L NTF TP TP XM T _XM T _XM K _XM K _XM K _XM J _XM J.RET.00U ate: Wednesday, November 0, 00 heet of
+.V_RUN +.V_RUN +.V_RUN +.V_RUN 0ohm 00MHz 00m 0.ohm +_TV_R 0ohm 00MHz 00m 0.ohm +.V_RUN R0 L +_RT_R LMPN-P R0 +_MPLL_L +.V_RUN 0ohm 00MHz 00m 0.ohm +_PE_PLL_L +_MPLL +.V_RUN +_TV +_RT_R 0R00-P m MX. 0uH 0m 0ohm 00MHz L L 00m 0.ohm +.V_RUN +_HPLL L-0UH--P 0.aps should be placed 00 mils UVMX-P U0VKX-P with in its pins. LMN-P R00 :0 UVMX--P L LMN-P R RF--P 0UVMX-P R0 0 U0VKX-P 0R00-P 00RJ--P 00 U0VKX-P 0R00-P 0 U0VKX-P 0ohm 00MHz 0 +.V_RUN 0.ohm UVMX-P L +_PE_PLL LMPN-P +.V_RUN R RF-P U0VKX-P 0 U0VKX-P L LMN-P 0 U0VKX-P 0 U0VKX-P T T00UVM-P 0 U0VKX-P +.V_RUN R0 R0 U0VKX-P nf & 0.uF for _TV:_R should be placed with in 0 mils from restline. 0 U0VKX-P +.V_RUN U0VKX-P 0 U0VKX-P UVKX-P +.V_RUN 0 U0VKX-P U0VKX-P U0VKX-P T00 0UVMX-P +_PE_PLL 00 U0VKX-P UVMX-P U0VKX-P +_TV_R 0R00-P UVMX-P +_TV_R 0R00-P +_RT_R +_TV_R +_PLL +_PLL UVMX-P +_TV_R +_TV_R +_TV_R +_LV +_PLL 0.0 _TV_ 0.0 _TV TV TV_ 0.0 _TV TV_ 0.0 +_TV_R M _RT L _TV 0.0 +Q_TV_R N _Q 0 0UVMX-P J 0 U0VKX-P T0 _YN _RT RT_ 0 UH OF 0 _PLL 0. H _PLL K0 _PE_ K 0.00 _PE_ W _M V _M U _M U _M U _M 0UVMX-P L _HPLL 0. M _MPLL 0. +_TX_LV 0 KP0VKX-P 0.0 _LV _LV U0VKX-P 0 U0VKX-P L +.V_RUN L-0UH--P 0uH 0m 0.aps should be placed 00 mils with in its pins. 0 U0VKX-P U _PE_PLL 0. T _M T _M T _M T _M T _M R _M_NTF R _M_NTF 0.0 _M_K _M_K 0. N _HPLL 0. U _PE_PLL 0. J _LV H _LV RETLINE-P-U LV PLL RT PE LV TV/RT TV K M X MI 0. 0. 0. XF 0. M K 0. HV 0. PE. 0. +.V_U +_TV R0 VTT U VTT U VTT U VTT U VTT U VTT U VTT U VTT U VTT U VTT U VTT T VTT T VTT T0 VTT T VTT T VTT T VTT T VTT T VTT T VTT R VTT R VTT R _X T _X U _X U _X T _X T _X T0 _X_NTF +.V_RUN R _XF _XF _XF _MI J0 0. _M_K K _M_K K _M_K J _M_K J _TX_LV _HV 0 _HV 0 _PE _PE W0 _PE W _PE V _PE V0 _RXR_MI H0 _RXR_MI H VTTLF VTT POWER.RET.00U -:0 +.V_RUN R 0R00-P +_TV_R 0R00-P UVKX-P UVKX-P UVKX-P +.V_RUN +_TX_LV U0VKX-P Place on the edge +_RXR_MI +_LV +_X U0VKX-P UVMX-P +TTLF VTTLF +TTLF VTTLF F +TTLF VTTLF H R 0RJ--P 0 U0VKX-P Y UVKX-P UVKX-P 0 KP0VKX-P 0UVMX-P R uh 00m +.V_RUN +_M_K +.V_U L +_TX_LV_R R 0R00-P IN-UH--P R Y 0RJ--P UVMX-P 0UVMX-P 0 U0VKX-P L0 +.0V_P IN-NH--P T T0UVM-P +.V_RUN Place caps close to _X nh. +_PE +.0V_P T UVMX--P UVKX-P T0UVM-P +_M_K_L +.V_RUN L +.0V_P IN-NH--P T Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM MH-POWER/FILTER (/) - ize ocument Number Rev 0R00-P U0VKX-P TUFF R 0 ohm OR.nH UVKX-P U0VKX-P uh 00m nh. ate: Thursday, November, 00 heet of UVKX-P 0 UVMX-P 0UVMX-P T0UVM-P L +.V_U IN-UH--P R RF-P
UI OF 0 +.V_RUN :0 R R +.V_RUN V_LU V_RN V_RE _LK T_ V_VYN V_HYN RN RNKJ--P RN0 LTL_LK 0R00-P LTL_T 0R00-P L_K-R R00 L_K+R R R0 R R0 R0 R00 L_0+ L_LK L_T RN0KJ--P I_PWM PNEL_KEN Y R L_LK L_T ENV I_PWM PNEL_KEN LTL_LK LTL_T L_LK L_T ENV L_I R0 KRF--P :0 :0 L_K-R L_K+R 0RF--P 0RF--P 0RF--P 0R00-P R0 0RJ--P Y 0R00-P L_0- L_- L_- L_0+ L_+ L_+ Y :0 Y 0 P0VN-P L_K- 0 P0-P U OF 0 J0 L_KLT_TRL H L_KLT_EN E L_TRL_LK E0 L_TRL_T L LK L T K0 L_V_EN L LV_I L LV_V N LV_VREFH N0 LV_VREFL LV_LK# LV_LK LV_LK# E LV_LK LV_T#0 E LV_T# F LV_T# LV_T# 0 LV_T0 E0 LV_T F LV_T LV_T LV_T#0 LV_T# LV_T# E LV_T0 LV_T LV_T E TV_ TV_ K TV_ F TV_RTN J TV_RTN L TV_RTN M TV_ONEL0 P TV_ONEL H RT_LUE RT_LUE# K RT_REEN J RT_REEN# F RT_RE E RT_RE# K RT LK V_VYN_ RT T E RF-L-P RT_IREF RT_VYN KRF--P V_HYN_ RT_TVO_IREF F RF-L-P RT_HYN RETLINE-P-U L_K+ L_0- L_0+ LV TV V PI_EXPRE RPHI PE_OMPI PE_OMPO PE_RX#0 PE_RX# PE_RX# PE_RX# PE_RX# PE_RX# PE_RX# PE_RX# PE_RX# PE_RX# PE_RX#0 PE_RX# PE_RX# PE_RX# PE_RX# PE_RX# PE_RX0 PE_RX PE_RX PE_RX PE_RX PE_RX PE_RX PE_RX PE_RX PE_RX PE_RX0 PE_RX PE_RX PE_RX PE_RX PE_RX PE_TX#0 PE_TX# PE_TX# PE_TX# PE_TX# PE_TX# PE_TX# PE_TX# PE_TX# PE_TX# PE_TX#0 PE_TX# PE_TX# PE_TX# PE_TX# PE_TX# PE_TX0 PE_TX PE_TX PE_TX PE_TX PE_TX PE_TX PE_TX PE_TX PE_TX PE_TX0 PE_TX PE_TX PE_TX PE_TX PE_TX.RET.00U L_- L_0- L_- L_+ L_+ +_PE VO_INT- VO_INT+ U0VKX-PVO_R- U0VKX-PVO_- U0VKX-PVO_- U0VKX-PVO_- U0VKX-PVO_R+ U0VKX-PVO_+ U0VKX-PVO_+ U0VKX-PVO_+ L_- N PE_OMP_MH M J L VO_INT- N T T0 U0 Y Y0 W 0 H J0 L0 VO_INT+ M U T T W W 0 Y H H N N_VO_R- 0 U N_VO_- 0 U N_VO_- 0 N N_VO_- 00 R0 T Y W W H E H M N_VO_R+ 0 T N_VO_+ 0 T N_VO_+ 0 N0 N_VO_+ 0 R U W Y Y 0 E0 H :0 :0 R RF-L-P Y 0 P0VN-P Y P0VN-P L_+ L_- L_+ VO_R- VO_- VO_- VO_- VO_R+ VO_+ VO_+ VO_+ 0 0 0 E0 E E F0 F F F 0 H H0 H H H J J J J J J J J J K0 K K K K K L M M M M M M N N N N N N P P P0 R R R R R R T0 T T T U U U U U U U V V W W W RETLINE-P-U.RET.00U W W W W W Y0 Y Y Y Y Y Y Y0 0 0 0 0 0 E E E E0 E E E F F F H H0 H H H J J J J J J K K K K K K0 K K K L L L L L L W 0 W W W W W Y Y Y Y E0 Y E Y E Y0 E Y E P E T F T F T F R F0 F0 F F T V H0 H H H H J J J J J J J J K K K L L L0 L L L L L M M M M M M0 M N N N N N N N N N N P P P P P0 R T T T U U U0 V V RETLINE-P-U.RET.00U F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Wistron orporation Thurman UM ize ocument Number Rev UJ 0 OF 0 MH-N/LV/V (/) - ate: Wednesday, November 0, 00 heet of
R M[0..] R M[0..] R [0..] R [0..] R Q#[0..] R Q[0..] V_R_MH_REF UVMX--P R [0..] R [0..] R Q#[0..] R Q[0..] 0 M_OT0 0 M_OT U0VKX-P R M0 R M R M R M R M R M R M R M R M R M R M0 R M R M R M R M R R 0 R R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R R R R R R R R 0 R R R R Q#0 R Q# R Q# R Q# R Q# R Q# R Q# R Q# R Q0 R Q R Q R Q R Q R Q R Q R Q M_OT0 M_OT 0 0 00 0 0 0 0 0 0 0 0 0 0 M 0 0/P / 0 Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q /Q0 /Q /Q /Q /Q /Q /Q /Q Q0 Q Q Q Q Q Q Q OT0 OT VREF N REVERE TYPE High. mm R-00P--P-U /R 0 /WE 0 / /0 0 / KE0 KE 0 K0 0 /K0 K /K M0 0 M M M M 0 M M 0 M L VP 0 00 N#0 0 N# N# N#0 0 N#/TET.00. V V V V V V V 0 V 0 V V V V 0 0 0 0 N 0 R R# R WE# R # R_0_IMM# R IMM# R_KE0_IMM R_KE_IMM M_LK_R0 M_LK_R#0 M_LK_R M_LK_R# R M0 R M R M R M R M R M R M R M MEM_T MEM_LK R_EL_0 R_EL_ PM_EXTT#0 +.V_U R R# R WE# R # R_0_IMM# 0 R IMM# 0 R_KE0_IMM 0 R_KE_IMM 0 M_LK_R0 0 M_LK_R#0 0 M_LK_R 0 M_LK_R# 0 MEM_T,, MEM_LK,, RN PM_EXTT#0 0 +0.V_R_VTT R R# R M M_OT0 R M R R M R M R M R M R M R M R M R M R M[0..] RN0KJ--P +0.V_R_VTT M_KE[:0] and M_[:0]# pull-up Resistors close IMM lot 00 mil ( MX ) +.V_RUN 0 U0VKX-P Pleace use One apacitor close to every Two pull-up Resistors R 0 R M0 RNJ--P RN R_KE_IMM R M R M R M RNJ--P RN M_OT R IMM# R # R WE# RNJ--P RN R M0 R_0_IMM# RNJ--P RN R R_KE0_IMM +0.V_R_VTT +.V_U Pleace close to the IMM lot 0 U0VKX-P U0VKX-P U0VKX-P U0VKX-P U0VKX-P U0VKX-P R RJ--P RN RNJ--P RN RNJ--P RN RNJ--P RN RNJ--P RN0 RNJ--P RN RNJ--P 0 U0VKX-P 0 0 UVMX--P UVMX--P RN0 RNJ--P RN RNJ--P RN RNJ--P Others pull-up Resistors close IMM lot 0 mil ( MX ) 0 0 U0VKX-P U0VKX-P U0VKX-P UVMX--P 00 UVMX--P UVMX--P Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM R-OIMM - ize ocument Number Rev U0VKX-P T T0UVM-P Y U0VKX-P ate: Wednesday, November 0, 00 heet of U0VKX-P
M R M[0..] R M[0..] R M0 0 R R# R M 0 R# 0 R R# 0 R WE# R M WE# 0 R WE# 00 R # R M # R # R M R IMM# R M 0# 0 R IMM# 0 R IMM# +.V_U R M # R IMM# 0 R M R_KE_IMM R M KE0 R_KE_IMM 0 R_KE_IMM R M KE 0 R_KE_IMM 0 R M0 0 M_LK_R 0 R M 0/P K0 0 M_LK_R 0 0 M_LK_R# U0VKX-P U0VKX-P U0VKX-P R M K0# U0VKX-P UVMX--P M_LK_R# 0 R M M_LK_R R M K M_LK_R 0 M_LK_R# R [0..] K# M_LK_R# 0 R [0..] R R M[0..] R M0 / M0 0 R M R 0 M 0 R M R 0 M 0 R M M R M 0 R [0..] M 0 R M UVMX--P UVMX--P UVMX--P R [0..] R 0 M UVMX--P R M R Q0 M 0 R M R Q M R Q R Q MEM_T R Q MEM_T,, MEM_LK MEM_LK,, R Q L R Q +.V_RUN R Q VP Pleace close to the IMM lot R Q R_EL_0 R 0 Q 0 R_EL_ R Q0 00 RN RN0KJ--P U0VKX-P R Q 0 PM_EXTT# R Q N#0 0 PM_EXTT# 0 R Q N# R Q N# R Q N#0 0 R Q N#/TET R Q +.V_U R Q R 0 Q V R Q0 V +0.V_R_VTT R Q V R Q V R Q V R Q V R Q V 0 R Q V 0 U0VKX-P U0VKX-P U0VKX-P U0VKX-P U0VKX-P 0 R Q V U0VKX-P U0VKX-P U0VKX-P U0VKX-P R Q V R 0 Q V R Q0 V R Q R Q Pleace use One apacitor close to R Q R Q every Two pull-up Resistors R Q R Q R Q R Q R 0 Q R Q0 R Q R Q R Q 0 R Q +0.V_R_VTT +0.V_R_VTT R Q 0 R Q R RN R Q R R M R Q R M R 0 Q RJ--P R Q0 RNJ--P R Q RN RN R Q 0 R M R M0 R Q 0 R M0 R M R Q R Q RNJ--P RNJ--P R Q RN RN R Q R_KE_IMM R M R Q R M R R# R 0 Q 0 R Q0 RNJ--P RNJ--P R Q RN R Q RN R IMM# R M R Q#[0..] Q M_OT R M R Q#[0..] R Q#0 R Q# Q0# RNJ--P R Q# Q# RNJ--P RN RN R Q# Q# R M R R Q# Q# R M R_KE_IMM R Q# Q# R Q# Q# RNJ--P RNJ--P R Q# Q# 0 RN0 RN R Q[0..] Q# R IMM# R M R Q[0..] R Q0 R # R M R Q Q0 R Q Q RNJ--P RNJ--P R Q Q 0 RN RN R Q Q M_OT R 0 R Q Q R M R WE# V_R_MH_REF R Q Q R Q Q RNJ--P RNJ--P Q M_KE[:] and M_[:]# M_OT 0 M_OT Others pull-up Resistors close M_OT OT0 pull-up Resistors close IMM 0 M_OT OT lot 00 mil ( MX ) IMM lot 0 mil ( MX ) UVMX--P U0VKX-P 0 VREF Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, 0 Taipei Hsien, Taiwan, R.O.. N N 0 MH MH MH MH REVERE TYPE High. mm R-00P--P-U.00. Thurman UM R-OIMM - ize ocument Number Rev ustom ate: Wednesday, November 0, 00 heet of
:00 HMI_TX# HMI_TX# HMI_TX#_ R 00RF-L-P-U 0 U0VKX-P HMI_TX0 HMI_TX#0_0 R0 00RF-L-P-U U0VKX-P HMI_TX0 HMI_TX HMI_TX HMI_TX#0 HMI_TX#0 HMI_TX# HMI_TX# HMI_TX HMI_TX HMI_TX HMI_TX#_ R 00RF-L-P-U U0VKX-P HMI_TX#_ R 00RF-L-P-U HMI_TX HMI_TX# U0VKX-P HMI_TX# :0 delete VO_INT+ VO_INT- 0,,,,, PLTRT# 0 VO_TRLLK 0 VO_TRLT PLTRT# VO_R+ VO_R+ VO_R- R+ N VO_R- R- N 0 R VO_+ VO_+ +.V_RUN VO_- + VO_- - 0R00-P VO_+ VO_+ VO_- + N VO_- - N R ii V N 0 +.V_RUN VO_+ N VO_+ 0 R 0R00-P VO_- + O VO_- - O +.V_RUN _INT+ _INT- EXT_RE R0 KRJ--P HMI_T HMI_LK EXT_WIN P P _PWR V _PWR R +.V_RUN 0R00-P N LROM N ROM N N R P P +.V_RUN P TET PN 0R00-P 0 HMI_T HMI_LK IH_Z ITLK IH_Z ITLK :00 HMI_HP P +.V_RUN +.V_RUN LYOUT must support connectors from JE, Molex, and con +.V_RUN U0VKX-P KP0VKX-P U0VKX-P 0 U0VKX-P 0 U0VKX-P R 0R00-P 00P0VJN-P U0VKX-P KP0VKX-P R KRJ--P HLK H 0U0VKX-P 0U0VKX-P KP0VKX-P 0 KP0VKX-P 0 KP0VKX-P 0 KP0VKX-P TX+ TX- TX+ TX- TX0+ TX0- TX+ TX- 0 U0VKX-P 0 U I+ I- EXT_RE REET# L L P P. RV 0 0 R 0RF-P 0 HRT HI HYN PIF/HO LL L LINT# HTPL EXT_WIN +.V_RUN H R Y KRJ--P IH_Z IN_ IH_Z RT# U_PIF_OUT R RJ--P IH_Z OUT IH_Z YN R0 RJ--P IH_Z IN IH_Z RT# 0 +.V_RUN U_PIF_OUT 0 IH_Z OUT 0 IH_Z YN 0 IH_Z IN 0 KP0VKX-P KP0VKX-P U0VKX-P 0 U0VKX-P 0 KP0VKX-P R 0R00-P R 0R00-P KP0VKX-P 00P0VJN-P U0VKX-P KP0VKX-P U0VKX-P KP0VKX-P U0VKX-P U0VKX-P 0U0VKX-P 0 0U0VKX-P KP0VKX-P 0U0VKX-P 0 00P0VJN-P 0 U0VKX-P 0U0VKX-P 0R00-P R 0R-0-U-P U0VKX-P R Y KRJ--P R Y KRJ--P R0 KRJ--P Y PIF: tuff R,R,R,R Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM il - ize ocument Number Rev ate: Wednesday, November 0, 00 heet of
+.V_RUN etting R,, trace impedance to 0 ohm. V_RE V_RN V_LU R 0RF--P R 0RF--P R 0RF--P +VRUN_RT _T LK_ V_RE V_RN V_LU +V_RUN L RN0 RNKJ--P L L 0ohm 00MHz 00m 0.ohm :00 U N00W-F-P LM00NP LM00NP LM00NP Y 0P0VJN-P +RT_ +V_RUN Y +RT_ T_ LK_ P0VJN-P RT_R RT_ RT_ JV_H JV_V RT conn. VIEO---P :00 0.00.0 RT_R V--P Item Y +V_RUN V_HYN 0UVKX-P U0 0 Y 0P0VJN-P RN RNKJ--P Y 0P0VJN-P 0 K 0--F-P 0UVKX-P Y P0VJN-P RT _RT T_I LK_I RT_R RT_ RT_ JV_H JV_V NP NP NP NP N# N# N N N N N 0 N N RT_ V--P RT_ V--P Y Y RV-0--P R KRJ--P HTPWR-P V_HYN_R R :00 0ohm 00MHz R KRJ--P 00m 0.ohm L Y HYN 0RJ--P 0R00-P :00 R KRJ--P Y V_VYN V_VYN_R U0 HTPWR-P :00 VYN R 0RJ--P P0VJN-P Y 0R00-P P0VJN-P Y L :00 0ohm 00MHz 00m 0.ohm HMI_TX# HMI_TX HMI_TX# HMI_TX R0 0R00-P HMI_TX#_ L M0H-00-P Y HMI_TX_ R0 0R00-P HMI_TX#0 HMI_TX#0 HMI_TX#0_ L M0H-00-P Y HMI_TX0 HMI_TX0_ HMI_TX0 +V_RUN HMI ONN +V_HMI RV-0--P +V_HMI_ RV-0--P :0 +V_RUN RN +V_RUN RNKJ-P +.V_RUN Y R 0KRJ--P OE# OE# U N Y NT0PWR-P +.V_RUN Y RN RNKJ--P R R HMI_TX# HMI_TX# HMI_TX HMI_TX R 0R00-P 0R00-P HMI_TX#_ L M0H-00-P Y HMI_TX_ 0R00-P HMI_TX# HMI_TX HMI_TX# HMI_TX R0 R R 0R00-P 0R00-P HMI_TX#_ L M0H-00-P Y HMI_TX_ 0R00-P HMI_TX#0_ HMI_TX0_ HMI_TX#_ HMI_TX_ HMI_TX#_ HMI_TX_ HMI_TX#_ HMI_TX_ TM_T- TM_T+ TM_T0- TM_T0+ TM_T- TM_T+ TM_LOK- 0 TM_LOK+ HMI +V_POWER L REERVE# E HOT_PLU_ETET /E_ROUN N 0 TM_T0_HIEL N TM_T_HIEL N TM_T_HIEL N TM_LOK_HIEL KT-U--P.00. HMI_T_ HMI_LK_ HMI_E HMI_N R0 R0 HMI_P_ HMI_HP R0 KRJ--P TP TP TP TP 0R00-P 0R00-P :0 Y R0 KRF-P HMI_T HMI_LK HMI_HP HMI_T HMI_LK Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM RT/HMI - ize ocument Number Rev ate: Wednesday, November 0, 00 heet of
L 0 :00 NP 0 0 0 0 NP L_LK L_T L_0+ L_0- L_+ L_- L_+ L_- L_K+ L_K- L_TT LMP_TT# KLITEON L_MT L_MLK +VLW_FX FX_PWR_R - Layout hange L_LK +V_LW L_T R KRJ--P L_0+ L_0- L_+ L_- L_+ L_- L_K+ L_K- L_TT TP0 00 modify :00 +.V_RUN U0VKX-P L_MT_ 00RJ--P R L_MLK_ 00RJ--P R 00KRJ--P R R0 00KRJ-L-P U0VKX-P E U0VKX-P +.V_RUN R 0KRJ--PY L_MT_ L_MLK_ +LV L_MT_ :0 L_MLK_ R V--P :00 follow Lanai UM +.V_LW +.V_LW Populate R for PT implementation only. I_PWM PopulateR for platform without PT support. No tuff for iscrete PT support due to back up plan. :00 FX_PWR_R INVERTER POWER,,, RUN_ON R_PWR_R RUN_ON _PWR_R L_L_ET +.V_RUN +LV :0 00ohm 00MHz 00m 0.ohm Mic Power V_U_MI +V_RUN_RMER ENLE V :0 +V_LW R 0KRJ-L-P FP_TL 0 U0VKX-P Q :0 UVMX-P U0VKX-P V--P Y Y 0R00-P 0UVKX-P 00 Y 0UVKX-P 00 Y 0 KP0VKX-P U0VKX-P Q IV-T-P Q N00-F-P KP0VKX-P +PWR_R R 00KRJ--P R 00KRJ--P JE-ON-P-U 0.F00.0 Q IV-T-P R0 0R-0-U-P +.V_RUN L LM0N-P UVKX-P U0VKX-P Y +V_RUN Q FNP-NL-P Y R Y 00KRJ--P U0VKX-P U0VKX-P Y R 00KRJ--P R 0RJ-L-P MER 0 MER_U- MER_U+ INVERTER_L_ET# :0 INVERTER_L_ET#, MER Power UX_L_L_ET# UX_L_L_ET#, :00 +V_RUN_RMER V_U_MI U_MI_LK R R0 RJ--P U_MI_LK EL LM0N-P U_MI_IN0_R R RJ--P U_MI_IN0_R_ EL LM0N-P R Y 0KRJ--P OUT N Q0 R IN R Y TEU-F-P _V_ON U_MI_LK_ 0 U_MI_IN0 0 _V_ON ENV ENV L able delect L_TT_EN L_TT_EN R 0R-0-U-P IH_UP- T--F-P Item0 L LWN00QLUP Y N00W-F-P +.V_LW R KRJ--P OUT FP_TL L_EN R IN N R Q TEU-F-P L POWER Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. MLX-ON--P 0.F0.0 R 0R-0-U-P IH_UP+ Thurman UM ize ocument Number Rev LV - ate: Thursday, November, 00 heet of
We would like to change X to.00.0 and X to.000.. +RT_ELL RT circuitry +.V_RT_LO +RT_ELL U0VKX-P RV-0--P UVMX--P RT R 0KRJ-L-P R +RT_ KRJ--P R +RT 0KRJ-L-P R MRJ--P RV-0--P RT_T_ET# RT_T_ET# KP0VKX-P MLX-ON-0-P R0 -:0 0.F000.00 0RJ--P U0VKX-P IH-trap PIN Y U OF IH_INTRUER# INTRUER# LP_L0 IH_RTRT# FWH0/L0 E integrated Vccus_0,Vccus_,VccL_ F LP_L +RT_ELL RTRT# FWH/L F LP_L IH_INTVRMEN FWH/L IH_INTVRMEN High=Enable Low=isable F LP_L INTVRMEN FWH/L F integrated VccLan_0VccL_0 IH_LN00_LP LP_LFRME# LN00_LP FWH/LFRME# R IH_LN00_LP High=Enable Low=isable 0KRJ-L-P IH_RTX LP_RQ0# IH_RTX RTX LRQ0# F LP_RQ# LRQ#/PIO E R 0MRJ-L-P RTX IO_0TE X LN_LK 0TE F H_0M# IH_RT_X 0M# R 0R00-P LN_RTYN H_PRTP# R PRTP# F H_PLP# 0RJ--P :00 LN_RX0 PLP# E 0 Y P0VJN-P LN_RX H_FERR# LN_RX FERR# X-KHZ-P H_PWROO LN_TX0 PUPWR/PIO E0 LN_TX 0 H_INNE# LN_TX INNE# F +.V_PIE_IH H H_INIT# IH_Z_OE_ITLK R000 H_INTR# 0 IH_Z_OE_ITLK RJ--P LN_OK#/PIO INIT# E IH_Z ITLK R00 LN_OMP INTR 0 IO_RIN# IH_Z ITLK RJ--P R RF-L-P LN_OMPI RIN# H LN_OMPO LN_OMP place within 00 mil of IHM H_NMI# IH_Z_OE_YN Z_ITLK NMI R00 H_MI# 0 IH_Z_OE_YN RJ--P J IH_Z YN Z_YN H_IT_LK MI# R00 IH_Z YN RJ--P J H_YN H_TPLK# IH_Z_OE_RT# Z_RT# TPLK# R00 0 IH_Z_OE_RT# RJ--P E IH_Z RT# R00 H_RT# IH_Z RT# RJ--P This circuit is only IH_Z_OE_IN0 THRMTRIP# E 0 IH_Z_OE_IN0 J H_IN0 H needed if the platform +.V_RUN IH_Z IN H_IN TP IH_Z IN H H_IN has the NIFFER IE_0 IH_Z_OE_OUT H_IN 0 V R0 IE_, LE_MK# 0 IH_Z_OE_OUT RJ--P IH_Z OUT Z_OUT U R0 IE_ IH_Z OUT RJ--P E H_OUT V R IE_ PEKER_ET# T IE_, PEKER_ET# E0 RT_T_ET# H_OK_EN#/PIO V 0KRJ--P IE_ H_OK_RT#/PIO T IE_ T_T#_R IE_ T_T# F0 TLE# T IE_ T_RX0- T Q IE_ T_RX0- F T_RX0+ T0RXN R N00-F-P IE_0 T_RX0+ F T_TX0- T_TX0-_ T0RXP 0 T IE_ T_TX0- H T_TX0+ T_TX0+_ T0TXN V 00P0VKX-P IE_ T_TX0+ H T0TXP V R0 00P0VKX-P IE_ U istance between the IH-M and cap on the "P" IE_ TRXN V Y signal should be identical distance between the IE_ IH-M and cap on the "N" signal for same pair. T_TX-_ TRXP U 0RJ--P TP J T_TX+_ TTXN J IE_0 TP TTXP 0 IE_ F IE_ TRXN F T_TX-_ TRXP E IE_# TP T_TX+_ TTXN # Y E IE_# TP00 TTXP # Y IH_RV IH-trap PIN Z_OUT IH_RV R R0 Y Y KRJ--P KRJ--P +.V_RUN P0VJN-P XOR hain Entrance trap IH_RV Z_OUT escription 0 0 0 RV Enter XOR hain 0 Normal Operation(default) et PIE port cofig bit LK_PIE_T# LK_PIE_T# LK_PIE_T T_LKN LK_PIE_T T_LKP M_TI R RF-L-P TRI# TRI M_T Place within 00 mil of IH-M hange to.0ih.m0 RT LN/LN IH T LP PU IE IH-M--P-U.0IH.0U I IHM QM MM# 0 IOR# W IOW# W K# Y IEIRQ Y IORY Y REQ W IE_IOR# IE_IOW# IE_K# IE_IRQ IE_IORY IE_REQ TP0 LP_L[0..] LP_LFRME# TP TP IO_0TE H_0M# IE_[0..] IE_[0..] +.V_RUN H_PRTP#,0, H_PLP# +.V_RUN H_FERR# H_PWROO H_INNE# H_INIT# H_INTR# 0KRJ--P IO_RIN# H_NMI# H_MI# H_TPLK# IE_# IE_# IE_IOR# IE_IOW# IE_K# IE_IRQ IE_IORY IE_REQ R THERMTRIP#_IH LP_L[0..] R 0KRJ--P +.0V_P IE_[0..] IE_[0..] R RJ--P Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM ize ocument Number Rev IHM-RT/IE/LP/HI (/) - ate: Thursday, November, 00 heet 0 of
PI_ERR# PI_TRY# PI_IRY# PI_PLOK# +.V_RUN PI_PIRQ# PI_REQ#0 PI_PIRQ# U_IE# U_IE# +.V_RUN LNE +.V_RUN PI_0# PI_NT#0 IH_PI_#_R PI_NT# PIE Interface Routing LNE Miniard WWN LNE Miniard WLN LNE LNE LNE IH-trap PIN OOT IO trap PI_NT#0 (R) 0 No use Express ard No use LN 0 PI LP PI_NT# (R) PI_# (R) swap override strap RP +.V_RUN 0 _WPN_PIE_RT# PI_PIRQ# PI_PIRQ# PI_PERR# OOT IO Location PI(efault) low = swap override enable high = default PI I/F PULL HIH _WLN_PIE_RT# _N_PIE_RT# PI_0#_R RJ-P U_O# U_O# +.V_RUN 0 PI_TOP# PI_EVEL# PI_FRME# PI_REQ# IO should not enable the internal PIO pull up RN RNKJ--P-U RN0KJ--P R 0KRJ--P RN R RP RN00KJ--P R Y R R R RNKJ--P-U R 0KRJ--P Y Y _WWN_PIE_RT# _N_PIE_RT# _WLN_PIE_RT# _LOM_PIE_RT# IH_PI_0# RJ-P +.V_LW U0 KRJ--P KRJ--P KRJ--P Y Y RN RN0KJ--P N LV0W--P +.V_U R PI_[0..] PIE_RX- PIE_RX+ PIE_TX- PIE_TX+ PIE_RX- PIE_RX+ PIE_TX- PIE_TX+ PIE_RX- PIE_RX+ PIE_TX- PIE_TX+ PIE_RX- PIE_RX+ PIE_TX- PIE_TX+ IH_E_PI_LK 0R00-P U_O# U_O# U_O# U_O0# +.V_U PI_[0..] PI_PIRQ# PI_PIRQ# PIE_RX- PIE_RX+ PIE_TX- PIE_TX+ PIE_RX- PIE_RX+ PIE_TX- PIE_TX+ PIE_RX- PIE_RX+ PIE_TX- PIE_TX+ IO_PI_# IH_E_PI_O IH_E_PI_IN Layout Note: Place R, R and R within 00 mils from IH. PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ PI_PIRQ# PI_PIRQ# PI_PIRQ# PI_PIRQ# U_O0# U_O# +.V_U RP 0 U_O# U_O# U_O# U_O# 0 0 E 0 0 E 0 0 F E E E E 0 F PIRQ# PIRQ# PIRQ# 0 PIRQ# U0VKX-P U0VKX-P Miniard WLN U OF PIE_TXN_ PIE_TXP_ U_O0# U_O# U_O# U_O# U_O# U_O# U_O# U_O# U_O# U_O# PI PI_REQ#0 REQ0# PI_NT#0 NT0# PI_REQ# REQ#/PIO0 E PI_REQ# PI_NT# NT#/PIO _WWN_PIE_RT# PI_NT# REQ#/PIO PI_NT# _WWN_PIE_RT# NT#/PIO F TP PI_NT# NT#/PIO 0 _LOM_PIE_RT# REQ#/PIO PI E#[0..] _LOM_PIE_RT# PI E#[0..] PI E#0 /E0# PI E# /E# E PI E# /E# F PI E# /E# E Interrupt I/F PI_IRY# IRY# PI_PR PR PI_RT#_ PIRT# PI_EVEL# EVEL# PI_PERR# PERR# PI_FRME# FRME# PI_PLOK# PLOK# PI_ERR# ERR# F0 PI_TOP# TOP# PI_TRY# TRY# PI_PLTRT# PLTRT# LK_PI_IH PILK 0 IH_PME# PME# :00 _WPN_PIE_RT# PIRQE#/PIO F _WLN_PIE_RT# PIRQF#/PIO _N_PIE_RT# PIRQ#/PIO F PIE_MR_ET# PIRQH#/PIO IH-M--P-U.0IH.0U I IHM QM MM# 0 Miniard WWN U OF PIE_RX- P PIE_RX+ PERN P PIE_TX- 0 U0VKX-P PIE_TXN_ PERP N PIE_TX+ 0 PIE_TXP_ PETN U0VKX-P N PETP RN0KJ-L-P M PERN M PERP L PETN L PETP K PERN K PERP J PETN J PETP H PERN H PIE_TXN_ PERP U0VKX-P PIE_TXP_ PETN U0VKX-P PETP Express ard F PERN F PERP E PETN E PETP LN PERN/LN_RXN U0VKX-P PIE_TXN_ PERP/LN_RXP PIE_TXP_ PETN/LN_TXN U0VKX-P PETP/LN_TXP R R0 IH_E_PI_LK_R RJ-P IH_PI_# PI_LK IH_PI_#_R PI_0# E PI_# IH_E_PI_O_R RJ-P IH_E_PI_IN PI_MOI F PI_MIO J O0# O#/PIO0 O#/PIO E O#/PIO F O#/PIO O#/PIO O#/PIO0 J O#/PIO O# H O# PI-Express PI irect Media Interface U PI_IRY# PI_PR PI_EVEL# PI_PERR# PI_FRME# TP PI_ERR# PI_TOP# PI_TRY# LK_PI_IH IH_PME# MI0RXN V MI0RXP V MI0TXN U MI0TXP U MIRXN Y MIRXP Y MITXN W MITXP W MIRXN MIRXP MITXN MITXP _WPN_PIE_RT# _WLN_PIE_RT# _N_PIE_RT# 0 PIE_MR_ET# URI R R RJ--P MI_MTX_IRX_N0 MI_MTX_IRX_N0 0 MI_MTX_IRX_P0 MI_MTX_IRX_P0 0 MI_MRX_ITX_N0 MI_MRX_ITX_P0 MI_MRX_ITX_N0 0 MI_MRX_ITX_P0 0 MI_MTX_IRX_N MI_MTX_IRX_N 0 MI_MTX_IRX_P MI_MTX_IRX_P 0 MI_MRX_ITX_N MI_MRX_ITX_P MI_MRX_ITX_N 0 MI_MRX_ITX_P 0 MI_MTX_IRX_N MI_MTX_IRX_P MI_MRX_ITX_N MI_MRX_ITX_P MI_MTX_IRX_P 0 MI_MRX_ITX_N 0 MI_MRX_ITX_P 0 / Mediaard MI_MTX_IRX_N 0 URI close to IHM 00 mils and Trace impedance should be 0 ohm +/- % IEL PI_RT# +.V_U m 0 PLT_RT#_ ate: Thursday, November, 00 heet of LK_PI_IH LK_IHPI PLTRT# 0,,,,, Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM IHM-PIE/U/PI/MI (/) - ize ocument Number Rev INT REQ NT PI Interface Routing dd uffers as need for Loading and Fanout concerns LK_IH_M EMI Mode Place close to IH-M R 0RJ--P MI_MTX_IRX_N MIRXN MI_MTX_IRX_N 0 MI_MTX_IRX_P MIRXP MI_MTX_IRX_P 0 MI_MRX_ITX_N MITXN MI_MRX_ITX_P MI_MRX_ITX_N 0MI_OMP R place MITXP MI_MRX_ITX_P 0within 00 mil of IHM LK_PIE_IH# MI_LKN T LK_PIE_IH# LK_PIE_IH +.V_PIE_IH MI_LKP T LK_PIE_IH MI_OMP MI_ZOMP Y U0 U R RF-L-P MI_IROMP Y U U IH_UP0- UP0N IH_UP0- IH_UP0+ UP0P IH_UP0+ U IH_UP- UPN H IH_UP- IH_UP+ UPP H IH_UP+ U UPN H UPP H U iometric UPN J UPP J U amera IH_UP- UPN K IH_UP- IH_UP+ UPP K IH_UP+ U Express ard IH_UP- UPN K IH_UP- IH_UP+ UPP K IH_UP+ U T IH_UP- UPN L IH_UP- IH_UP+ UPP L IH_UP+ U MINI ard WLN IH_UP- UPN M IH_UP- IH_UP+ UPP M IH_UP+ U UPN M UPP M IH_UP- UPN N IH_UP- IH_UP+ UPP N IH_UP+ URI# F URI F IH-M--P-U.0IH.0U I IHM QM MM# 0 RF-L-P U N Y NLV0KR-P R Y 0RJ--P U0VKX-P R0 RJ--P Y P0-P Y EMI
+.V_U RN +.V_RUN +.V_WLN +.V_U RN RN +.V_RUN RNKJ--P RN RNKJ--P E_ME_LERT ME_E_LERT RN0KJ--P,, MEM_LK IH_MT N00W-F-P Mus address FOR R These are for backdrive issue. :0 IO_EXT_I# IH_RI# RN0KJ--P U IH_MLK MEM_T,, IH_MLK IH_MT U Y :00 +.V_U N00W-F-P RN RNKJ--P WLN_LK WLN_T WLN_LK WLN_T _V_ON R 00KRJ--P IH_PWR R 00KRJ--P :00 IH_LN_RT# R 0KRJ--P IH_L_PWROK R MRJ--P UPWROK R 0KRJ--P Y R0 KRJ--P IH_PIE_WKE# U OF +.V_RUN +.V_RUN RN0 RN R0 R R R R RN Y Y Y 0KRJ--P IO_EXT_MI# 0KRJ--P IH_L_RT# PIE_MR_ET# U_MR_ET# RN00KJ--P :00 RN0KJ--P IRQ_ERIRQ RV_THRM# PIO_IH WPN_RIO_I# RN00KJ--P IH-trap PIN No Reboot trap IH_PKR LOW = efaule LOM_M_LERT# Note: o not Populate this 0 ohm resistor for now. :00 0 MH_IH_YN# IH_MLK IH_MT support F.0 TP,, ITP_REET# 0 PM_MUY# Y, LKRUN# IH_PIE_WKE#, IRQ_ERIRQ TP,, IMVP_PWR TP 0 IH_RV IH_MLK IH_MT IH_L_RT# IH_MLK IH_MT IH_RI# LPP# ITP_REET# IH_TP PM_MUY# LKRUN# IMVP_PWR J MLK MT LINKLERT# MLINK0 E MLINK F RI# F U_TT#/LPP# Y_REET# H MUY#/PIO0 LOM_IH_MLERT# R 0RJ--P MLERT#/PIO H_TP_PI# H_TP_PI# E0 H_TP_PU# TP_PI# H_TP_PU# TP_PU# LKRUN# IH_PIE_WKE# E IRQ_ERIRQ WKE# F RV_THRM# ERIRQ THRM# J0 VRMPWR MH_IH_YN#_R U_IE# U_IE# J 0KRJ--P PIO_IH TH/PIO TP J IO_EXT_WKE# TH/PIO IO_EXT_WKE# H LOM_IH_MLERT# IO_EXT_MI# TH/PIO IO_EXT_MI# E 0KRJ--P IO_EXT_I# PIO IO_EXT_I# LKRUN# PIE_MR_ET# PIO PIE_MR_ET# KRJ--P U_MR_ET#_R TH0/PIO U_MR_ET# H R KRJ--P PIO E U_MR_ET# PIO0 U_MR_ET# 0 U_MR_ET# LOK/PIO H IE_RT_MO# QRT_TTE0/PIO IE_RT_MO# T_LKREQ# QRT_TTE/PIO T_LKREQ# PLTRT_ELY# TLKREQ#/PIO +.V_RUN TP F :00 WPN_RIO_I# LO/PIO WPN_RIO_I# J _V_ON TOUT0/PIO _V_ON 0 TOUT/PIO R Y KRJ--P IH_PKR 0 IH_PKR PKR R J TP MH_IH_YN#_R J 0R00-P MH_YN# IH_RV J TP M YPIO PIO MI T PIO LOK POWER MT ontroller Link T0P/PIO TP/PIO TP/PIO PIO LK LK ULK LP_# LP_# LP_# _TTE#/PIO PWROK PRLPVR/PIO TLOW# PWRTN# LN_RT# RMRT# K_PWR LPWROK LP_M# L_LK0 L_LK L_T0 L_T L_VREF0 L_VREF L_RT# LPIO0/PIO LPIO/PIO0 LPIO/PIO LPIO/PIO IH-M--P-U.0IH.0U I IHM QM MM# 0 J J0 F T_R0 U_HP_N_ENE LK_IH_M LK_IH_M IH_ULK IO_LP_# F IO_LP_# IO_LP_# H E J IO TTE# IH_PWR PRLPVR E IH_TLOW# R KRJ--P IO_PWRTN# IO_PWRTN# +.V_RUN H0 IH_LN_RT# TP RMRT IH_RMRT#, R 0R00-P UPWROK, R Y 0RJ--P R0 E LK_PWR LK_PWR KRF-P E J F E F F H J J J F IH_L_PWROK IH_LP_M# L_LK0 IH_L_LK L_T0 IH_L_RT0# L_VREF0 LK_IH_M LK_IH_M TP IO_LP_# TP IO_LP_# TP IH_PWR 0, PRLPVR 0,, IH_L_PWROK 0, TP R L_LK0 0 TP0 L_T0 0 IH_L_RT0# 0 PIE_MR_ET# ME_E_LERT E_ME_LERT WOL_EN WOL_EN KRJ--P U_HP_N_ENE 0,, U0VKX-P +.V_U R RF--P LK_IH_M and LK_IH_M EMI Mode Place close to IH-M LK_IH_M R0 0RJ--P LK_IHM P0VN-P Y Y LK_IH_M R 0RJ--P LK_IHM P0VN-P Y Y EMI High=No Reboot LKRUN# R 0KRJ--P Y Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thurman UM ize ocument Number Rev IHM-L/PM/PIO (/) - ate: Wednesday, November 0, 00 heet of