Microsoft PowerPoint - AiO W Power Supply for All-in-One PC - bilingual.ppt

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1 一体式计算机电源参考设计 All-in-One PC Power Supply Reference Design

2 议程 Agenda EPA 能效要求 EPA efficiency requirements 参考设计目标 Reference design goals 拓扑结构选择 Topology selection PFC 段设计 PFC stage design LLC 段设计 LLC stage design 同步整流 (SR) 设计 SR design 待机管理及协调 Standby management and handshaking 参考设计性能 Reference design performance 后续工作 Future work 总结 Summary 2

3 规范机构的能效目标 Energy Efficiency: Regulatory Agencies Targets 降低待机 ( 空载 ) 能耗 Standby (no load) Power Reduction 通过电源的总电能中约有 25% 是在待机模式下消耗的 ~25% of total energy passing through power supplies is in standby mode [13] 世界各地的规范机构纷纷瞄准降低待机能耗 Concerted effort by worldwide regulatory agencies 提升工作能效 Active Mode Efficiency Improvement 通过电源的总电能中约有 75% 是在工作模式下消耗的 ~75% of total energy passing through power supplies is in active mode [13] 功率因数校正 (PFC)( 或谐波减少 ) Power Factor Correction (or Harmonic Reduction) 遵从 IEC 规范 ( 欧盟 日本 ) Applicable with IEC [11] (Europe, Japan) 某些能效规范也要求功率因数 (PF)>0.9 Some efficiency specifications also require >0.9 PF. 例如 : 能源之星 4.0 版计算机规范 example: computers (ENERGY STAR rev. 4 [12] ) Korea e-standby program [8] China CSC [6] (ex-cecp), Japan Top Runner [9] program Japan Eco Mark [10] program Australia AGO [7] California CEC [5] Europe COC [4] ENERGY STAR [3] 3

4 高能效规范最新进展 - 计算机 Update on Energy Efficiency Regulations - Computing 计算机 Computing 台式机 Desktops: 能源之星 5.0 版规范,2009 年 7 月 1 日生效 ENERGY STAR 5.0 effective on Jul. 1, PLUS 及计算产业气候拯救行动 (CSCI) 80 PLUS & Climate Savers Computing Initiative 分级能效等级 Tiered efficiency levels 膝上型 ( 更多信息参见 能源之星 2.0 版外部电源规范 ) Laptops (More information at ENERGY STAR 2.0 for External Power Supplies) 能效 Efficiency: 87% 待机 ( 空载 ) 能耗 Standby (no load) power: 500 mw 功率因数 PF 0.9 4

5 高能效规范最新进展 - 机顶盒 Update on Energy Efficiency Regulations - STB 机顶盒 (STB) Set-Top Boxes 能源之星 2.0 版,2009 年 1 月 1 日生效 ENERGY STAR 2.0 effective on Jan 1, 2009 欧盟行为指令第 7 版,2009 年 1 月 1 日生效 Europe Code of Conduct version 7 effective Jan 1, 2009 标准基于最大允许总能耗 TEC( 千瓦时 / 年 ) 或容限 Standard is based on maximum allowable TEC (Total Energy Consumption in kwh/year) or allowance 基础容限取决于机顶盒类型 ( 有线 卫星等 ) Base Allowance depends on the type of STB (Cable, Satellite, etc ) 附加功能容限 (DVR 等 ) Additional functionalities allowance (DVR, etc ) 每年能耗容限 ( 千瓦时 / 年 )= 基础功能容限 + 附加功能容限 Annual Energy Allowance (kwh/year) = Base Functionality Allowance + Additional Functionalities Allowance 5

6 高能效规范最新进展 - 固态照明 Update on Energy Efficiency Regulations - SSL 固态照明 (SSL) 灯具 Solid State Lighting Luminaires 能源之星 1.1 版自 2009 年 2 月 1 日开始生效 ENERGY STAR 1.1 effective on Feb. 1, 2009 关态能耗为零 Off-state power: 0 最低能效 ( 流明 / 瓦 ) 要求根据应用的不同 ( 聚光灯 户外灯等 ) 而不同 Minimum efficacy (Lumen/Watt) requirements by applications (downlights, outdoor lights, etc ) 功率因数 PF 0.9 针对商业应用 for Commercial 0.7 针对住宅应用 for Residential 能源之星 1.2 版自 2009 年下半年开始生效 ENERGY STAR 1.2 effective in 2H2009 能源之星 针对 LED 灯泡的其它要求 ENERGY STAR additional requirements for LED bulbs 功率因数 PF 0.7 高系统能效 高能效电源 High system efficacy high efficiency power supply 更详尽及最新的能效机构及规范信息, 请访问 参见 PSMA 能效规范数据库 For exhaustive and up-to-date information on agencies and regulations, check the PSMA energy efficiency data base at: 6

7 单路输出计算机电源能效目标 ( 服务器, 刀片式服务器, 一体机 ) Efficiency Targets for Single-output Computing Power Supplies (Servers, Blades, All-in-1) Efficiency (%) Levels Specification 20% of rated output power 50% of rated output power 100% of rated output power Effective Date Single-Output Non-Redundant PFC 0.9 at 50% 81% 85% 81% Start June 2007 Single-Output Single-Output Non-Redundant PFC 0.9 at 50% Single-Output Non-Redundant PFC 0.9 at 50% Single-Output Non-Redundant PFC 0.9 at 50% 85% 89% 85% 88% 92% 88% Sources: 80 PLUS : Climate Savers Computing Initiative: ENERGY STAR : Start June 2008 Start June % 94% 91% Target All in 1 PC 本参考设计的能效目标 Target for this reference design 7

8 议程 Agenda EPA 能效要求 EPA efficiency requirements 参考设计目标 Reference design goals 拓扑结构选择 Topology selection PFC 段设计 PFC stage design LLC 段设计 LLC stage design 同步整流 (SR) 设计 SR design 待机管理及协调 Standby management and handshaking 参考设计性能 Reference design performance 后续工作 Future work 总结 Summary 8

9 参考设计目标 Reference design goals 必须满足美国环保署 (EPA) 最高能效要求 (80 PLUS 银级或金级 ) Must meet highest EPA eff. requirements (80+ silver or gold) 必须适合一体机 ( 苹果 imac-0.23 dm 3 ) Must fit into All-in-1 PC (Apple imac 0.23 dm 3 ) 输入电压范围为 90 至 265 Vac Input voltage range Vac 单路输出 --12 V 分为 2 个端子 Single output 12 V divided into two terminals: => 待机端子 : 持续提供功率 Standby terminal: delivers power all the time - 关态电流消耗 50 ma 50 ma in off mode - 休眠模式 100 ma 100 ma in sleep mode - 工作模式最大 5 A 5 A maximum in active mode => 电源端子 : 工作模式下提供功率 ( 最大 15 A) Power terminal: delivers power in active mode (15 A max.) 最大总输出功率 216 W Total maximum output power 216 W 9

10 议程 Agenda EPA 能效要求 EPA efficiency requirements 参考设计目标 Reference design goals 拓扑结构选择 Topology selection PFC 段设计 PFC stage design LLC 段设计 LLC stage design 同步整流 (SR) 设计 SR design 待机管理及协调 Standby management and handshaking 参考设计性能 Reference design performance 后续工作 Future work 总结 Summary 10

11 PFC 段选择 PFC stage selection 本应用的输入功率大于 75 W, 故需要 PFC Input power for this application is > 75 W => need a PFC 安森美半导体提供 3 种模式的方案 ON Semiconductor offers solutions for three modes: 工作模式 Operating Mode 主要特征 Main Feature I L 连续导电模式 (CCM) 总是硬开关 Always hard switching 电感值最大 Inductor value is largest 均方根电流最小 Minimized rms current 如 :NCP1654 I L 临界导电模式 (CrM) 大均方根电流 Large rms current 开关频率不固定 Switching frequency is not fixed 如 :NCP1606 I L T clamp T clamp 频率钳位临界导电模式 (FCCrM) 大均方根电流 Large rms current 频率受限 Frequency is limited 线圈电感降低 Reduced coil inductance 如 : NCP

12 PFC 段选择 -FCCrM PFC stage selection - FCCrM 300 W 宽主电压输入范围 PFC 能效测量结果 Efficiency of a 300-W, wide mains PFC has been measured: Efficiency at 100 Vrms NCP1605 (FCCrM) NCP1606 (CrM) NCP1654 (CCM) 20% 30% 40% 50% 60% 70% 80% 90% 100% Output Load 依照此图,FCCrM 是能效最高 同时保持合理成本的方案 Frequency Clamped CrM seems the most efficient solution while keeping reasonable cost 12

13 PFC 段选择 - 控制器 PFC stage selection controller 我们应用中的一些有用特性 Some features useful in our application: - 频率钳位临界导电模式 (FCCrM) Frequency Clamped Critical Conduction Mode - 无损耗高压启动电流源 Lossless High Voltage Current Source for Startup - 软跳周期用于低能耗待机模式 Soft Skip Cycle for Low Power Standby Mode - 快速交流线路 / 负载瞬态补偿 Fast Line / Load Transient Compensation - pfcok 信号提示 PFC 已就绪 Signal to Indicate that the PFC is Ready pfcok -VCC 范围 :10 V 至 20 V VCC range: from 10 V to 20 V - 输出欠压保护 (UVP) 及过压保护 (OVP) Output Under and Overvoltage Protection - 输入欠压 (BO) 检测 Brown Out Detection NCP1605 集成了一体机电源所需全部特性, 因此降低总成本 NCP1605 integrates all needed features for all-in-one power supply and thus reduces overall cost 13

14 电源段选择 Power stage selection 功率及功率密度增加 Increasing power & Power Density 有源钳位正激 Active clamp forward 半桥双电感加单电容 Half-bridge LLC 正激 Forward 反激 Flyback 14

15 电源段选择 -LLC 优势 Power stage selection LLC benefits 串联型谐振转换器支持在相对较宽的输入电压和输出负载范围下工作 Series type of resonant converter that allows operation over relatively wide input voltage and output load ranges 元器件数量有限 : 谐振储能元件能部分或全部集成在主变压器中 Limited number of components: resonant tank can be partially or fully integrated into main transformer 初级开关管在所有负载条件下零电压开关 (ZVS) Zero Voltage Switching (ZVS) condition for the primary switches under all load conditions 次级整流器在所有负载条件下零电流开关 (ZCS) Zero Current Switching (ZCS) for secondary rectifier under all load conditions 应用简单的同步整流 (SR) Simple synchronous rectification (SR) implementation 高性价比 高能效 容易处理电磁干扰 (EMI) 的方案 Cost effective, highly efficient and EMI friendly solution 15

16 电源段选择 - 控制器 Power stage selection controller 特性 Features: - 50 khz 至 500 khz 的高频工作 High-frequency operation from 50 khz up to 500 khz V 高压浮动驱动器 600 V high-voltage floating driver NCP 可调节最小开关频率 (3% 精度 )Adjustable minimum switching frequency (3% accuracy) ns 至 2 µs 的可调节死区时间 Adjustable deadtime from 100 ns to 2 us - 藉外部可调节软启动提供的启动序列 Startup sequence via an externally adjustable soft-start - 输入欠压保护结合闩锁输入 Brown-out protection combined with latch input - 基于定时器的自动恢复及立即闩锁过流保护 Timer-based auto-recovery and immediate latched OCP - 可藉导通 / 关闭控制来关闭输入 ( 跳周期模式 ) Disable input for ON/OFF control (skip mode) µa 的低待机电流 Low startup current of 300 µa - 1 A/0.5 A 峰值电流汲极 / 源极驱动能力 1 A / 0.5 A peak current sink / source drive capability - 共用集极或射极光耦合器连接 Common collector or emitter optocoupler connections NCP1397 用于一体机应用的优势 Benefits for all-in-1 application: 不需要驱动变压器 => 满足尺寸限制 No driver transformer needed => size restrictions 简单应用跳周期模式 => 适合待机所需 Simple skip mode implementation => needed for standby 简单应用过流保护 => 降低成本 Simple OCP implementation => cost impact NCP1397 是 LLC 电源段的高性价比及可靠方案 NCP1397 is cost effective and reliable solution for LLC power stage 16

17 电源段选择 - 同步整流好处 Power stage selection SR justification 6 Losses [W] 此处 SR 应当关闭 Here should be SR turned off 输出功率的 2.33% 2.33 % of output power 输出功率的 1.4% 1.4 % of output power 输出功率的 2.17% 2.17 % of output power Output current [A] 采用单个肖特基二极管时计算的损耗 Losses calculated for one Shottky diode 采用单个同步整流 MOSFET( 含驱动 ) 时计算的损耗 Losses calculated for one SR MOSFET (including driving) 高于特定输出功率时, 同步整流 (SR) 技术能大幅提升能效 Synchronous Rectification can significantly improve efficiency above certain output power 17

18 电源段选择 -SR 控制器 Power stage selection SR controller NCP4303 我们应用中的一些有用特性 Some features useful in our application: - 工作在 CCM 及 DCM 应用 Operates in CCM and DCM Applications - 真正的次级零电流检测 (ZCD), 带可调节阈值 True Secondary ZCD with Adjustable Threshold - 自动寄生电感补偿 Automatic Parasitic Inductance Compensation - 从电流感测 (CS) 到驱动器的 50 ns 关闭时间延迟 50 ns Turn off Delay from CS to Driver - 提供外部信号接口, 以用于 CCM 模式 Interface to External Signal for CCM Mode - 触发器输入以进入待机模式 Trigger Input to enter Standby Mode - 与 Vcc 电平无关的可调节最小导通时间 Adjustable Min Ton Independent of Vcc Level - 与 Vcc 电平无关的可调节最小关闭时间 Adjustable Min Toff Independent of Vcc Level - 5 A/2.5 A 峰值电流驱动能力 5 A / 2.5 A Peak Current Drive Capability - 电压范围高达 28 V Voltage range up to 28 V - 12 V 或 5 V 的门驱动钳位 Gate drive clamp of either 12 V or 5 V - 低启动及待机电流消耗 Low startup and standby current consumption - 最高工作频率达 500 khz Maximum Frequency of Operation up to 500 khz NCP4303 是适合任何同步整流 (SR) 系统的高性能驱动器 NCP4303 is high performance driver for any SR system 18

19 次级同步整流导通 / 关闭 Secondary SR turn on/off 仅在高于特定功率时使用同步整流 (SR) 来提升能效 Usage of SR boosts efficiency above certain power only 低输出电流时采用同步整流 (SR) 工作会呈现低能效 Operation of SR for low output currents is inefficient 需要根据输出电流信息来关闭同步整流 (SR) SR needs to be turned off based on the output current information 19

20 次级整流器过温保护 OTP for secondary rectifiers 最大输出电流是 18 A 散热风扇或次级整流系统故障时, 数据或开关电源本身可能遭遇严重损坏 Max output current is 18 A. In case of fan or secondary rectification system fail serious damage can occur to data or SMPS itself 需要保护开关电源, 防止温度过高, 并提供信号给电脑用于风扇速度控制, 及在开关电源可能出现故障前关闭电脑 SMPS needs to be protected against over temperature and provide a signal to PC for fan speed control and to shut down prior the SMPS would fail 20

21 待机管理 Standby management 根据一体机规范, 待机模式下电源端子必须采用外部开关来关闭 According to All-in-1 spec the power terminal has to be turned off during standby mode by an external switch 与 PFET 相比,NFET 提供较低的导通阻抗 NFET provides low R ds on compare to PFET 21

22 完整功能框图 Complete block diagram FCCrM 将前段能效提至最高, 减小 PFC 线圈尺寸 FCCrM maximize eff. of front stage, reduces PFC coil size ZVS 提升能效至最高, LLC 拓扑结构将尺寸减至最小 ZVS maximizes efficiency, LLC topology minimizes dimensions SR 提升中 高负载时的能效 SR improves eff. under Medium and high loads 待机时断开电源输出连接 Disconnects pwr. output during STBY 22

23 议程 Agenda EPA 能效要求 EPA efficiency requirements 参考设计目标 Reference design goals 拓扑结构选择 Topology selection PFC 段设计 PFC stage design LLC 段设计 LLC stage design 同步整流 (SR) 设计 SR design 待机管理及协调 Standby management and handshaking 参考设计性能 Reference design performance 后续工作 Future work 总结 Summary 23

24 NCP1605 设计工作表 NCP1605 design worksheet 200 µh PFC 电感保持低工作频率 => 减小电磁干扰 200 µh PFC inductor keeps low operating frequency => EMI impact 24

25 25 PFC 段电路图 PFC stage schematic

26 议程 Agenda EPA 能效要求 EPA efficiency requirements 参考设计目标 Reference design goals 拓扑结构选择 Topology selection PFC 段设计 PFC stage design LLC 段设计 LLC stage design 同步整流 (SR) 设计 SR design 待机管理及协调 Standby management and handshaking 参考设计性能 Reference design performance 后续工作 Future work 总结 Summary 26

27 外部电感 External inductance 谐振电感位置? Resonant inductance location? 内部泄漏电感 Internal leakage inductance 优势 Benefits: 设计灵活性更高 Greater design flexibility EMI 辐射更低 Lower radiated EMI emission 利用变压器绕组 Transformer winding utilization 有可能使用谐振线圈上的辅助绕组来感测初级电流, 用于过流保护 Possibility to use aux. winding on resonant coil to sense primary current for OCP 不足 Drawbacks: 绕组冷却条件较差 Worse windings cooling 初级至次级绝缘的实现更复杂 Primary to secondary insulation is more complex to achieve 优势 Benefits: 初级至次级绝缘易于实现 Primary to secondary insulation is easy to achieve 绕组冷却条件更佳 Better cooling for windings 仅一颗元件 One component only 不足 Drawbacks: 设计灵活性较低 Less design flexibility 存在 EMI 辐射问题 EMI radiation 漂移磁通导致开关电源金属表面涡流问题 Eddy currents in SMPS metal cover due to stray flux 单纯的绕组窗口利用 Pure winding window utilization 外部谐振线圈更适合超薄设计 External resonant coil is better for ultra slim design 27

28 LLC 谐振储能元件参数 LLC resonant tank parameters 选择方案 : 标准变压器 + 外部谐振电感 Selected solution: Standard transformer + external resonant inductance 变压器 Transformer: 初级电感 Primary inductance L m = 430 µh 漏电感 Leakage inductance L lk = 55 µh 初级与次级匝数比 Turn ratio prim. to sec. n = 17.5 初级与辅助绕组匝数比 Turn ratio prim. to aux. n aux = 11.6 谐振线圈 Resonant coil: L s = 30 µh 谐振电容 Resonant capacitor: C s = 2 x 12 nf 28

29 LLC 谐振储能元件模型 LLC resonant tank model 这设计使用变压器泄漏及外部线圈作为谐振电感 This design uses transformer leakage and external coil as resonant inductance 能使用 T 模型 T model can be used k = 1 L L lk m L L e1 = L = (1 k) = k e2 me L m L m T 模型反映的事实是 Lm 也参与谐振 => 变压器增益下降 T model reflects the fact that Lm also participates on resonance => transformer gain impact 29

30 LLC 段增益特性曲线 LLC stage gain characteristic Full load Gain [-] f op = 87 khz@ V bulk =350 Vdc f op = 103 khz@ V bulk =385 Vdc f op = 124 khz@ V bulk =420 Vdc E E E+06 Frequency [Hz] 所选谐振储能元件提供狭窄的工作频率范围 Selected resonant tank provides narrow operating frequency range 30

31 LLC 初级端电路图 LLC primary side schematic NCP1397 应用双过流保护 (OCP) 及跳周期模式简化 LLC 段设计 NCP1397 simplifies LLC stage design by implementing dual OCP and skip mode 31

32 议程 Agenda EPA 能效要求 EPA efficiency requirements 参考设计目标 Reference design goals 拓扑结构选择 Topology selection PFC 段设计 PFC stage design LLC 段设计 LLC stage design 同步整流 (SR) 设计 SR design 待机管理及协调 Standby management and handshaking 参考设计性能 Reference design performance 后续工作 Future work 总结 Summary 32

33 同步整流 (SR) 设计 SR design Vds Id 同步整流 MOSFET 损耗 SR MOSFET losses: - 导电损耗 Conduction losses P cond = I out π 4 R ds _ on => 选择导通阻抗 Rds_on selection 2 - 门驱动损耗 Gate drive losses P drv = Q g F sw Vcc => 选择门电荷 gate charge selection 同步整流 (SR) 控制器在待机模式下的能耗及门极驱动损耗可能影响待机能耗 SR controllers consumption and gate drive losses in standby would hamper standby efficiency 在待机模式关闭整个同步整流系统很重要 It is critical to turn off whole SR system in standby mode - 体二极管损耗 Body diode losses Iout π Pbody = V f + Iout Rdyn 2 4 => 受二极管正向电压 动态电阻和寄生电感影响, 要使用外部肖特基二极管 Affected by diode Vf, dynamic resistance and parasitic inductance, external Shottky to be used 2 33

34 同步整流 - 封装寄生电感 SR package parasitic inductance 因成本及焊接工艺简单缘故,TO220 封装最常用 TO220 package is mostly used due to cost and also simple soldering process 寄生电感 l drain 及 L source 产生正比于次级电流 I sec(t) 导数的压降 Parasitic inductances L drain and L source create voltage drop that is proportional to the secondary current I sec(t) derivative. V ds 电压比次级电流先达到零电平 The V ds voltage reaches zero level prior secondary current 同步整流控制器检测到零电压时次级电流仍有明显电平 => 能效降低 SR controller detects zero voltage in the time the secondary current has still significant level => efficiency degradation 频率及 di sec(t) /dt 越高, 能效下降得越多 Higher frequency or di sec(t) /dt is, higher efficiency drop will be 34

35 同步整流设计 - 封装寄生电感 SR design package parasitic inductance 使用了极低导通阻抗的 MOSFET 时, 这个问题变得很严重 This issue becomes really serious when very low Rds_on MOSFET is used 同步整流控制 SR controller with V th_zcd = 0 mv 同步整流控制器 SR controller with V th_zcd = -5 mv 零电流检测 (ZCD) 阈值为 0 V 的同步整流控制器提供更长的同步整流 MOSFET 导电时间 SR controller with 0 mv ZCD threshold provides longer conduction period for SR MOSFET 35

36 NCP4303 寄生电感补偿 NCP4303 parasitic inductance compensation 能在电路板上或使用铁氧体磁珠提供补偿电感 L comp can be done on PCB or using ferrite bead 次级电流 Secondary current SR MOSFET 门电压 SR MOSFET gate voltage NCP4303 应用了补偿电感时, 同步整流 MOSFET 导电周期延至最长 SR MOSFET conduction period is maximized when NCP4303 implemented with compensation Inductance 注 : 专利待批 Note: Patent pending 注 : 本电路板版本中未使用寄生电感补偿 Note: Parasitic inductance compensation not used in this PCB version 36

37 同步整流 (SR) 设计 -MOSFET 选择 SR design MOSFET selection 同步整流 MOSFET 工作在零电压开关条件 SR MOSFET works under ZVS conditions => 门电荷由 Ciss 电容 (Cgs+Cgd) 和门电压决定 Gate charge is given by Ciss capacitance (Cgs+Cgd) and gate voltage MOSFET 类型 type 5 V [nc] 12 V [nc] 5V [mw] 12V [mw] IPP015N04N FDP047AN IRFB

38 6 5 同步整流 (SR) 设计 - 门电压钳位选择 SR design gate voltage clamp selection Fop=120 khz FDP047 AN Vclamp= 5 V Vclamp= 12 V Total power loss [W] Output current [A] 将使用带 12 V 门电压的 NCP4303 NCP4303 with 12 V gate voltage clamp to be used 38

39 同步整流 (SR) 最终电路图, 带 SR 导通 / 关闭功能 SR final schematic with SR turn on/off SR 导通 / 关闭开关 SR on/off switch 肖特基二极管提升轻载能效 Schottky Improves efficiency under light loads NCP4303, 带最短导通时间及最短关闭时间调节电阻 NCP4303 with min. ton and min. toff adjust resistors SR 导通 / 关闭比较器 SR on/off comparator 简单 高性价比地应用同步整流 Simple and cost effective SR implementation 次级电流感测及放大器 Secondary current sensing and amplifier 39

40 议程 Agenda EPA 能效要求 EPA efficiency requirements 参考设计目标 Reference design goals 拓扑结构选择 Topology selection PFC 段设计 PFC stage design LLC 段设计 LLC stage design 同步整流 (SR) 设计 SR design 待机管理及协调 Standby management and handshaking 参考设计性能 Reference design performance 后续工作 Future work 总结 Summary 40

41 过温保护 OTP To All-in-1 PC 出现温度过高时无论 PFC 或是 LLC 都会闩锁关闭 Either PFC or LLC can be latched-off in case of overtemperature 41

42 电源端子导通 / 关闭 Power terminal on/off 连接至一体式电脑 To All-in-1 PC N MOSFET 提供低导通阻抗 N MOSFET provides low Rds_on 42

43 初级偏置 Primary biasing 一体机应用需要高压启动功能 HV startup is needed for All-in-1 application NCP1605 简化初级偏置 NCP1605 simplifies primary biasing 43

44 X2 电容放电电路 X2 capacitor discharge circuitry 强制要求在应用从主电源插座拨出后给 X2 电容放电 It is mandatory to discharge X2 cap after is application unplugged from mains X2 放电电阻增加待机能耗 X2 discharge resistor increases standby consumption 电荷泵移除 X2 电容放电电阻, 帮助降低待机输入能耗 Charge pump helps to decrease standby input power by removing X2 cap. discharge resistor 44

45 总电路板电路图 Total board schematic 安森美半导体提供的完整一体机电源方案 Full All-in-1 solution from ON semiconductor 45

46 参考设计图片 - 顶视图 Reference design photo top side PFC 段 PFC stage 次级电容 Secondary capacitor 输出连接器 Output connector EMI 滤波器 EMI filter 同步整流 MOSFET 及待机接通冷却器 SR MOSFETs and STBY switch on cooler LLC 段 LLC stage 谐振电感 Resonant inductor 变压器 Transformer 46

47 参考设计图片 - 底视图 Reference design photo bottom side NCP1397B LLC 控制器 NCP1397B LLC cnt. NCP1605 PFC 控制器 NCP1605 PFC cnt. NCS1002 稳压器 NCS1002 regulator LM324 放大器 LM324 amplifier 2 个 NCP4303 同步整流控制器 2 x NCP4303 SR cnt. 47

48 议程 Agenda EPA 能效要求 EPA efficiency requirements 参考设计目标 Reference design goals 拓扑结构选择 Topology selection PFC 段设计 PFC stage design LLC 段设计 LLC stage design 同步整流 (SR) 设计 SR design 待机管理及协调 Standby management and handshaking 参考设计性能 Reference design performance 后续工作 Future work 总结 Summary 48

49 开关电源能效图 SMPS efficiency charts 94% 92% 91.7% 90% 89% 90.4% 90.5% Efficiency 88% 86% 88.5% 87.8% 84% 82% 80% Output current [A] 参考设计满足 80 PLUS 银级能效规范 Reference design meets 80+ silver specification 230 Vac 110 Vac 49

50 开关电源能效图, 与不带同步整流的原方案比较 SMPS efficiency charts, comparison with original solution without SR 94% 92% 90% Efficiency 88% 86% 84% 82% 80% 230 V (ON reference design) 230 V (Original SMPS) 110 V (ON reference design) 110 V (Original SMPS) Output current [A] 50

51 轻载能效 Light load efficiency No load 50 ma load Consumption [mw] AC voltage [V] 51

52 具体损耗来源分布 Detail losses distribution Vin=110 Vac Vin=230 Vac Output switch LLC MOSFETs Resonant coil PFC coil Bridge rect. Transformer PFC sw. & diode SR rectifier Pd [W]

53 后续工作 Future work 在同步整流段应用寄生电感补偿, 从而进一步提升能效 Implement parasitic inductance compensation in SR stage and thus further boost the efficiency. 使用不同的同步整流 MOSFET 及门钳位电压, 降低驱动损耗 Use different SR MOSFET(s) and gate clamp voltage to reduce driving losses. 进一步优化 PFC 段能效 Further optimization of the PFC stage efficiency 提升能效, 满足 80 PLUS 金级能效规范 Boost efficiency to meet 80+ gold specification 53

54 总结 Summary 安森美半导体现已提供高能效的 80 PLUS 银级能效参考设计 High efficient 80+ silver reference design from ON is now available!! 由 NCP1605 驱动的 FCCrM PFC 段提供极佳的能效结果, 并将 PFC 电感尺寸减至最小 这控制器的 pfcok 信号及跳周期模式特性简化了一体式计算机开关电源的设计 FCCrM PFC stage driven by NCP1605 provides excellent efficiency results and minimizes PFC inductor size. PFC OK signal and skip mode featured in this controller simplifies design of All-in-1 PC SMPS 由 NCP1397 驱动的 LLC 电源段提供高能效 跳周期模式能力及低成本的过流保护 (OCP) 应用 LLC power stage driven by NCP1397 provides high efficiency, skip mode capability and cheap OCP implementation 由 NCP4303 驱动的同步整流器将同步整流 MOSFET 导电时间延至最长, 从而提升能效至最高 这驱动器的电压钳位功能减小驱动损耗 Synchronous Rectifier driven by NCP4303 maximize the SR MOSFET conduction time thus maximize efficiency. Voltage clamp on the driver reduces driving losses 安森美半导体提供这参考设计及所提及 IC 的完整支援 ON Semiconductor provides full support on this reference design and mentioned ICs 54

55 For More Information View the extensive portfolio of power management products from ON Semiconductor at View reference designs, design notes, and other material supporting the design of highly efficient power supplies at 55

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