[0] STM32 A/D A/D STM32 SD LCD ST Cortex-M3 STM32F103VC IAR Embedded Workbench for ARM C SD MATLAB MIT-BIH RS232 VC MFC SD STM32 I

Transcription

1 杭 州 电 子 科 技 大 学 硕 士 学 位 论 文 基 于 STM32 的 便 携 式 心 电 图 仪 的 设 计 与 实 现 姓 名 : 武 利 珍 申 请 学 位 级 别 : 硕 士 专 业 : 电 路 与 系 统 指 导 教 师 : 张 文 超

2 [0] STM32 A/D A/D STM32 SD LCD ST Cortex-M3 STM32F103VC IAR Embedded Workbench for ARM C SD MATLAB MIT-BIH RS232 VC MFC SD STM32 I

3 ABSTRACT At present, the rate of cardiovascular disease and the related hazard factor in our country have increased. ECG is an important method of diagnosing heart disease. However, conventional ECG devices have limitations of a big size and bulky volume and not easy to carry. It is not convenient for patients to stay in the hospital for long, so it becomes very important to develop a portable ECG monitor. The project proposed a plan of ECG acquisition, analysis and processing system which based on STM32, and completed its hardware and software design. The core of the system is ECG acquisition circuit, which is to complete the signal extraction. The function of the ECG signal processing circuit is to complete the A/D acquisition, displaying, filtering and storage of the signal. The system is a typical biomedical signal collecting-processing one, which processes weak signals in strong noise background. Because of the impact of noise and interference, the front-end acquisition circuit needs to have higher performance. According to the characteristics of ECG, the precision instrumentation amplifiers are chosen to design the preamplifier circuit. In order to reduce the interference effects, right leg drive circuits, high- pass filter and low-pass filter is designed to extract the ECG signal. Through the A / D converter of ECG processing circuit, analog signals are converted into digital signals, which are sent to the microprocessor for further processing. ECG processing circuit, core of which is a microcontroller of low cost and low power Cortex-M3 by ST, mainly include power management circuits, STM32 processor circuits, SD card storage circuits, serial communication circuits, LCD interface circuits and so on. The software design used C language to program and completed ECG collection, filtering, display, storage and communication. The development tool is IAR Embedded Workbench for ARM. The main program completed a variety of specific functions by calling the subroutine modules. Subroutines included system initialization, ADC, digital filtering, waveform displaying, data storage, serial communication and so on. This system validated the ECG algorithms using ECG data from MIT-BIH ECG database by MATLAB, and at last suppressed noise and interference effectively by using a simple integer coefficient filter design method. Besides, the system can also communicate with the host computer by RS232 serial port, so PC can further process the uploaded data using its powerful data processing and analysis capabilities. Host machine management software implemented a low-cost ECG signal acquisition system using VC++6.0 software development platform. The management software is to realize the functions of data acquisition, processing, display, storage and analysis. II

4 The subject realized the desired target, including designing the system's hardware and software, and making a prototype machine. The system was proved running well, and could meet the design requirements. Keywords: ECG Device, ECG, Signal Collection, Signal Processing, SD Card, STM32 III

5

6 % % [1] 16 20% [2] [3]

7 1.2 Einthoven 1887 [4] cm 1mV 1cm 0.4 P Q R S T Einthoven [5] (Dynamic Electrocardiography DCG) 1949 Holter Holter DCG 24 ECG (1) (2) 2

8 (3) (4) GPRS 1.3 STM32 SD 24 PC TFT-LCD (1) (2) 1) 2) (3) 1) A/D 2) STM32 3) 4) SD 5) 6) 7) PC 3

9 Hz MCU ST Cortex-M3 STM

10 2 2.1 [6] [7] 2.2 [8] [9] 10µV ~4mV 1mV 2.1 ECG 5

11 [10] P P-R P QRS 0.12~0.20s 0.20s QRS Q S QRS QRS 0.10s QRS S-T QRS T ST 0.05 P-R P QRS - [11] (1) mV 1µV (2) 0.05~100Hz 0.05~40Hz (3) K (4) ECG (5) ECG Nitish.V.Thakor 0.05~100Hz 0.05~40Hz QRS 6

12 10~20Hz QRS 2.3 ECG QRS QRS [12] [13] (1) 30mV 5Hz~2KHz (2) 0.15Hz~0.3Hz [14] (1) 50Hz 50Hz 50Hz 50Hz (2) ECG (3) 7

13 ECG (1) 50Hz (2) 8

14 (1) System on Chip SoC (2) I/O (3) (4) 3.2 MCU (1) MCU MCU (2) MCU MCU PC (3) MCU MCU (4) MCU MCU 9

15 32 ARM STM32 STM32F103VCT SD PC 3.1 A/D STM32 SD LCD STM32 A/D TFT-LCD

16 3.4.1 (1) ( ) [15] E = E 3.1 E 0 - R- N- F- a- ( ) RT ln a NF Ag AgCl Ag AgCl Ag AgCl AgCl Ag [16] (2) ( ) ( ) [17] ECG Elnthoven 1903 I II III 1930 Wilson V1--V6 11

17 40 Goldberger avr avl avf Einihoven--Wilson12 VCG Frank 1956 Frank X Y Z ECG R [18] I II III I 3.3 I III RA LA RL LL + [19] 3.3 I III (1) 1mV 1V 1000 (2) 100Hz 50Hz (3) 12

18 80db (4) (5) B-B INA118 [20] INA118 INA118 Rg 110dB 0.5µV/ 50µV 1 8 Rg G=1+50kΩ /Rg INA U1A U1B U3 R13 R14 C10 [21] 50Hz Ag AgCl [22] 13

19 10 G=1+50K/5.6K=10 Rg=5.6K Hz l00hz [23] [24] [25] RC RC Butterworth Chebysher [26] 3.6 U5A C4 R6 f=0.03hz U5B C5 R7 f=110hz 50Hz 14

20 A/D 0 3.3V RJ 3.7 OPA V 1.5V A/D 0~3.3V 3.8 P

21 V STM32 3.3V ICL7660S 10KHZ LCD V AMS1117 5V~12V 3.3V ICL7660S V

22 3.5 A/D SD STM32 STM32F103x [27] ARM Cortex-M3 32 RISC 72MHz ( 128K FLASH 20K SRAM) I/O APB 2 12 ADC 3 16 PWM 2 I 2 C SPI 3 USART USB CAN 3.3V 3.13 STM32F103x STM32 [28] (1) 128K 20K SRAM CPU 0 ( / ) Flash SRAM (2) STM32 ARM ARM ARM ARM (3) STM32 FLASH FLASH JTAG USART FLASH 17

23 3.13 STM32F103x (4) [29] STM32 (5) [30] STM32 1) STM32 STM32 STM32 2) USB USB USB USB (6) STM32F103xx 18

24 STM32 [31] (PLC) HVAC [32] PC GPS STM STM32 STM STM STM STM STM32 (1) RC 19

25 10 k 1.0 µf 3.6ms STM32 (2) 8M 22pF (3) BOOT0 FLASH (4) 4 1 0O STM32 JTAG JTAG(Joint Test Action Group; ) [33] (IEEE JTAG DSP FPGA JTAG 4 TMS TCK TDI TDO JTAG JTAG LCD LCD LCD LCD (1) (2) 20

26 (3) (4) STN TFT (5) 3.2 TFT [34] 320* AVR ARM7 STM32 MCU QVGA 240 x " IL PIN 1mm 5 LED [35] 1/1000 X Y B-B ADS7843 [36] ADS ADS7843 ADS A/D 21

27 2.7V 125 khz 750 V W REF 1 V +Vcc 0 V V REF ADS ADS Vcc +2.7~+5V 2 3 X+ Y+ X+ Y+ ADC X- Y- X- Y- ADC 2 6 GND 7 8 IN3 IN4 ADC 9 Vref 11 /PENIRQ 12 DOUT 13 BUSY 14 DIN 15 /CS 16 DCLK X+ Y+ X- Y- 1 2 [37]

28 3.5.5 SD SD SD PC SD [38] Secure Digital Memory Card PDA MP4 SD SanDisk SD SD SD 3.2 SD SD SPI 1 CD/DAT3 I/O/PP Card Direct/ CS I (neg true) [Bit3] 2 CMD PP / DI I 3 VSS S VSS S 4 VDD S VDD S 5 CLK I SCLK I 6 VSS2 S VSS2 S 7 DAT0 I/I/PP [bit0] DO O/PP 8 DAT1 I/O/PP [bit1] RSV 9 DAT2 I/O/PP [bit2] 23 RSV SD SD SD SPI SD [39] SPI SD SD SPI

29 SPI STM32 SPI SD SD STM32 SD 3.3 STM32 SD_CS SPI1_MOSI SPI1_SCK SPI1_MISO SD_Det UART 3.3 STM32 SD SPI SPI I/O SPI SPI SPI / UART UART STM32F103VCT6 3 UART UART0 PC UART UART STM32 PC STM32 3.3V PC 12V MAX3232 ST3232 ST UART 24

30

31 4 [40] [41] 50Hz MIT-BIH 4.1 FIR FIR FIR N 1 m= 0 y ( n) = h( m) x( n m) = h( n) * x( n) 4.1 y ( n) = h(0) x( n) + h(1) x( n 1) h( N 1) x( n N + 1) 4.2 FIR h(n) N H(z) z N 1 n= 0 n H (z) = h( n) z 4.3 H(z) z-1 (N-1) z N-1 H(z) H(z) FIR (z) H H ( e jw ) H ( e jw ) = H ( z) N 1 jw = z= e n= 0 h( n) e jnw FIR [42] (4.4) H (z) FIR 26

32 H ( e jw ) (4.2) h(0)~h(n-1) H (z) H ( e jw ) 4.2 (1) (2) IIR FIR 50Hz (3) LMS LS (4) IIR FIR FIR [43] 27

33 100Hz 0.5Hz 50Hz 100Hz Hz Z fs=200hz f=0 1 2 fs 0Hz 50Hz 100Hz 0.5Hz?=0 50Hz?=p/2 100Hz?=p?=-p/2?=p/2?=3p/2 fp=? pfs/2p=150hz 100Hz (1 Z 1 e j0 1 jπ 1 jπ / 2 1 jπ / 2 4 ) (1 Z e )(1 Z e )(1 Z e ) = 1 Z 4.5 H BP (1 Z = 1 Z 4 ) ) h(n) h(n)=h(n-n-1) N=200-4=196 28

34 H BP ( e jω j200ω (1 e ) sin 100ω j98ω ) = = e 4.7 j4ω (1 e ) sin 2ω j200ω jx 1 e H BP ( e ) = lim = j ω 1 e 4 (4.4)?=0?=p/2?=p x=0 x=p/2 x=p 4.4 H = 50Z 98 AP ω HAP= 50e j, j98 sin 100ω H 50 ω BP = e [1 ] 4.10 sin 2ω (4.7) (4.9) 4.11 y AP ( n) = x( n 98) 4.12 y BS ( n) = y ( n) y ( n) 4.13 AP BP 29

35 5 STM IAR Embedded Workbench for ARM IAR Systems ARM IAR EWARM IAR EWARM RTOS C/C++ IAR EWARM [44] IAR ARM C/C++ Compiler IAR ARM Assembler 1 IAR XLINK Linker IAR XAR XLIB IAR DLIB C/C++ IAR C-SPY IAR EWARM 30

36 build Workspace 5.2 Workspace J-link [45] STM 32 SD (1) STM32 RTC SD STM32 (2) PC.txt 31

37 5.2.2 STM32 RAM RAM EDA EDA Keil IAR ADS C RAM RAM STM32 STM32 STM32 ADC1 1 stm32f10x_conf.h ADC1 #define _ADC #define _ADC1 //#define _ADC2 //#define _ADC3 2 stm32f10x_adc.c // #define _ADC1 stm32f10x_adc.c ADC ADC 3 /* ADC1 configuration */ ADC_InitStructure.ADC_Mode = ADC_Mode_Independent; // ADC_InitStructure.ADC_ScanConvMode = DISABLE; ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;// 32

38 5.2.3 ADC_InitStructure.ADC_NbrOfChannel = 1; ADC_Init(ADC1, &ADC_InitStructure); /* ADC1 regular channel14 configuration */ ADC_RegularChannelConfig(ADC1,ADC_Channel_14,1, ADC_SampleTime_13Cycles5); II T T S

39 0~5 No 5.5 Y N N Y Y Y N N Y 5.5 I II I III

40 STM M ADC1 6 1 DMA RCC_ADCCLKConfig(RCC_PCLK2_Div6); //12M RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); //72M... RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); //DMA1 /* Enable GPIOA, GPIOC, ADC1 and TIM1 clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA RCC_APB2Periph_GPIOC RCC_APB2Periph_GPIOD RCC_APB2Periph_ADC1 RCC_APB2Periph_TIM1,ENABLE); //A C D ADC1 TIM1 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);// ADC1 STM32 ADC V 12 0 n 35

41 2 ADC ADC STM32F103xx 56MHz 1us 72MHz 1.17us STM32F101xx 28MHz 1us 36MHz 1.551us ADC 2.4V 3.6V ADC VREF- = VIN = VREF+ DMA ADC1 (1) 200Hz 400Hz 200Hz 200Hz (2) ADC1 ADC1 ADC1 ADC1 (3) STM32 DMA DMA DMA CPU CPU ADC1 DMA PC STM32 USART_InitStructure.USART_BaudRate = ; // USART_InitStructure.USART_WordLength = USART_WordLength_8b; // USART_InitStructure.USART_StopBits = USART_StopBits_1; // USART_InitStructure.USART_Parity = USART_Parity_No ; // USART_InitStructure.USART_HardwareFlowControl USART_HardwareFlowControl_None; USART_InitStructure.USART_Mode = USART_Mode_Rx USART_Mode_Tx; /* Configure the USARTx */ 36

42 USART_Init (USART1, &USART_InitStructure); /* Enable the USARTx */ USART_Cmd (USART1, ENABLE); STM32 FSMC FSMC FSMC STM32 ADC MHz ADC 5.8 A/D N DMA Y N dmaflag=1 5.8 ADC_RegularConvertedValue dmaflag dmaflag 0 dmaflag C C 4.13 ybp ( n) = ybp( n 4) + x( n) x( n 20) 5.1 y BS y AP ( n) = x( n 98) 5.2 ( n) = y ( n) y ( n) 5.3 AP BP Buff_bp[4] Buff_ap[98] Buff_x[20]) y BP ( n 4 y AP ( n 98) x( n 20) 5.1Buff_bp[4] 4 (n) Buff_x[20] x( n ) y BP 20 (n) 0 20 n=20 y BP Cur_val Buff_bp[4] 0 Buff_x[20] Fil_val Fil_val=Buff_bp[0]+Cur_val Buff_x[0] Buff_bp[4] Buff_bp[0] Fil_val 37

43 Buff_bp[4] Buff_x[20] Buff_x[0] Cur_val Buff_bp[20] 5.9 Buff_bp[4] Buff_x[20] N Y Fil_val Buff_bp[4] Cur_val Buff_x[20] TFT FSMC STM32 FSMC 16 PC AHB FSMC a) (SRAM) b) (ROM) c) NOR d) PSRAM(4 ) NAND ECC 8K 16 PC (Burst) NOR PSRAM 8 16 a) ( 15 ) b) ( 15 ) 38

44 c) ( 15 ) d) PSRAM SRAM 32 AHB FIFO AHB FSMC FIFO STM32 FSMC TFT-LCD FSMC void LCD_FSMCConfig(void) /*FSMC */ { /*-- FSMC Configuration */ FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; FSMC_NORSRAMTimingInitTypeDef p; FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1; FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; FSMC_NORSRAMInit (&FSMC_NORSRAMInitStructure); /* Enable FSMC_Bank1_NORSRAM4 */ FSMC_NORSRAMCmd (FSMC_Bank1_NORSRAM1, ENABLE); } void LCD_WriteReg(u8 LCD_Reg, u16 LCD_RegValue) // { /* Write 16-bit Index, then Write Reg */ LCD->LCD_REG = LCD_Reg; 39

45 /* Write 16-bit Reg */ LCD->LCD_RAM = LCD_RegValue; } u16 LCD_ReadReg(u8 LCD_Reg) // { } /* Write 16-bit Index (then Read Reg) */ LCD->LCD_REG = LCD_Reg; /* Read 16-bit Reg */ return (LCD->LCD_RAM); *32 void LCD_Drawword(u8 Xpos, u16 Ypos,uc8 *c) {... } Xaddress = Xpos; LCD_SetCursor (Xaddress, Ypos); for (index = 0; index < 32; index++) { } color32=(((u32)c[cnt+3])<<24) (((u32)c[cnt+2]<<16)) (((u32)c[cnt+1]<<8)) (((u32)c[cnt])); cnt+=4; LCD_WriteRAM_Prepare (); /* Prepare to write GRAM */ for (i = 0; i < 32; i++) { if ((color32 & (1 << i)) == 0x00) } { } else { } LCD_WriteRAM (BackColor); LCD_WriteRAM (TextColor); Xaddress++; LCD_SetCursor (Xaddress, Ypos); LCD_Drawword (u8 Xpos, u16 Ypos, uc8 *c) 40

46 5.3.5 X X 60~180 0~2V 60~ P=200/120=5/3 xzb Cur_val 0~200 60~180 xzb=180 Cur_val*3/5 prxzb pryzb 5.10 X xzb=180-fil_val*3/5 prxzb pryzb xzb yzb 5.10 prxzb=xzb pryzb=yzb QRS QRS QRS QRS QRS QRS QRS QRS 41

47 QRS 200Hz 10 QRS QRS (1) QRS (2) QRS 80% (3) QRS QRS 80% 80% 80% % N Y N 1200 Y

48 N N 80% Y Y 80% N 4 Y STM N N N Y

49 5.3.7 SD M 256M 180 PC SD SD SD CSD CMD16 CSD SD (1) OCR SD OCR SD OCR (2) CID CID 16 (3) CSD SD CSD (4) SCR SCR SD 64 SD DAT (5) Card Status SD Status SD (6) RCA RCA 16 SD SD SD SD Command Paralneter CRC 5 CRC CRC CMD0 SD CMD1 5.2 SPI 2~ Command Parameter CRC 1 44

50 a) 4 Rl R1B R2 R3 b) + + Rl 1 1 R1B Rl 0 1 R2 2 SEND_STATUS R3 READ_OCR 5 OCR + + SD 5.14 N N Y Y SD 5.14 SD SD ACMD41 OCR ( ACMD41 CMD55 ) CMD2 CID ID CMD 3 RCA

51 N Y 8 Clock CMD0 CRC CMD1 OCR CMD58 3.3V Y N 5.15 SD SD SD SD_BLOCKSIZE / SD_LOCKSIZE SD_BLOCKSIZE (1) OXFE 16 CRC16 (2) STOP_TRANSMISSION(CMD12) 46

52 5.17 Y N N Y SD SD SD (1) CMD24 R1 (2) (3) (4) 47

53 (1) (2) (1) (2) (3) (3) SD_TOK_STOP_MULTI FAT16 SD FAT FAT Microsoft FAT12 FAT16 FAT32 FAT FAT16 FAT16 DBR FAT 1 FAT 2 DBR (DOS BOOT RECORD) BIOS BPB(BIOS Parameter Block) 0x55AA BPB 0x0b 25 B DBR FAT File Allocation Table Microsoft FAT ( ) FAT1 FAT2 FAT FAT FAT FAT DIR Directory FAT FAT DIR FAT FAT16 FAT16 FormatFAT16() WriteFile() FreeCluster() ReadFile() CreateFile() CloseFile() OpenFile() DelFile() 1 48

54 FormatFAT16 SD FAT16 SD 2 / SD SD SD FAT1 FAT2 3 FAT API FAT / SD SD FAT 5.19 /

55 50 Y N N Y N N Y Y Y N 5.21 Y N Y Y Y Y N N N N 5.22

56 T 5.2 sel_prev u8 keyscan (void) { pkey_sel=gpio_readinputdatabit (GPIOC, GPIO_Pin_0); if((pkey_sel == 0) && (sel_prev == 1)) // { sm_delay (); pkey_sel=gpio_readinputdatabit (GPIOC, GPIO_Pin_0); if((pkey_sel == 0) && (sel_prev == 1)) key=key_sel; } sel_prev=pkey_sel; return key; } mod mod mod=1 mod=2 mod=3 mod1.index if(keyvalue!=0)// 51

57 } { if(mod==1)// I { switch(mod1.index)// { case 1: break } } else if(mod==2)// II { { } switch(mod2.index)// case 1: break } else if(mod==3)// II { switch(mod3.index)// } { } case 1: break ADS7843 (1) ADS S 1A2 A0 X Y A2~A0 001 X 101 Y MODE SER/DFR

58 PD1 PD0 00 [46] (2) (3) X 0x90 Y 0xD0 5.3 ADS7843 bit7(msb) bit6 bit5 bit4 bit3 bit2 bit1 bit0 S A2 A1 A0 MODE SER/DFR PD1 PD ADS7843 ADS7843 (DCLK) 5.23 ADS Y PENIRQ 12 Y N PENIRQ N 10 Y Y ADS7843 X Y X 12 X

59 PENIRQ X Y PC PC PC VC Visual C++ Microsoft [47] Visual C++ Microsoft MFC Windows MFC (1) (2) (3) CPU MSComm MSComm API Visual C++ Visual Basic Delphi Microsoft Windows ActiveX MSComm (1) MSComm Mscomm Project -> Add to Project -> Components and Controls -> Registered ActiveX Controls Components Microsoft Communications Control version 6.0 MSComm Project CMSComm CMSComm mscomm.h mscomm.cpp 54

60 m_mycomm OnComm (2) a) b) c) d) mycomm.setcommport(1); mycomm.setinbuffersize(1024); mycomm.setoutbuffersize(1024); mycomm.setportopen(1); mycomm.setinputlen(0); mycomm.setinputmode(1); mycomm.setrthreshold(1); mycomm.setsettings(" n 8 1"); (3) // 1 // // // // // // 1 // OnComm() GetInput() (4) MSComm m_comm.setportopen(0); VC CDC CDC CDC CDC GDI MoveTo LineTo MoveTo LineTo 55

61 ECG ECG ECG 5.25 ECG 56

62 5.26.txt ECG STM32 STM32 IAR IAR VC++ STM32 57

63 6 6.1 INA INA mV INA mV 10 50Hz 1.78V 0.17V CMRR=10/0.096=104dB 65Hz 75Hz 3dB 100Hz 1/3 (4) 30Hz 4.0mVPP TDS2012B mV 58

64 P QRS ST JTAG 1 3.3V J-Link LCD 4 (1) STM32 (2) 59

65 (3) FSMC FSMC FSMC FSMC 6.3 W 6.3 (4) ADS STM32 PC (1) PC PC 60

66 2 3 Windows (2) PC (3) STM32 STM Hz - 500mVPP 300mVDC Hz 0.5Vpp 6.6 5Hz 1Vpp 6.4 SD AD

67

68 6.10.txt txt 6.8 P PC 63

69 7 7.1 Cortex-M3 STM32 MCU STM32 SD PC PC TFT-LCD (1) (2) INA118 INA118 (3) STM32 Cortex-M3 STM32 IAR (4) MATLAB MIT-BIH (5) C++ MFC VC++6.0 ECG (6) 64

70 (1) (2) (3)

71 66

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74 [1] [J] 2009 [2] VC++ [J] 2009 [3] ZigBee [J] 2009 [4] [J]

75 基 于 STM32 的 便 携 式 心 电 图 仪 的 设 计 与 实 现 作 者 : 武 利 珍 学 位 授 予 单 位 : 杭 州 电 子 科 技 大 学 本 文 链 接 : 授 权 使 用 : 北 京 工 商 大 学 (btbu), 授 权 号 :06fe440d-499b-409c-b03a-9eda00eaa5fe 下 载 时 间 :2011 年 5 月 5 日