UL0T Penryn SFF 9 ufg LOK GENERTOR RTMT- FN & THERML SENSOR IO OR FS 00MHz LVS RT HMI GS Express ufg R SRM 00 MHz STNR R IMM REVERSE R IMM zalia MI X ONLY INT MI EXT MI Line out INT SPK." H IO OR L9 udio odec ST zalia EMEE ONTROLLER ITE IH9M SFF 9 ufg LP MHz US.0 X US PI-E IO OR LOR U- 0/00/000 LN controller theros R MINIR Half Mini ard WiFi/WiMX US.0 * R REER RJ POWER VORE SYSTEM I/O_.0VS I/O_R & VTT IOS ROM INTERNL K & TP LUETOOTH MER I/O_+.VS HRGER US.0 * SUSTeK OMPUTER IN. lock iagram ustom UL0T ate: Friday, October, 009 Sheet of 9.0
E UL0 SHEMTI Revision. PGE ontent SYSTEM PGE REF. PU-PENRYN ULV FS () PU-PENRYN ULV POWER () PU-PITORS IM-R SO-IMM HNNEL IM-R SO-IMM HNNEL 9 IM-R VREF & TERMINTION 0 N_-GS-HOST () N_-GS-MI () N_-GS-ISPLY () N_-GS-R US () N_-GS-POWER () N_-GS-POWER () N_-GS- () N_-GS-STRPPING () 0 S_IH9M-H, IE, LP () S_IH9M-PI,PIE,MI,US() S_IH9M-GPIO, PMGT () S_IH9M-POWER_ () S_IH9M-SPI ROM & HP () 9 LK-RTMT--GRT 0 K-ITE ROM-IOS ROM, K ONNETOR INTERNL SPEKER ONNETOR EUG PORT LVS ONNETOR HYIR SWITH 0 THERML SENSOR, FN ONNETOR ST H/O ONNETOR ISHRGE IRUIT 0 -IN/T-IN ONNETOR LUETOOTH ONNETOR ME_SREW HOLE, SMT NUT SU OR ONNETOR OR to OR ONNETOR 9 History 9 Power On Sequence PGE ontent POWER PGE REF. 0_POWER_VORE _POWER_SYSTEM _POWER_I/O_+.0VS _POWER_I/O_R & VTT _POWER_I/O_+.VS _POWER_HRGER 90_POWER_ETET 9_POWER_LO SWITH 9_POWER_PROTET 9_POWER_SIGNL 9_POWER_FLOWHRT SUSTeK OMPUTER IN. Page Reference ustom UL0T ate: Friday, October, 009 Sheet of 9 E.0
0 H_#[:0] 0 H_#[:] 0 H_REQ#[:0] H_#[:0] H_#[:] H_REQ#[:0] T00 T00 0 H_ST#0 0 H_ST# 0 H_0M# 0 H_FERR# 0 H_IGNNE# 0 H_STPLK# 0 H_INTR 0 H_NMI 0 H_SMI# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_# H_REQ#0 H_REQ# H_REQ# H_REQ# H_REQ# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# T00 T009 U00 P []# S# V []# NR# W []# PRI# T []# []# EFER# []# RY# T [9]# SY# [0]# []# R0# []# []# IERR# E []# INIT# []# []# LOK# Y ST[0]# RESET# R REQ[0]# RS[0]# R REQ[]# RS[]# U REQ[]# RS[]# P REQ[]# TRY# W REQ[]# HIT# N []# HITM# K []# G [9]# PM[0]# T [0]# PM[]# K []# PM[]# T []# PM[]# H []# PRY# F []# PREQ# J []# TK H []# TI M []# TO P []# TMS R [9]# TRST# J [0]# R# L []# M []# U []# P []# R []# PROHOT# N ST[]# THRM THRM 0M# FERR# THERMTRIP# F0 IGNNE# F STPLK# 9 LINT0 LINT E SMI# V RSV0 Y RSV0 G RSV0 L RSV0 J9 RSV0 F RSV0 H RSV0 LK[0] LK[] M J L N F J M 0 N G K H K L H F H_IERR# H_PURST# Y XP_PM#0 XP_PM# XP_PM# Y XP_PM# V0 XP_PM# V XP_PM# V XP_TK W XP_TI U XP_TO W XP_TMS V XP_TRST# T0 J XP_R# H_PROHOT_S# 0 T00 T00 H_S# 0 H_NR# 0 H_PRI# 0 H_EFER# 0 H_RY# 0 H_SY# 0 H_R0# 0 RN00 OHM H_INIT# 0 H_LOK# 0 H_PURST# 0 H_RS#0 0 H_RS# 0 H_RS# 0 H_TRY# 0 H_HIT# 0 H_HITM# 0 +VP PU_THRM_XP 0 PU_THRM_XN 0 H_THRMTRIP#,,0 LK_PU_LK 9 LK_PU_LK# 9 lose to PU Reserved for the S reboot issue 00 0.UF/0V H_PURST# R00 KOhm % R. 00 0.UF/0V +VP R00 KOhm % Zo= Ohm, 0." max for GTL_REF R. 0 H_STN#0 0 H_STP#0 0 H_INV#0 0 H_STN# 0 H_STP# 0 H_INV# 9 PU_SEL0 9 PU_SEL 9 PU_SEL H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# GTL_REF U00 F0 [0]# []# P G []# []# R E []# []# H0 J []# []# F0 H0 J []# []# H []# []# G G9 []# []# F E H []# [9]# L []# [0]# M K [9]# []# N N [0]# []# M0 T0 []# []# K0 M0 []# []# G G []# []# P0 M []# []# N L []# []# L K0 STN[0]# STN[]# K J STP[0]# STP[]# L P0 INV[0]# INV[]# J P []# []# V V0 T []# [9]# V []# [0]# V0 [9]# []# U R [0]# []# W W []# []# R N []# []# U []# []# []# []# Y 0 []# []# T0 0 []# []# []# [9]# 9 []# [0]# Y0 [9]# []# 0 Y [0]# []# T []# []# U U STN[]# STN[]# Y0 W STP[]# STP[]# Y R INV[]# INV[]# LK 00 H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# FS SELSELSEL0 00 0 0 0 H_STN# 0 H_STP# 0 H_INV# 0 H_STN# 0 H_STP# 0 H_INV# 0 W H_OMP0 R00.Ohm % GTLREF OMP[0] E E H_OMP TEST OMP[] R00.9Ohm % 0 H_OMP TEST OMP[] E R00.Ohm % H_OMP R009.9Ohm % TEST OMP[] F E T00 TEST Y0 H_PRSTP# TEST PRSTP# G H_PRSTP#,0,0 H_PSLP# TEST PSLP# H_PSLP# 0 H_PWR# PWR# H_PWR# 0 H_PWRG SEL[0] PWRGOO E H_PWRG 0 SEL[] SLP# 0 H_PUSLP# 0 SEL[] PSI# 0 T0 SU900/SU900 omp 0,: Zo=. Ohm, trace length < 0." omp,: Z0= Ohm, trace length < 0." SU900/SU900 +VP 0 0 0 0 H_PROHOT_S# +VP RN00 OHM Q00 UMKN 00 SSPT Q00 UMKN THRO_PU 0 PWRLIMIT_PU PWRLIMIT_PU# 0 H_PWRG R00 KOhm L_TRL_LK L_TRL_T XP_PM# XP_PM# XP_PWRG H_TESTIN# XP_TK J00 PM# PM# PM# PM# PM# 0 PWRGOO PM0# 9 RESERVE VTT LK0 GLKp KL GLKn 0 9 RESET# SL R# S TO TRST# N 0 TK TI 9 TMS TO_ON_P G000 XP_PM# XP_PM# XP_PM# XP_PM#0 LK_ITP_LK LK_ITP_LK# XP_PURST# XP_R# XP_TO XP_TRST# XP_TI XP_TMS Stuff when use ITP : R00,R0, R0, R0, R0, R0, R0, R0, R09, R00, R0, RN9 LK_ITP_LK 9 LK_ITP_LK# 9 R0 KOhm R0 R0 KOhm H_PURST# RSTON# H_TESTIN# R0.9Ohm % XP_PM# R0.9Ohm % XP_PM# R0.9Ohm % XP_TI R0.9Ohm % XP_TO R0.9Ohm % XP_TMS R09.9Ohm % XP_TK R00.9Ohm % XP_TRST# R0.9Ohm % +VS +VP RSTON# R00, R0 Place close to PU SUSTeK OMPUTER IN. PENRYN ULV FS ustom UL0T ate: Friday, October, 009 Sheet of 9.0
+V_PU H_VI H_VI0 H_VI H_VI H_VI H_VI H_VI H_VI0 H_VI H_VI H_VI H_VI H_VI H_VI +VP +VP +VORE +VORE +VP +VORE +.VS +VORE +VP VR_VI,0 VR_VI,0 VR_VI0,0 VR_VI,0 VR_VI,0 VR_VI,0 VR_VI 0 VSENSE 0 VSSSENSE 0 ate: Sheet of Friday, October, 009 SUSTeK OMPUTER IN. PENRYN ULV POWER.0 UL0T 9 ate: Sheet of Friday, October, 009 SUSTeK OMPUTER IN. PENRYN ULV POWER.0 UL0T 9 ate: Sheet of Friday, October, 009 SUSTeK OMPUTER IN. PENRYN ULV POWER.0 UL0T 9 VSENSE, VSSSENSE trace at. ohm with mils spacing. Place PU and P within " of PU. 0 m R. R. RN00 RN00 RN00 KOHM RN00 KOHM RN00 RN00 RN00 RN00 RN00 KOHM RN00 KOHM RN00 RN00 VSS G VSS G VSS G VSS J VSS J VSS9 J VSS0 L VSS L VSS L VSS N VSS N VSS N VSS R VSS R VSS R VSS9 U VSS0 U VSS U VSS W VSS W VSS W VSS VSS VSS VSS VSS9 VSS90 VSS9 E VSS9 E VSS9 E VSS9 G VSS9 G VSS9 G VSS9 J VSS9 J VSS99 J VSS00 L VSS0 L VSS0 L VSS0 N VSS0 N VSS0 N VSS0 R VSS0 R VSS0 R VSS09 U VSS0 U VSS U VSS W VSS W VSS W VSS VSS VSS VSS VSS9 VSS0 VSS VSS 9 VSS E9 VSS E VSS G9 VSS G VSS J9 VSS J VSS9 L9 VSS0 L VSS N9 VSS N VSS R9 VSS R VSS U9 VSS U VSS W9 VSS W VSS9 9 VSS0 VSS 9 VSS VSS E9 VSS E VSS G9 VSS G VSS J9 VSS J VSS9 L9 VSS0 L VSS N9 VSS N VSS R9 VSS R VSS U9 VSS U VSS W9 VSS W VSS9 9 VSS0 VSS 9 VSS VSS VSS VSS E VSS G VSS H0 VSS M VSS9 J VSS0 L VSS N VSS M0 VSS T VSS R VSS U VSS W VSS T0 VSS Y VSS9 VSS0 VSS VSS Y0 VSS 0 VSS H VSS E VSS G VSS J VSS H0 VSS9 M VSS90 L VSS9 N VSS9 R VSS9 M0 VSS9 T VSS9 V VSS9 W VSS9 W VSS9 Y VSS99 U VSS00 W VSS0 T0 VSS0 VSS0 VSS0 VSS0 VSS0 VSS0 VSS0 VSS09 VSS0 E9 VSS F VSS G9 VSS H VSS K VSS K VSS M VSS M VSS P VSS9 P VSS0 T VSS T VSS V VSS V VSS U VSS Y VSS Y VSS VSS VSS9 VSS0 VSS F VSS F VSS H VSS H VSS K VSS K VSS M VSS M VSS9 P VSS0 P VSS T VSS T VSS U9 VSS V VSS U VSS W9 VSS Y VSS 9 VSS9 VSS0 9 VSS VSS VSS VSS E VSS G VSS J VSS L VSS N VSS9 R VSS0 U VSS W VSS VSS VSS E VSS G VSS J VSS L VSS N VSS9 R VSS0 U VSS W VSS VSS VSS VSS E VSS G VSS W VSS VSS9 VSS0 VSS 9 VSS 9 VSS VSS VSS VSS VSS VSS 9 VSS9 VSS90 VSS9 VSS9 VSS9 VSS9 9 VSS9 U00E SU900/SU900 U00E SU900/SU900 RN00 KOHM RN00 KOHM RN00 RN00 R00 0 % R00 0 % RN00 RN00 00 SL00 00 SL00 00 0.0UF/V 00 0.0UF/V 00 0UF/.V 00 0UF/.V VSS VSS F VSS VSS VSS F VSS H VSS K VSS M VSS9 P VSS0 T VSS V VSS Y VSS VSS VSS F VSS H VSS K VSS M VSS9 P VSS0 Y VSS V VSS T VSS V VSS Y VSS VSS VSS 9 VSS E9 VSS9 G VSS0 H VSS J9 VSS L9 VSS M VSS N9 VSS R9 VSS T VSS U9 VSS W9 VSS9 Y VSS0 9 VSS 9 VSS VSS E9 VSS G9 VSS H VSS J9 VSS L9 VSS M VSS9 N9 VSS0 R9 VSS R VSS T VSS U9 VSS U VSS W9 VSS W VSS 9 VSS VSS9 0 VSS0 VSS VSS H VSS VSS K VSS M VSS M VSS P VSS T VSS9 V VSS0 T VSS Y VSS VSS VSS Y VSS VSS F VSS H VSS H VSS9 K VSS0 M VSS P VSS M VSS R VSS U VSS V VSS W VSS W VSS Y VSS9 T VSS90 V VSS9 VSS9 VSS9 VSS9 VSS9 VSS9 9 VSS9 VSS9 E9 VSS99 E VSS00 G9 VSS0 G VSS0 E VSS0 G VSS0 J9 VSS0 J VSS0 L9 VSS0 L VSS0 N9 VSS09 N VSS0 J VSS L VSS N VSS R9 VSS R VSS U9 VSS U VSS R VSS U VSS9 W9 VSS0 W VSS W VSS 9 VSS VSS 9 VSS VSS VSS VSS E9 VSS9 E VSS0 G9 VSS G VSS J9 VSS J VSS E VSS G VSS J VSS L9 VSS L VSS9 N9 VSS0 N VSS L VSS N VSS R9 VSS R VSS R VSS U9 VSS U VSS W9 VSS9 W VSS0 U VSS W VSS 9 VSS VSS 9 VSS VSS VSS VSS VSS9 VSS0 VSS E VSS E VSS E U00 SU900/SU900 U00 SU900/SU900 R00 0 % R00 0 % RN00 KOHM RN00 KOHM RN00 RN00 RN00 KOHM RN00 KOHM RN00 KOHM RN00 KOHM V0 V0 V0 V0 V0 V0 V0 V0 F V09 F V0 H V H V K V K V M V M V P V P V T V9 T V0 V V V V Y V Y V V V V V F V9 F V0 H V H V K V K V M V M V P V P V T V9 T V0 V V V V Y V Y V V V V V V9 V0 0 V V V F V F V H V H V 0 V F0 V9 H0 V0 K V K V M V M V K0 V M0 V P V P V T V9 T V0 V V V V P0 V T0 V V0 V Y V Y V V V9 V0 V Y0 V 0 V 0 V F V F V H V H V F0 V9 H0 V90 K V9 K V9 M V9 M V9 P V9 P V9 K0 V9 M0 V9 P0 V99 T V00 T V0 V V0 V V0 Y V0 Y V0 T0 V0 V0 V0 Y0 V0 V09 V0 V V 0 V 0 V M V P V T V V V Y V9 V0 VP F VP G VP9 J VP0 K VP L VP N VP P VP VP VP VP E VP E VP9 F VP0 G VP F VP H VP J VP L VP N VP K VP R VP U VP9 P VP0 V VP W VP VP VP VP E VP G VP J VP F VP9 L VP0 N VP K VP P VP VP VP VP VP VP E VP9 F VP0 F VP G VP H VP H VP J VP K VP K VP L VP L VP9 M VP0 N VP N VP K0 VP P VP P VP R VP R VP T VP U VP9 U VP0 V VP V VP W VP W VP P0 VP V0 VP Y VP VP VP9 VP90 VP9 VP9 VP9 VP9 0 VP9 E VP9 E VP9 F VP9 F VP99 G VP00 G VP0 H VP0 J VP0 J VP0 F0 VP0 K VP0 K VP0 L VP0 L VP09 N VP0 N VP P VP R VP R VP K0 VP P0 VP U VP U VP L9 VP9 L VP0 N9 VP N VP R9 VP R VP U9 VP U VP W9 VP W VP 9 VP9 VP0 9 VP VP E9 VP E VP G9 VP G VP J9 VP J VP L9 VP9 L VP0 N9 VP N VP R9 VP R VP VP U00F SU900/SU900 U00F SU900/SU900 RN00 RN00 RN00 KOHM RN00 KOHM V F V G V H V J V K V L V M V N V9 P V0 R V T V U V V V W V Y V V V V9 V0 E V F V G V H V J V K V L V M V N V9 P V0 R V T V T V U V V V Y V V V V9 0 V0 V V 0 V F0 V F V H0 V H V V F V9 H V0 K0 V K V M0 V M V K V M V P0 V P V T0 V9 T V0 V0 V V V P V T V V V Y0 V Y V 0 V V9 0 V0 V Y V V V F0 V F V H0 V H V F V9 H V0 K0 V K V M0 V M V P0 V P V K V M V P V9 T0 V90 T V9 V0 V9 V V9 Y0 V9 Y V9 T V9 V V9 Y V9 0 V99 V00 0 VP J VP E VP G VP J VP K VP L VP N VP P VP9 R VP0 U VP V VP W VP VP VP VP E V V VI[0] VI[] VI[] 0 VI[] VI[] VI[] VI[] Y VSENSE VSSSENSE U00 SU900/SU900 U00 SU900/SU900 RN00 KOHM RN00 KOHM
+VORE for Ultra Low Voltage PU TP 0W + E00 00UF/.V 00 00 00 00 00 00 00 00 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 009 00 0UF/.V 0UF/.V R. ecoupling guide from Intel VORE 0uF mount *pcs 0.uF mount *pcs VP uf * pcs 0uF * pcs V 0.0uF * pcs 0uF * pcs +VP +VP ecoupling apacitor (Place near PU) + E00 00UF/.V 0 0UF/.V R.0 0 0.UF/0V 0 0.UF/0V 0 0.UF/0V 0 0.UF/0V 0 0.UF/0V,,0, UF_PLT_RST# +VP R00 0KOhm R00 0KOhm R00 Ohm Q00 PMS90,,0 H_THRMTRIP# E FORE_OFF# 0,,9 R. SUSTeK OMPUTER IN. PU PITORS ustom UL0T ate: Friday, October, 009 Sheet of 9.0
R. +VS VR_VI0 VR_VI VR_VI0,0 VR_VI,0 +VS 0KOhm RN00 Q00 UMKN 0KOhm RN00 Q00 UMKN 0KOhm RN00 VISEL0 Q00 UMKN VISEL Q00 UMKN +VP +VS Q00 VISELSW# UMKN VISELSW# Q00 UMKN 0KOhm RN00 Q00 UMKN Q00 UMKN Q0 UMKN Q0 UMKN Q0 UMKN Q0 UMKN +VS 0KOhm RN00 VR_VI VR_VI VR_VI,0 VR_VI,0 +VS 0KOhm RN00 VIPUPSW# Q0 UMKN RN00 KOhm RN00 KOhm RN00 KOhm RN00 KOhm RN00 KOhm RN00 KOhm RN00 KOhm RN00 KOhm VISEL Q00 UMKN Q00 UMKN VISEL Q00 UMKN Q00 UMKN Q0 UMKN VR_VI0 VR_VI VR_VI VR_VI VR_VI VR_VI VISELSW# Q00 UMKN VISELSW# Q00 UMKN VISEL0 VISEL GPIO GPIO +VS 0KOhm RN00 VR_VI Q00 UMKN VR_VI VR_VI,0 VR_VI,0 +VS 0KOhm RN00 Q00 UMKN VISEL VISEL VISEL VISEL VIPUPSW# GPIO GPIO GPIO GPIO GPIO VISEL Q00 UMKN VISEL Q00 UMKN VISELSW# GPIO VISELSW# Q009 UMKN VISELSW# Q009 UMKN SUSTeK OMPUTER IN. UL0T Friday, October, 009 ate: Sheet of 9.0
M M M M M 0 M 9 M 0 M M M M M M M Q M Q9 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q0 M Q M Q M Q0 M Q0 M Q M Q M Q M Q M Q M Q0 M Q9 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q9 M Q M Q M Q M Q M Q9 M Q9 M Q M Q M Q M Q[0..] M M M QS M QS M QS M M M M M QS M M M M M M M QS# M QS# M QS M QS# M QS# M QS# M M M M0 M QS# M QS#[:0] M QS#0 M QS M QS# M QS M QS[:0] M M M QS0 M_LK_R#0 M_LK_R0 M_LK_R# M_LK_R +VS +.V +.V +.V +0.V +0.V M S M S0 M S M_S#0 M_S# M_LK_R M_LK_R0 M_LK_R# M_LK_R#0 M_KE0 M_KE M RS# M S# M WE# M_OT M_OT0 M M[..0] M QS#[:0] M QS[:0] SM_LK_S,,,9 SM_T_S,,,9 M [:0] M Q[0..] M_RMRST#, PM_EXTTS#0 M_VREF_IMM0 9 M_VREFQ_IMM0 9 ate: Sheet of ustom Friday, October, 009 SUSTeK OMPUTER IN. R SO-IMM.0 UL0T 9 ate: Sheet of ustom Friday, October, 009 SUSTeK OMPUTER IN. R SO-IMM.0 UL0T 9 ate: Sheet of ustom Friday, October, 009 SUSTeK OMPUTER IN. R SO-IMM.0 UL0T 9 SWP SWP SWP SWP SWP SWP SWP SWP Place near SO-IMM_0 00 0.UF/0V 00 0.UF/0V R00 R00 0 UF/.V 0 UF/.V 00 0.UF/0V 00 0.UF/0V 00 0UF/.V 00 0UF/.V 0 0PF/0V c00 0 0PF/0V c00 00 0UF/.V 00 0UF/.V 0.UF/.V 0.UF/.V 0 0.UF/0V 0 0.UF/0V 0 0.UF/0V 0 0.UF/0V 00 UF/.V 00 UF/.V 00 UF/.V 00 UF/.V 0.UF/.V 0.UF/.V 00 0.UF/0V 00 0.UF/0V 00 0.UF/0V 00 0.UF/0V 0 0UF/.V 0 0UF/.V 00 0.UF/0V 00 0.UF/0V 009.UF/.V 009.UF/.V 00 0UF/.V 00 0UF/.V 0 UF/.V 0 UF/.V 09 0.UF/0V 09 0.UF/0V 0 9 9 0/P 0 /# 9 0 9 9 9 9 90 9 9 0 09 0 9 S# K0# 0 K# 0 K0 0 K 0 KE0 KE M0 M M M M M M 0 M Q0 Q Q0 Q Q Q Q Q Q 9 Q Q Q9 Q Q0 0 Q Q 0 Q Q Q 9 Q Q 9 Q Q9 Q Q0 Q 0 Q 9 Q Q Q Q 0 Q Q 0 Q9 Q Q0 Q 9 Q Q 9 Q Q Q Q 0 Q Q9 Q Q0 Q Q Q Q Q Q Q Q 9 Q9 9 Q Q0 0 Q Q 9 Q 9 Q Q Q9 QS#0 0 QS# QS# QS# QS# QS# QS# 9 QS# QS0 QS 9 QS QS QS QS QS QS S# S0# OT 0 OT0 WE# RS# 0 S 0 S0 9 SL 0 S 00 RESET# 0 U00 R_IMM_0P G00W R IMM 0P,.V,.H,REV U00 R_IMM_0P G00W R IMM 0P,.V,.H,REV 0 0PF/0V c00 0 0PF/0V c00 0 0.UF/0V 0 0.UF/0V EVENT# 9 0 0 N N NP_N 0 NP_N 0 TEST V V0 00 V 0 V 0 V V V V V V V V V V V V 9 V 9 V9 99 VSP 99 VREF VREFQ VSS9 VSS 0 VSS 9 VSS VSS 9 VSS 9 VSS0 90 VSS VSS9 9 VSS VSS VSS 9 VSS VSS VSS VSS VSS VSS0 VSS 9 VSS9 VSS VSS VSS VSS 0 VSS VSS VSS 9 VSS VSS0 VSS VSS9 VSS VSS VSS VSS VSS VSS VSS VSS 0 VSS0 VSS VSS9 VSS 9 VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VTT 0 VTT 0 U00 R_IMM_0P U00 R_IMM_0P
M M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q0 M Q M Q0 M Q M Q M Q M Q M Q9 M Q M Q9 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q9 M Q M Q M Q M Q M Q[0..] M Q M Q M Q M Q9 M Q M Q0 M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q M Q0 M Q M Q M Q M Q M Q M QS[:0] M QS# M QS# M QS M QS#[:0] M QS M QS# M QS# M M0 M QS#0 M QS0 M QS# M QS M QS# M QS# M QS M M M QS M QS M M M M M M M QS M M M M M M M M 9 M M M M M M M M 0 M 0 M M M M_LK_R# M_LK_R M_LK_R# M_LK_R +VS +.V +VS +.V +.V +0.V +0.V M S M RS# M_S# M_KE M S# M_KE M S0 M_LK_R# M_S# M_LK_R M_LK_R# M_LK_R M S M WE# M [:0] M_OT M_OT M M[..0] M QS#[:0] M QS[:0] SM_LK_S,,,9 SM_T_S,,,9 M_RMRST#, PM_EXTTS# M Q[0..] M_VREF_IMM 9 M_VREFQ_IMM 9 ate: Sheet of ustom Friday, October, 009 SUSTeK OMPUTER IN. R SO-IMM.0 UL0T 9 ate: Sheet of ustom Friday, October, 009 SUSTeK OMPUTER IN. R SO-IMM.0 UL0T 9 ate: Sheet of ustom Friday, October, 009 SUSTeK OMPUTER IN. R SO-IMM.0 UL0T 9 SWP SWP SWP SWP SWP SWP SWP SWP Place near SO-IMM_ 0 0PF/0V c00 0 0PF/0V c00 0.UF/.V 0.UF/.V 00 UF/.V 00 UF/.V 0 0.UF/0V 0 0.UF/0V 00 0.UF/0V 00 0.UF/0V 009.UF/.V 009.UF/.V 00 0.UF/0V 00 0.UF/0V 0 9 9 0/P 0 /# 9 0 9 9 9 9 90 9 9 0 09 0 9 S# K0# 0 K# 0 K0 0 K 0 KE0 KE M0 M M M M M M 0 M Q0 Q Q0 Q Q Q Q Q Q 9 Q Q Q9 Q Q0 0 Q Q 0 Q Q Q 9 Q Q 9 Q Q9 Q Q0 Q 0 Q 9 Q Q Q Q 0 Q Q 0 Q9 Q Q0 Q 9 Q Q 9 Q Q Q Q 0 Q Q9 Q Q0 Q Q Q Q Q Q Q Q 9 Q9 9 Q Q0 0 Q Q 9 Q 9 Q Q Q9 QS#0 0 QS# QS# QS# QS# QS# QS# 9 QS# QS0 QS 9 QS QS QS QS QS QS S# S0# OT 0 OT0 WE# RS# 0 S 0 S0 9 SL 0 S 00 RESET# 0 U00 R_IMM_0P G00K R IMM 0P,.V,.H,ST U00 R_IMM_0P G00K R IMM 0P,.V,.H,ST 00 0UF/.V 00 0UF/.V R00 0KOhm R00 0KOhm R00 R00 00 0.UF/0V 00 0.UF/0V 00 UF/.V 00 UF/.V 0 0.UF/0V 0 0.UF/0V 00 0UF/.V 00 0UF/.V 00 0UF/.V 00 0UF/.V 00 0.UF/0V 00 0.UF/0V 0 0UF/.V 0 0UF/.V EVENT# 9 0 0 N N NP_N 0 NP_N 0 TEST V V0 00 V 0 V 0 V V V V V V V V V V V V 9 V 9 V9 99 VSP 99 VREF VREFQ VSS9 VSS 0 VSS 9 VSS VSS 9 VSS 9 VSS0 90 VSS VSS9 9 VSS VSS VSS 9 VSS VSS VSS VSS VSS VSS0 VSS 9 VSS9 VSS VSS VSS VSS 0 VSS VSS VSS 9 VSS VSS0 VSS VSS9 VSS VSS VSS VSS VSS VSS VSS VSS 0 VSS0 VSS VSS9 VSS 9 VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VTT 0 VTT 0 U00 R_IMM_0P U00 R_IMM_0P 0 0.UF/0V 0 0.UF/0V 0.UF/.V 0.UF/.V 0 UF/.V 0 UF/.V 09 0.UF/0V 09 0.UF/0V 0 0PF/0V c00 0 0PF/0V c00 00 0.UF/0V 00 0.UF/0V 0 UF/.V 0 UF/.V
R. From R/VTT Power ircuit +.V 0.V_VTT_REF_ 0.V_VTT_REF 0.V_VTT_REF_R R090 R090 R090 KOhm 0.V_VTT_REF % r00_h r00_h Place lose to N +.V 0.V_VTT_REF 0mils M_VREF_IMM0 090 0.UF/0V R090 KOhm % SL090 00 R090 KOhm % To N 0.V_VTT_REF_ 0.V_VTT_REF_ 0mils SL090 00 SL090 00 M_VREF_IMM M_VREFQ_IMM0 090 0.UF/0V R090 KOhm % SL090 00 M_VREFQ_IMM R. R. SUSTeK OMPUTER IN. R VREF ustom UL0T ate: Friday, October, 009 Sheet 9 of 9.0
H_#[:] H_#[:] H_REQ#[:0] H_REQ#[:0] H_#[:0] H_#[:0] +VP R00 OHM % R00 0 % H_SWING 00 0.UF/0V R00.9Ohm % H_ROMP +VP 00 0.UF/0V R00 KOhm % R00 KOhm % H_PURST# H_PUSLP# T00 T00 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_SWING H_ROMP N_PUSLP# HVREF U00 J H_#_0 H H_#_ L H_#_ J H_#_ H H_#_ G H_#_ K0 H_#_ K H_#_ L H_#_ M0 H_#_9 M H_#_0 N H_#_ L H_#_ K H_#_ M H_#_ K H_#_ P H_#_ W9 H_#_ V H_#_ V H_#_9 P0 H_#_0 W H_#_ N9 H_#_ P H_#_ U9 H_#_ V H_#_ U H_#_ W H_#_ V0 H_#_ U H_#_9 W H_#_0 U H_#_ H_#_ 9 H_#_ Y H_#_ Y0 H_#_ H_#_ 9 H_#_ 0 H_#_ H_#_9 H_#_0 H_#_ H_#_ H_#_ Y H_#_ 0 H_#_ H_#_ H_#_ H_#_ E H_#_9 H_#_0 H_#_ E H_#_ G9 H_#_ G H_#_ E H_#_ K H_#_ F H_#_ J9 H_#_ H H_#_9 F H_#_0 H H_#_ J H_#_ E9 H_#_ H_SWING H_ROMP J H_PURST# G9 H_PUSLP# L H_VREF K H_VREF 90 HOST H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_9 H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_9 H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_9 H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_S# H_ST#_0 H_ST#_ H_NR# H_PRI# H_REQ# H_EFER# H_SY# HPLL_LK HPLL_LK# H_PWR# H_RY# H_HIT# H_HITM# H_LOK# H_TRY# H_INV#_0 H_INV#_ H_INV#_ H_INV#_ H_STN#_0 H_STN#_ H_STN#_ H_STN#_ H_STP#_0 H_STP#_ H_STP#_ H_STP#_ H_REQ#_0 H_REQ#_ H_REQ#_ H_REQ#_ H_REQ#_ H_RS#_0 H_RS#_ H_RS#_ L F G J K F J9 J G9 J L L9 G 0 K F K0 F0 F 0 9 F0 9 9 E H0 J G H F L9 N G K N F L M Y F J L G G F F G H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_#9 H_#0 H_# H_# H_# H_# H_# H_REQ#0 H_REQ# H_REQ# H_REQ# H_REQ# H_S# H_ST#0 H_ST# H_NR# H_PRI# H_R0# H_EFER# H_SY# H_PWR# H_RY# H_HIT# H_HITM# H_LOK# H_TRY# H_INV#0 H_INV# H_INV# H_INV# H_STN#0 H_STN# H_STN# H_STN# H_STP#0 H_STP# H_STP# H_STP# H_RS#0 H_RS# H_RS# T00 T00 LK_MH_LK 9 LK_MH_LK# 9 SUSTeK OMPUTER IN. N GS HOST ustom UL0T ate: Friday, October, 009 Sheet 0 of 9.0
+.V U00 R0 KOhm % SM_ROMP_VOH R0.0KOHM % SM_ROMP_VOL R0 KOhm % 0.UF/.V 0.UF/.V 0 0.0UF/V 0 0.0UF/V 9 MH_SEL0 9 MH_SEL 9 MH_SEL MH_FG_ MH_FG_ MH_FG_ MH_FG_9 MH_FG_0 MH_FG_ MH_FG_ MH_FG_ MH_FG_9 MH_FG_0 PMSYN#_MH PMSYN#,0,0 H_PRSTP# PM_EXTTS#_0 PM_EXTTS#0 PM_EXTTS#_ PM_EXTTS# PM_PWROK_MH,0 PM_PWROK SL0,,0, UF_PLT_RST# 00,,0 H_THRMTRIP#,0 PM_PRSLPVR +VS PM_EXTTS#_0 0KOHM RN0 PM_EXTTS#_ 0KOHM RN0 J L J L N M0 K0 L F 0 J9 W 0 E9 F0 F N P T N K G G J L L F J K L L K K J F J9 L9 Y9 K K 9 G E H K K L L L9 L L L K K H E G RSV RSV RSV RSV RSV RSV RSV RSV RSV9 RSV RSV RSV RSV0 RSV RSV RSV RSV ME_JTG_TK ME_JTG_TI ME_JTG_TO ME_JTG_TMS FG_0 FG_ FG_ FG_ FG_ FG_ FG_ FG_ FG_ FG_9 FG_0 FG_ FG_ FG_ FG_ FG_ FG_ FG_ FG_ FG_9 FG_0 PM_SYN# PM_PRSTP# PM_EXT_TS#_0 PM_EXT_TS#_ PWROK RSTIN# THERMTRIP# PRSLPVR N_ N_ N_ N_ N_ N_ N_ N_ N_9 N_0 N_ N_ N_ N_ N_ N_ N_ N_ N_9 N_0 N_ N_ H MIS ME GRPHIS VI MI LK R LK/ ONTROL/OMPENSTION RSV FG PM N S_K_0 S_K_ S_K_0 S_K_ S_K#_0 S_K#_ S_K#_0 S_K#_ S_KE_0 S_KE_ S_KE_0 S_KE_ S_S#_0 S_S#_ S_S#_0 S_S#_ S_OT_0 S_OT_ S_OT_0 S_OT_ SM_ROMP SM_ROMP# SM_ROMP_VOH SM_ROMP_VOL SM_VREF SM_PWROK SM_REXT SM_RMRST# PLL_REF_LK PLL_REF_LK# PLL_REF_SSLK PLL_REF_SSLK# PEG_LK PEG_LK# MI_RXN_0 MI_RXN_ MI_RXN_ MI_RXN_ MI_RXP_0 MI_RXP_ MI_RXP_ MI_RXP_ MI_TXN_0 MI_TXN_ MI_TXN_ MI_TXN_ MI_TXP_0 MI_TXP_ MI_TXP_ MI_TXP_ GFX_VI_0 GFX_VI_ GFX_VI_ GFX_VI_ GFX_VI_ GFX_VR_EN L_LK L_T L_PWROK L_RST# L_VREF P_TRLLK P_TRLT SVO_TRLLK SVO_TRLT LKREQ# IH_SYN# TSTN# H_LK H_RST# H_SI H_SO H_SYN E E K K E 9 J J9 E L K K L Y H0 0 0 R9 P0 G L9 H L G K0 H L G9 J9 J G F0 H0 J G G G F F G G9 K K W0 L L F F K 0 9 0 M_ROMP M_ROMP# SM_ROMP_VOH SM_ROMP_VOL MH_SM_REXT LK_REF LK_REF# LK_REFSS LK_REFSS# LK_MH_GPLL LK_MH_GPLL# R PM_PWROK T TSTN# R0 M_LK_R0 M_LK_R M_LK_R M_LK_R M_LK_R#0 M_LK_R# M_LK_R# M_LK_R# M_KE0 M_KE M_KE M_KE M_S#0 M_S# M_S# M_S# M_OT0 M_OT M_OT M_OT R0 0.Ohm % R 0.Ohm % MI_TXN0 MI_TXN MI_TXP0 MI_TXP MI_RXN0 MI_RXN MI_RXP0 MI_RXP SM_PWROK M_RMRST#, LK_REF 9 LK_REF# 9 LK_REFSS 9 LK_REFSS# 9 +VS +.V R 99OHM % 0KOhm R Ohm LK_MH_GPLL 9 LK_MH_GPLL# 9 L_LK0 L_T0 L_RST#0 MH_SYN# L_VREF +VP SVO_TRLLK SVO_TRLT Ohm Z_LK_HMI 0 Z_RST#_HMI 0 Z_SIN_HMI 0 Z_SOUT_HMI 0 Z_SYN_HMI 0 0.V_VTT_REF_ 0 0.UF/0V 0 0.0UF/V +VP R. R KOhm % R 99OHM % For lock measurent LK_REF LK_REF# LK_REFSS LK_REFSS# LK_MH_GPLL LK_MH_GPLL# T T T0 T T T G,hecklist:00ohm R:ohm 90 SUSTeK OMPUTER IN. N GS MI UL0T Friday, October, 009 ate: Sheet of 9.0
+VS RN0 L_TRL_LK.KOhm RN0 L_TRL_T.KOhm RN0 EI_LK_GM.KOhm RN0 EI_T_GM.KOhm RN0.KOhm RN0.KOhm RT LK_GM RT T_GM U00 LUE_GM GREEN_GM RE_GM R R R L_KLT_TRL L_KEN_GM L_TRL_LK L_TRL_T EI_LK_GM EI_T_GM L_V_EN_GM SHORT_PIN JP0 SHORT_PIN JP0 SHORT_PIN JP0 RT LK_GM RT T_GM HSYN_R_GM VSYN_R_GM LVS_LLKN_GM LVS_LLKP_GM LVS_L0N_GM LVS_LN_GM LVS_LN_GM LVS_L0P_GM LVS_LP_GM LVS_LP_GM RNX0 Ohm RNX0 Ohm RNX0 Ohm RNX0 Ohm RT_LUE_R RT_GREEN_R RT_RE_R RT LK_GM RT T_GM RN0 Ohm L_TRL_LK L_TRL_T EI_LK_GM EI_T_GM R0.KOhm % RN0 Ohm TV_ TV_ TV_ RT_LUE_R RT_GREEN_R RT_RE_R HSYN_N VSYN_N R0 +VP 9.9Ohm U PEG_OMP % T G9 K H0 M N9 P V Y0 V W9 E9 F E F J J9 PIEN_RXP PIEN_RXP, M M0 P U 9 V V0 0 F PIEG_RXN0 PIEG_RXN PIEG_RXN PIEG_RXN PIEG_RXP0 PIEG_RXP PIEG_RXP PIEG_RXP heck : R0 如如 RT Trace " 以以, kohm 如如 RT Trace ~.", 放 9ohm R0 KOhm % L_KLT_TRL L_KLT_EN K L_TRL_LK L L_TRL_T J L LK L L T L_V_EN F0 LVS_IG H LVS_VG P LVS_VREFH K LVS_VREFL LVS_LK# LVS_LK LVS_LK# LVS_LK G LVS_T#_0 F LVS_T#_ G LVS_T#_ LVS_T#_ F LVS_T_0 G LVS_T_ F0 LVS_T_ LVS_T_ 0 LVS_T#_0 LVS_T#_ F LVS_T#_ LVS_T#_ 0 LVS_T_0 LVS_T_ G LVS_T_ LVS_T_ J TV_ E TV_ G TV_ F J9 G9 F0 E9 TV_RTN TV_ONSEL_0 TV_ONSEL_ RT_LUE RT_GREEN RT_RE RT_IRTN RT LK RT T J RT_HSYN RT_TVO_IREF G RT_VSYN 90 LVS PI-EXPRESS GRPHIS TV VG PEG_OMPI PEG_OMPO PEG_RX#_0 PEG_RX#_ PEG_RX#_ PEG_RX#_ PEG_RX#_ PEG_RX#_ PEG_RX#_ PEG_RX#_ PEG_RX#_ PEG_RX#_9 PEG_RX#_0 PEG_RX#_ PEG_RX#_ PEG_RX#_ PEG_RX#_ PEG_RX#_ PEG_RX_0 PEG_RX_ PEG_RX_ PEG_RX_ PEG_RX_ PEG_RX_ PEG_RX_ PEG_RX_ PEG_RX_ PEG_RX_9 PEG_RX_0 PEG_RX_ PEG_RX_ PEG_RX_ PEG_RX_ PEG_RX_ PEG_TX#_0 PEG_TX#_ PEG_TX#_ PEG_TX#_ PEG_TX#_ PEG_TX#_ PEG_TX#_ PEG_TX#_ PEG_TX#_ PEG_TX#_9 PEG_TX#_0 PEG_TX#_ PEG_TX#_ PEG_TX#_ PEG_TX#_ PEG_TX#_ PEG_TX_0 PEG_TX_ PEG_TX_ PEG_TX_ PEG_TX_ PEG_TX_ PEG_TX_ PEG_TX_ PEG_TX_ PEG_TX_9 PEG_TX_0 PEG_TX_ PEG_TX_ PEG_TX_ PEG_TX_ PEG_TX_ L PIEN_TXN0 0.UF/0V PIEG_RXN0 F PIEN_TXN 0.UF/0V PIEG_RXN P PIEN_TXN 0.UF/0V PIEG_RXN H PIEN_TXN 0.UF/0V PIEG_RXN L T R U9 T Y W Y 9 F J PIEN_TXP0 0.UF/0V PIEG_RXP0 F PIEN_TXP 0.UF/0V PIEG_RXP N PIEN_TXP 0 0.UF/0V PIEG_RXP H PIEN_TXP 9 0.UF/0V PIEG_RXP L R R T0 T W W Y 0 E SUSTeK OMPUTER IN. N GS ISPLY ustom UL0T ate: Friday, October, 009 Sheet of 9.0
M Q[:0] U00 M Q0 P M Q S_Q_0 U M Q S_Q_ T M Q S_Q_ U9 M Q S_Q_ R M Q S_Q_ N9 M Q S_Q_ V0 M Q S_Q_ P0 M Q S_Q_ W M Q9 S_Q_ 0 M Q0 S_Q_9 W9 M Q S_Q_0 9 M Q S_Q_ 9 M Q S_Q_ V M Q S_Q_ M Q S_Q_ Y0 M Q S_Q_ F M Q S_Q_ M Q S_Q_ F0 M Q9 S_Q_ F M Q0 S_Q_9 M Q S_Q_0 E9 M Q S_Q_ M Q S_Q_ E M Q S_Q_ F M Q S_Q_ 9 M Q S_Q_ F M Q S_Q_ F0 M Q S_Q_ 0 M Q9 S_Q_ E M Q0 S_Q_9 F M Q S_Q_0 E M Q S_Q_ M Q S_Q_ E M Q S_Q_ E M Q S_Q_ F M Q S_Q_ M Q S_Q_ M Q S_Q_ E M Q9 S_Q_ F M Q0 S_Q_9 F0 M Q S_Q_0 M Q S_Q_ F M Q S_Q_ G M Q S_Q_ M Q S_Q_ 9 M Q S_Q_ M Q S_Q_ F M Q S_Q_ V M Q9 S_Q_ M Q0 S_Q_9 W M Q S_Q_0 Y M Q S_Q_ T0 M Q S_Q_ W M Q S_Q_ U M Q S_Q_ W9 M Q S_Q_ R M Q S_Q_ T M Q S_Q_ P M Q9 S_Q_ L M Q0 S_Q_9 R M Q S_Q_0 T M Q S_Q_ M M Q S_Q_ U S_Q_ 90 R SYSTEM MEMORY S_S_0 S_S_ S_S_ S_RS# S_S# S_WE# S_M_0 S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_QS_0 S_QS_ S_QS_ S_QS_ S_QS_ S_QS_ S_QS_ S_QS_ S_QS#_0 S_QS#_ S_QS#_ S_QS#_ S_QS#_ S_QS#_ S_QS#_ S_QS#_ S_M_0 S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_M_9 S_M_0 S_M_ S_M_ S_M_ S_M_ J J H K0 L T0 M M0 0 M M M M E9 M M M M E M M V0 M M R9 M M R E 0 N R9 W 9 N9 M QS0 M QS M QS M QS M QS M QS M QS M QS M QS#0 M QS# M QS# M QS# M QS# M QS# M QS# M QS# M 0 F M E M M H M J M M H M M F M 9 M 0 G M H M H M E M M S0 M S M S M RS# M S# M WE# M M[..0] M QS[:0] M QS#[:0] M [:0] M Q[:0] U00E M Q0 P M Q S_Q_0 M M Q S_Q_ R M Q S_Q_ V M Q S_Q_ M M Q S_Q_ N M Q S_Q_ T M Q S_Q_ U M Q S_Q_ W M Q9 S_Q_ Y M Q0 S_Q_9 M Q S_Q_0 M Q S_Q_ V M Q S_Q_ W M Q S_Q_ M Q S_Q_ M Q S_Q_ F M Q S_Q_ E M Q S_Q_ H M Q9 S_Q_ K M Q0 S_Q_9 E M Q S_Q_0 H M Q S_Q_ K M Q S_Q_ J M Q S_Q_ L M Q S_Q_ J M Q S_Q_ L M Q S_Q_ H M Q S_Q_ H M Q9 S_Q_ K M Q0 S_Q_9 K0 M Q S_Q_0 J9 M Q S_Q_ K0 M Q S_Q_ H0 M Q S_Q_ K M Q S_Q_ H M Q S_Q_ J9 M Q S_Q_ L M Q S_Q_ G M Q9 S_Q_ J M Q0 S_Q_9 G M Q S_Q_0 F M Q S_Q_ M Q S_Q_ M Q S_Q_ E M Q S_Q_ F M Q S_Q_ M Q S_Q_ Y M Q S_Q_ M Q9 S_Q_ P M Q0 S_Q_9 U M Q S_Q_0 T M Q S_Q_ T M Q S_Q_ V M Q S_Q_ U M Q S_Q_ R M Q S_Q_ N M Q S_Q_ P M Q S_Q_ L M Q9 S_Q_ J M Q0 S_Q_9 K M Q S_Q_0 M M Q S_Q_ H M Q S_Q_ K S_Q_ 90 R SYSTEM MEMORY S_S_0 S_S_ S_S_ S_RS# S_S# S_WE# S_M_0 S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_QS_0 S_QS_ S_QS_ S_QS_ S_QS_ S_QS_ S_QS_ S_QS_ S_QS#_0 S_QS#_ S_QS#_ S_QS#_ S_QS#_ S_QS#_ S_QS#_ S_QS#_ S_M_0 S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_M_ S_M_9 S_M_0 S_M_ S_M_ S_M_ S_M_ J K K E H K P M M0 Y M M J9 M M J M M H M M M M Y M M J M M R H0 K H V M T J H K W N J J H F H F K J H0 H K H J L M QS0 M QS M QS M QS M QS M QS M QS M QS M QS#0 M QS# M QS# M QS# M QS# M QS# M QS# M QS# M 0 M M M M M M M M M 9 M 0 M M M M M S0 M S M S M RS# M S# M WE# M M[:0] M QS[:0] M QS#[:0] M [:0] SUSTeK OMPUTER IN. N GS R US ustom UL0T ate: Friday, October, 009 Sheet of 9.0
00m +VP R. +V_GMH +.V_GMH U00G +VGFX_ORE + E0 00UF/V 9 0UF/.V 0 UF/.V 0.UF/0V 0.UF/0V U00F E W W K0 H0 F0 0 0 W0 L9 J9 G9 E9 9 9 Y9 K H F L J G E Y W F L9 +VGFX_ORE W G E Y W H9 G9 E9 9 9 9 Y9 W9 H G E H G E Y W H W J H G E Y W M L J H G E M L J H Y W M L V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_9 V_SM_0 V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_9 V_SM_0 V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_9 V_SM_0 V_SM_ V_SM_ V_SM_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_9 V_XG_0 V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_9 V_XG_0 V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_9 V_XG_0 V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_9 V_XG_0 V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_9 V_XG_0 V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_9 V_XG_0 V_XG_ POWER V SM V GFX V GFX NTF V GFX V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_9 V_XG_NTF_0 V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_9 V_XG_NTF_0 V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_9 V_XG_NTF_0 V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_9 V_XG_NTF_0 V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_NTF_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_9 V_XG_0 V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_ V_XG_9 V_XG_0 V SM LF V_SM_LF V_SM_LF V_SM_LF V_SM_LF V_SM_LF V_SM_LF V_SM_LF T U T R U9 T9 R9 U U T R U T R U U T R U T R M9 L9 H9 G9 E9 9 9 W9 U9 M L J H G E Y W U T R J H U T R M L J H G E Y W U T U F 9 E9 U9 L9 V_SM_LF V_SM_LF V_SM_LF V_SM_LF V_SM_LF V_SM_LF V_SM_LF 0 0.UF/0V +.V +VP R. R. POSP 00UF/V (/) 0% R. 0.UF/0V L0 L0 L0 POSP 00UF/V (/) 0% R. + E0 00UF/V /00Mhz Irat= /00Mhz Irat= /00Mhz Irat= + E0 00UF/V 0UF/.V POSP 00UF/V (/) 0% R. 0.UF/0V 0.UF/0V 0.UF/.V 0UF/.V 0.UF/0V. for R for R 00 R 0 : 0 m R 00 : m 0UF/.V UF/.V 0.UF/0V 9 0UF/.V UF/.V 0.UF/0V For SFF 9m +VGFX_ORE +.V_GMH T V_ R V_ N V_ J V_ H V_ V_ V_ Y V_ W V_9 T0 V_0 M0 V_ L0 V_ J0 V_ H0 V_ G0 V_ E0 V_ 0 V_ 0 V_ 0 V_9 Y0 V_0 N V_ M V_ J V_ H V_ V_ V_ W V_ M V_ L V_9 J V_0 H V_ G V_ E V_ V_ V_ V_ Y V_ W V_ M V_9 L V_0 J V_ H V_ E V_ V_ V_ M V_ L V_ J V_ H V_9 M9 V_0 L9 V_ M V_ L V_ J V_ M V_ L V_ M V_ L V_ J V_9 M V_0 N V_ 90 V ORE POWER V NTF V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_9 V_NTF_0 V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_9 V_NTF_0 V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_9 V_NTF_0 V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ +V_GMH T R N M L G E Y W U T R T R N M L J H G E Y W U T R T R U T R U T R R. G E V_XG_SENSE VSS_XG_SENSE Route V_XG_SENSE and VSS_XG_SENSE differentially. 90 SUSTeK OMPUTER IN. N GS POWER UL0T Friday, October, 009 ate: Sheet of 9.0
+VP +VS L0 /00Mhz +.VS_.0VM_PLL L0 /00Mhz +V_RT_ m 0 0.UF/0V 0 0UF/.V 0 0.UF/0V 0 0.0UF/V m ML 0UF/.V (00)XR 0% +VP ML 0UF/.V (00)XR 0% ML 0UF/.V (00)XR 0% ML 0UF/.V (00)XR 0% L0 /00Mhz +.VS_.0VM_PLL L0 /00Mhz +.VS_.0VM_HPLL L0 /00Mhz +.VS_.0VM_MPLL 0UF/.V 0 0.UF/0V L0 /00Mhz +.VS_.0VM_PEGPLL 0UF/.V 0UF/.V 09 0.UF/0V 0.UF/0V 0.UF/0V L0 /00Mhz U00H +V_G 0 0 J 0UF/.V 0.UF/0V 0.0UF/V m ML 0UF/.V (00)XR 0% L M +.VS_.0VM_PLL J.m +.VS_.0VM_PLL L9 m +.VS_.0VM_HPLL F0 0m +.VS_.0VM_MPLL E R. 0m +.VS m +VP m +VP +.VS + E0 00UF/.V R. 0 0UF/.V R0 Irat=00m.m /00Mhz l00_h V_TX_V_LVS U U 0 000PF/0V V J 0.UF/0V +.VS_.0VM_PEGPLL G 0UF/.V 0UF/.V W U W U U UF/.V W0 U9 W U W U T R U T R W T R T R T R T9 R9 T R U U U9 0.UF/0V U T R T9 R9 T R T R VTT_ VTT_ V_RT_ VTT_ VTT_ VTT_ VTT_ V G VTT_ VSS G VTT_ VTT_9 VTT_0 VTT_ V_PLL VTT_ VTT_ V_PLL V_HPLL V_MPLL V_LVS V_LVS VSS_LVS V_PEG_G V_PEG_PLL V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_9 V_SM_0 V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_ V_SM_NTF_ V_SM_NTF_ V_SM_NTF_ V_SM_NTF_ V_SM_NTF_ V_SM_NTF_ V_SM_NTF_ V_SM_NTF_ V_SM_NTF_9 V_SM_NTF_0 V_SM_K_ V_SM_K_ V_SM_K_ V_SM_K_ V_SM_K_NTF_ V_SM_K_NTF_ V_SM_K_NTF_ V_SM_K_NTF_ V_SM_K_NTF_ V_SM_K_NTF_ V_SM_K_NTF_ V_SM_K_NTF_ RT PLL LVS PEG POWER SM TV H TV/RT XF SM K HV PEG VTT V_TV_ V_H V_Q V_TV V_XF_ V_XF_ V_XF_ V_SM_K_ V_SM_K_ V_SM_K_ V_SM_K_ V_TX_LVS V_HV_ V_HV_ V_PEG_ V_PEG_ V_PEG_ V_PEG_ R T R T0 R9 T R T R T R T R R. +.VS K0 N +V_Q N +V_XF +V_SM_K M N M K L J K T Y m 0.UF/0V 0.0UF/V 0.UF/0V 9 0.UF/0V 0UF/.V 9 0UF/.V 0.UF/0V 0.m L0 /00Mhz 0UF/.V 0.UF/0V UF/.V 0.UF/0V 000PF/0V L0 /00Mhz 0 0UF/.V L09 /00Mhz 0UF/.V 0UF/.V 0 0UF/.V.m +.VS 0UF/.V 0.UF/0V +V_PEG + E0 00UF/.V + E0 00UF/.V R. R. 9m +VS m +.VS m +VP m +.V_GMH +VP 0 TW R09 % 0m +VS m +VP.m +VP 0m 0.UF/0V 0.m +.VS_.0VM_PEGPLL +.VS +.VS_LVS H V_HPLL E V_PEG_PLL 0.UF/0V M V_LVS_ L V_LVS_ 90 LVS MI VTTLF V_MI_ V_MI_ V_MI_ VTTLF VTTLF VTTLF M N L K Y P UF/.V 9 0.UF/0V UF/.V 9 UF/.V R. UF/.V ML UF/.V (00) XR 0% ML UF/.V (00) XR 0% ML UF/.V (00) XR 0% SUSTeK OMPUTER IN. N GS POWER UL0T Friday, October, 009 ate: Sheet of 9.0
ate: Sheet of ustom Friday, October, 009 SUSTeK OMPUTER IN. N GS.0 UL0T 9 ate: Sheet of ustom Friday, October, 009 SUSTeK OMPUTER IN. N GS.0 UL0T 9 ate: Sheet of ustom Friday, October, 009 SUSTeK OMPUTER IN. N GS.0 UL0T 9 VSS_99 N VSS_00 G VSS_0 E VSS_0 VSS_0 Y VSS_0 E VSS_0 VSS_0 VSS_0 N VSS_0 L VSS_0 G VSS_ E VSS_ VSS_ VSS_ N VSS_ Y VSS_ W VSS_ H VSS_0 G VSS_ Y VSS_ N VSS_ G VSS_ E VSS_ M VSS_ E VSS_ VSS_0 G9 VSS_ Y9 VSS_ M9 VSS_ E9 VSS_ VSS_ N VSS_ H VSS_ L VSS_ G VSS_9 Y VSS_0 M VSS_ E VSS_ VSS_ N VSS_ G VSS_ E VSS_ Y VSS_ W VSS_9 N VSS_0 H VSS_ G VSS_ Y VSS_ L VSS_0 H VSS_9 VSS_ E VSS_ M VSS_ R VSS_ VSS_ N VSS_ VSS_9 L VSS_NTF_ J VSS_NTF_ H VSS_NTF_ VSS_NTF_ VSS_NTF_ T VSS_NTF_ R VSS_NTF_ T VSS_NTF_ R VSS_NTF_9 U VSS_NTF_0 R VSS_NTF_ T VSS_NTF_ R VSS_NTF_ T VSS_NTF_ R VSS_NTF_ T VSS_S_ L VSS_S_ L VSS_S_ VSS_S_ VSS_S_ VSS_S_ VSS_ U VSS_ VSS_9 W VSS_0 VSS_ L9 VSS_ N VSS_ N VSS_ N0 VSS_ N VSS_ G VSS_ Y VSS_ U VSS_09 H VSS_ Y VSS_ VSS_ R VSS_ J VSS_ VSS_ VSS_9 W VSS_0 U VSS_NTF_ R VSS_NTF_ N9 VSS_NTF_ J9 VSS_NTF_9 9 VSS_NTF_0 Y9 VSS_NTF_ T9 VSS_NTF_ R9 VSS_NTF_ N VSS_ VSS_ H VSS_ E VSS_ U VSS_ E VSS_ VSS_9 W VSS_0 R VSS_ L VSS_ G VSS_ VSS_ W VSS_ N VSS_ J VSS_9 N VSS_0 N0 VSS_ N VSS_ M9 VSS_ 0 VSS_9 H0 VSS_S_ VSS_ M VSS_ E VSS_ VSS_ VSS_ V VSS_ P VSS_ M VSS_ K VSS_9 VSS_0 V VSS_ P VSS_ H VSS_ G VSS_ G VSS_ E VSS_ 0 VSS_ Y0 VSS_ P0 VSS_9 H0 VSS_90 L9 VSS_9 G9 VSS_9 E9 VSS_9 9 VSS_9 VSS_9 VSS_9 Y VSS_9 V VSS_9 T VSS_99 P VSS_00 M VSS_0 K VSS_ VSS_ W VSS_ U VSS_9 N VSS_0 L VSS_ J VSS_ G VSS_0 H VSS_0 F VSS_0 VSS_0 VSS_0 Y VSS_0 V VSS_0 P VSS_09 M VSS_0 K VSS_ H VSS_ J VSS_ E VSS_ F VSS_ VSS_ VSS_ W VSS_ U VSS_9 R VSS_0 N VSS_ L VSS_ J VSS_ G VSS_ E VSS_ VSS_ L VSS_ 0 VSS_ N VSS VSS NTF VSS S U00J 90 VSS VSS NTF VSS S U00J 90 VSS_ VSS_ N VSS_ U VSS_ N VSS_ J VSS_ E VSS_ VSS_ U VSS_ N VSS_9 VSS_0 G VSS_ J VSS_ E VSS_ VSS_ U VSS_ N VSS_ J VSS_ G VSS_9 K VSS_0 G VSS_ VSS_ W VSS_ U VSS_ R VSS_ N VSS_ L VSS_ J VSS_ G VSS_9 E VSS_0 VSS_ VSS_ W VSS_ U VSS_ R VSS_ N VSS_ L VSS_ J VSS_ G VSS_9 VSS_0 K0 VSS_ M0 VSS_ K0 VSS_ G9 VSS_ E9 VSS_ 9 VSS_ VSS_ VSS_ Y VSS_9 V VSS_0 T VSS_ P VSS_ M VSS_ K VSS_ H VSS_ F VSS_ VSS_ VSS_ Y VSS_9 V VSS_0 T VSS_ P VSS_ M VSS_ K VSS_ H VSS_ L VSS_ G VSS_ E VSS_ VSS_9 VSS_0 VSS_ Y VSS_ M VSS_ K VSS_ H VSS_ G VSS_ E VSS_ VSS_ VSS_9 W VSS_0 R VSS_ N VSS_ E VSS_ VSS_ VSS_ V VSS_ K VSS_ H VSS_9 R VSS_00 VSS_0 VSS_0 VSS_0 H VSS_0 G VSS_0 Y VSS_0 U VSS_0 M VSS_0 L VSS_09 G VSS_0 E VSS_ VSS_ R VSS_ M VSS_ E VSS_ 0 VSS_ U0 VSS_ R0 VSS_ N0 VSS_9 W0 VSS_0 U0 VSS_ T0 VSS_ R0 VSS_ K0 VSS_ H0 VSS_ L9 VSS_ G9 VSS_ 9 VSS_ E9 VSS_9 9 VSS_0 9 VSS_ VSS_ U VSS_ H VSS_ G VSS_ U VSS_ M VSS_ E VSS_ VSS_9 W VSS_0 H VSS_ L VSS_ G VSS_ Y VSS_ U VSS_ L VSS_ G VSS_ E VSS_ VSS_9 Y VSS_0 M VSS_ E VSS_ VSS_ VSS_ U VSS_ N VSS_ H VSS_ L VSS_ G VSS_9 Y VSS_0 E VSS_ VSS_ U VSS_ N VSS_ G VSS_ VSS_ Y VSS_ F VSS_9 VSS_90 K VSS_9 H VSS_9 L VSS_9 G VSS_9 Y VSS_9 R VSS_9 W VSS_99 E VSS_ VSS_0 G VSS_ N VSS_ E VSS_ N0 VSS_ N9 VSS_9 M9 VSS_ W VSS_ H VSS_9 J VSS_ Y VSS_ E VSS_ H0 VSS_ J9 VSS_0 9 VSS_9 M VSS_ VSS_ VSS_ Y VSS_ W VSS_ H VSS_ F VSS_9 N VSS_90 J VSS_9 M VSS_9 F VSS_9 VSS_9 N VSS_ M VSS_9 H VSS_9 J VSS_9 Y VSS_9 U VSS U00I 90 VSS U00I 90
MH_FG_ R0 KOhm % FG : MI STRP H = MI X (efault) L = MI X +VS R0.0KOHM MH_FG_ MH_FG_ R0 KOhm % R0 KOhm % FG : ITPM Host Interface (Relate to SPI_MOSI) H = ITPM isable (efault) L = ITPM enable(an disable by SW) FG : Intel ME rypto Strap H = With confidentiality (efault) L = Without confidentiality MH_FG_9 FG9 : MI Lane Reversal H =MI Lane Reversal L = Normal (efault) +VS MH_FG_9 R0 KOhm % FG9 : PIE Graphic Lane Reverse H = Normal (efault) L = Lanes Reverse MH_FG_0 R0.0KOHM FG0 : SVO/PIE ONURRENT MOE MH_FG_0 R0 KOhm % FG0 : PIE Loopback H = isable (efault) L = Enable L = Only igital display port or PIE is Operational (efault) H = igital display port and PIE are operating simultaneously via the PEG port MH_FG_ R0 KOhm % FG : FS ynamic OT H =Enable (efault) L = isable MH_FG_ R09 KOhm % FG : LL-Z Mode H =isable (efault) L = Enable MH_FG_ R0 KOhm % FG : XOR Mode H = isable (efault) L = Enable FG [:] : XOR/LL-Z 00 = Reserved 0= XOR Mode Enabled 0= ll-z Mode Enabled = Normal Operation (efault) SUSTeK OMPUTER IN. N GS STRPPING ustom UL0T ate: Friday, October, 009 Sheet of 9.0
SUSTeK OMPUTER IN. UL0T Friday, October, 009 ate: Sheet of 9.0
SUSTeK OMPUTER IN. UL0T Friday, October, 009 ate: Sheet of 9 9.0
+V_RT Z_LK_HMI Z_SYN_HMI Z_RST#_HMI Z_SOUT_HMI R00 0KOhm % RN00 Ohm RN00 Ohm RN00 Ohm RN00 Ohm 009 UF/0V Near the Open oor Z_LK Z_SYN Z_RST# Z_SOUT JRST SGL_JUMP +V_RT +VSUS +.VS_PIE_IH Z_LK_U Z_SYN_U Z_RST#_U Z_SIN0_U Z_SIN_HMI Z_SOUT_U ST_LE# ST0_RXN ST0_RXP FOR ST H ST0_TXN ST0_TXP ST_RXN ST_RXP FOR ST O ST_TXN ST_TXP R00 MOhm R09 00KOhm % RT_X RT_X RTRST# IH_INTRUER# IH_INTVRMEN LI/GLI disable guidelines esign guide.9 R0 0KOhm 00 00 00 00 0.0UF/V 0.0UF/V 0.0UF/V 0.0UF/V GPIO ST0_TXN_ ST0_TXP_ ST_TXN_ ST_TXP_ U00 F RTX G RTX G RTRST# SRTRST# INTRUER# E INTVRMEN LN00_SLP G GLN_LK LN_RSTSYN LN_RX0 LN_RX LN_RX LN_TX0 LN_TX LN_TX R00.9Ohm IH_GLN_OMP H GLN_OMPI H GLN_OMPO RN00 Z_LK Ohm Int P E RN00 Z_SYN H_IT_LK Ohm Int P H_SYN RN00 Z_RST# Ohm Int P H_RST# Int P H_SIN0 Int P E H_SIN Int P H_SIN Int P H_SIN RN00 Ohm GPIO Z_SOUT H_SOUT Int PU GPIO/H_OK_EN# GPIO/H_OK_RST# Int PU K 9 STLE# E ST0RXN ST0RXP ST0TXN ST0TXP STRXN STRXP STTXN STTXP IH9M_SFF RT LP LN / GLN PU IH ST L0 L L L LFRME# LRQ0# LRQ#/GPIO 0GTE 0M# PRSTP# PSLP# FERR# PUPWRG IGNNE# INIT# INTR RIN# NMI SMI# STPLK# THRMTRIP# PUSSTTL STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP ST_LKN ST_LKP STRIS# STRIS H J K L J H J N E E E E L E 0 0 0 E0 L[0:] INT PU 0K S_FERR# T00 T00 IH_THRMTRIP# T00 T009 T00 STRIS# R0 Ohm LP_0 0, LP_ 0, LP_ 0, LP_ 0, LK_PIE_ST# 9 LK_PIE_ST 9 R0.9Ohm % LP_FRME# 0, 0GTE 0 H_0M# H_PRSTP#,,0 H_PSLP# H_PWRG H_IGNNE# H_INIT# H_INTR RIN# 0 H_NMI H_SMI# H_STPLK# Place R0 within 00 mils of IH +VP +VP RN00 OHM RN00 OHM R0.9Ohm H_FERR# H_THRMTRIP#,, +.VS R00 GPIO:Flash escriptor Security Override High = Enable ( efault ) Low = Overridden KOhm Z_SOUT [IH_TP, Z_SOUT] : XOR hain Entrance Strap 00 = Reserved 0= Enter XOR hain 0= Normal Operation (efault) = Set PIe Port onfig it Xtal 00 PF/0V 00 PF/0V X00.Khz RT_X R00 0MOhm RT_X RT T00 T00 +RTT R00 KOhm +RTT_R +V 00 T T00 +V_RT 00 UF/0V SUSTeK OMPUTER IN. S IH9M () ustom UL0T ate: Friday, October, 009 Sheet 0 of 9.0
PI_INT# PI_INT# PI_INT# PI_INT# U00 0 0 E0 9 9 0 E 9 9 0 F E E E 9 J 0 H F PIRQ# F PIRQ# F PIRQ# PIRQ# PI_FRME# PI_STOP# PI_TRY# PI_SERR# PI_IRY# PI_EVSEL# PI_PERR# PI_LOK# PI_INT# PI_INTE# PI_INTG# PI_INTH# PI_INT# PI_REQ#0 PI_INT# PI_INTF# PI REQ0# GNT0# REQ#/GPIO0 GNT#/GPIO REQ#/GPIO GNT#/GPIO REQ#/GPIO GNT#/GPIO /E0# /E# /E# /E# IRY# PR PIRST# EVSEL# PERR# PLOK# SERR# STOP# TRY# FRME# PLTRST# PILK PME# Interrupt I/F IH9M_SFF GPIO/PIRQE# GPIO/PIRQF# GPIO/PIRQG# GPIO/PIRQH# RP0 0kOhm 0 RP0 0kOhm 0 RP0F 0kOhm 0 RP0 0kOhm 0 RP0G 0kOhm 0 RP0 0kOhm 0 RP0E 0kOhm 0 9 RP0H 0kOhm 0 RP0 0kOhm 0 RP0 0kOhm 0 RP0E 0kOhm 0 RP0F 0kOhm 0 RP0 0kOhm 0 9 RP0H 0kOhm 0 RP0G 0kOhm 0 RP0 0kOhm 0 G E 9 E 0 0 E 9 T H T G G F H PI_REQ#0 PI_REQ# PI_REQ# VIPUPSW# PI_REQ# VISELSW# PI_IRY# PI_RST#_IH PI_EVSEL# PI_PERR# PI_LOK# PI_SERR# PI_STOP# PI_TRY# PI_FRME# PLT_RST#_S PI_PME# PI_INTE# PI_INTF# PI_INTG# PI_INTH# +VS VIPUPSW# VISELSW# T0 T R. LK_IHPI 9 H: Enable PIE_RXN_MINIR PIE_RXP_MINIR PIE_TXN_MINIR PIE_TXP_MINIR L: isable(efault) PIE_RXN_LN PIE_RXP_LN PIE_TXN_LN PIE_TXP_LN SPI_MOSI (relate to MH_FG_) itpm Enable 0 0 R. 0.UF/0V 0.UF/0V R. PIE_RXN_MINIR PIE_RXP_MINIR PIE_TXN_MINIR_ PIE_TXP_MINIR_ US_O#- VISEL0 VISEL WLN_ON PI_PME# VISEL VISEL VISEL VISEL U00 T PERn T PERp R PETn R PETp P PERn P PERp P PETn P PETp 0KOHM RN0 0KOHM RN0 0KOHM RN0 0KOHM RN0 R0 0KOhm 0KOHM RN0 0KOHM RN0 0KOHM RN0 0KOHM RN0 MI0RXN MI0RXP MI0TXN MI0TXP MIRXN MIRXP MITXN MITXP N PERn MIRXN PIE N PERp MIRXP M PETn MITXN PIE WLN M PETp MITXP PIE M PERn MIRXN M PERp MIRXP PIE L PETn MITXN L PETp MITXP PIE K PERn MI_LKN PIE GLN K PERp MI_LKP K PETn K PETp MI_ZOMP PIE_RXN_LN MI_IROMP H PIE_RXP_LN PERn/GLN_RXn H 0 0.UF/0V PIE_TXN_LN_ PERp/GLN_RXp USP0N J 0 PIE_TXP_LN_ PETn/GLN_TXn USP0P 0.UF/0V J PETp/GLN_TXp USPN USPP E SPI_LK USPN E S_SPIS# SPI_S0# USPP F T0 GPIO/SPI_S#/LGPIO USPN USPP F SPI_MOSI USPN G SPI_MISO USPP US_O#- USPN P O0#/GPIO9 USPP N VISEL0 O#/GPIO0 USPN VISEL0 N VISEL O#/GPIO US USPP VISEL P VISEL O#/GPIO USPN VISEL P O#/GPIO USPP P O#/GPIO9 USPN M O#/GPIO0 USPP M VISEL O#/GPIO USP9N VISEL P VISEL O#/GPIO USP9P VISEL R WLN_ON O9#/GPIO USP0N WLN_ON R VISEL O0#/GPIO USP0P VISEL R O#/GPIO USPN USPP E R0 USRIS_PN USRISP.Ohm % USRISN Place within 00 mils of IH IH9M_SFF PI-Express SPI irect Media Interface +VSUS V V U U W W V V Y Y Y Y US INT P K IH9 oot IOS select LP PI SPI 0 0 US 0 US GNT#0 0 MI_RXN0 MI_RXP0 MI_TXN0 MI_TXP0 MI_RXN MI_RXP MI_TXN MI_TXP T T0 LK_PIE_IH# 9 T T0 LK_PIE_IH 9 MI_OMP R0.9Ohm L<00mils % +.VS_PIE_IH E Y Y W W V V Y Y U U V V US_PN0 US_PP0 US_PN US_PP US_PN US_PP US_PN US_PP US_PN US_PP US_PN US_PP US_PN0 US_PP0 SPIS# 0 US onn. US onn. (default) PI_REQ# PI_INT# PI_REQ# PI_REQ# VIPUPSW# VISELSW# 0KOHM RN0 0KOHM RN0 0KOHM RN0 0KOHM RN0 R0 0KOhm R0 0KOhm R. PLT_RST#_S +VSUS U0 V Y NSZ0PX SL0 00 UF_PLT_RST#,,0, US US US US US US US US 9 US 0 US luetooth MOS amera ard Reader WiMax US onn. SUSTeK OMPUTER IN. S IH9M () ustom UL0T ate: Friday, October, 009 Sheet of 9.0
+VS RSTON# PMSYN# 0 EXT_SI# 9 STP_PI# 9,0 STP_PU# T0 T T 0 PM_LKRUN# PIE_WKE# 0 INT_SERIRQ T SL_ S_ LINKLERT# SM_LINK0 SM_LINK PM_RI# PM_SUS_STT# RSTON# EXT_SI# STP_PI# STP_PU# PM_LKRUN# PIE_WKE# INT_SERIRQ WKE# L PM_THERM#_IH SERIRQ 0 THRM# SUS PWR VR_PWRG_LKEN VRMPWRG R. U00 SMLK SMT LINKLERT#/GPIO0/LGPIO E SMLINK0 SMLINK E T HMI_HP_IH GPIO/TH E GPIO EXT_SMI# GPIO 0 EXT_SMI# HTV_ET# GPIO GPIO/LN_PHY_PWR_TRL INT PU 0 WLN_LE_ON GPIO WLN_LE_ON E GPIO K GPIO INT P T_ET# GPIO0 9 GPIO/SLOK T_ON/OFF# SUS GPIO TLE_ON SUS E0 GPIO 9 LK_REQ_ST# M P_I STLKREQ#/GPIO P_I GPIO/SLO GPIO9/STOUT0 9 GPIO/STOUT INT PU0 GPIO GPIO9 GPIO/LGPIO S_SPKR INT P K SPKR MH_SYN# 0 MH_SYN# INT PU 9 TP TP TP9 SPKR TP0 No Reboot Strap IH9M_SFF Low = efault High = No Reboot 0 T SUS_STT# SYS_RESET# L PMSYN#/GPIO0 SUS SMLERT#/GPIO STPPI#/GPIO 0 STPPU#/GPIO M 9 RI# LKRUN#/GPIO TP SM ST GPIO locks SYS GPIO Power MGT MIS GPIO ontroller Link GPIO/ST0GP GPIO9/STGP GPIO/STGP GPIO/STGP LK LK SUSLK SLP_S# SLP_S# SLP_S# GPIO/S_STTE# PWROK PRSLPVR/GPIO TLOW# PWRTN# LN_RST# RSMRST# K_PWRG L_PWROK SLP_M# L_LK0 L_LK L_T0 L_T L_VREF0 L_VREF L_RST0# L_ST# GPIO/MEM_LE GPIO0/SUS_PWR_K GPIO/_PRESENT GPIO9/WOL_EN ST[X]GP unused need PU 0K to +VS (G..) E9 E0 0 K R 0 E SUS RT 9 RT GPIO T EI_HMI_SELET# T dgpu_prsnt# T dgpu_runpwrok T T0 SUSLK F L_VREF0 PM_PWROK_R M INT P S_PRSLPVR U U T T_LL# INT PU 0K SUS INT PU INT PU E INT PU INT PU INT PU INT PU PM_RSMRST#_R PM_PWROK_R T R. T0 R. T LK_IH 9 LK_US 9 PM_SUS# 0, PM_SUS# 0 PM_PRSLPVR,0 PM_PWRTN# 0 0KOHM RN0 LK_PWRG 9 L_LK0 L_T0 L_RST#0 SUS E SUS SUS _PRESENT SUS R0 00KOhm R0 00KOhm +VSUS PM_RSMRST# 0 L not required if IMT disable G. Follow esignip Follow MVa PM_LKRUN# HMI_HP_IH PM_THERM#_IH GPIO EI_HMI_SELET# INT_SERIRQ S_SPKR STP_PI# STP_PU# dgpu_prsnt# dgpu_runpwrok LINKLERT# SM_LINK SM_LINK0 PM_RI# EXT_SI# EXT_SMI# PIE_WKE# T_LL# _PRESENT WLN_LE_ON RSTON# HTV_ET# T_ET# 0KOHM RN0 0KOHM RN0 RN0 0KOHM 0KOHM RN0 0KOHM RN0 0KOHM RN0 R KOhm RN0 0KOHM RN0 0KOHM RN0 0KOHM RN0 0KOHM RN0 0KOHM RN0 0KOHM 0KOHM RN0 0KOHM RN0 0KOHM RN0 0KOHM RN0 RN0 0KOHM 0KOHM RN0 RN0 0KOHM 0KOHM RN0 +VSUS R0 0KOhm R0 0KOhm R 0KOhm +VSUS +VS R. +VS R.0 L_VREF0 R.KOHM % +VSUS +VS +VS +VSUS P_I P_I +VS R +VS 0KOhm R R 0KOhm R R 0KOhm VR_PWRG_LKEN R 0KOhm Q0 N00 G S LK_EN# 0 VRM_PWRG 0,0,9 0 0.UF/0V R L_VREF0 routing rules Width = mils min Spacing = mils min reak-out = mils on mils for 00 mils max RN09.KOhm SL_ S_ RN09.KOhm Q0 UMKN Q0 UMKN RN09.KOhm RN09.KOhm SM_LK_S,,,9 SM_T_S,,,9 0KOhm 0KOhm P I GPIO GPIO9 UL0 0 0 UL0V 0 +VSUS R0 R 0KOhm 00KOhm GPIO,0 PM_PWROK RN0 0KOHM PM_RSMRST#_R PM_PWROK_R R0 0KOhm 0 TW SUS_PWRG 0,,9 Title S : IH9M () SUSTeK OMPUTER IN. ustom UL0T ate: Friday, October, 009 Sheet of 9.0
VccL_0 +VMIPLL_IH +VMI_IH +VREFSUS +VREF_IH +VSTPLL_IH +VGLNPLL_IH VccL_ VccLN_0 +VSUSH_IH +VP_IH +V_RT +.VS +VS +VS +VS +VS +.VS +.VS +VS +.VS +.VS +VS +.VS +VSUS +VS +.VS +VSUS +VSUS +.VS_PIE_IH +VP_IH +VP_IH +VH_IH +VP +VSUS +.VS +.VS ate: Sheet of Friday, October, 009 SUSTeK OMPUTER IN. S IH9M ().0 UL0T 9 ate: Sheet of Friday, October, 009 SUSTeK OMPUTER IN. S IH9M ().0 UL0T 9 ate: Sheet of Friday, October, 009 SUSTeK OMPUTER IN. S IH9M ().0 UL0T 9 VccSus_0, VccSus_, & VccL_ VccLN_0 & VccL_0 Internal VR High = Enable (efault) Low = isable u in G m m m m m m m m 0m m m m m m 0m m m m m R. R. R. R. R. R. 0.UF/0V 0.UF/0V VSS VSS VSS 0 VSS VSS VSS 9 VSS VSS VSS9 VSS0 E VSS E VSS E9 VSS E VSS E VSS E VSS E VSS E9 VSS E VSS9 F VSS0 G VSS G VSS G0 VSS G VSS G VSS G9 VSS G VSS H0 VSS H VSS9 H VSS0 H VSS J VSS J9 VSS J0 VSS J VSS J VSS J VSS J VSS J VSS9 J VSS0 J VSS K VSS K9 VSS K0 VSS K VSS K VSS K VSS K VSS K VSS9 K VSS0 L VSS L9 VSS L0 VSS L VSS L VSS L VSS L VSS L VSS M9 VSS9 M0 VSS0 M VSS M VSS M VSS M VSS M VSS M VSS N VSS N VSS N9 VSS9 N0 VSS0 N VSS N VSS N VSS N VSS N VSS N VSS N VSS N VSS P9 VSS9 P0 VSS0 P VSS P VSS P VSS P VSS P VSS P VSS R VSS R VSS R VSS9 R9 VSS90 R0 VSS9 R VSS9 R VSS9 R9 VSS9 R VSS9 R VSS9 R VSS9 T VSS99 T0 VSS00 T VSS0 T VSS0 T VSS0 T VSS0 T VSS0 T VSS0 T VSS0 U VSS0 U0 VSS09 W VSS0 U VSS W VSS U VSS U VSS U VSS V VSS V VSS V9 VSS V VSS9 W VSS0 W VSS W VSS W VSS W9 VSS W VSS W9 VSS W VSS W VSS W VSS9 Y VSS0 Y VSS VSS VSS VSS VSS VSS VSS VSS VSS9 VSS0 9 VSS VSS VSS VSS VSS 9 VSS VSS VSS VSS9 VSS0 VSS VSS 0 VSS VSS VSS VSS VSS 9 VSS VSS9 9 VSS0 VSS E VSS E VSS E VSS E VSS E VSS0 VSS VSS E VSS E VSS9 T VSS V VSS E VSS V9 VSS9 J U00E IH9M_SFF U00E IH9M_SFF 0.0UF/V 0.0UF/V 0 UF/0V 0 UF/0V 0UF/.V 0UF/.V 0 TW 0 TW 0.0UF/V 0.0UF/V UF/0V UF/0V 0 0UF/.V 0 0UF/.V R0 R0 0 0.UF/0V 0 0.UF/0V UF/0V UF/0V 0UF/.V 0UF/.V R0 R0 L0 /00Mhz L0 /00Mhz 0.0UF/V 0.0UF/V VREF G VREF_SUS U Vcc J9 Vcc K Vcc K9 Vcc L Vcc L9 Vcc M Vcc M9 Vcc N Vcc 9 N9 Vcc 0 P Vcc R Vcc T Vcc T9 Vcc U Vcc U9 Vcc V VccMIPLL P9 Vcc U Vcc V Vcc W VPLL W Vcc E9 Vcc U Vcc V VUSPLL U VccLN_0_ G VccLN_0_ H Vcc_0_ L Vcc_0_ L Vcc_0_ L Vcc_0_ L Vcc_0_ L Vcc_0_ M Vcc_0_ M Vcc_0_ N Vcc_0_9 N Vcc_0_0 P Vcc_0_ P Vcc_0_ R Vcc_0_ R Vcc_0_ R Vcc_0_ R Vcc_0_ R VccLN G VccLN H VccH VccSusH V0 V_PI_IO V V_PI_IO U Vcc H Vcc H VccRT G VSUS G VSUS G VSUS H VSUS J VSUS J VSUS K VSUS K VSUS 9 L VSUS 0 L VSUS M VSUS M VSUS N VSUS N VSUS P VSUS P VccSus_0_ T VccSus_0_ H Vcc H9 Vcc V Vcc U VSUS W Vcc G VKUM J VccGLN_ H9 VccGLN_ K VccGLNPLL J Vcc 9 VccSus H VccSus V VccMI U VccMI T VccL_0 G VccL K VccL J VccL_ H Vcc W Vcc V Vcc W Vcc 0 W Vcc G9 Vcc 9 V Vcc U Vcc W0 Vcc T9 Vcc U9 ORE VGP TX RX US ORE PI GLN POWER VP_ORE VPSUS VPUS U00F IH9M_SFF ORE VGP TX RX US ORE PI GLN POWER VP_ORE VPSUS VPUS U00F IH9M_SFF R0 R0 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0 0.UF/0V 0 0.UF/0V R0 R0 0 0UF/.V 0 0UF/.V 9 0.0UF/V 9 0.0UF/V 0.UF/0V 0.UF/0V 9.UF/.V 9.UF/.V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V R0 % R0 % R0 % R0 % + E0 00UF/.V + E0 00UF/.V 0 0.UF/0V 0 0.UF/0V 0 0.UF/0V 0 0.UF/0V 0.UF/0V 0.UF/0V 0 0UF/.V 0 0UF/.V 0 TW 0 TW 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V L0 /00Mhz L0 /00Mhz + E0 00UF/.V + E0 00UF/.V 0 0.UF/0V 0 0.UF/0V 09 0.UF/0V 09 0.UF/0V L0 /00Mhz L0 /00Mhz 0 0UF/.V 0 0UF/.V 0.UF/0V 0.UF/0V UF/0V UF/0V 0 0.UF/0V 0 0.UF/0V L0 /00Mhz L0 /00Mhz 0.UF/0V 0.UF/0V.UF/.V.UF/.V 0.UF/0V 0.UF/0V UF/.V UF/.V
jonas +VS +VS HP ROM +VS Q0 N00 SM_LK_S,,,9 SM_T_S,,,9 To IH9M G S R0 0KOhm U0 0 V WP SL S T0N 0 0.UF/V R0.KOhm R0 HP_EPROM_PROTET# 0 From E SUSTeK OMPUTER IN. S IH9M () ustom UL0T ate: Friday, October, 009 Sheet of 9.0
SUSTeK OMPUTER IN. UL0T Friday, October, 009 ate: Sheet of 9.0
SUSTeK OMPUTER IN. UL0T Friday, October, 009 ate: Sheet of 9.0
SUSTeK OMPUTER IN. UL0T Friday, October, 009 ate: Sheet of 9.0
SUSTeK OMPUTER IN. UL0T Friday, October, 009 ate: Sheet of 9.0
Latched Input Select +VP L90 /00Mhz +VP_LK_V +VS_VPI L90 +VS /00Mhz 90 0.UF/0V 90.UF/.V 90 0.UF/0V 9 0.UF/0V 9 0.UF/0V 90 0.UF/0V 9 0.UF/0V 9 0UF/0V 9 0.UF/0V +VS SL90 00 90 0.UF/0V 909 0PF/0V 90 0PF/0V T90 U +VS_LK_V K0_X X90.Mhz K0_X U90 VSR_ VSR_IO VSR_IO PU **FU 0 VPU V X X VPI_ VPI_ V VREF **PI_SR_STOP# **PU_STOP# PU- PU-# PU-0 PU-0# PUITP/SR- 9 +VS_V +VS_VREF LK_MH LK_MH# LK_PU LK_PU# LK_ITP STP_PI# STP_PU#,0 RN90 Ohm RN90 Ohm RN90 Ohm RN90 Ohm RN9 Ohm 99 0.UF/0V SL90 SL90 90 0.UF/0V LK_MH_LK 0 LK_MH_LK# 0 LK_PU_LK LK_PU_LK# LK_ITP_LK 00 00 +VS_VPI 90 0UF/0V 0 = SR LK = PU_ITP LK (Pin) ITP_EN PIF0 0 = PIELK = PEREQ# (Pin) REQ_SEL# PI0 ecide pin / RN9 0KOHM ecide pin 0/ RN9 0KOHM +VS 0 = LLK = PIEX (Pin) SELPIE0_L# PI SELL_# = 0: pin/=piex_9l pin/=fix/ss SELL_# = : pin/=ot_9mhzl pin/=l_ssg/pie_l0 (Pin9) PIF ecide pin / 9MHz (Non - SS) 00MHz SS +VS RN9 0KOHM ecide pin / RN9 0KOHM NVM_NOSS 9 RN90 OHM 0PF/0V LK_FIX MHZ/L_SSG/SR-0 PUITP#/SR-# *SR_REQ#/SR- *SR_REQ#/SR-# PU PU 0 LK_ITP# REQ REQ RN9 Ohm LK_ITP_LK# LK_REQ_ST# LK_REQ_WLN# LK_US LK_R_REER_ NVM_SS R. R. FSL FSL 9 R9 R9 R9 R9 RN90 OHM T90 % % % 0PF/0V KOhm Ohm LK_SS US PI PU MHZSS/L_SSG#/SR-0# **FSL/US_MHz **FSL/TEST_MOE *SELSR0_L#/PI- SR- SR-# SR- SR-# SR- SR-# SR- SR-# SR- SR-# 9 0 LK_PIE LK_PIE# LK_PIE LK_PIE# LK_PIE LK_PIE# LK_PIE LK_PIE# T90 T909 RN90 Ohm RN90 Ohm RN90 Ohm RN90 Ohm RN90 Ohm RN90 Ohm RN909 Ohm RN909 Ohm LK_REFSS LK_REFSS# LK_PIE_LN LK_PIE_LN# LK_MH_GPLL LK_MH_GPLL# LK_PIE_IH LK_PIE_IH# R. PU_SEL0 PU_SEL PU_SEL SL90 R9 SL90 0 00 00 FS_SEL KOhm FSL FSL FSL R9 R99 R9 Q90 UMKN KOhm KOhm KOhm Q90 UMKN MH_SEL0 MH_SEL MH_SEL T90 PI PI- SR- 9 LK_PIE RN90 Ohm LK_PIE_MINIR to p- LK_GPI T90 R9 Ohm PI PI0 PU PI- **PI-0/REQ_SEL 0 SR-# ST ST# SR-9/OT9 SR-9#/OT9# LK_PIE# LK_ST LK_ST# OTT9 OT9 RN90 Ohm RN9 Ohm RN9 Ohm RN9 Ohm RN9 Ohm LK_PIE_MINIR# LK_PIE_ST 0 LK_PIE_ST# 0 LK_REF LK_REF# FSL FSL FSL LK FS SEL SEL SEL0 0 00 00 0 0 0 0 0 0 to E- 0 LK_KPI RN90 Ohm PIF P 9 *SELL_#/PIF- *SR_REQ# *SR_REQ# PU PEREQ# PU PEREQ# T90 LK_REQ_LN# to IH9M LK_IHPI RN90 Ohm,,, SM_LK_S,,, SM_T_S PIF0 **ITP_EN/PIF-0 SLK ST **VttPWR_G/P# **REF-/FSL/TEST_SEL REF-0 0 0 REF REF0 R90 R9 0KOhm Ohm FSL LK_PWRG R. LK_IH LK_US LK_R_REER_ +VS O **FO P FOR 9 0PF/0V 9 0PF/0V LK_GPI LK_KPI LK_IHPI LK_IH R90 KOhm % R90 0KOhm % _ 9 _ 9 _ RTMT--GRT Int PU/P R=0K ohm. * Int PU: pin,9,,, ** Int P pin 9 0PF/0V 9 0PF/0V 9 0PF/0V 9 0PF/0V SUSTeK OMPUTER IN. RTMT--GRT UL0T Friday, October, 009 ate: Sheet of 9 9.0
+VS +V +V_E +VPLL +V_E +VPLL +V 00 0.UF/0V +V_E L00 /00Mhz +V SL00 00 00 0UF/.V 00 0.UF/0V 00 0.UF/0V 00 0.UF/0V 00 0.UF/0V 0, LP_0 0, LP_ 0, LP_ 0, LP_ 9 LK_KPI 0, LP_FRME#,,, UF_PLT_RST# INT_SERIRQ EXT_SMI# EXT_SI# 0 0GTE 0 RIN# R.,, VOL_SEL SK SO SI SE# KSI0 KSI KSI KSI KSI KSI KSI KSI KSO0 KSO KSO KSO KSO KSO KSO KSO KSO KSO9 KSO0 KSO KSO KSO KSO KSO PM_PWRTN# OP_S# TP_LK TP_T R. RN00 OHM RN00 OHM RN00 OHM RN00 OHM E_RST# SK SO SI SE# E_XIN E_XOUT U00 0 L0 9 L L L LPLK LFRME# LPRST#/WUI/GP SERIRQ ESMI#/GP ESI#/GP G0/GP KRST#/GP WRST# 0 GPG0 0 FSK 0 GPG 0 FMISO 0 FMOSI 0 FSE# 00 GPG KSI0/ST# 9 KSI/F# 0 KSI/INIT# KSI/SLIN# KSI KSI KSI KSI KSO0/P0 KSO/P KSO/P 9 KSO/P 0 KSO/P KSO/P KSO/P KSO/P KSO/K# KSO9/USY KSO0/PE KSO/ERR# KSO/SLT KSO KSO KSO KSO/GP KSO/GP KK KKE 0 9 VSTY VSTY VSTY VSTY VSTY KMX LP FLSH ROM PS/ PSLK0/GPF0 PST0/GPF PSLK/GPF PST/GPF 9 PSLK/WUI0/GPF 90 PST/WUI/GPF VSTY VT V V PWM0/GP0 PWM/GP PWM/GP PWM/GP PWM/GP PWM/GP PWM/GP PWM/GP RX/GP0 TX/GP TX0/GP RING#/PWRFIL#/LPRST#/GP RX0/GP0 TMRI0/WUI/GP TMRI/WUI/GP PWUREQ#/GP RI#/WUI0/GP0 RI#/WUI/GP GINT/GP TH0/GP TH/GP L0HLT/GPE0 EG/GPE EGS#/GPE EGLK/GPE PWRSW/GPE WUI/GPE LPP#/WUI/GPE L0LLT/WU/GPE GPIO GPG/I LKRUN#/WUI/GPH0/I0 RX/WUI/GPH/I TX/WUI/GPH/I WUI9/GPH/I GPH/I GPH/I GPH/I 0/GPI0 /GPI /GPI /GPI /GPI /GPI /GPI /GPI 9 0 K_LE_PWM T00 HG_LE_Orange# T00 0 TSEL_0 09 TSEL_ 9 0 9 0 0 9 9 9 9 9 9 99 9 0 FS_SEL O H_SW# PWR_SW# LI_SW# EXP_GTE# HG_EN VR_SEL NUM_LE# P_LE# T00 T00 PWR_LE#, HG_LE# HG_FULL_LE# O_PWR_NT# L_L_PWM FN_PWM 0 TSEL_0 TSEL_ VORE_NT 0 PM_RSMRST# FS_SEL 9 _IN_O# TS# 0 PWRLIMIT_PU# PM_SUS# L_KOFF# FN0_TH 0 S_#_E VSUS_ON SUS_E#, SUS_E#,,9 PU_VRON EXP_GTE# PM_SUS#, PM_LKRUN# VORE_NT 0 HG_EN VOL_SEL, NUM_LE# P_LE# SUS_PWRG,,9 LL_SYSTEM_PWRG 9 VRM_PWRG,0,9 HMI_HP_E R. R. SL00 00 SL00 00 E_ +V_E +VS +VSUS R. 00KOhm RN00 PWRLIMIT_PU# 00KOhm RN00 TS# 00KOhm RN00 EXP_GTE# 00KOhm RN00 _IN_O# PM_SUS# PM_SUS# SUS_E# SUS_E# PM_RSMRST# H_SW#.KOhm RN00.KOhm RN00 0KOHM RN00 0KOHM RN00.KOhm RN00.KOhm RN00 RN00.KOhm RN00.KOhm R00 0KOhm SM0_LK SM0_T 0GTE RIN# SM_LK SM_T TP_LK TP_T PM_PWRTN# 00KOHM RN00 00KOHM RN00.KOhm RN00.KOhm RN00 R0 00KOhm R0 E_ 0 SM0_LK 0 SMLK0/GP 0/GPJ0 HP_EPROM_PROTET# 0 SM0_T PM_PWROK, SM_LK SMT0/GP /GPJ 0 SM_LK VSET_E SM_T SMLK/GP /GPJ 0 SM_T SMT/GP /GPJ 9 ISET_E THRO_PU SMLK/WUI/GPF /GPJ 0 WLN_PWR_NT# SMT/WUI/GPF /GPJ WLN_RST# Xtal E_XIN R00 0MOhm R. E_XOUT ITE-L 00 0.UF/0V SMus VSS VORE VSS VSS VSS VSS VSS VSS 9 9 E_ R. R.,,9 FORE_OFF# E RST SL00 00 00 SSPT +V_E R00 0KOHM E_RST# 00 PF/0V X00.Khz 009 PF/0V PWR SWITH LI SWITH RN009 PWR_SW# 0KOHM 0 0.0UF/V RN009 LI_SW# 0KOHM RN009 0KOHM +V_E PWRSW# Layout note:close to IT0 RN009 0KOHM +V_E LISW#,,,, UF_PLT_RST# 0 OS#_O R00 0KOhm +VS G S Q00 N00 0.UF/.V 0 0.0UF/V Layout note:close to IT0 SUSTeK OMPUTER IN. ITE ustom UL0T ate: Friday, October, 009 Sheet 0 of 9.0