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1 論 數 Encoding, Transmission, Reception, and Decoding for IR Data Packet Communication 林 年六

2 論 數 數 187 立 北 年度 林 數 料欄 數 復 路 路 論 數 (Infrared Data Packet ) 路 (IR Transmitter) 路 (IR Receiver) 行 數 (Infrared Data Packet ) (Preamble Bits) (Sync Word) 料欄 (Payload Data) (CRC) 數 復 (Clock and Data Recovery, CDR) 了 (Interval Timing) 來 數 復 量 數 (Oversampling) (Infrared Data Association; IrDA) RF(Radio Frequency) 來 便 類 料 廉 IRLED Photodiode 路 ISM(Industry Scientific Medical Frequency Band) 820nm~940nm 離 10 都 來 i

3 ABSTRACT Pages 187 Title Encoding, Transmission, Reception, and Decoding for IR Data Packet Communication University National Taipei University of Technology Institute Institute of Computer, Communication, and Control Engineering Date June 01, 2005 Student Chih-Jen Lin Degree Master of Science Advisor Cheng-Cheh Yu, Prof., Ph.D. Keywords IR Data Packet, Preamble Bits, Sync Word, Payload Data, CRC, Infrared Data Association (IrDA), Clock and Data Recovery, Interval Timing, Oversampling, IR Transmitter, IR Receiver. In this thesis, the IR Data Packet, Decode system, IR Transmitter and IR Receiver are investigated, meanwhile the Infrared Data Packet signal is included Preamble Bits, Sync Word, Payload Data, and CRC code. How to implement the Clock and Data Recovery (CDR) function is the first troublesome question to construct of infrared wireless communication system. The thesis proposes a software method which gives the technology of interval timing to implement the CDR and noise-resistant function. Additionally, the oversampling technique is also taking into account the part of signal decode of infrared data packet. The wireless communication technology of infrared data association (IrDA) is a mature technique which has been applied into various IA controlling and the data transmission of information produces. The predominant advantage of the IrDA is its simple structure and low fabrication cost. Only the IRLED, photodiode and pre-amplify take the responsibility of transmitting and receiving of infrared signal in the transmission part. However, because the wireless network used the industry scientific medical (ISM) frequency band where the wavelength is between 820mm~940nm for the basic wireless communication technology, the IrDA is the major technique for the short distance communication, <10 nm. ii

4 論 利 兩年 論 識 益良 論 老 更 不 力 良 論 不 見 論 更 Microchip 理 IC 林 李 林 不 兩年 不 利 北 iii

5 錄...i...ii...iii 錄...iv 錄...vii 錄...viii...xiii 論 論...3 數 數 M bps 數 M bps 數 數 識 :ISO XEMICS 數 CAN 數 CAN CAN CAN 數...12 數 復 PIC 列 類 PIC16F PIC16F PIC16F 數 復 路 數 復 路 路 數 復 路 路 來 數 復 理 數 復 流 數 復 論...51 iv

6 數 料 理 料 數 數 數 列 (FCS) 數 (CRC) 數 (CRC) 理 數 (CRC) 數 量 流 數...76 路 路 khz 路 khz 路 路 Allen 1 路 Allen 2 路 Allen 3 路 IRM Module Allen Allen Allen IRM Module 六 論 參 錄 A 來 數 復 B 數 C 數 D 數 (CRC) E CAN F 2004 年 論 v

7 錄 2.1 4PPM ISO ISO18000 令 XEMICS 令 PIC 列 令 異 JK D 兩 (One-shot) 路 CRC G ( x ) Allen 1 數 IR Transmitter to Allen 1 離 數 Allen 2 Allen 3 離 vi

8 錄 M bps 數 M bps M bps 數 M bps 識 識 數 XEMICS 數 CAN Bus CAN Bus CAN 數 Harvard Von Neumann MPLAB-ICD MPLAB-IDE 路 路...22 路 V 路 V 路 V 數 復 (Clock and Data Recovery) 路 路 數 復 (CDR) 路 路 路 V 路 V2 V vii

9 數 復 (CDR) 路 數 復 (CDR) 路 V1 V 數 復 (CDR) 路 V3 V 數 復 (CDR) 路 V5 V 數 復 (CDR) 路 V 復 (Clock Recovery) 數 復 (Data Recovery) (Preamble bits) (Preamble bits) (Preamble bits) (Preamble bits) Situation 1: Preamble Bits Situation 2: Preamble Bits Situation 3: Preamble Bits Situation 4: Preamble Bits Situation 1 來 數 復 (CDR) Situation 2 來 數 復 (CDR) Situation 3 來 數 復 (CDR) Situation 4 來 數 復 (CDR) (Preamble bits) 路 (Preamble bits) (Preamble bits) 來 數 復 (CDR) (Oversampling) 理 A 數 A 數 數...59 viii

10 (Transmitter)...59 CRC 例 2 CRC (Receiver) 數 A MPLAB-IDE PIC16F MPLAB-IDE PIC16F877 數 khz 路 khz 路 khz 路 khz 路 khz 路 khz khz 料 路 khz 料 khz Allen 1 路 (IR_RX) Allen 2 路 (IR_RX) Allen 3 路 (IR_RX) IRM Module IRM Module IRM Module 路 IRM Module 路 路 路 Probe_ ix

11 5.21 路 Probe_ 路 Probe_ 路 Probe_ 路 Probe_ 路 Hz 濾 路 (120Hz Notch Filter) Hz 濾 路 (120Hz Notch Filter) 率 Hz 濾 路 (120Hz Notch Filter) 路 路 路 路 Situation 1 OPA Situation 1 OPA Situation 2 OPA Situation 2 OPA Situation 3 OPA Situation 3 OPA Full-Wave AM Envelope Detector 路 Half-Wave AM Envelope Detector Full-Wave AM Envelope Detector 濾 路 IR_RX IR_TX IR_RX Situation 1 (Preamble bits) Situation 2 (Preamble bits) Allen Allen 1 _ Allen 1 _MPLAB IDE Situation x

12 5.50 Allen 1 _Situation Allen 1 _MPLAB IDE Situation Allen 1 _Situation Allen 1 _MPLAB IDE Situation Allen 1 _Situation Allen 1 _MPLAB IDE Situation Allen 1 _Situation Allen Allen IR_TX 不 IR_RX 120 Hz Allen 2 Probe_ Allen 2 Probe_ Allen 2 Probe_ Allen 2 Probe_ Allen 2 Probe_ Allen 2 Probe_ Allen 2 Probe_ Allen 2 Probe_ Allen 2 Probe_ Allen 2 Probe_ Allen Allen Allen Allen 3 _ Allen 3 了 Allen 3 了 _ IRM Module 離 = 3.33m_Success xi

13 5.78 離 = 4.63m_Success 離 = 11m_Success 離 = 12m _Failure Power Data form E.1 1: Master ( ) E.2 2: Slave1 ( ) E.3 3: Slave2 ( ) E.4 CANKing_ E.5 CANKing_ E.6 CANKing_ E.7 CANKing_ E.8 CANKing_ E.9 CANKing_ E.10 MCP250XX Developer s Kit Connected to PC Printer Port_DB25 ( ) E.11 CAN Bus System E.12 CAN Bus Monitor window xii

14 1. ADDR Address Bits 2. AM Amplitude Modulation 3. CAN Controller Area Network 路 4. CD-CR Collision Detection with Collision Resolution 5. CDR Clock and Data Recovery 數 復 6. CISC Complex Instruction Set Computing 令 7. CMD Command Bits 令 8. CPL Complement of Command 令 9. CRC Cyclic Redundancy Check 數 10. CSMA Carrier Sense Multiple Access 11. DLC Data Length Code 數 欄 度 12. FCS Frame Check Sequence 列 13. FIR Fast Infrared 度 14. ID Identification number 識 15. IDE Identifier Extension 識 16. IR Infrared 17. IrDA Infrared Data Association 數 18. ISM Industry Scientific Medical 19. ISO International Standards Organization 20. NRZ Non Return Zero 不 零 21. P Parity 22. PA Preamble Bits 23. Par Parameter Bits 參數 24. PPM Pulse Position Modulation 25. RF Radio Frequency 率 xiii

15 26. RFID Radio Frequency Identification 識 27. RISC Reduced Instruction Set Computing 精 令 28. RTR Remote Transmit Request 29. SAE Society of Automotive Engineers 車 30. SIR Serial Infrared 列 度 31. STA Start Bits 32. STO Stop Bits 33. VFIR Very Fast Infrared 度 xiv

16 論 1.1 IrDA Infrared Data Association( 數 ) 離 IrDA 1993 年 HP IBM Sharp SONY 立 連 理 料 率 不 利 見 行 不 750nm 1000nm 率 見 不見 0.75um 25um 數 (IrDA) 立 了 不 都 850nm 940nm IrDA 行 離 8 率 16Mbps 度 120 度 數 行 行 理 (PDA) 不 路 路 連 兩 料. 連 (DB/IR Direct-Beam IR) 不 不 不. 連 (DF/IR Diffuse IR). (Omini/IR Ominidirectional IR) 利 (Base Station BS) 度 離 諸 [1-4] 1

17 數 (Infrared Data Packet ) 利 PIC16F877 路 數 (Infrared Data Packet ) 路 理 料 PIC16F877 PIC16F 類 料 例 車 車 數 復 (Clock and Data Recovery, CDR) 率 率 不 數 復 (Clock and Data Recovery, CDR) 來 2

18 1.3 論 論 數 (Infrared Data Packet ) 路 (IR Transmitter) 路 (IR Receiver) 數 說 數 復 (Clock and Data Recovery, CDR) 了 (Interval Timing) 來 數 復 (Clock and Data Recovery, CDR) 量 數 (Oversampling) 來 路 (IR Transmitter) 路 (IR Receiver) 論 錄 錄 論 六 論 : 論 數 : 數 數 數 復 : PIC16F877 (Interval Timing) 來 數 復 (Clock and Data Recovery, CDR) 量 數 : 數 數 (Oversampling) 來 路 : 路 路 來 Allen 1 Allen 2 Allen 3 六 論 : 論 來 論 參 錄 3

19 數 不 數 數 數 CAN(Controller Area Network) 數 2.1 數 (Infrared Data Association; IrDA) RF(Radio Frequency) 來 便 類 料 Infrared 離 度 年來 IrDA(Infrared Data Association) 力 度 SIR(Serial Infrared) 115.2Kbps FIR(Fast Infrared) 4Mbps VFIR 16Mbps 度 不 不 數 [5-9] M bps 數 1.152M bps 數 M bps 數 (1) STA: (Start Bits) 8 NRZ ( ) (2) ADDR: (Address Bits) (3) DATA: 料 度 2045 (byte) (4) FCS: 列 (Frame Check Sequence) 16 CRC 4

20 (5) STO: (Stop Bits) 8 NRZ ( ) 1.152M bps ADDR DATA CRC 路 16 STA STO STA STO 連 六 1 了 ADDR DATA STA STO ADDR DATA 料 1 0 STA STO ADDR DATA 料 1 0 CRC 2.2 [10] M bps M bps 數 4M bps 4PPM(Pulse Position Modulation) 來 數 M bps 數 (1) PA: (Preamble Bits) 16 ( ) 5

21 了 立 (2) STA: (Start Bits) 32 ( ) (3) DD: 4PPM(Pulse Position Modulation) 料 料 Address Control Information 32 CRC (4) STO: (Stop Bits) 32 ( ) 4M bps CRC 路 32 4PPM DD PA STA STO PA STA STO 4PPM 來 CRC 路 2.4 [10] 2.4 4M bps 2.4 4PPM 兩 4PPM 料 PPM 6

22 2.2 數 識 : ISO18000 識 (Radio Frequency Identification,RFID) 不 2.5 識 [11-13] 125kHz 5.8GHz 識 2.2 識 ISO 識 ISO18000 令 [14] 2.5 識 2.2 ISO18000 ISO ISO ISO ISO ISO ISO 率 參數 參數 < 135 khz 參數 MHz 參數 2.45 GHz 參數 5.8 GHz 參數 300 MHz 3000 MHz UHF 7

23 2.3 ISO18000 令 六 參數 度 / 度 ( ) 1 0x01 G * 0 2 0x02 G , 讀 ID_FLAG, 0 * 3 0x 讀 2/ x 讀 x1A 讀 x ID_FLAG 0 9 0x ID_FLAG x0A PRE_SEL_FLAG x0B PRE_SEL_FLAG x0E ID_FLAG x0F ID_FLAG x PRE_SEL_FLAG x PRE_SEL_FLAG x0C 讀 ID_FLAG x0D 讀 PRE_SEL_FLAG x1B 讀 PRE_SEL_FLAG, x 讀 x /16-bit length x x /32 bit word x 讀 x 讀 狀 x /16-bit length x1C 讀 1/8-bit location 8 G 令 2 ( ) 行 8

24 識 (Radio Frequency Identification,RFID) 數 識 數 (1) Cmd: 令 (Command) 令 (2) P: (Parity) 1 (3) Par: 參數 (Parameter) 料 (4) CRC: 數 (Cyclic Redundancy Check) 8 (5) P: (Parity) XEMICS 數 XEMICS 來 [15] XE1201A (Transceiver) 433MHz 率 (Frequency-Shift Keying,FSK) 數 來 數 XEMICS 數 (1) Preamble: (Preamble Bits) 32 了 立 (2) Start word: (Start word) 8 (3) CMD: 令 (Command) 令 9

25 (4) ID: 識 (Identification number) 8 (5) CPL: 令 (Complement of Command) 8 (6) CRC: 數 (Cyclic Redundancy Check) XEMICS 令 [16] 2.3 CAN 數 CAN CAN (Controller Area Network) 80 年 Robert Bosch GmbH 來 [17] 車 不 車 度 CAN 串列, 率 兩 International Standards Organization (ISO) and Society of Automotive Engineers (SAE) CAN 車 車 樓 療 120 million CAN Node 2002 年 170 million 10

26 2.3.2 CAN CAN Bus Ethernet 了 CSMA(Carrier Sense Multiple Access) CD-CR(Collision Detection with Collision Resolution) 來 CAN Node 若 Ethernet 路 兩 都 CAN Bus (arbitration) (priority) CAN Node 不 料 [18] 2.8 [19] CAN Bus 連 料 2.8 CAN Bus 2.9 [19] CAN Bus 串列 連 2.9 CAN Bus 11

27 2.3.3 CAN 數 CAN Bus 立 (broadcast) 不 CAN Node (message) 識 (ID) CAN Bus Data Frame Standard Data Frame Extended Data Frame 兩 Identifier Bit 度 數 2.10 [20] 2.10 CAN 數 (1) SOF: 欄 (Start of Frame) 0 1 (2) Arbitration Field: 識 欄 ArID RTR Identifier 識 (Identifier Extension, IDE)IDE 0 Standard Data Frame Identifier bit 11 IDE 1 Extended Data Frame Identifier bit 29 欄 (Remote Transmit Request Bit, RTR) RTR 0 Data Frame RTR 1 (3) Control Field: 欄 IDE r0 DLC 6 IDE bit 0 Standard Data Frame Extended Data Frame r0 bit 0 DLC (Data Length Code) bit Data Field 度 (4) Data Field: 料欄 0 bit 64 bits 若 RTR = 1 欄 0 bit (5) CRC Field: 數 欄 (Cyclic Redundancy Check) 16 12

28 (6) ACK Field: 欄 (Acknowledge Field) 來 Data (ACK Slot) (ACK Delimiter) node 1 node 0 (7) EOF: 欄 (End of Frame) 1 Data Frame 13

29 數 復 利 (Interval Timing) 來 數 復 (Clock and Data Recovery, CDR) 路 來 數 復 (Clock and Data Recovery, CDR) 路 兩 來 PIC16F PIC 列 類 PIC (Peripheral Interface Controller) Microchip 8 PIC (Price/Performance Ratio) 便 1997 年 8 率 Microchip - The Embedded Control Solutions Company PIC 了 PIC 都 8 不 都 RISC(Reduced Instruction Set Computing) 精 令 ATMEL 8051 CISC (Complex Instruction Set Computing) 令 RISC Harvard 流 流 料 流 令 行 料 流 理 3.1 PIC 類 度 類 度 12 ( PIC12CXX PIC16C5X) 度 14 ( PIC16C6X PIC16C7X PIC16F87X) 度 16 14

30 ( PIC17CXX PIC18CXX) PIC 數 略 不 令 異 [21-23] 3.1 PIC 列 令 異 PIC16F877 PIC 列 RISC Harvard Von Neumann 異 流 Von Neumann 料 CPU 流 不論 料 都 流 令 流 令 料讀 行 料 流 碌 度 令 都 Harvard 了 料 不 15

31 流 了 令 行 兩 流 令 行 令了 率 3.1 Harvard Von Neumann 不 3.1 Harvard Von Neumann 不 PIC Harvard 來說 都 1. 令 (Long Word Instruction) 8 來說 料 都 了 流 令 不 流 度 率 來 Microchip 都 不 度 流 2. 令 (Single Word Instruction) 令 流 度 都 令 來 令 令 Von Neumann 8 令 8 令 不 利 率來 令 度不 8 數 浪 了 Harvard 立 來 率 16

32 3. 令 (Instruction Pipeline) 令 行 令 行 令 行 PIC 兩 更 流 令 行不 4. 令 行 (Single Cycle Instructions) 來 令 兩 數 兩 令 行 來 令 行 率 例 兩 令 5. 精 令 (Reduced Instruction Set) 精 令 說 RISC 35 令 令 14 (Word) 令 數 令 來說 令 易 6. (Register File Architecture) 料 都 料 (Memory Mapped Register) 不論 來 都 7. 令 (Orthogonal(Symmetric)Instructions) 令 令 類 不 令 異 不 不 令 不 不 令 不 令 [24] 17

33 3.1.2 PIC16F877 PIC16F877 : 1. 3 (Timer) 了 度 (Capture Compare PWM, CCP) 量 ( H 004 ) 串列 RS232 串列 (UART) bit 類 數 (A/D) 6. 串列 (USART) SPI(Serial Peripheral Interface) I 2 C (Inter-Integrated Circuit) 7. 8 行 (Parallel Slave Port, PSP) PIC16F877 PIC 識 PIC 了 3.2 MPLAB-ICD2 [25] 3.2 MPLAB-ICD2 18

34 Microchip MPLAB-IDE v7.00 MPASM Assembler MPLINK Linker 連 PIC MPLAB-SIM 來 行 3.3 MPLAB-IDE [26] 3.3 MPLAB-IDE 19

35 3.2 數 復 路 數 復 (Clock and Data Recovery) 路 兩 路來 (Preamble Code) (Bit Period, T) [27] (Interval Timing) 來 (Preamble Code) (Bit Period, T) 數 復 路 數 復 (Clock and Data Recovery) 路 T 了 不 率不 例來說 料 率 1Mbps(T = 1us) 來 率 MHz(T = us) 不 來 了 100 來 不 數 復 (Clock and Data Recovery) 路 便 不 01 數 列 T 列 利 數 復 (Clock and Data Recovery) 路 來 [28] 20

36 3.2.2 路 數 復 (Clock and Data Recovery) 路 例 (Preamble bits) T 列 (Preamble bits) 數 復 (Clock and Data Recovery) 路 數 3.4 路 Workbench 1. Data_in NRZ(Non-Return-Zero) 數 CLK_in (clock pulse) Out (Preamble bits) C1=200pF R1=10K D1 CLK_in 3. Data_in High V1 High V2 Low V3 High 7476 Out High V1 Low V2 V3 High Out High CLK_in 7476 ( J=K=High) Out Low CLK_in 若 Data_in High Out High Low (Manchester code) 邏 1 理 狀 (Manchester code) 邏 V1 V2 V JK JK 21

37 3.4 路 3.5 路 22

38 3.6 路 V1 3.7 路 V2 23

39 3.8 路 V

40 3.2.3 數 復 路 Workbench IC Model Library 1. Manchester_in 數 CLK_OUT 復 (Clock Recovery) Data_Out 數 復 (Data Recovery) C1=200pF R1=10K D1 CLK_in NOT C2=200pF R2=10K D2 CLK_in 3. Manchester_in V1 Manchester_in V LS123 兩 (one-shot) 路 Q Low Q High Q High Q Low 狀 Td Td R C Data book Td R C R C Td 5. 兩 路都 V3 V4 Low 若 V1 路 V3 High Td Low V3 High AND V2 路 6. 理 兩 路都 若 V2 路 V4 High Td Td V1 路 7. CLK_OUT V3 V4 (3.1) : CLK _ OUT = V 3 + V 4 (3.1) D, 兩 (One-shot) 路,

41 3.10 數 復 (Clock and Data Recovery) 路 D 兩 (One-shot) 路 26

42 3.2.4 路 路 Data_in ( ) 連 NRZ code 來 Manchester code 異 路 CD4026 IC 來 來 Data_in CD4026 ( ) 列 NRZ 3.11 路 3.11 路 數 復 (CDR) 路 27

43 1. 路 ( ) 3.12 路 3.13 路 V1 28

44 3.14 路 V2 V

45 2. 數 復 (CDR) 路 ( ) 3.16 數 復 (CDR) 路 3.17 數 復 (CDR) 路 V1 V2 30

46 3.18 數 復 (CDR) 路 V3 V 數 復 (CDR) 路 V5 V6 31

47 3.20 數 復 (CDR) 路 V 復 (Clock Recovery) 數 復 (Data Recovery) 32

48 3.3 來 數 復 量 (Preamble bits) 狀 例 (Preamble bits) Jitter (Interval Timing) 來 數 復 理 1. (Interval Timing) : (1) Initial Sampling : 來 (2) Edge Detector : 來 (3) Startx_timer : 數 (4) Stopx_timer : 數 (5) Ta1 > Tnoise :, bit change (6) Ta1 < Tnoise : Ta1 is noise, unchanged (7) Save four timer for clock recovery 2. (Preamble bits) Jitter 狀 來 論 (Preamble bits) ( ) 說 數 復 33

49 3.22 (Preamble bits) 說 3.22 兩 (Preamble bits) (Preamble bits) (Preamble bits) (Preamble bits) 行 (Preamble bits) (1) 行 High or Low(RC0=1 or RC0=0) (2) (RC0 = 1 RC0 = 0 ) (RC0=0 RC0 = 1) 1st Sa0 數裡 (3) 數 (RC0=0 to RC0=1 or RC0=1 to RC0=0 ) Ta0 (4), 數 34

50 (RC0=0 to RC0=1 or RC0=1 to RC0=0 ) 2nd Sa0 數裡 Ta1 (5) Ta1 Tnoise?Yes Ta1>Tnoise (bit change) Ta0 來 Ta0 0 來 Ta1 Ta0 數裡 count (4) (bit change) count (Preamble bits) 說 3.23 (Preamble bits) 行 (Preamble bits) (1) 行 High or Low(RC0=1 or RC0=0) (2) (RC0 = 1 RC0 = 0 ) 35

51 (RC0 = 0 RC0 = 1 ) 1st Sa0 數裡 (3), 數 (RC0=0 to RC0=1 or RC0=1 to RC0=0 ) Ta0 (4) 數 (RC0=0 to RC0=1 or RC0=1 to RC0=0 ) 2nd Sa0 數裡, Ta1 (5) Ta1 Tnoise? No Ta1<Tnoise Ta1 is noise Ta0 Ta1 Ta0 數裡 Ta2(RC0=0 to RC0=1 save up 2 nd Sa0 = 1 ) Ta0 Ta2 Ta0 數裡 (4) (bit change) count 0 36

52 3.24 (Preamble bits) 說 3.24 (Preamble bits) 行 (Preamble bits) (1) 行 High or Low(RC0=1 or RC0=0) (2) (RC0 = 1 RC0 = 0 ) (RC0 = 0 RC0 = 1 ) 1st Sa0 數裡 (3) 數 (RC0=0 to RC0=1 or RC0=1 to RC0=0 ) Ta0 (4) 數 (RC0=0 to RC0=1 or RC0=1 to RC0=0 ) 2nd Sa0 數裡 Ta1 37

53 (5) Ta1 Tnoise? No Ta1<Tnoise Ta1 is noise Ta0 Ta1 Ta0 數裡 Ta2(RC0=0 to RC0=1 save up 2 nd Sa0 = 1 ) Ta0 Ta2 Ta0 數裡 (4) Ta1 Ta1>Tnoise? Ta1>Tnoise (4) Ta1>Tnoise (bit change) (bit change) count (Preamble bits) 說 3.25 (Preamble bits) 行 (Preamble bits) 38

54 (1) 行 High or Low(RC0=1 or RC0=0) (2) (RC0 = 1 RC0 = 0 ) (RC0 = 0 RC0 = 1 ) 1st Sa0 數裡 (3) 數 (RC0=0 to RC0=1 or RC0=1 to RC0=0 ) Ta0 (4) Ta0 Tnoise? No Ta0 is noise Ta0 行 Ta0 Tnoise (5) 數 (RC0=0 to RC0=1 or RC0=1 to RC0=0 ) 2nd Sa0 數裡 Ta1 (6) Ta1 Tnoise? No Ta1<Tnoise Ta1 is noise Ta0 Ta1 Ta0 數裡 Ta2(RC0=0 to RC0=1 save up 2 nd Sa0 = 1 ) Ta0 Ta2 Ta0 數裡 (4) (bit change) count 0 39

55 3.3.2 數 復 流 40

56 41

57 數 復 (CDR) 流 說 1: 1. Process 1: 數 來 2. Process 2: Ta0 3. Process 3: Ta1 4. Process 4: Ta1 Tnoise? Ta1 > Tnoise (bit change) Ta0 來 count 數 Ta1 Ta0 數裡 count 數 Process 3 5. Process 5: Ta1 Tnoise? Ta1 < Tnoise Ta1 noise Ta0 Ta1 Ta0 數裡 Ta2 Ta0 Ta2 Ta0 數裡 Process 3 ( : Process 4 Process 5 浪 數 行 Ta1 Tnoise?) 42

58 3.3.3 數 復 3.26 RB0 RC0 (Preamble bits) 路 RC0 (Preamble bits) 行 數 復 (Clock and Data Recovery) 來 MPLAB-IDE 來 (Preamble bits) PIC16F877 來 (TX) (RX) 5V 16 MHz

59 (Preamble bits) 1. Situation 1: Noise Preamble Bits ( ) 16 bits NRZ Timing: 1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms Situation 1: Preamble Bits 2. Situation 2: Noise Preamble Bits ( ) 10 bits NRZ Timing: 1ms 2ms1ms1ms1ms1ms1ms1ms1ms1ms Situation 2: Preamble Bits 44

60 3. Situation 3: Noise Preamble Bits ( ) 12 bits NRZ Timing: 1ms2ms1ms1ms1ms1ms2ms1ms1ms1ms1ms1ms Situation 3: Preamble Bits 4. Situation 4: Noise Preamble Bits ( ) 16 bits NRZ Timing: 1ms1ms2ms2ms1ms1ms2ms1ms1ms2ms1ms1ms1ms1ms1ms1ms Situation 4: Preamble Bits 45

61 來 數 復 (CDR) MPLAB-IDE 來 說 (1) Tp0: 來 錄 Tp0 16us (2) Tp1: 來 錄 Tp1 (3) Tp2: 來 錄 Tp2 (4) Tp3: 來 錄 Tp3 (5) Tp_Total: 來 錄 Tp0+Tp1+Tp2+Tp3 (6) RC_CNT: 來 數 連 4 (7) Fault_CNT: 來 數 (8) Tnoise: nosie = 4 * 16us = 64us (9) Initial_Sampling: (10) BitLevel_Final: 來 錄 料 (11) Ttolerance: (12) TMR1: 來 數 行 46

62 1. Situation 1: Preamble Bits 來 數 復 (CDR) Situation 1 來 數 復 (CDR) 說 : (RC_CNT=0) (Tp0 Tp1 Tp2 Tp3) 來兩兩 [Tp0toTp1] [Tp2toTp3] [Tp0toTp3] (Ttolerance) Fault_CNT 錄 (Tp0 Tp1 Tp2 Tp3) 來 都 連 Bits Preamble bits noise 47

63 2. Situation 2: Preamble Bits 來 數 復 (CDR) Situation 2 來 數 復 (CDR) 說 : (RC_CNT=0) (Tp0 Tp1 Tp2 Tp3) 來兩兩 [Tp0toTp1] [Tp2toTp3] [Tp0toTp3] (Ttolerance) Fault_CNT 錄 (Tp0 Tp1 Tp2 Tp3) 來 都 連 不 Bits Preamble bits noise 連 不 Bits Fault_CNT=1 連 不 Bits 48

64 3. Situation 3: Preamble Bits 來 數 復 (CDR) Situation 3 來 數 復 (CDR) 說 : (RC_CNT=0) (Tp0 Tp1 Tp2 Tp3) 來兩兩 [Tp0toTp1] [Tp2toTp3] [Tp0toTp3] (Ttolerance) Fault_CNT 錄 (Tp0 Tp1 Tp2 Tp3) 來 都 連 不 Bits Preamble bits noise 都 連 不 Bits Fault_CNT=2 連 不 Bits 49

65 4. Situation 4: Preamble Bits 來 數 復 (CDR) Situation 4 來 數 復 (CDR) 說 : (RC_CNT=0) (Tp0 Tp1 Tp2 Tp3) 來兩兩 [Tp0toTp1] [Tp2toTp3] [Tp0toTp3] (Ttolerance) Fault_CNT 錄 (Tp0 Tp1 Tp2 Tp3) 來 都 連 不 Bits Preamble bits noise 都 連 不 Bits Fault_CNT=3 連 不 Bits 50

66 3.4 論 1. (Preamble bits) NXOR CLK_in CD4026 NRZ code ( 3.35) 數 復 (CDR) 路 ( ) 3.35 (Preamble bits) 路 3.36 (Preamble bits) 51

67 3.37 (Preamble bits) 來 數 復 (CDR) 論 : 3.37 不 復 (Clock Recovery) 了兩 數 復 (Data Recovery) Manchester code noise or Jitter noise or Jitter 不 利 來 來 noise or Jitter 52

68 數 利 (Oversampling) 來 數 來 論 (Oversampling) 理 利 PIC16F877 來 數 4.1 料 料串 不 零 (Non-return to Zero, NRZ) 料 (1101) NRZ 來 數 見 兩 不 來 兩 數 例 零 來 0 來 1 NRZ 料 率 (Bit rate) 料 不 (Jitter) 都 料 都 不 了 (Oversampling) [29-31] 了 理 4.1 說 (Oversampling) 理 連串 NRZ 料 1101 料 理 了 53

69 (Oversampling) (Oversampling) 理 行 來 料 4.1 (Oversampling) 理 料 不 (Oversampling) 來 料 數 數 數 數 數 A 料 4.2 說 了 8 例 A 54

70 4.2 A NRZ 8 都 A A 數 4.3 例 料串 `1101 兩 說 8 A 8 邏 1 16 A 8 邏 1 24 A 0 邏 0 32 A 8 邏 1 8 A 6 邏 1 16 A 6 邏 1 24 A 0 邏 0 32 A 6 邏 1 55

71 4.3 數 A 來 度 行 (Oversampling) 料 (4.1) : MCU ClockSpeed MachineCodePerBit = (4.1) Datarate 1kbps 料率 行 4MIPS(million instructions per second) 度 令 0.25us 4000 令 令 句 說 500*0.25us = 125us 度 56

72 N A 數 N-1 A 數 N+1 A 數 都 來 不 N A 數 N-1 A 數 N+1 A 數 都 來 不 N A 數 N-1 A 數 N+1 A 數 來 N+1 N A 數 N-1 A 數 N+1 A 數 來 N

73 4.1 了 料 (Data Decision) 更 了 數 數 數 數 (1) Preamble bits: 16 NRZ ( ) Preamble bits = AA AA h 了 立 (2) Sync word: 16 NRZ ( ) Sync word = D3 91 h [32] 了 (Preamble bits) Payload Data (3) Payload Data: 料 度 8 (4) FCS: 列 (Frame Check Sequence) 16 CRC 58

74 4.2.2 數 PIC16F877 來 數 4.6 數 4.7 (Transmitter) 參 錄 4.6 數 4.7 (Transmitter) 59

75 4.3 列 (Frame Check Sequence) 數 (CRC) 數 Cyclic Redundancy Check, CRC 列 (Frame Check Sequence, FCS) 數 Cyclic Redundancy Check, CRC 數 不 立 CRC 路來 爲了降 利 理 來 理 力 CRC 度 爲 [33-39] 了 CRC 利 理 行 CCITT 料 爲例 理 數 (CRC) 理 CRC 理 p 料 列 r ( 列 ), 爲 n p r 列 例 p 料 列 D [d p-1 d p-2...d 1 d 0 ] r R [r r-1 r r-2...r 1 r 0 ] n 列 M [d p-1 d p-2...d 1 d 0 r r-1 r r-2...r 1 r 0 ] 料 列 料 列 料 列,,, 料 60

76 R 料 列 D 行 爲 r 1 列 G [g r g r-1... g 1 g 0 ] 來 爲 (4.2) : (4.2) x r D(x) 料 列 D r D r 0 Q(x) R(x) 4.3 來 (4.3) Re[ ] 行 M 列 行 (4.4) 爲 (4.5) (4.4) (4.5) R(x) 若爲零 料 爲 CRC 例 1: 料 Data D (x) = G ( x ) = x^4 + x + 1 = r = 5-1 = 4 0 D ( x ) * r = D ( x ) * r / G ( x ) = / = 1110 數 R ( x ) = 1110 CRC CRC T ( x ) = D ( x ) * R ( x ) =

77 料 T ( x ) / G ( x ) = 0 T ( x ) / G ( x ) 0 : 爲 (Generator Polynomial )G(x) 數 爲 CRC G ( x ) 數 (CRC) 數 Cyclic Redundancy Check, CRC PIC16F877 裡 令來 PIC16F 精 令來說 力 利 CRC PIC16F877 Data Frame 度 行 Data Frame 度 什 率 利 Visual Basic 來 數 Cyclic Redundancy Check, CRC 4.8 Visual Basic 來 CRC 4.9 例 2 CRC 參 錄 CRC 例 2: 料 D (x) = D5 h = b G ( x ) = X + X + X + 1 = h = b r = 17-1 bits =

78 D ( x ) * r = D ( x ) * r / G ( x ) = / 數 = b = 9BD8 h R ( x ) = 9BD8 h CRC 料 T ( x ) = D ( x ) * R ( x ) = D59BD8 h 4.8 CRC 4.9 例 2 CRC 63

79 4.4 數 PIC16F877 來 數 Microchip 來 MPLAB-IDE MPLAB-ICD (Receiver) 參 錄 4.10 (Receiver) 量 4.11 例 料 1101 Oversampling 理來 8 A 8 0 料連 兩 1 料連 兩 0 A 8 A 0 來 來 64

80 A 8 A 數 A 65

81 4.4.2 流 66

82 67

83 68

84 69

85 70

86 數 流 說 : 1. Main Routine Flow Chart (1) CDR(Clock and Data Recovery) 來 (Bit Period: T) 來 1k bps 8 來 125us (2) 行 Oversampling Oversampling An-1 = A7 An = A8 An-1 = A7 An = A8 (3) 行 Oversampling1 Oversampling1 了 An+1 = A9 An-1 = A15 An = A16 An+1 = A9 Oversampling An-1 = A7 An = A8 行 料 (Data Decision) 行 Data Decision (4) Data Decision An-1 = A7 An = A8 An+1 = A9 An = A8 An-1 = A7 An = A8 An+1 = A9 兩 都 Data Decision 料 邏 1 DATA_BUFFER 裡 來說 An = A8 An-1 = A7 An = A8 An+1 = A9 兩 都 Data Decision 料 邏 0 DATA_BUFFER 裡 (5) 都 (Resynchronization) 例 An = A8 An-1 = A7 An 71

87 = A8 An+1 = A9 An-1 = A7 (Resynchronization) An = A8 An-1 = A7 An = A8 An+1 = A9 An+1 = A9 (Resynchronization) 料 (6) 理 行 Oversampling1 料 類 行 料 DATA_BUFFER 8 行 DATA_BUFFER 裡 8 料 8 DATA_BUFFER 料 SYNC_BUFFER (7) 來 料 SYNC_HIGH_BUFFER: _ = D3 h 不 行 Oversampling1 料 料 DATA_BUFFER 裡 料 料 DATA_BUFFER 裡 料 SYNC_BUFFER (8) SYNC_BUFFER 料 SYNC_HIGH_BUFFER: _ = D3 h 不 DATA_BUFFER 料 SYNC_BUFFER SYNC_BUFFER 料 SYNC_HIGH_BUFFER: _ = D3 h (9) 連 行 8 Oversampling1 8 DATA_BUFFER 料 SYNC_BUFFER SYNC_BUFFER 料 SYNC_LOW_BUFFER: _ = 91 h (10) 不 行 SYNC_BUFFER 料 SYNC_LOW_BUFFER: _ 72

88 = 91 h 連 行 Oversampling1 DATA_FRAME CRC_HIGH CRC_LOW 2. Oversampling Subroutine Flow Chart (1) Oversampling 行 125us Oversampling 1 1 Oversampling Asampling_Value = Asampling_Value+1 Carry Bit 1 (2) 0 Oversampling Asampling_Value = Asampling_Value-1 Carry Bit 0 Carry Bit 料 Sampling_Buffer 裡 (3) Oversampling Sampling_time 7 句 說 Oversampling 7 Oversampling 7 7 Asampling_Value An-1 = A7 (4) 7 行 7 An-1 = A7 8 行 (5) Oversampling 行 125us Oversampling 1 1 Oversampling Asampling_Value = Asampling_Value+1 Carry Bit 1 (6) 0 Oversampling Asampling_Value = Asampling_Value-1 Carry Bit 0 Carry Bit 料 Sampling_Buffer 裡 An = A8 73

89 3. Oversampling1 Subroutine Flow Chart (1) Oversampling Oversampling1 壘 異 了 Data Decision Check An An-1 An+1 兩 來 Oversampling1 Oversampling1 行 125us (2) Oversampling1 1 1 Oversampling1 Asampling_Value = Asampling_Value+1 Carry Bit 1 0 Oversampling1 Asampling_Value = Asampling_Value-1 Carry Bit 0 (3) Carry Bit 料 Sampling_Buffer 裡 Oversampling1 Asampling_Value An = A9 行 Check An 行 了 Asampling_Value 不 8 Asampling_Value 不 0 (4) Oversampling1 了 An-1 = A7 An = A8 An+1 = A9 行 Data Decision Data Decision 料 DATA_BUFFER 裡 (5) 行 7 來 An-1 = A15 行 Asampling_Value An-1 = A15 行 Check An-1 行 8 An = A16 來 (6) Asampling_Value An = A16 行 Check An 行 74

90 4. Data Decision Subroutine Flow Chart (1) 行 Data Decision An-1 = A7 An = A8 An+1 = A9 料 Data Decision An = A8 An-1 = A7? (2) Data Decision 行 Data Decision An = A8 An+1 = A9 (3) 兩 都 Data Decision 料 邏 1 DATA_BUFFER 裡 (4) 來說 An = A8 An-1 = A7 An = A8 An+1 = A9 兩 都 Data Decision 料 邏 0 DATA_BUFFER 裡 (5) 都 (Resynchronization) 例 An = A8 An-1 = A7 An = A8 An+1 = A9 An-1 = A7 (Resynchronization) (6) An = A8 An-1 = A7 An = A8 An+1 = A9 An+1 = A9 (Resynchronization) 5. Check An An-1 An+1 Subroutine Flow Chart (1) Check An An-1 An+1 不 Asampling_Value 8 不 Asampling_Value 0 流 75

91 (2) Check An An-1 An+1 Asampling_Value Xn Yn Xn-1 Yn-1 Xn+1 Yn+1 (3) Xn 數 0x00 (XOR) Xn 0 都 Xn 0 Xn = Xn + 8 Xn Asampling_Value (4) Asampling_Value 8 Check An An-1 An+1 Yn 8? (5) Yn 8 Check An An-1 An+1 Yn Asampling_Value (6) Yn 8 Check An An-1 An+1 Yn = Yn 8 Yn Asampling_Value 數 4.12 RB0 RC0 數 路 RC0 數 行 來 MPLAB-IDE 來 (TX) (RX) 5V 16 MHz 76

92 MPLAB-IDE PIC16F877 PIC16F877 說 4.14 MPLAB-IDE PIC16F877 數 4.13 MPLAB-IDE PIC16F877 77

93 PIC16F877 說 : 1. TMR0: Timer0 數 2. Sampling_Buffer: 料 3. Sampling_time: 7 4. TMR0_temp0: 數 行 Oversampling 8us 5. Asampling_Value: A 6. DATA_BUFFER: 料 7. Count_time: 數 行 Oversampling 數 8. SYNCWORD_HIGH: _ D3 h 9. SYNCWORD_LOW: _ 91 h 10. SYNC_BUFFER: 11. SYNC_HIGH_BUFFER: _ 12. SYNC_LOW_BUFFER: _ 13. DATA_FRAME: 料串 14. CRC_HIGH: CRC_ 15. CRC_LOW: CRC_ 16. Andec1_buffer: An An_buffer: An 18. Anadd1_buffer: An+1 78

94 4.14 MPLAB-IDE PIC16F877 數 料 : 1. TMR0_temp0 = 7C h 行 Oversampling 7C * 8us = 992us 2. DATA_BUFFER = 21 h 料 21 h 3. Count_time = 38 h 數 行 Oversampling 數 38 h 56 bits 4. SYNC_HIGH_BUFFER = D3 h _ D3 h 5. SYNC_LOW_BUFFER= 91 h _ 91 h 6. DATA_FRAME = 01 h 料串 01 h 7. CRC_HIGH = 10 h CRC_ 10 h 8. CRC_LOW = 21 h CRC_ 21 h 79

95 路 離 不 (Modulation) (Demodulation) 更 路 說 路 5.1 路 ( 數 ) 連 度 38 khz 40 khz 了 ( 例 ) 度 khz 路 LED 流 100mA( 若 1A) PIC16F877 I/O 不 路 5.1 便 路 I C I C = 0.5 A PIC16F877 數 來 LED I C 流 1A 5.1 流 5.1 : VCC VCE( sat) 5V 1.35V I C = = = 243mA (5.1) R 15Ω C 80

96 khz 路

97 khz 路 路 khz 路 khz 路 82

98 khz 路 khz 路 率 555 IC P1 R1 R2 C1 率 (5.2) f = 1.44 ( P C (5.2) 1 + R1 + 2R2 ) 1 P1 率 38 khz PIC16F877 來 料 38 khz NAND LED 路 利 料 38 khz 路 khz 路 83

99 1. : khz 路 khz khz 路 khz 84

100 2. : khz 料 路 khz 料 khz 料 路 khz 料 85

101 3. : khz

102 5.2 路 Allen 1 路 5.12 Allen 1 路 (IR_RX) Allen 列 路 便 50 Allen 1 路 (IR_RX) (Photodiode) PNP_C9012 NPN_C Allen 1 路 (IR_RX) Allen 2 路 5.13 Allen 2 路 (IR_RX) Allen 1 路 (IR_RX) 來 路 量 說 : (1) 路 (Infrared Detector) 路若不 聯 D1 940nm 87

103 D2 流 率 若 D1 D2 流 0.7V (2) 120Hz 濾 路 (120Hz Notch Filter) 5.13 R3 R4 R5 C4 C5 C6 濾 濾 見 靈 度 濾 流 率 60Hz 120Hz 濾 路 率 120Hz 濾 路 [40]: f = 1 1 = Hz 2 R C 2 27k 0.05uF = Π Π Ω (5.3) 3 3 R4 2R5 4 R = = (5.4) C C 6 4 = C5 = (5.5) 2 (3) 濾 路 (Active Bandpass Filter) BJT 5.13 濾 路 濾 路 TL071 (Low Noise Amplifier) C7 R6 濾 濾 38 khz 率 3dB 率 (5.6) f = 1 1 = khz db 2 R C 2 4.2k 1nF 38 3 Π Π Ω (5.6) 6 7 R7 R8 TL071 1/2Vcc 流 OPA TL071 益 4 MHz 若 益 100 TL071 率 40 khz 濾 濾 40 khz 率 連 R3C1 路 濾 益 (Gain-Bandwidth Product) TL071 88

104 路 益 3dB 率 : R9 A V ( f = 0) = = 100 (5.7) R 6 4MHz f3 db = = 40kHz (5.8) 100 利 便 BJT OPA 不 BJT (4) 路 (AM Demodulation) 濾 了 路 (Envelope Detector) D4 C12 VR1 路 路 不 AM 路 AM 不 路 理 D4 AM RC 濾 濾 來 (envelope) (5) 濾 路 (Lowpass Filter) C14 C15 VR2 濾 路 行 濾 不 (6) 數 路 (Data Slicer) 濾 不 類 數 數 路 5.13 C16 C17 R19 R20 R21 R22 R23 R24 TL071 路 降 兩 路 OPA 行 流 不 89

105 5.13 Allen 2 路 (IR_RX) Allen 3 路 5.14 Allen 3 路 (IR_RX) Allen 2 路 (IR_RX) 路 (AM Demodulation) Allen 2 Half-Wave AM Envelope Detector Allen 3 Full-Wave AM Envelope Detector 5.14 Allen 3 路 (IR_RX) 90

106 5.2.4 IRM Module IRM 理 論 [41] 5.15 IRM Module 5.16 IRM Module 5.17 IRM Module 路 91

107 5.18 IRM Module 路 5.3 來 路 都 Workbench 來 1. 路 5.19 來 5.20~5.25 Probe_1 Probe_2 AM 路 Probe_3 (Emitter Follower) 路 Probe_4 濾 路 (Lowpass Filter) Probe_5 數 路 (Data Slicer) 5.19 路 92

108 5.20 路 Probe_ 路 Probe_2 93

109 5.22 路 Probe_ 路 Probe_4 94

110 5.24 路 Probe_ 路 95

111 2. 120Hz 濾 路 (120Hz Notch Filter) 5.26 來 利 120 Hz 濾 Hz 濾 路 (120Hz Notch Filter) Hz 濾 路 (120Hz Notch Filter) 率 96

112 Hz 濾 路 (120Hz Notch Filter) 3. 路 5.29 來 路 1 97

113 (1) 3 R3 = R4 = R5 = R6 = 100K ohm 0.5Vcc = 4.5 來 路 1 (2) 3 R3 = R6 = 100K ohm R4 = R5 = 10K ohm 0.82 來 路

114 4. 若 Single Power Supply Comparator 路 OPA 4.7k ohm 路 5.32 來 5.33~5.38 (1) Situation 1: R1=1k ohm C1=1nF 5.32 路 Situation 1 OPA 99

115 5.34 Situation 1 OPA (2) Situation 2: R1=4.7k ohm C1=1nF 5.35 Situation 2 OPA 100

116 5.36 Situation 2 OPA (3) Situation 3: R1=10k ohm C1=1nF 5.37 Situation 3 OPA 101

117 5.38 Situation 3 OPA 論 : Situation 2: R1= 4.7k ohm C1=1nF OPA 亮 5. Half-Wave AM Envelope Detector 路 Full-Wave AM Envelope Detector 路 5.39 來 Full-Wave AM Envelope Detector 路 102

118 5.40 Half-Wave AM Envelope Detector 5.41 Full-Wave AM Envelope Detector 103

119 5.42 濾 路 5.43 IR_RX 104

120 5.44 IR_TX IR_RX 論 : Half-Wave AM Envelope Detector signal Full-Wave AM Envelope Detector signal 不 Half-Wave AM Envelope Detector signal diode(1n4148) Full-Wave AM Envelope Detector signal 留 來 105

121 5.4 兩 (Preamble bits) 1. Situation 1: Noise Preamble Bits ( ) 16 bits NRZ Timing: 1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms1ms 5.45 Situation 1 (Preamble bits) 2. Situation 2: Noise Preamble Bits ( ) 16 bits NRZ Timing: 1ms1ms2ms2ms1ms1ms2ms1ms1ms2ms1ms1ms1ms1ms1ms1ms 5.46 Situation 2 (Preamble bits) 106

122 5.4.1 Allen IR_TX 38 khz 路 IR_RX Allen Allen Allen 1 _1 107

123 路 (IR_RX) 利 MPLAB IDE 來 Preamble bits Clock 錄 離 1. IR_TX Situation 1 離 24 cm 5.49 Tp0 Tp1 Tp2 Tp3 都 理 5.49 Allen 1 _MPLAB IDE Situation Allen 1 _Situation 1 108

124 2. IR_TX Situation 1 離 26 cm 5.51 Tp0 Tp1 Tp2 Tp Allen 1 _MPLAB IDE Situation Allen 1 _Situation 1 109

125 3. IR_TX Situation 2 離 18 cm 5.53 Tp0 Tp1 Tp2 Tp3 都 理 5.53 Allen 1 _MPLAB IDE Situation Allen 1 _Situation 2 110

126 4. IR_TX Situation 2 離 20 cm 5.55 Tp0 Tp1 Tp2 Tp Allen 1 _MPLAB IDE Situation Allen 1 _Situation 2 111

127 5.1 Allen 1 數 R1 R2 R3 R4 R5 C1 R2*C1 = 數 100K 10K 10K 10K 10K 10uF, 不 10K 10K 10K 10K 10K 10uF 1K 10K 10K 10K 10K 10uF 10K 100K 10K 10K 10K 10uF 不行, 不 亮 10K 1K 10K 10K 10K 10uF GOOD 5.2 IR_Transmitter to Allen 1 離 數 Situation 1 D = 24cm Tp_Total 利 來,. D = 25 cm Tp_Total 利 來,. D = 26 cm Tp_Total,. D = 27 cm,. Situation 2 D = 18 cm Tp_Total 利 來,. D = 19 cm Tp_Total,. D = 20 cm,. 論 : 5.2 Allen 1 離 Allen IR_TX 38 khz 路 IR_RX Allen Allen 2 112

128 5.58 Allen IR_TX 不 IR_RX 120 Hz 113

129 IR_TX 5.60~5.69 Allen 2 量 5.60 Allen 2 Probe_ Allen 2 Probe_2 114

130 5.62 Allen 2 Probe_ Allen 2 Probe_4 115

131 5.64 Allen 2 Probe_ Allen 2 Probe_6 116

132 5.66 Allen 2 Probe_ Allen 2 Probe_8 117

133 5.68 Allen 2 Probe_ Allen 2 Probe_10 118

134 5.4.3 Allen 3 Allen 3 Allen 2 不 5.70 Allen Allen 3 119

135 5.72 Allen Allen 3 _1 120

136 5.74 Allen 3 了 5.75 Allen 3 了 _1 121

137 5.3 Allen 2 Allen 3 離 離 ALLEN 2 1 Half-Wave AM Envelope Detector ALLEN Full-Wave AM Envelope Detector ALLEN 了 ALLEN 了 論 : 5.3 Allen 3 離 1.3 Allen 2 離 30 若 Allen 3 了 離 1.6 見 離拉 IRM Module 5.76 IRM Module 122

138 1. IR_TX 輻 IR_TX IR_RX 離拉 1m 離 Probe 5_RX Data 5.77 離 = 3.33m_Success 5.78 離 = 4.63m_Success 123

139 5.79 離 = 11m_Success 5.80 離 = 12m _Failure 論 : IRM Module 離

140 2. IRM Module 料 Power Data form 125

141 六 論 論 數 (TL071) (1N4148) 理 (PIC16F877) 數 了 路 Allen 1 Allen 2 Allen 3 路 (Interval Timing) 來 數 復 (Clock and Data Recovery, CDR) 量 數 (Oversampling) 都 利 來 流 論 說 論 數 復 (Clock and Data Recovery, CDR) 參 [28] 路 數 復 (Clock and Data Recovery, CDR) Jitter 數 復 路 Jitter 數 復 路 了 路 論 了 (Interval Timing) 來 數 復 (Clock and Data Recovery, CDR) 量 論 數 利 (Oversampling) 來 數 律 率 浪 不 老 論 說不 不 126

142 論 利 (Oversampling) 來 數 (Oversampling) 數 數 來 數 不 (Oversampling) 來 數 (Oversampling) 不 量 (Interval Timing) 來 數 復 (Clock and Data Recovery, CDR) 例來說 PIC 0 PIC 讀 B B 利 0 都 理 來 PIC (Oversampling) 來 數 例來說 Oversampling 理來 8 A 8 0 料連 兩 1 料連 兩 0 A 8 A 0 來 來 A 8 A 0 論 38 khz 路 Allen 1 路 離 路 路 易 來 120 Hz 離 降 不 127

143 ( 數 ) 連 度 38 khz 40 khz 了 ( 例 ) 度 來 路 離 離 理 數 路 (voltage controlled oscillator) 行 率 (IR emitting diode) 利 (photodiode) 路 (phase locked loop) 行 率 離 離 不 更 路 128

144 參 [1] Introduction to Infrared Data Association (IrDA), Jul [2] Joseph M. Kahn, John R. Barry, Wireless Infrared Communication, Proc. IEEE, vol.85, pp , [3] F.W.Gee, Wireless Transmission Technology by IrDA, Jul [4] Stuart Williams, IrDA: Past, Present and Future, IEEE Personal Communication, Volume: 7 Issue: 1, Page(s):10-20, Feb [5] IrDA Standard, Jul [6] IrDA, Serial Infrared Link Access Protocol (IrLAP), Version 1.1, Jun [7] IrDA, Link Management Protocol, Version 1.1, Jan [8] IrDA, Serial Infrared Physical Layer Link Specification, Version 1.3, Oct [9] 數 料 ( 路 ) 林 2001 [10] 林 數 FPGA 論 立 92 年 [11] K. Finkenzeller, RFID Handbook: Radio-Frequency Identification Fundamentals and Applications, New York: John Wiley & Sons, Inc., [12] C. K. Harmon, Standardization and Commercialization of RFID, RFID Committee, 25 Jan [13] Draft Paper on the Characteristics of RFID Systems, Jul [14] RFID ISO Standard, Jul

145 [15] XE1201A MHz Low-Power UHF Transceiver, [16] Gael Coron, AN1201A.06 Application Note, [17] Robert Bosch, CAN Specification Version 2.0, Sep [18] 李 路 車 量 論 立 91 年 [19] Microchip Inc., CAN Protocol, [20] CAN Data Link Layer, [21] Microchip Inc., PIC16F877 Data Sheet, [22] 隆 PIC16F87X 理 Nov [23] PIC 2001 [24] 龍 李 PIC16F87X Nov [25] Microchip Inc., MPLAB-ICD2 User s Guide, [26] Microchip Inc., MPLAB-IDE User s Guide, [27] 立 Jun [28] 亮 Feb [29] K.T.Heien, T.A Lunder and K.H.Torvmark, Oversampling and data decision for the CC400/CC900, 14 Sep [30] Chipcon Inc., CC400 RF Transceiver, Sep [31] Chipcon Inc., CC900 RF Transceiver, Sep [32] Chipcon Inc., SmartRF CC1020 Datasheet (rev. 1.6), 20 Dec [33] Aram Perez, Byte-wise CRC calculations, IEEE Micro, 3(3):40-50, Jun [34] R. J. Glaise and X. Jacquart, Fast CRC calculation, In Proceedings of the IEEE 130

146 International Conference on Computer Design (ICCD), pages , Boston, MA, USA, [35] Andrew S. Tanenbaum, Computer Networks, Prentice Hall, 3 rd edition, [36] Microchip Inc., CRC Algorithm for MCRF45X Read/Write Device, [37] 力 2000 [38] 理 2001 [39] CRC 1995 [40] 李 年 [41] Carryll Hsu, Technical Data Sheet Infrared Remote-control Receiver Module,

147 錄 A: 來 數 復 132

148 來 數 復 ;************************************************************* list p=16f877 R=DEC ; list directive to define processor #include <p16f877.inc> ; processor specific variable definitions ;********** Variable Definitions ************************************* org 20H TMR1 EQU 0EH Tp0 EQU 20H Tp1 EQU 21H Tp2 EQU 22H Tp3 EQU 23H Tp00 EQU 2AH Tp01 EQU 2BH Tp02 EQU 2CH Tp03 EQU 2DH Tp_Total EQU 2EH TMR0_temp1 EQU 35H TMR0_temp2 EQU 36H TMR0_temp3 EQU 37H RC_CNT EQU 3BH Fault_CNT EQU 3CH INTCON_temp EQU 30H Delay10 EQU 31H Delay180 EQU 32H temp1 EQU 40H temp2 EQU 41H temp3 EQU 42H temp4 EQU 43H TOTAL EQU 4FH DEC_TEMP EQU 50H Tnoise EQU 51H Initial_Sampling EQU 52H Bit_Level EQU 53H BitLevel_Total EQU 54H BitLevel_Final EQU 55H Ttolerance EQU 56H Tdifference0 EQU 57H Tdifference1 EQU 58H 133

149 Tdifference2 EQU 59H Fault EQU 5AH Number_Ref EQU 5BH count1 RES 1 VAL_S EQU 50 CNT RES 1 ; ORG 0X00 GOTO MAIN NOP MAIN BANKSEL TRISC BSF STATUS,RP0 MOVLW B' ' ; RC0 = INPUT MOVWF TRISC BCF STATUS,RP0 CLRF PORTC ; PORTC = ; HIGH BANKSEL TRISD BSF STATUS,RP0 MOVLW B' ' ; PORTD = OUTPUT MOVWF TRISD BCF STATUS,RP0 MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW 0X20 FSR 0X04 RC_CNT 0X00 Fault_CNT Tp_Total 0X00 Fault 0X01 Number_Ref 0X04 Tnoise 0X0A 134

150 MOVWF Ttolerance CLRF PORTD CLRF Initial_Sampling CLRF Bit_Level RESTART0 CALL Edge_DT ; 1 Initial Sampling ; IF SAMPLING = RC0 = 0 ==> Edge RC0= 1 ==> set Sa0 = 1 ; IF SAMPLING = RC0 = 1 ==> Edge RC0= 0 ==> set Sa0 = 0 CALL ST_timer1 ; start total timer CALL ST0_timer0 CALL Edge_DT1 ; 2 CALL SP0_timer0 ; low to High ===> TMR0_temp1 = Ta0 MOVLW 0X4 MOVWF Tnoise MOVF Tnoise,W ; Tnoise = 4 SUBWF TMR0_temp1,0 ; Ta0 - Tnoise = c=1, Ta1<Tnoise noise BTFSS STATUS,C GOTO RESTART0 ; B=1 ==> c = 0 ==> Ta1<Tnoise 理 noise ==> BNC RESTART0 ; B=0 ==> c = 1 ==> Ta1>=Tnoise MOVF Initial_Sampling,w MOVWF Bit_Level ; Bit_Level = "NOT" Initial_Sampling RESTART1 CALL ST1_timer0 CALL Edge_DT1 ; 3 CALL SP1_timer0 ; high to low ====> TMR0_temp2 = Ta1 MOVF Tnoise,W ; Tnoise = 4 SUBWF TMR0_temp2,0 ; Ta1 - Tnoise = c=1, Ta1<Tnoise noise BNC Noise_process ; c = 1 ==> Ta1<Tnoise 理 noise ; c = 0 ==> Ta1>Tnoise ; ==> 裡 利 NOISE, Ta1>Tnoise ; BIT CHANGE

151 MOVF TMR0_temp1,W ; Ta0 save up MOVWF INDF ; Ta0 save up in 0X20 INCF FSR ; FSR = 0X20 ; ; 0st_Bit_Level 來 MOVF Bit_Level,w SUBWF Number_Ref,w ; 1-BIT_Level(1 or 2) BTFSS STATUS,C ; C = 0 ==> B = 1==>LOGIC "0", C=1 ==> B=0 ==>L0GIC "1" GOTO Logic_Low ; 1-BIT_LEVEL = 1-2 = -1 ==> B=1 ==> C=0 ==> Logic "0" GOTO Logic_High ; 1-BIT_LEVEL = 1-1 = 0 ==> B=0 ==> C=1 ==> Logic "1" Logic_Low RLF BitLevel_Total,f ; 1-BIT_LEVEL = 1-2 = -1 ==> B=1 ==> C=0 ==> Logic "0" CLRF Bit_Level MOVLW 0X01 ; Bit_Level = not C MOVWF Bit_Level ; ==> logic"1" ==> c=1 ==> 1-1 = 0 ==> B=0 GOTO gotohere Logic_High RLF BitLevel_Total,f ; 1-BIT_LEVEL = 1-1 = 0 ==> B=0 ==> C=1 ==> Logic "1" CLRF Bit_Level MOVLW 0X02 ; Bit_Level = not C MOVWF Bit_Level ; ==> logic"0" ==> c=0 ==> 1-2 = -1 ==> B=1 gotohere MOVF TMR0_temp2,W ; Ta0 = Ta1 MOVWF TMR0_temp1 DECFSZ RC_CNT,F ; 了 GOTO RESTART1 ; CALL SP4_timer ; ; 裡 preamble bits 行 理 NOP MOVF Tp0,W SUBWF Tp1,W ; Tp1 - Tp0 = Tremainder MOVWF Tdifference0 BTFSC STATUS,C ; Carry bit = not borrow bit GOTO NEXT ; C=1 ==> B=0 不 數, 不 2'S 數 136

152 COMF Tdifference0,f ; C=0 ==> B=1 2'S 數 = 1'S 數 INCF Tdifference0,1 NEXT MOVF Tdifference0,w SUBWF Ttolerance,0 ; Ttolerance - Tremainder BTFSS STATUS,C INCF Fault,f ; C=0 ==> B=1 NEED BORROW BIT ; C=1 ==> B=0 ; ; 裡 preamble bits 行 理 MOVF Tp2,W SUBWF Tp3,W ; Tp3 - Tp2 = Tremainder1 MOVWF Tdifference1 BTFSC STATUS,C ; Carry bit = not borrow bit GOTO NEXT1 ; C=1 ==> B=0 不 數 COMF Tdifference1,f ; C=0 ==> B=1 2'S 數 = 1'S 數 INCF Tdifference1,1 NEXT1 MOVF Tdifference1,w SUBWF Ttolerance,0 ; Ttolerance - Tremainder BTFSS STATUS,C INCF Fault,f ; C=0 ==> B=1 NEED BORROW BIT ; C=1 ==> B=0 ; ; 裡 preamble bits 行 理 NOP MOVF Tp0,W SUBWF Tp3,W ; Tp3 - Tp0 = Tremainder2 MOVWF Tdifference2 BTFSC STATUS,C ; Carry bit = not borrow bit GOTO NEXT2 ; C=1 ==> B=0 不 數, NEXT2 不 2'S 數 COMF Tdifference2,f ; C=0 ==> B=1 2'S 數 = 1'S 數 INCF Tdifference2,1 MOVF Tdifference2,w SUBWF Ttolerance,0 ; Ttolerance - Tremainder BTFSS STATUS,C INCF Fault,f ; C=0 ==> B=1 NEED BORROW BIT ; C=1 ==> B=0 137

153 INCF Fault,f ; 不, 0, ; ; BIT MOVF Fault,w ; NUMBER = 1 SUBWF Number_Ref,W ;FAULT-NUMBER;(1-1 = 0)==>B=0, ;1-2 = -1==>B=1,1-3=-2==>B=1,1-4=-3==>B=1 BTFSS STATUS,C GOTO RESET ; C=0 ==> B=1 MOVLW 0X0F ; ANDWF BitLevel_Total,W MOVWF BitLevel_Final CALL CAU_CLOCK CALL SP_timer1 ; C=1 ==> B=0 GOTO END1 RESET INCF Fault_CNT,F MOVLW 0X00 MOVWF Fault MOVLW 0X04 MOVWF RC_CNT MOVLW 0X20 MOVWF FSR GOTO RESTART1 RETURN Noise_process MOVLW 0XFF ; DISPLAY NOISE = FFH MOVWF PORTD MOVF TMR0_temp2,W ADDWF TMR0_temp1,F ; Ta0 = Ta0 + Ta1(noise) CALL ST2_timer0 CALL Edge_DT1 ; 4 CALL SP2_timer0 ; GET Ta2 = TMR0_temp3 MOVF TMR0_temp3,W ADDWF TMR0_temp1,F ; Ta0 = Ta0(Ta0+Ta1) + Ta2 GOTO RESTART1 RETURN ; PREAMBLE BIT TIMING

154 ; CALL CAU_CLOCK ; CLOCK ; ; MOVLW.32 ; MOVWF CNT ; BCF PORTC,1 ;REPLAY ; BCF PORTC,1 ; CALL DELAY_TMR0 ; BSF PORTC,1 ; CALL DELAY_TMR0 ; BCF PORTC,1 ; CALL DELAY_TMR0 ; BSF PORTC,1 ; CALL DELAY_TMR0 ; BCF PORTC,1 ; CALL DELAY_TMR0 ; BSF PORTC,1 ; CALL DELAY_TMR0 ; BCF PORTC,1 ; CALL DELAY_TMR0 ; BSF PORTC,1 ; CALL DELAY_TMR0 ; DECFSZ CNT,F ; GOTO REPLAY ; BCF PORTC,1 ; GOTO END1 ;

155 CAU_CLOCK MOVF ADDWF MOVF ADDWF MOVF ADDWF MOVF ADDWF RETURN Tp0,0 Tp_Total,1 Tp1,0 Tp_Total,1 Tp2,0 Tp_Total,1 Tp3,0 Tp_Total,1 ; Edge_DT: btfsc PORTC,0 ; RC0 = 0 goto negative_edge ; RC0 = 1 GOTO ONE_ZERO ; ;RC0=0 ==> NEGTIVE_EDGE positive_edge btfss PORTC,0 ; RC0 = 0, goto positive_edge ; RC0 = 0 ==> 不 movlw 0X01 ; C =1==>SET BIT_LEVEL = 1 H movwf Initial_Sampling ; 裡 ==> not ;Initial sampling return ; RC0 = 1 ==> ==> Sa0=1 negative_edge btfsc PORTC,0 ; RC0 = 1 goto negative_edge ; RC0 = 1 ==> 不 movlw 0X02 ; C = 0 ==> SET BIT_LEVEL = 2 H movwf Initial_Sampling ; 裡 ==> not Initial sampling return ; RC0 = 0 == > ==> Sa0 = 0 ; Edge_DT1: btfsc PORTC,0 ; RC0 = 0 goto negative_edge1 ; RC0 = 1 GOTO ONE_ZERO RC0=0 ==> NEGTIVE_EDGE 140

156 positive_edge1 btfss PORTC,0 ; RC0 = 0, goto positive_edge1 ; RC0 = 0 ==> 不 return ; RC0 = 1 ==> ==> Sa0=1 negative_edge1 btfsc PORTC,0 ; RC0 = 1 goto negative_edge1 ;RC0 = 1 ==> 不 return ; ST0_timer0: ; Start TIMER0 數 = TMR0==> 16M / 4 / 16 = 250K ==> 0.004ms BANKSEL OPTION_REG MOVLW B' ' ; Prescal = 1:16 16 MOVWF OPTION_REG CLRF INTCON ; not use interrupt BANKSEL TMR0 MOVLW 0X00 MOVWF TMR0 RETURN ; SP0_timer0: ; Stop timer0 來 movf TMR0,W movwf TMR0_temp1 movf INTCON,W movwf INTCON_temp return ; ST1_timer0: ; Start TIMER0 數 = TMR0==>16M / 4 / 64 = 250K ==> 0.016ms BANKSEL OPTION_REG MOVLW B' ' ; Prescal = 1:64 16 MOVWF OPTION_REG CLRF INTCON ; not use interrupt BANKSEL TMR0 MOVLW 0X00 MOVWF TMR0 RETURN 141

157 ; SP1_timer0: ; Stop timer0 來 movf TMR0,W movwf TMR0_temp2 movf INTCON,W movwf INTCON_temp return ; ST2_timer0: ; Start TIMER0 數 = TMR0 ==> 16M / 4 / 64 = 250K ==> 0.016ms BANKSEL OPTION_REG MOVLW B' ' ; Prescal = 1:64 16 MOVWF OPTION_REG CLRF INTCON ; not use interrupt BANKSEL TMR0 MOVLW 0X00 MOVWF TMR0 RETURN ; SP2_timer0: ; Stop timer0 來 movf TMR0,W movwf TMR0_temp3 movf INTCON,W movwf INTCON_temp return ; ST_timer1: ; Start TIMER1 數 = TMR1 ==> 16M / 4 / 4 ==> 0.001ms = 1us BANKSEL T1CON MOVLW B' ' ; Prescal = 1:4 4 MOVWF T1CON CLRF INTCON ; not use interrupt BANKSEL TMR1 MOVLW 0X00 MOVWF TMR1 RETURN ; SP_timer1: ; Stop timer0 來 142

158 bcf T1CON,0 ; STOP TIMER1_TIMER ; movf TMR1H,W ; movwf TtotalH ; movf TMR1L,W ; movwf TtotalL movf INTCON,W movwf INTCON_temp return ; us delay routine ; delay_500us movlw VAL_S ;val_ks=80 * 6.25us = 500us movwf count1 dec_loop1 call D_short decfsz count1,f goto dec_loop1 return ; Delay 5uS D_short call D_ret ; 1uS * 4 + 1uS = 5uS call D_ret call D_ret call D_ret nop nop D_ret return ; Delay10us: ;3*3=9~10us Delay 10us movlw 3 movwf Delay10 Loop_10us decfsz Delay10,f goto Loop_10us return ; Delay180us: ;Delay ~180uS movlw

159 movwf Delay180 Loop_180us decfsz Delay180,f goto Loop_180us return ; END1 END 144

160 錄 B: 數 145

161 數 ;************************************************************* INCLUDE P16F877.INC LIST P=16F877,R=Dec ORG H'22' VAL_ equ.320 ; 160 * 6.25us = 1000us = 1ms delay valum VAL_1000 equ.160 ; 160 * 6.25us = 1000us = 1ms delay valum VAL_500 equ.80 ; 80 * 6.25us = 500 us VAL_50 equ.9 ; 8 * 6.25 = 50 us VAL_250 equ.40 ; 40 * 6.25 us = 250 us VAL_200 equ.31 ; 31 * 6.25 = 200 us VAL_80 equ.14 ; 13 * 6.25 = 80 us VAL_32 equ.6 ; 5 * 6.25 = 32 us VAL_16 equ.4 ; 3 * 6.25 = 16us count equ 0x20 ; Defined temp reg. for 1ms delay count_ms equ 0x21 ; Defined delay reg. count1 equ 0x22 count2 equ 0x23 count3 equ 0x24 count4 equ 0x25 count5 equ 0x26 count6 equ 0x27 count7 equ 0x28 DATA_HIGH EQU 0x30 ; 1 byte = 8 bits DATA_LOW EQU 0x31 ; 1 byte = 8 bits CRC_HIGH EQU 0x32 CRC_LOW EQU 0x33 TEMP RES 1 CNT1 RES 1 CNT RES 1 DLY1 RES 1 DLY2 RES 1 DLY3 RES 1 DLY4 RES 1 DLY5 RES 1 DATA_TXD RES 2 ; 2 BYTES = 16 BITS 不 ; ORG 0X00 146

162 MAIN: GOTO MAIN NOP ORG 0X04 GOTO ISR BANKSEL TRISC BSF STATUS,RP0 MOVLW B' ' ; RC0 = OUTPUT MOVWF TRISC BCF STATUS,RP0 BANKSEL TRISB BSF STATUS,RP0 ; RB0 = INPUT MOVLW B' ' MOVWF TRISB BCF STATUS,RP0 CLRF PORTC ; PORTC = HIGH CLRF PORTB BSF INTCON,GIE BSF INTCON,INTE ; MOVLW H'01' ; MOVWF DATA_HIGH MOVLW H'01' MOVWF DATA_LOW MOVLW H'10' MOVWF CRC_HIGH MOVLW H'21' MOVWF CRC_LOW MOVLW 0x08 MOVWF DLY2 MOVLW 0x08 MOVWF DLY3 MOVLW 0x08 MOVWF DLY4 MOVLW 0x08 MOVWF DLY5 HERE 147

163 GOTO HERE ISR CALL Preamble CALL Startbit ; CALL SEND_DATA_HIGH ; 8 BITS CALL SEND_DATA_LOW CALL SEND_CRC_HIGH CALL SEND_CRC_LOW BCF PORTC,0 BCF INTCON,INTF BCF PIR1,1 GOTO END1 RETFIE ;TX ; BTFSS PORTB,0 ; GOTO TX ; CALL Preamble ; GOTO TX ; CALL Startbit ; CALL delay_1ms ; CALL delay_1ms ;TX: ; MOVLW B' ' ;DATA=H'AA' ; MOVWF DATA_TXD ; CALL SEND_BYTE ; GOTO END1 ; ;SEND_BYTE: ; CALL Preamble ; CALL Startbit ; MOVLW 8 ; MOVWF DLY3 ;SEND_LOOP: ; RRF DATA_TXD,f ; DATA C 裡 ; BNC ZERO ; C 0 C=0 CALL BIT0 ; ; CALL BIT1 ; C =1 BIT1 ; GOTO NEXTBIT ; BIT 148

164 ;ZERO: ; CALL BIT0 ;NEXTBIT: ; DECFSZ DLY3,f ; 8 BITS ; GOTO SEND_LOOP ; RETURN ; Preamble MOVLW 8 MOVWF CNT BCF PORTC,0 RE BSF PORTC,0 ; SET HIGH ; set RC0 = HIGH CALL delay_1ms BCF PORTC,0 CALL delay_1ms DECFSZ CNT,F GOTO RE RETURN ; Startbit BCF PORTC,0 ; SYNC WORD = 0xD391 BSF PORTC,0 ; D CALL delay_1ms CALL delay_1ms BCF PORTC,0 CALL delay_1ms BSF PORTC,0 CALL delay_1ms BCF PORTC,0 ; 3 CALL delay_1ms CALL delay_1ms BSF PORTC,0 CALL delay_1ms CALL delay_1ms CALL delay_1ms ; 9 BCF PORTC,0 CALL delay_1ms 149

165 CALL delay_1ms BSF PORTC,0 CALL delay_1ms BCF PORTC,0 ; 1 CALL delay_1ms CALL delay_1ms CALL delay_1ms BSF PORTC,0 CALL delay_1ms ; BCF PORTC,0 RETURN ; SEND DATA SEND_DATA_HIGH RLF DATA_HIGH,f ; DATA C 裡 BNC ZERO ; C 0 C=0 CALL BIT0 ; CALL LOGIC_1 ; C = 1 LOGIC_1 GOTO NEXTBIT ; BIT ZERO CALL LOGIC_0 NEXTBIT DECFSZ DLY2,f ; 8 BITS GOTO SEND_DATA_HIGH RETURN SEND_DATA_LOW RLF DATA_LOW,f ; DATA C 裡 BNC ZERO_RE ; C 0 C=0 CALL BIT0 ; CALL LOGIC_1 ; C = 1 LOGIC_1 GOTO NEXTBIT_RE ; BIT ZERO_RE CALL LOGIC_0 NEXTBIT_RE DECFSZ DLY3,f ; 8 BITS GOTO SEND_DATA_LOW RETURN ; SEND CRC SEND_CRC_HIGH 150

166 RLF CRC_HIGH,f ; DATA C 裡 BNC ZERO_RE1 ; C 0 C=0 CALL BIT0 ; CALL LOGIC_1 ; C = 1 LOGIC_1 GOTO NEXTBIT1 ; BIT ZERO_RE1 CALL LOGIC_0 NEXTBIT1 DECFSZ DLY4,f ; 8 BITS GOTO SEND_CRC_HIGH RETURN SEND_CRC_LOW RLF CRC_LOW,f ; DATA C 裡 BNC ZERO_RE2 ; C 0 C=0 CALL BIT0 ; CALL LOGIC_1 ; C = 1 LOGIC_1 GOTO NEXTBIT_RE1 ; BIT ZERO_RE2 CALL LOGIC_0 NEXTBIT_RE1 DECFSZ DLY5,f ; 8 BITS GOTO SEND_CRC_LOW RETURN ; LOGIC_1 BSF PORTC,0 CALL delay_1ms RETURN LOGIC_0 BCF PORTC,0 CALL delay_1ms RETURN ; ;BIT1: BCF PORTC,TXD ; low = 1ms * 2/3bit = us ; MOVLW 175 ; MOVWF CNT1 ;CARRIE3: DECFSZ CNT1,f 151

167 ; GOTO CARRIE3 ; BSF PORTC,TXD ; high = 1ms * 1/3 = 66.66us ; MOVLW 83 ; MOVWF CNT1 ;WAI3: DECFSZ CNT1,f ; GOTO WAI3 ; RETURN ; ====> bit1 ; ;BIT0: BCF PORTC,TXD ; low = 1ms * 1/3 = 66.66us ; MOVLW 88 ; MOVWF CNT1 ;CARRI3: DECFSZ CNT1,f ; GOTO CARRI3 ; ; BSF PORTC,TXD ; high = 1ms * 2/3 = us ; MOVLW 173 ; MOVWF CNT1 ;WA3: DECFSZ CNT1,f ; GOTO WA3 ; RETURN ; ; ms delay routine delay_100ms: movlw VAL_ movwf count_ms loop_ms call delay_1ms decfsz count_ms,f goto loop_ms return ; ms delay routine delay_1ms: movlw VAL_10 ; val_us=160 ==> 1ms so val=1 ==>6.25us movwf count dec_loop call D_short decfsz count,f goto dec_loop 152

168 return ; us delay routine ; delay_500us movlw VAL_500 ;val_ks=80 * 6.25us = 500us movwf count1 dec_loop1 call D_short decfsz count1,f goto dec_loop1 return ; us delay routine ; delay_250us movlw VAL_250 ;val_ks=8 * 6.25us = 50us movwf count3 dec_loop3 call D_short decfsz count3,f goto dec_loop3 return ; us delay routine ; delay_200us movlw VAL_200 ;val_ks=8 * 6.25us = 50us movwf count4 dec_loop4 call D_short decfsz count4,f goto dec_loop4 return ; us delay routine ; delay_80us movlw VAL_80 ;val_ks=8 * 6.25us = 50us movwf count5 dec_loop5 call D_short decfsz count5,f goto dec_loop5 return ; us delay routine ; 153

169 delay_50us movlw VAL_50 ;val_ks=8 * 6.25us = 50us movwf count2 dec_loop2 call D_short decfsz count2,f goto dec_loop2 return ; us delay routine ; delay_32us movlw VAL_32 ;val_ks=8 * 6.25us = 50us movwf count6 dec_loop6 call D_short decfsz count6,f goto dec_loop6 return ; us delay routine ; delay_16us movlw VAL_16 ;val_ks=8 * 6.25us = 50us movwf count7 dec_loop7 call D_short decfsz count7,f goto dec_loop7 return ; Delay 5uS D_short call D_ret ; 1uS * 4 + 1uS = 5uS call D_ret call D_ret call D_ret nop nop D_ret return END1 END 154

170 錄 C: 數 155

171 數 ;****************************************************************** INCLUDE P16F877.INC LIST P=16F877,R=Dec ORG H'20' VAL_ equ.320 ; 160 * 6.25us = 1000us = 1ms delay valum VAL_1000 equ.160 ; 160 * 6.25us = 1000us = 1ms delay valum VAL_500 equ.80 ; 80 * 6.25us = 500 us VAL_50 equ.9 ; 8 * 6.25 = 50 us VAL_250 equ.40 ; 40 * 6.25 us = 250 us VAL_200 equ.31 ; 31 * 6.25 = 200 us VAL_120 equ.19 ; 13 * 6.25 = 80 us VAL_32 equ.2 ; 5 * 6.25 = 32 us VAL_16 equ.3 ; 3 * 6.25 = 16us count equ 0x20 ; Defined temp reg. for 1ms delay count_ms equ 0x21 ; Defined delay reg. count1 equ 0x22 count2 equ 0x23 count3 equ 0x24 count4 equ 0x25 count5 equ 0x26 count6 equ 0x27 count7 equ 0x28 Sampling_Buffer EQU 0x29 TMR0_temp0 EQU 0x2A INTCON_temp0 EQU 0x2B Sampling_time EQU 0x2F Compare_High_Value EQU 0x30 Compare_Low_Value EQU 0x31 Asampling_Value EQU 0x32 DATA_BUFFER EQU 0x33 Count_time EQU 0x34 Count_sampling EQU 0x35 Count1_sampling EQU 0x36 Compare_time EQU 0x37 SYNCWORD_HIGH EQU 0x38 156

172 SYNCWORD_LOW EQU 0x39 SYNC_BUFFER EQU 0x3A SYNC_HIGH_BUFFER EQU 0x3B SYNC_LOW_BUFFER EQU 0x3C DATA_FRAME EQU 0x3D CRC_HIGH EQU 0x3E CRC_LOW EQU 0x3F Andec1_buffer EQU 0x40 An_buffer EQU 0x41 Anadd1_buffer EQU 0x42 Time EQU 0x43 Define_Value EQU 0x44 Xndec1 EQU 0x45 Yndec1 EQU 0x46 Xn EQU 0x47 Yn EQU 0x48 Xnadd1 EQU 0x49 Ynadd1 EQU 0x4A Y_Value EQU 0x4B ; ORG 0x00 GOTO MAIN ;Interruptserives ; ORG 0x04 ; MOVLW 0x06 ; 0x06 ; MOVWF TMR0 ; from 6 count 256 ==> = 250 times so 250*0.5us=125us set a samples interrupt MAIN: BANKSEL TRISC BSF STATUS,RP0 MOVLW B' ' ; RC0 = INPUT MOVWF TRISC BCF STATUS,RP0 CLRF PORTC ; PORTC = HIGH BANKSEL TRISD BSF STATUS,RP0 MOVLW B' ' ; PORTD = OUTPUT 157

173 MOVWF TRISD BCF STATUS,RP0 ; MOVLW B' ' ; DO H T=16M/4/2( )=2MHZ = 0.5us ; MOVWF OPTION_REG ; BCF STATUS,RP0 ; MOVLW B' ' ; A0 H ; SET GIE=1, T0IE=1 ; MOVWF INTCON MOVLW 0x07 MOVWF Sampling_time MOVLW 0x06 MOVWF Compare_High_Value MOVWF Time MOVLW 0x03 MOVWF Compare_Low_Value MOVLW 0x00 MOVWF Sampling_Buffer MOVWF Xndec1 MOVWF Yndec1 MOVWF Xn MOVWF Yn MOVWF Xnadd1 MOVWF Ynadd1 MOVWF DATA_BUFFER MOVWF Count_time MOVWF Compare_time MOVWF SYNC_BUFFER MOVLW 0x08 MOVWF Count_sampling MOVLW 0x08 MOVWF Count1_sampling MOVWF Y_Value MOVLW 0xD3 MOVWF SYNCWORD_HIGH MOVLW 0x91 MOVWF SYNCWORD_LOW MOVLW 0x00 MOVWF Define_Value MOVLW 0x00 158

174 REPLAY RESET RE1 RE2 RE3 MOVWF Asampling_Value BTFSS PORTC,0 GOTO REPLAY CALL Oversampling1 CALL Oversampling1 CALL Oversampling1 CALL Oversampling1 CALL Oversampling1 CALL Oversampling1 CALL Oversampling1 CALL Oversampling1 INCF Compare_time,1 MOVF DATA_BUFFER,W MOVWF SYNC_BUFFER MOVF SYNCWORD_HIGH,W ; SYNCWORD_HIGH = D3 H SUBWF SYNC_BUFFER,0 ; SYNC_BUFFER- SYNCWORD_HIGH(D3) BTFSS STATUS,2 ; CHECK STATUS, Z FLAG GOTO RE1 ; Z NOT = 0 ==>SYNC_BUFFER NOT = D3 H MOVF SYNC_BUFFER,W ; Z = 0 ==>SYNC_BUFFER = D3 H MOVWF SYNC_HIGH_BUFFER CALL Oversampling1 ; 8 DECFSZ Count_sampling,1 ; 8 GOTO RE2 ;Z NOT = 0 8 MOVF DATA_BUFFER,W MOVWF SYNC_BUFFER MOVF SYNCWORD_LOW,W ; SYNCWORD_HIGH = 91 H SUBWF SYNC_BUFFER,0 ; SYNC_BUFFER - SYNCWORD_LOW(91) BTFSS STATUS,2 ; CHECK STATUS, Z FLAG GOTO RESET ; Z NOT = 0 ==>SYNC_BUFFER NOT = 91 H MOVF SYNC_BUFFER,W ; Z = 0 ==>SYNC_BUFFER = 91 H MOVWF SYNC_LOW_BUFFER 159

175 CALL Oversampling1 ; 8 DECFSZ Count1_sampling,1 ; 8 GOTO RE3 ;Z NOT = 0 8 MOVF DATA_BUFFER,W MOVWF DATA_FRAME MOVLW 0x08 MOVWF Count1_sampling RE4 CALL Oversampling1 ; 8 DECFSZ Count1_sampling,1 ; 8 GOTO RE4 ;Z NOT = 0 8 MOVF DATA_BUFFER,W MOVWF CRC_HIGH MOVLW 0x08 MOVWF Count1_sampling RE5 CALL Oversampling1 ; 8 DECFSZ Count1_sampling,1 ; 8 GOTO RE5 ;Z NOT = 0 8 MOVF DATA_BUFFER,W MOVWF CRC_LOW GOTO END1 ; Oversampling CALL delay_120us ; TIME = 120us BTFSS PORTC,0 GOTO NEXT ; RC0 = 0 ==> SAMPLING = 0 INCF Asampling_Value,1 ; RC0 = 1 ==> Sampling = 1 BSF STATUS,C GOTO NEXT1 NEXT DECF Asampling_Value,1 NEXT1 RRF Sampling_Buffer,1 ; time = 7A * 1us = 122us DECFSZ Sampling_time,1 GOTO Oversampling ; z 不 0 ==> 7 160

176 MOVF Asampling_Value,w MOVWF Andec1_buffer ; An-1 = A7 CALL delay_120us BTFSS PORTC,0 GOTO NEXT2 ; RC0 = 0 ==> SAMPLING = 0 INCF Asampling_Value,1 ; RC0 = 1 ==> Sampling = 1 BSF STATUS,C GOTO NEXT3 NEXT2 DECF Asampling_Value,1 NEXT3 RRF Sampling_Buffer,1 MOVF Asampling_Value,w MOVWF An_buffer ; An = A8 ; INCF Count_time,1 CALL delay_16us RETURN ; Oversampling1 CALL delay_120us BTFSS PORTC,0 GOTO NEXT4 ; RC0 = 0 ==> SAMPLING = 0 INCF Asampling_Value,1 ; RC0 = 1 ==> Sampling = 1 BSF STATUS,C GOTO NEXT5 NEXT4 DECF Asampling_Value,1 ;; RC0 = 0 ==> SAMPLING = 0 BCF STATUS,C NEXT5 RRF Sampling_Buffer,1 MOVF Asampling_Value,W ; MOVWF Anadd1_buffer ; An+1 = A9 ; MOVF Anadd1_buffer,w CALL CHECK_Anadd1 ; A 0 8 MOVWF Anadd1_buffer MOVF Anadd1_buffer,w MOVWF Asampling_Value 161

177 ; MOVF Andec1_buffer,w ; CALL CHECK_A ; A 0 8 ; MOVWF Andec1_buffer ; MOVF An_buffer,w ; CALL CHECK_A ; A 0 8 ; MOVWF An_buffer CALL DATA_DECISION INCF Count_time,1 RE CALL delay_120us BTFSS PORTC,0 GOTO NEXT6 ; RC0 = 0 ==> SAMPLING = 0 INCF Asampling_Value,1 ; RC0 = 1 ==> Sampling = 1 BSF STATUS,C GOTO NEXT7 NEXT6 DECF Asampling_Value,1 BCF STATUS,C NEXT7 RRF Sampling_Buffer,1 DECFSZ Time,1 GOTO RE ; z 不 0 ==> 6 MOVF Asampling_Value,W ; MOVWF Andec1_buffer ; An-1 = A15 ; MOVF Andec1_buffer,w CALL CHECK_Andec1 ; A 0 8 MOVWF Andec1_buffer MOVF Andec1_buffer,w MOVWF Asampling_Value CALL delay_120us BTFSS PORTC,0 GOTO NEXT8 ; RC0 = 0 ==> SAMPLING = 0 INCF Asampling_Value,1 ; RC0 = 1 ==> Sampling = 1 BSF STATUS,C GOTO NEXT9 NEXT8 DECF Asampling_Value,1 BCF STATUS,C 162

178 NEXT9 RRF Sampling_Buffer,1 MOVF Asampling_Value,W ; An = A16 CALL CHECK_An ; A 0 8 MOVWF An_buffer MOVF An_buffer,w MOVWF Asampling_Value MOVLW 0x06 MOVWF Time ; CALL delay_32us RETURN ; DATA_DECISION MOVF Andec1_buffer,w SUBWF An_buffer,0 BTFSS STATUS,Z GOTO Another_Situaion MOVF Anadd1_buffer,w SUBWF An_buffer,0 BTFSS STATUS,Z GOTO Another_Situaion RLF DATA_BUFFER,1 RETURN Another_Situaion MOVF Andec1_buffer,w SUBWF An_buffer,0 BTFSC STATUS,Z GOTO RESYNC MOVF Anadd1_buffer,w SUBWF An_buffer,0 BTFSC STATUS,Z GOTO RESYNC RLF DATA_BUFFER,1 RETURN RESYNC MOVLW 0x00 MOVWF PORTD 163

179 RETURN ; CHECK_Andec1 MOVWF Yndec1 MOVWF Xndec1 MOVLW 0x00 XORWF Xnadd1,1 BTFSS Xnadd1,3 GOTO WAIT BTFSS Xnadd1,2 GOTO WAIT BTFSS Xnadd1,1 GOTO WAIT BTFSS Xnadd1,0 GOTO WAIT GOTO Situation0 ; 0 WAIT ; 理不 0 1,2,3,4,5,6,7,8 8 MOVF Yndec1,w SUBWF Y_Value,0 BTFSC STATUS,C GOTO WAIT1 ; c = 0 BTFSC STATUS,Z ; c = 1 GOTO WAIT1 ; z = 1 MOVLW 0x08 ; c=1, z=0 ==>A 8 SUBWF Yndec1,1 ; c=1, z=0 ==>A 8 ; MOVF Yndec1,w ; RETURN WAIT1 ; A 1,2,3,4,5,6,7,8 MOVF Yndec1,w RETURN Situation0 ; A 0 MOVLW 0x08 ADDWF Xndec1,1 MOVF Xndec1,w RETURN ; CHECK_An MOVWF Yn 164

180 MOVWF Xn MOVLW 0x00 XORWF Xn,1 BTFSS Xn,3 GOTO WAIT2 BTFSS Xn,2 GOTO WAIT2 BTFSS Xn,1 GOTO WAIT2 BTFSS Xn,0 GOTO WAIT2 GOTO Situation1 ; 0 WAIT2 ; 理不 0 1,2,3,4,5,6,7,8 8 MOVF Yn,w SUBWF Y_Value,0 BTFSC STATUS,C GOTO WAIT3 ; c = 0 BTFSC STATUS,Z ; c = 1 GOTO WAIT3 ; z = 1 MOVLW 0x08 ; c=1, z=0 ==>A 8 SUBWF Yn,1 ; c=1, z=0 ==>A 8 ; MOVF Yn,w ; RETURN WAIT3 ; A 1,2,3,4,5,6,7,8 MOVF Yn,w RETURN Situation1 ; A 0 MOVLW 0x08 ADDWF Xn,1 MOVF Xn,w RETURN ; CHECK_Anadd1 MOVWF Ynadd1 MOVWF Xnadd1 MOVLW 0x00 XORWF Xnadd1,1 BTFSS Xnadd1,3 165

181 GOTO WAIT4 BTFSS Xnadd1,2 GOTO WAIT4 BTFSS Xnadd1,1 GOTO WAIT4 BTFSS Xnadd1,0 GOTO WAIT4 GOTO Situation2 ; 0 WAIT4 ; 理不 0 1,2,3,4,5,6,7,8 8 MOVF Ynadd1,w SUBWF Y_Value,0 BTFSC STATUS,C GOTO WAIT5 ; c = 0 BTFSC STATUS,Z ; c = 1 GOTO WAIT5 ; z = 1 MOVLW 0x08 ; c=1, z=0 ==>A 8 SUBWF Ynadd1,1 ; c=1, z=0 ==>A 8 ; MOVF Ynadd1,w ; RETURN WAIT5 ; A 1,2,3,4,5,6,7,8 MOVF Ynadd1,w RETURN Situation2 MOVLW 0x08 ADDWF Xnadd1,1 ; A 0 MOVF Xnadd1,w RETURN ; ; ST0_timer0: ; Start TIMER0 數 = TMR0 ==> 16M / 4 / 32 = 8us BANKSEL OPTION_REG MOVLW B' ' ; Prescal = 1:32 32 MOVWF OPTION_REG CLRF INTCON ; not use interrupt BANKSEL TMR0 MOVLW 0X00 MOVWF TMR0 166

182 RETURN ; SP0_timer0: ; Stop timer0 來 movf TMR0,W movwf TMR0_temp0 movf INTCON,W movwf INTCON_temp0 return ; ms delay routine delay_1ms: movlw VAL_1000 ; val_us=160 ==> 1ms so val=1 ==>6.25us movwf count dec_loop call D_short decfsz count,f goto dec_loop return ; us delay routine ; delay_500us movlw VAL_500 ;val_ks=80 * 6.25us = 500us movwf count1 dec_loop1 call D_short decfsz count1,f goto dec_loop1 return ; us delay routine ; delay_250us movlw VAL_250 ;val_ks=8 * 6.25us = 50us movwf count3 dec_loop3 call D_short decfsz count3,f goto dec_loop3 return ; us delay routine ; delay_200us movlw VAL_200 ;val_ks=8 * 6.25us = 50us 167

183 movwf count4 dec_loop4 call D_short decfsz count4,f goto dec_loop4 return ; us delay routine ; delay_120us movlw VAL_120 ;val_ks=8 * 6.25us = 50us movwf count5 dec_loop5 call D_short decfsz count5,f goto dec_loop5 return ; us delay routine ; delay_50us movlw VAL_50 ;val_ks=8 * 6.25us = 50us movwf count2 dec_loop2 call D_short decfsz count2,f goto dec_loop2 return ; us delay routine ; delay_32us movlw VAL_32 ;val_ks=8 * 6.25us = 50us movwf count6 dec_loop6 call D_short decfsz count6,f goto dec_loop6 return ; us delay routine ; delay_16us movlw VAL_16 ;val_ks=8 * 6.25us = 50us movwf count7 168

184 dec_loop7 call D_short decfsz count7,f goto dec_loop7 return ; Delay 5uS D_short call D_ret ; 1uS * 4 + 1uS = 5uS call D_ret call D_ret call D_ret nop nop D_ret return ; END1 END 169

185 錄 D: 數 (CRC) 170

186 數 (CRC) Private Sub Command1_Click() Dim BCRC%, GP&, BDF& BCRC = 16 GP = Val("&H" & CStr(Text2.Text) & "&") BDF = Val("&H" & CStr(Text1.Text) & "&") Text3 = Hex(CalCRC(BCRC, GP, BDF)) S1 = CStr(Text1.Text) S2 = CStr(Text3.Text) S = S1 + S2 X = CStr(S1) + CStr(S2) Text4 = Hex(Val("&H" + X)) End Sub Function CalCRC(BCRC As Integer, GP As Long, BDF As Long) As Long Dim C1&, C2& Dim A1%, PreC1& Dim LeftValue%, A1Shift% If BDF = 0 Then CalCRC = 0 Exit Function End If A1 = (Len(Hex(BDF)) - 1) * 4 C1 = BDF * 2 ^ BCRC LeftValue = Val("&H" & Mid(Hex(BDF), 1, 1)) If LeftValue >= 1 Then A1Shift = 1 If LeftValue >= 2 Then A1Shift = 2 If LeftValue >= 4 Then A1Shift = 3 If LeftValue >= 8 Then A1Shift = 4 A1 = A1 + (A1Shift - 1) C2 = GP * 2 ^ A1 Do PreC1 = C1 C1 = C1 Xor C2 Do A1 = A1-1 ''' If C1 > PreC1 Then 171

187 C1 = PreC1 Xor (GP* 2 ^ A1) Else Exit Do End If Loop C2 = GP * 2 ^ A1 Loop Until C1 <= GP CalCRC = C1 End Function Private Sub Command2_Click() ' M = Len(Text4.Text) For I = 1 To M ST = Mid(Text4.Text, I, 1) MSComm1.Output = Trim(ST) Next I End Sub Private Sub Command3_Click() ' Dim BUF$ Text5.Text = "" BUF = MSComm1.Input Text5.Text = Text5.Text + BUF BUF = "" If Text5.Text = "" Then Text5.Text = "EMPTY" End If End Sub Private Sub Command4_Click() Text1 = "" Text2 = "" Text3 = "" Text4 = "" Text5 = "" End Sub 172

188 錄 E: CAN 173

189 CAN Bus Hardware Architecture and Software Simulation 立 北 林 I. CAN BUS Hardware Architecture 1. Hardware Circuit: (Microchip PIC18F458 Microcontroller x 3) ( Microchip MCP2551 or 82C251 Transceiver x 3) (Emulation Board x 3) 1 ~ 3 E.1 1: Master ( ) E.2 2: Slave1 ( ) 174

190 E.3 3: Slave2 ( ) 2. 1 (Master): Message_ID1 = (0x170) 16 = (368) 10, Rx_Filter_FL1 = (0x88) 16 = (136) 10 2 (Slave1): Message_ID2 = (0x88) 16 = (136) 10, Rx_Filter_FL2 = (0x170) 16 = (368) 10 3 (Slave2): Message_ID3 = (0x100) 16 = (256) 10, Rx_Filter_FL3 = (0x170) 16 = (368) 10 Master Message_ID1 = (0x170) 16 = (368) 10, Master Rx_Filter_FL1 = (0x88) 16 = (136) 10, Slave1 Message_ID2 = (0x88) 16 = (136) 10, Slave1 Rx_Filter_FL2 = (0x170)) 16 = (368) 10, 料, 料 LCD Display, 利 CAN Bus Monitor 料. 175

191 II. CANKing Software Architecture CAN Bus Monitor : 利 Microchip CANKing Software, 4 ~ 9, MCP250XX Developer s Kit, 10, CAN Node. E.4 CANKing_1 E.5 CANKing_2 176

192 E.6 CANKing_3 E.7 CANKing_4 E.8 CANKing_5 177

193 E.9 CANKing_6 E.10 MCP250XX Developer s Kit Connected to PC Printer Port_DB25 ( ) 178

194 III. GO ON CAN Bus, Master, Slave1, Slave2 利 2 連 來 Can Bus, 利 3 Master 連 MCP250XX Developer s Kit, 利 CAN Bus System 狀, 11 CAN Bus System, 狀 料 連, MCP250XX Developer s Kit PC or NB Printer Port (DB25), 12 PC or NB CANking CAN Bus Monitor CAN Bus System 料狀 E.11 CAN Bus System 179

195 E.12 CAN Bus Monitor window IV. Future work 1., 兩 不 2. 都 立,, 來 180

196 錄 F: 2004 年 論 181

197 2004 ( ) Proceedings of the 2004 National Symposium on Telecommunications 識 數 林 林 立 北 路 s @ntut.edu.tw ; ccyu@en.ntut.edu.tw - 識 率 數 讀 數 讀 數 識 (Automatic Identification System) 年 年 (Wireless Communication Technologies) 識 識 (Radio Frequency Identification, RFID) [1] 讀 (Reader) (Tag Chip) (System Integration, SI) (Signal Integrity, SI) 識 讀 理 (Signal Processing Unit) 讀 (Antenna) (Electromagnetic Energy) (Passive Tag Chip) (Address, ADR) (Electronic Product Code, EPC) (Identification, ID) (Load Modulation) (Near-Field Electromagnetic Induction) (Far-Field Electromagnetic Wave Scattering) 讀 讀 識 (Micro-Controller Unit, MCU or C) 理 (Micro-Processor, P) 行數 理 (Digital Signal Processing, DSP) 料 率 (Bit Rate) 讀 (Reading Synchronization) 識 (Preamble or Head Bits) 數 (Data Recovery) (Decoding) 行 理 (Management of Information System, MIS) (Authentication) (Retrieval) (Monitoring) (Tracking) (Access) (Control) 識 (Multiple Tags) 讀 料 (Data Collision) 讀 令 (Interrogative Directive) 度 (Pulse Width-Modulation, PWM) 行 流 (RF-to-DC Rectification) (PWM Demodulation) (Reply) 數 (Counting) 讀 理 (Anti-Collision, AC) 料 (Manchester Code) 例 說 量 邏 0 1 立 度 邏 力 邏 0 1 (Time-Domain Waveforms for Logic 0 and 1 ) 邏 0 (50 % Duty Cycle) 邏 1 1 ATMEL TEMB8704 RFID Application Kit TK Bit EPC (E B8C2D) 16 讀 率 182 ( ) 391

198 125 khz 32 [2]-[3] 讀 利讀 列 1. 行 (State Change) 立參 (Reference Time) 2. 行 數 率 3. 行數 2 (E6) 16 3 (E6) 16 3 連 1 (E B8C2D) 16 (Coding Scheme) 讀 數 (Synchronous Data Reception) 力 ATMEL TK5530 例 (E6) 16 2 (E6) 16 8-Bit. (E6) 16 3 連 (Consecutive 3 Binary Bits) 3 (010) 2 (101) 2 若 (010) 2 (101) 2 連 讀 (False Recognition) (Bit Period Doubling, 2T) 率 (Bit Rate Halving, f/2) (Design) (Select) (010) 2 (101) 2 (Firmware) 數 率 (E6) 16 = ( ) 2 若 (CC) 16 = ( ) 2 率 (Electromagnetic Interference, EMI) 流 V 4-MHz Microchip PIC16F877 [4] 讀 64-Bit 串列數 (Asynchronous Serial Data Transmission and Reception, TX and RX) (E B8C2D) / 數 流 (Flow Chart) Agilent 54621A 183 ( ) 392

199 (E B8C2D) 16 MPLAB-IDE 理 讀 8 料 [1] 8 識 料 料 9 類 [1] 5 64-Bit 流 9 識 類 6 (E B8C2D) (Spatial Domain) 讀 讀 精 不 復 數 理 (Very Fast Digital Signal Sampling and Processing) 力 2. (Frequency Domain) (Frequency Multiplexing) (Spread Spectrum) 讀 料 度 (Technology Complexity) (Cost) (Airport) 行李 (Passenger Luggage Security Check) 184 ( ) 393

200 3. (Time domain) 10 兩 類 [1] 行數 (Data Discrimination) 10 識 類 (1) (Tag-Driven) 不 讀 不 讀 行 復 (Asynchronous Reply) 例 EPC (Periodically, Repetitively, or Regularly) EPC 讀 EPC (Time Frame) 利 EPC 降 (Likelihood of Collision) 不 行 識 ( Switched Off ) 切 (Non-Switched) 讀 料 不易 識 讀 (2) 讀 (Reader-Driven) 讀 (Synchronous Interrogation) 讀 輪 (Polling) (Binary Search) 串列 (Unique Serial Number) 識 EPC 輪 EPC 錄 輪 11 (Binary Search Tree) 讀 (Standard) (Protocol) 令 EPC 讀 11 數 12 參 [1] 12 識 Get_TADR<(XX) 讀 令 (XX) (TADR) 讀 來 (XX) 讀 讀 來 (XX) (Sleep Mode) 讀 Get_TADR<(XX) 令 SELECT_(XX) 令 SELECT_(XX) 讀 令 (XX) (TADR) 讀 來 (XX) 讀 讀 來 (XX) 不 讀 SELECT_(XX) 令 讀 185 ( ) 394

201 SELECT_(XX) 令 Get_Data 令 Get_Data 讀 令 讀 SELECT_(XX) 令 EPC UNSELECT 讀 令 六 讀 PC,VB Software, RS-232 Port #1, PIC16F877 MAX232 / IC [5] 聯 1. Get_TADR = (A2 ) 16 2 PC 都 2. Get_TADR = (A3) 16 ~ (C2) 16 : #1 TADR Get_TADR #1 #1 EPC 數 量 讀 PC #1 EPC 3. Get_TADR = (C3) 16 ~ (FF) 16 #1, 2 讀 料 亂 兩 利 讀 PC 17 (Time Division Multiple Access, TDMA) [6] #2 EPC 利 識 13 #1 #1 (Tag #1) 15 #1 MAX232 IC 讀 EPC 14 #2 #2 (Tag #2) #1 8-Bit TADR = ( ) 2 = (A3) Bit EPC = ( ) 16 #2 16 PC #1 EPC 8-Bit TADR = ( ) 2 = (C3) Bit EPC = (1099AABBCCDDEEFF) ( ) 395

202 17 讀 EPC [6] 論 數 識 理 流 識 數 率 讀 數 行 理 識 讀 令 度 行 流 令 數 讀 數 參 18 #1 MAX232 IC 讀 EPC [1] K. Finkenzeller, RFID Handbook: Radio Frequency Identification Fundamentals and Applications, 2 nd Ed., New York: John Wiley & Sons, [2] Read-Only Transponder TK5530 Data Sheet, [3] Electronic Immobilizers for the Automotive Industry, Application Note, [4] PIC16F877 Data Sheet, [5] MAX232 +5V-Powered Multichannel RS-232 Drivers / Receivers Data Sheet, [6] W. Noothong, N. Panitantum, A. Yordthein, A. Worapishet, and M. Thamsirianunt, ASIC Designn of a Single Chip CMOS RFID Transponder, 19 PC #2 EPC Investigation on Data Synchronization and Anti-Collision Technologies for Radio Frequency Identification System Abstract This work explores the technologies of bit rate extraction, synchronous data reception, preamble bits discrimination, data recovery, and anti-collision (AC) mechanisms for the electronic product code (EPC) with a passive radio-frequency identification (RFID) tag. A personal computer (PC) and two micro-controllers (MCU) are utilized to simulate and verify the functions of digital signal transmission and reception between the RFID reader and tag unit. 187 ( ) 396