I2C Bus Interface Unit 9

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1 I2C 流連理料理來了理理 IC 數了利 1980 年路 I2C 流 I2C 離兩連兩串列料 (SDA) 串列 (SCL) 兩理來識更來路 I2C 流了 PXA250 PXA210 理 17.1 I2C 流利列流 SDA 料 SCL 來參 I2C 流 I2C 理 I2C 流來 master slave I2C 理 I2C 理 I2C 流數來理狀料 I2C 理流料來 I2C 流 I2C 流來狀來參 I2C-Bus Specification I2C 流 I2C 不 10CBUS 17.2 說 I2C SDA SCL17-1 說 17-1 MMC 說 / 說 SDA I2C 列料 / SCL I2C 列 17-1

2 17.3 說 I2C 流列 I2C 流理理來理列列料 / SDA 列 SCL I2C 流 7 來識 master slave 來 17-2 列 I2C I2C Master Slave Multi-master 17-2 I2C 流料 I2C 流 I2C 流料 master 來 master 流不 master 流 master 流不例理 I2C 流 master, EEPROM slave 來料見 17-1 I2CEEPROM mastereeprom slave I2C 讀料 master EEPROM slave 不 master 17-1 I2C 流例 I2C 流 multi-master 料了 I2C 流連 I2C I2C 流 masters 流料 master SDA mastersdascl master 連 SCL 17-2

3 I2C 流列流流狀狀例 master 料 SCL slave 不 master 率來料 slave 狀狀來 mastermaster slave I2C 不理 master 來理 slave 來兩狀讀讀 I2C 流 I2C 連流理來 CPU I2C 流輪來 I2C I2C 流 8 來理來料狀行 / 列了 I2Cslave 流 I2C 理 I2C 狀料 8I2C 料 IDBR 料 I2C 流料 8I2C 料 IDBR 理流料 I2C 流列不行 I2CICRI2C 狀 ISR I2C 17.9 I2C 參 The I2C-Bus Specification 料 I2C 流 I2C 不 17-3 不 17-3

4 17-3 說 Master I2Cmaster I2C 料 I2C Slave slave Master I2Cmaster 讀 I2C 料 I2C Slave slave Slave I2Cslave master 讀 I2C 料 Master master Slave I2Cslave master I2C 料 Master master I2C slave 流理 slave I2CI2C SlaveISAR 7 見不 slave slave 讀 / R/nW R/nWslave R/nW low master 料 I2C slave R/nW high master 讀料 I2Cslave Slaveslave I2C I2C 流讀 slave master I2Cmaster 讀 I2Cmaster Mastermaster 17-4

5 START STOP 流狀 I2C 流 START STOP 流狀 SCLSDA START 狀 SCLSDA STOP 狀 I2CICR[START] ICR[STOP] 來 I2C 流 START 狀料 START I2C 流 STOP 狀 17-4 ICR START STOP STOP START X 17-4 START STOP 狀 START STOP START 狀 START STOP 狀 I2CSTART STOP 狀料 I2CSTART 狀 8IDBR START IDBR7 R/nW 了 START IDBR slave R/nW master 行路不 slaves 不流了留 master 了讀 master masteri2c8 IDBR I2C 流 STOP 狀 master ICR[ACKNAK] ACK 見 9.4.3, I2C I2C NAKIDBR 料 I2C 流 STOP 狀 17-2 SDA SCL 狀 17-5

6 17-2 START STOP 狀 START 狀 START 狀 ICR[START]=1, ICR[STOP]=0 master START START ICRslave IDBR R/nW 見 I2C 料 IDBR START IDBR ICR[TB]I2C 流 I2C 流留 master 讀 master 了讀 slave IDBR 了更 slave R/nW master 行路不 slaves 不流 START 狀不 I2CSTARTI2C 流 START 見 I2C START STOP 狀 START STOP 狀 ICR[START]=0, ICR[STOP]=0 master I2C 料見 17-2 料 I2C ISR[ITE] ICR[TB] 來 IDBR ICR[TB] 來 ICR[START] ICR[STOP] ICR[START] ICR[STOP] START STOP START 不 I2C ICR[ACKNAK] I2CSCL 來狀 ICR[TB] I2CSCL 行 17-6

17.3.3.3 STOP 狀 STOP 狀 ICR[START]=X, ICR[STOP]=1 料 master ICR[STOP] ICR[TB] 來見 17-2 masteri2cicr[acknak] ICR[STOP] ICR[TB] 來 ICR[STOP] 狀 17-3 START STOP

7 STOP 狀 STOP 狀 ICR[START]=X, ICR[STOP]=1 料 master ICR[STOP] ICR[TB] 來見 17-2 masteri2cicr[acknak] ICR[STOP] ICR[TB] 來 ICR[STOP] 狀 17-3 START STOP 狀 17.4 I2C 流 I2C 1 量來料列 1. START 2. 7Slave 3. R/nW 料 6. ACK/NAK START 1STOP 列 SCL I2C master master I2C SCL ICR[FM] 來 17-7

8 料理 I2C 料 IDBRI2C SlaveISAR 理料 slave IDBR 見 I2C 料 IDBR 料 7slaveR/nW ISAR 理 slave I2C 料 IDBR 了料 CPU IDBRICR[TB] I2C 列流見 I2C ICR I2C master slave 1. 流料 IDBRISR[ITE] master 料 2. ICR[TB]I2C IDBR 料 3. 流 IDBR 4. I2CCPUIDBR STOP 狀 I2C 狀 CPUIDBR ICR[TB] I2C master slave 1. IDBR 理流讀 IDBR 料 2. I2C 料 IDBR 3. I2C 狀 IDBR 讀參 I2C 4. CPU 讀 IDBR I2CICR[ACKNAK] ICR[TB] 料 Slave master I2C slaver/nw slave R/nW IDBR 見

9 17-4 Master 料 slave ACK I2Cmasterslave 留 slave 讀 I2C ACK 立 master slave slave NAKI2CSTOP ISR[BED] 來 I2Cslave 流 START STARTI2C 讀 ISAR 0x00 ISAR I2C 讀 R/nWACK I2C 不 slaver/nw = 0slaveR/nW = 1 見 I2C I2C masterslave SDA 見

10 17-5 I2C 流 masterslave SDA NAK I2CISR[BED] 聯 I2C 狀 masteri2c NAK 來 slave 料 ICR[ACKNAK]I2C 流 ACK/NAK I2C 流 ISR[BED] 不 masternak I2C ACK 列流 ICR[ACKNAK] 1 NAKNAK slavei2cslave 不 ICR[ACKNAK] slave ACK 料來不 ICR[ACKNAK]I2CACK 料 slavei2c master NAK 來 masterstopstart ISR[UB] STOP START I2C 流 multi-masteri2c 流 master 留 START 狀 R/nW 17-10

11 料 I2C 流 master 流狀不料 R/nW 料不 master 狀來來料 I2CSDA SCL 來 ISR[ALD]slave SCL I2C 流 master 了 SCL 料不率連 SCL 料 I2C SCL 連 master master 聯行 SCL 見 17-6 不 master 行 masterscl 行 masters 狀 master master SCL 狀 masters 料 SDA SDA R/nW 料 17-7 master master 連流 masterr/nw 17-11

12 料 I2C 流 master 流狀不料 R/nW 料不 master 料來料 I2C SDA SCL 來 ISR[ALD] slave 17-7 Master I2C 不 I2C 流 IDBR ICR 不 I2C 流 master 理 slave I2C slave I2C 料料 master I2C slave I2C 不狀理 START STOP 狀 I2C 流了 I2C master 列 START 狀料料 STOP 狀 START 狀 STOP 狀不 master 料料 17-12

13 例 master 料 masteri2c 料 master 料 slave master 料 Master I2C 流行讀 I2Cslave master 7slave R/nWmaster I2C 列 master Master I2C 料 Master I2C 讀料 CPUICR 來 master 料 I2C 讀 17-5 說了 I2Cmaster I2C Master slave IDBR R/nW IDBR START 狀料 Master Master Master Master Master Master Master Master Master Master 17-5 Master MasterSCL ICR[SCLE] ICR[IUE] START 狀 CPU IDBR 7-1 START 流見 START STOP 流狀 CPU slave IDBR mastermaster master master 見料理見 IDBR slave R/nW 行. ICR[START] ICR[TB] 來狀見 START STOP 流狀 CPUIDBR ICR[TB]I2C I2CICR[TB] 17-13

14 I2C 流料 IDBR slaver IDBR 讀 I2C 料 Master Master Master Master Master ISR[ITE] master I2C slave R/nW 料 master 流料 I2CISR[ALD] slave I2C I2C 流 17.4I2C 流不 I2C master 料 ISR[ITE] ICR[TB] IDBR 理 CPU 料 IDBR START/STOPICR[TB] 來料列流 STOP master I2C I2CSDA 來 slave ACK 見 I2C I2C master 料列流讀讀 ICR[ACKNAK]IDBR ISR[IRF] ICR[TB]CPU 讀 IDBR IDBR CPU 讀 IDBRISR[ACKNAK] ACK 理 ICR[ACKNAK] ICR[TB] 來讀 ISR[ACKNAK]NAK ICR[TB] ICR[STOP] ISR[UB] 料讀 IDBR I2CSTOP ISR[ACKNAK]NAK ICR[TB]ICR[STOP] CPU1.ICR[START] 17-14

slave START 來 I2C STOP Master Master Master Master Master IDBRICR[TB] START 狀 2. ICR[MA] ICR[TB] STOP master I2C I2C ACKSDA 來料 CPU ICR[ACKNAK] 來 NAK 見 17.4.

15 slave START 來 I2C STOP Master Master Master Master Master IDBRICR[TB] START 狀 2. ICR[MA] ICR[TB] STOP master I2C I2C ACKSDA 來料 CPU ICR[ACKNAK] 來 NAK 見 I2C 串料 START 狀來 STOP 狀料流 CPU slave R/nW IDBR ICR[START] ICR[TB] 見 START STOP 流狀 CPU 流料 CPUICR[STOP] 來 STOP 狀見 START STOP 流狀 CPU 讀料 I2C slave master 來 R/nW ACK ACK I2C master slave 來讀料見 17-8 I2C 例 master master 17-8 MasterSlave 讀 17-15

17-9 MasterSlave /START/MasterSlave 17-10 料 17.4.

16 17-9 MasterSlave /START/MasterSlave 料 Slave 17-6I2C slave I2C Slave Slave Slave 17-6 Slave I2Cslave ICR[IUE] I2C 流 START 狀 START 讀 ISAR 7 0x00 I2C ACK 都零 ICR[GCD] ISR[GCAD] ISR[SAD] 都見 R/nW I2C 留 slaveisr[sad] 17-16

17 Slave IDBR 讀 I2C 料 master I2C 料 IDBR master Slave Slave Slave Slave Slave Slave R/nW I2C slave ISR[SAD] I2C 理理識 ISAR 讀 ISR[GCAD] slave I2C slave 料列流讀 ACK/NAK IDBR ISR[IRF] ICR[TB]IDBR CPU IDBR 讀料讀 IDBR 理 ICR[ACKNAK] ICR[TB] I2C 狀 master slave I2C SCLSDA 來 ACK ICR[ACKNAK]I2C ACK 料見 I2C I2C slave 料 ISR[ITE] ICR[TB] IDBR 來理理料 IDBR ICR[TB] 來 slave I2CSDA 來 master 降來見 I2C I2C 例 master slave 17-17

18 17-11 MasterSlave Master 讀 Slave Master 讀 Slave MasterSlave 17-18

17.4.7 slave0x00 來行來料留 slave 略流來不不 ACK master 17-14B 17-7 B=0 I2C I2C 流 I2C ICR[GCD] 來 I2Cslave 來

19 slave0x00 來行來料留 slave 略流來不不 ACK master 17-14B 17-7 B=0 I2C I2C 流 I2C ICR[GCD] 來 I2Cslave 來 ICR[GCD] I2C 流狀 I2C slaveicr[gcd] ISR[GCAD] ISR[SAD] 理 I2CICR[GCD] 略 B x06 2 slave 0 0x04 2 slave 17-19

20 0 0x00 不不略 I2C 不碌 I2C 流了 ISAR I2C 狀 ISAR 不. B=1 I2C 不參 The I2C-Bus Specification I2C 10 CBUS 不 17.5 Slave 例 ISARslave 2. ICR 3. ICR[IUE] 來 I2C n Slave 1. Slave 讀 ISR:Slave 1 碌 1 R/nW 1ACK/NAK ISR[SAD] 來 IDBR 料來 5. ICR[TB] 6. IDBR 讀 ISR:IDBR 1ACK/NAK 0 R/nW 0 7. IDBR 料來 8. ICR[TB] 9. 1 ISR[ITE] 來 n-1slave 都料 I2CSCL 料 12. IDBR 讀 ISR:IDBR 1ACK/NAK 1 R/nW

21 13. 1 ISR[ITE] 來 Slave 讀 ISR: 碌 0Slave ISR[SSD] 來讀 n Slave 1. Slave 讀 ISR:Slave 1 碌 1R/nW ISR[SAD] 來 ICR[TB] 來 5. IDBR 讀 ISR: IDBR 1ACK/NAK 0 R/nW 0 6. 讀 IDBR 來 7. 1 ISR[IRF] 來 n-1idbri2c SCL 讀料 10. ICR[TB] 來 I2C 流 11. Slave 讀 ISR: 碌 0Slave ISR[SSD] 來 17.6 Master 例 ISARslave 2. ICR 不 3. ICR[IUE] ICR[SCLE] 來 I2C SCL Master 1. IDBRslave R/nW R/nW0 2. ICR[START] ICR[STOP] ICR[ALDIE] ICR[TB] 3. IDBR 讀 ISR:IDBR 1 碌 1 R/nW ISR[ITE] 來 17-21

22 5. 1 ISR[ALD] master 流行不 6. IDBR 料 7. ICR[START] ICR[STOP] ICR[ALDIE] ICR[TB] 8. IDBR STOP 讀 ISR:IDBR 1 碌 xr/nw ISR[ITE] 來 10. ICR[STOP] 讀 1 Master 1. IDBRslave R/nW R/nW 讀 1 2. ICR[START] ICR[STOP] ICR[ALDIE] ICR[TB] 3. IDBR 讀 ISR: IDBR 1 碌 1 R/nW ISR[ITE] 來 5. 讀 ICR[START] ICR[STOP] ICR[ALDIE] ICR[ACKNAK] ICR[TB] 6. IDBR STOP 讀 ISR: IDBR 1 碌 xr/nw 1ACK/NAK ISR[IRF] 來 8. 讀 IDBR 料 9. ICR[STOP] ICR[ACKNAK] START 讀 1 Master 1. IDBRslave R/nW R/nW0 2. ICR[START] ICR[STOP] ICR[ALDIE] ICR[TB] 3. IDBR 讀 ISR:IDBR 1 碌 1 R/nW ISR[ITE] 來 5. IDBR 料來 6. ICR[START] ICR[STOP] ICR[ALDIE] ICR[TB] 7. IDBR 讀 ISR:IDBR 1 碌 1 R/nW ISR[ITE] 來 IDBRslave R/nW R/nW 讀 START master ICR[START] ICR[STOP] 17-22

23 ICR[ALDIE] ICR[TB] 12. IDBR 讀 ISR:IDBR 1 碌 1 R/nW ISR[ITE] 來 14. 讀 ICR[START] ICR[STOP] ICR[ALDIE] ICR[ACKNAK] ICR[TB] 15. IDBR STOP 讀 ISR:IDBR 1 碌 xr/nw 1ACK/NAK ISR[IRF] 來 17. 讀 IDBR 料 18. ICR[STOP] ICR[ACKNAK] 讀 2 Master STOP 1. IDBRslave R/nW R/nW 讀 1 2. ICR[START] ICR[STOP] ICR[ALDIE] ICR[TB] 3. IDBR 讀 ISR: IDBR 1 碌 1 R/nW ISR[ITE] 來 5. 讀 ICR[START] ICR[STOP] ICR[ALDIE] ICR[ACKNAK] ICR[TB] 6. IDBR 讀 ISR: IDBR 1 碌 1 R/nW 1ACK/NAK ISR[IRF] 來 8. 讀 IDBR 料 9. ICR[STOP] ICR[ACKNAK] 10. 讀 ICR[START] ICR[STOP] ICR[ALDIE] ICR[ACKNAK] ICR[TB] ICR[STOP]STOP START 讀 11. IDBR 讀 ISR:IDBR 1 碌 1 R/nW 1ACK/NAK ISR[IRF] 來 13. 讀 IDBR 料 14. 狀 STOP 料 ICR[MA] NAK11 料讀 17-23

24 17.7 邏 I2C 邏來 60ns 50ns 17.8 I2C 不碌 I2C 流了 ISAR I2C 狀 ISAR 不 ICR[UR]I2C 聯 I2C MMRs 不 ICR 來 I2C 列 1. ICR 2. ISR 3. ICR 聯 I2C 理 17-8 I2C 0x IBMR I2C 流 IBMR 0x IDBR I2C 料 IDBR 0x ICR I2C ICR 0x ISR I2C 狀 0x A0 ISAR I2CSlave ISAR 17-24

17.9.1 I2C 流 IBMR I2C 流 IBMR SCL SDA 狀錄讀 IBMR I2C 流 I2C 17-9 I2C 流 IBMR 31:2 Reserved 留 1 SCLS SCL 狀 SCL 0 SDAS SDA 狀 SDA 17.9.2 I2C 料 IDBR 理 I2C 料 I2C 流來料 IDBRI/O I2C 來 IDBR I2C 料理 I2C 料 IDBR 列

25 I2C 流 IBMR I2C 流 IBMR SCL SDA 狀錄讀 IBMR I2C 流 I2C 17-9 I2C 流 IBMR 31:2 Reserved 留 1 SCLS SCL 狀 SCL 0 SDAS SDA 狀 SDA I2C 料 IDBR 理 I2C 料 I2C 流來料 IDBRI/O I2C 來 IDBR I2C 料理 I2C 料 IDBR 列流 I2Cmaster slave 理流料 IDBRmasterIDBR 來理料 IDBR 料 IDBR I2C 流 IDBR 來 IDBR I2C 流理狀 I2C 狀理 IDBR I2C master slave 理流讀 IDBR 料 IDBR 理 IDBR 讀料 ACK 料 IDBR I2C 狀讀 IDBR 參 I2C 更理讀 IDBR ACK/NAK 來 I2C 流 IDBR0x

17-10 I2C 料 IDBR 31:8 Reserved 留 7:0 IDB I2C 料 I2C 流 / 料 17.9.

1 = 400 / 14 UR 0 = 不 1 = I2C 13 SADIE Slave 0 = 1 = I2C 來理 slave 12

26 17-10 I2C 料 IDBR 31:8 Reserved 留 7:0 IDB I2C 料 I2C 流 / 料 I2C ICR 理 I2CICR 來 I2C I2C ICR 31:16 Reserved 留 15 FM 度 0 = 100 / 1 = 400 / 14 UR 0 = 不 1 = I2C 13 SADIE Slave 0 = 1 = I2C 來理 slave 12 ALDIE 0 = 1 = I2C 來理 master 11 SSDIE Slave 0 = 1 = I2C 來理 slave STOP 狀 10 BEIE 流 17-26

27 9 IRFIE 8 ITEIE 7 GCD 6 IUE 5 SCLE 4 MA 3 TB 0 = 1 = 列 I2C 流 I2C 來理 masterack slave I2CNAK START STOP 狀不見 17.7 邏 IDBR 0 = 1 = IDBR I2C 流料 I2C 來理 IDBR 0 = 1 = I2C 流 I2C 來理 0 = I2C 來 1 = I2Cslave 來 I2Cmaster I2C 0 = 不 master slave 1 = I2Cslave I2C 流 SCL 0 = SCL 來 I2C 1 = master I2C MasterI2C master 不料 0 = I2C STOP ICR 來 STOP 1 = I2CSTOP 料 master 料 ICR IDBR 料 master 來 STOP 03 master NAK STOP STOP ICR 理 START 來 STOP 03 I2C 流 / 0 = /I2C 1 = / 17-27

28 2 ACKNAK 1 STOP START 0 理來 master slave ACK/NAK I2CSCL 狀 ACK/NAK masteri2c ACK 0 = I2C 料 ACK 1 = I2C 料 ACK NAK I2CACK slave slave 不 ACK/NAK STOPmasterI2C 流料 STOP 狀 masterack/nak 見 STOP 狀 STOP 狀 0 = 不 STOP 1 = STOP START masterstart 狀 I2C 見 START 狀 START 狀 0 = 不 START 1 = START I2C 狀 ISRI2C 理 ISR 來 I2C 流狀 ISR 9-5I2C 流 ACK/NAK 更 ISR 列 I2C 來 IDBR IDBR Slave 流 STOP 狀 17-28

17-12 I2C 狀 ISR 31:11 Reserved 留 10 BED 流 0 = 1 = I2C 列 master ACK slave I2CNAK I2C 流 START STOP 狀不見 17.4.

29 17-12 I2C 狀 ISR 31:11 Reserved 留 10 BED 流 0 = 1 = I2C 列 master ACK slave I2CNAK I2C 流 START STOP 狀不見來 9 SAD Slave 0 = slave 1 = I2C 7ISAR SADIE 1 1 來 8 GCAD 0 = 1 = I2C 7 IRF IDBR 0 = IDBR 料 I2C 1 = IDBRI2C 流料 IRFIE 1 1 來 6 ITE IDBR 0 = 料 1 = I2C I2C 流料 ITEIE 1 1 來 5 ALD multi-master 0 = 1 = I2C 1 來 4 SSD Slave 0 = 17-29

30 3 IBB 2 UB 1 ACKNA K 0 RWM 1 = slaveslavei2c 1 來 I2C 流碌 0 = I2C 流 I2C 流碌 1 = I2C 流碌 I2C 行碌 0 = I2C 不碌 1 = I2C 碌 START STOP ACK/NAK 狀 0 = I2C 流 ACK 1 = I2C NAK slave 來 ACK/NAK 更讀 / 0 = I2C master slave 1 = I2C master slave slave R/nW 狀 I2C Slave ISAR ISAR 見了 I2C 7slaveslave 7 裡理理 I2CISAR I2C 了 I2C slave 理 ISAR 不 ISAR I2C Slave ISAR 31:7 Reserved 留 I2C Slave slave I2C7 6:0 ISA 17-30

31 1. I2C 什 2. 連 I2C 理不來 3. 連 I2C 兩不 4. I2C 來料 5. Slave 6. I2C 7. Master 料理 8. I2C 列料 MSB(Most Significant Bit)LSB(Lease Significant Bit)? 理 10. Slave 讀? 11. IC 路 17-31

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