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隙争霍
7 years ago
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1 論年來路路量更力 Wafer fabrication 金 IC design Wafer manufacture Photo mask 更 Back-end processes IC Packaging Testing Assembly Lead-frame manufacture 連 Connector manufacture 路 Board manufacture 了 IC IC design Wafer manufacture CRYSTAL GROWTH 煉 Silica Silicate 金爐煉金金度 23-1

Lead-frame manufacture 連 Connector manufacture 路 Board manufacture 了

2 第二十三章半導體製造概論可達 % 但是結晶方式還是很雜亂又稱為多晶矽必須重排成單晶結構才可因此再將電子級矽置入坩堝內加溫融化其係先將溫度降低至一設定點再以一塊單晶矽為晶種置入坩堝內讓融化的矽沾附在晶種上再將晶種以邊拉邊旋轉方式抽離坩堝而沾附在晶種上的矽亦隨之冷凝形成與晶種相同排列的結晶隨著晶種的旋轉上升沾附的矽愈多並且被拉引成表面粗糙的圓柱狀結晶棒其中拉引及旋轉的速度愈慢則沾附的矽結晶時間愈久結晶棒的直徑愈大反之則愈小右圖摘自中德公司目錄為中德電子材料公司製作的晶棒長度達一公尺重量超過一百公斤二切片 SLICING 從坩堝中拉出的晶柱表面並不平整必須經過工業級鑽石磨具的加工磨成平滑的圓柱並切除頭尾兩端錐狀段形成標準的圓柱被切除或磨削的部份則回收重新冶煉接著再以高硬度鋸片或線鋸將圓柱切成片狀的晶圓 Wafer 摘自中德公司目錄三邊緣研磨 EDGE GRINDING 將片狀晶圓的圓周邊緣以磨具研磨成光滑的圓弧形如此可 1 防止邊緣崩裂 2 防止在後續的製程中產生熱應力集中 3 增加未來製程中鋪設光阻層或磊晶層的平坦度四研磨 LAPPING 與蝕刻 ETCHING 由於受過機械的切削晶圚表面粗糙凹凸不平及沾附切屑或污漬因此先以化學溶液 HF/HNO3 蝕刻 Etching 去除部份切削痕跡再經去離子純水沖洗吹乾後進行表面研磨拋光使晶圓像鏡面樣平滑以利後續製程研磨拋光是以機械與化學加工方式同時進行機械加工是將晶圓放置在研磨機內將加工面壓貼在研磨墊 Polishing Pad 磨擦同時滴入具腐蝕性的化學溶劑當研磨液讓磨削與腐蝕同時產生研磨後的晶圓需用化學溶劑清除表面殘留的金屬碎屑或有機雜質再以去離子純 23-2

拉引及旋轉的速度愈慢則沾附的矽結晶時間愈久結晶棒的直徑愈大反之則愈小右圖摘自中德公司目錄為中德電子材料公司製作的晶棒長度達一公尺重量超過一百公斤二切片 SLICING 從坩堝中拉出的晶柱表面並不平整必須經過工業級鑽石磨具的加工磨成平滑的圓柱並切除頭尾兩端錐狀段形成標準的圓柱被切除或磨削的部份則回收重新冶煉接著再以高硬度鋸片或線鋸將圓柱切成片狀的晶圓

3 路 ANNEALING 六 POLISHING 滑利來 CLEANING 度度理行狀 INSPECTION 行度度 PACKING 狀理理 Cleaning 爐 Furnace Oxidation 數 SiO Si N 3 4 沈 Chemical Vapor Deposition CVP 沈 Deposition 行 Lithography Photo resist 利 Etching 留路離 Ion Source 行 Ion Implantation Photo resist Scrip 行路 Word Lines 23-3

Chemical Vapor Deposition CVP 沈 Deposition 行 Lithography Photo resist 利

4 立行金 Metallization 金便連都行理量 Inspection and Measurement 路量 FAB 利路易路不不不利來都行利量都爐爐爐都不都來沈離 Wafer 流識量異異不 Wafer Probe 理 WAT wafer accept test 來 23-4

5 Chip Probing CP Test IC 行濾不良不良不便 Tester 了率了流流類 Sorting 粒路連不良若不良識良率良率來良率切若良率雷 Laser Repairing 雷復不良路良率路料雷料不良路雷料不良復 Baking 流粒理便 23-5

6 electronic packaging 連例 wafer IC 粒 die 立離 IC 量益了不 IC 不力路力路連 IC 路連路料路量 IC IC 易了度了精路 IC 了 IC 了便 IC 料 ceramic plastic 兩例切 die saw die mount die bond wire bond mold 切 trim form mark plating inspection 說切 die saw 切粒 Die 切離 blue tape wafer mount 切行切切粒列粒便 23-6

die saw die mount die bond wire bond mold 切 trim form mark plating

7 wafer mount blue tape die mount / die bond 離粒 lead frame epoxy 粒粒 die pad IC 粒路 inner lead/outer lead 不數粒數粒列列粒粒粒切粒粒 magazine lead frame 了粒 IC 粒路不數粒 23-7

8 wire bond 粒金 18~50um 連 IC 粒路理來粒粒金 first bond 路拉金金 second bond 拉金金便金粒 30µØ 金 mold 數行 mold press 料粒 23-8

9 串聯 Mark 良令 IC 不裂列 pad print 雷 laser mark 雷了不易落 IC 料來牢六切 trim form deflash plating 行切切 23-9

10 粒立不連料切 dejunk 切立粒狀便路連切兩 trim / dejunk, form / singular 連 IC 便 tube tray 便切六 Inspection 度六 IC 路連料 plastic ceramic 兩廉量 IC 年歷不易不量力度數率度 CPU 數 Wire Bonding 23-10

11 金路連年來例易便來不易 Tape Automated Bonding, TAB 1960 年 GE 金路連料 polyimide 金度數量 IC Flip Chip IBM 1960 年粒金料粒料粒連度度 IC 來力 surface mount technology 零連便零零路 I/O 數 IC 兩 23-11

12 類 Pin Through Hole ; PTH 利 IC 路連 surface mount technology 零連便零零路 DIP PDIP SK-DIP SO LCC QFP Others BGA TAB 邏 IC 邏 IC LCD SOP TSOP SSOP SOJ LCC TQFP LQFP BGA TAB F/C DIP=Dual in-line package SO=Small outline QFP=Quad flat package BGA=Ball grid array TAB=Tape-automated bonging LCC=Leaded chip carrier 見 DIP SK-DIP SIP SO QFP BGA 見見見 Single In-Line Package SIP Dual In-Line Package DIP Zig-Zag In-Line Package ZIP Small Outline Package SOP Plastic Leaded Chip Carrier PLCC Power Transistor SRAM, ROM, EPROM, EEPROM, FLASH, Microcontroller DRAM, SRAM Linear, Logic, DRAM, SRAM 256K DRAM, ROM, SRAM, EPROM, EEPROM, FLASH, Microcontroller 23-12

SIP SO QFP BGA 見見見 Single In-Line Package SIP Dual In-Line Package DIP Zig-Zag In-Line Package ZIP Small Outline Package SOP Plastic Leaded Chip Carrier PLCC

13 Small Outline Package SOJ Quad Flat Package QFP Pin Grid Array PGA DRAM, SRAM, EPROM, EEPROM, FLASH Microprocessor Microprocessor DIP Dual In-Line Package IC 兩利 IC 路料 Plastic Ceramic PDIP CDIP 64 利 SOP Small Outline Package SOIC Small Outline Integrated Circuit DIP 數 LCC QFP SO 列 TSOP Thin Small Outline Package TSSOP Thin-Shrink Small Outline Package SSOP Shrink Small Outline Package SOJ Small Outline J-Lead QSOP Quarter-Size Small Outline Package MSOP Miniature Small Outline Package LCC Leaded/Leadless Chip Carrier 不 DIP SO IC 兩 IC 數兩來數 20 ~96 不兩裡不 J J-Lead QFJ Quat Flat J-Lead Package PGA Pin Grid Array 狀 DIP 路連不便 QFP PGA IC QFP QFP Quad Flat Package 23-13

Small Outline Package SSOP Shrink Small Outline Package SOJ Small Outline J-Lead QSOP Quarter-Size Small Outline Package MSOP Miniature Small Outline Package LCC

14 QFP 數了 ASIC 邏 IC 見 QFP MQFP Metric QFP MQUAD Metal QFP TQFP Thin QFP 不 IC I/O 數量邏 SO DIP ROM FLASH SO DIP LCC DRAM SO Microcompoent MPU MCU MPR PGA QFP LOGIC N.V.MEMORY DRAM SRAM MICROCOMPONENT DIP 37% 36% 0% 55.8% 13% SO 52% 61.3% 96.5% 33.3% 24% LCC 6% 21.8% 3.5% 7.1% 20% PGA 0.16% 0% 0% 0% 3% QFP 5% 0% 0% 3.6% 40% BGA 0.14% 0% 0% 0.3% 0.37% 100% 100% 100% 100% 100% IC IC 類 Bin IC 不 Inspect 參數行不不不不了 mark 度 mold 諸流流 23-14

8% 13% SO 52% 61.3% 96.5% 33.3% 24% LCC 6% 21.8% 3.5% 7.1% 20% PGA 0.16% 0% 0% 0% 3% QFP 5% 0% 0% 3.

15 料料來數量不利 Tester 類 Handler 料 FT1 FT2 FT3 料來類邏 IC IC IC 邏路類路 Test Program 來類力不來說了 1 類 Handler 23-15

16 行 Test Head 類類來類 Bin 類度類降降不 Handler 不 Test Head 數類類連連行理理類類不行不 2 Test Program 都不 FT1 FT2 FT3 都不不不力 3 連數不類 Hi-Fix 類 Fixture Board 邏類 Load Board 邏類 Adopt Board + DUT Board 邏類 Socket 數不數不邏 FT2 不 FT1 FT3 IC 度不度度度數降什度不不不 23-16

Hi-Fix 類 Fixture Board 邏類 Load Board 邏類 Adopt Board + DUT Board

17 都若不 Hold 爐 Burn-In Oven IC FT1 都爐裡 Burn In 流 Burn In 來 Burn In 96 Burn In 理流爐 Burn In Burn-In Board Burn In Socket.. 都 QC Q 數量度都不若不.. Hold Mark Scan 利 Mark Mark 度度.. 六 IC 度利雷來行利力來行復利行 23-17

18 Baking 流爐行不 Packing 來類 IC 理不 Door to Door 便 23-18

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論諸零易量零路車行不年行行年行金行年率流率行論識不易年行年行兩不兩兩行便了識易度行流識年金量更不良不便良不不行度參度度參臨數益數來行行流識率若例量度立行參行識不易料料類料論年流率益行料來度度利度度年料料