An easy-to-use FET DRO design procedure suited to most CAD programs - Microwave Symposium Digest, 1989., IEEE MTT-S International

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1 KK-5 AN EASY-TO-USE FET DRO DESGN PROCEDURE SUTED TO MOST CAD PROGRAMS Philip G Wilson and Richard D Carver British Telecom Research Laboratories Martlesham Heath PSWCH PS 7RE UK ABSTRACT A design procedure for a reflection stabilised dielectric resonator oscillator (DRO) is given that takes advantage of the facilities available from most linear microwave CAD programs, hence streamlining and simplifying the task GHz MESFET hybrid DROs were designed using this method. These DROs gave an average output power of +3dBm, with +/-2MHz stability from -20 to +4OoC and -75dBc/Hz phase noise at 10 khz from carrier. NTRODUCTON A 27.61GHz FET DRO was required as the local oscillator in a receiver downconverter [], to have an output power =-+3dBm, a high frequency stability and low phase noise, and yet have the potential for low cost. At the start of the design the authors found the oscillator discussions in reference books to be rather general and not fully exploiting the benefits of CAD. Recently, interesting papers [e.g., 2,3] have been published concerning the use of CAD as an aid to oscillator circuit design, including optimisation. However, these techniques use specialised programs, not available to the authors during our design, and are probably not yet commonplace within other microwave design facilities. The design approach given here does not involve the same rigorous optimisation as described in [2,3], but allows working oscillators to be designed successfully in a very short time, using a linear analysis software tool of the type found in most microwave laboratories. Additionally, advantage is taken of the speed, number-crunchmg power and user interface (especially tables of results and Smith charts) provided by these commercial microwave CAD programs, so giving a fast turnaround time and adding an extra dimension of insight into important aspects such as the stability of oscillations. This easy to understand procedure for designing reflection stabilised oscillators does not require any complicated formulae or mapping, and is applied here to a series feedback reflection stabilised DRO at 27.61GHz. This oscillator type was chosen for several good reasons: DR feedback stabilisation may be too lossy at this frequency to promote oscillation; absorption or transmission oscillators give lower output powers due to the loss in the resonator on the output; and the reflection oscillator has superior frequency stability and pulling performance due to the isolation of the frequency determining element from the output. Another consideration is that easily obtainable 2-port S-parameters can be used without the added complexity of converting to 3-port S-parameters, sometimes required for parallel feedback. MODELLNG Firstly, this design procedure is followed using a small-signal model for the FET. This allows the circuit to be designed to ensure start-up and stable oscillations, and also allows the oscillation frequency, F, to be set approximately. The device chosen was an NE67300 chip MESFET with a 0.3 micron gate length. As S-parameters for this were not available at 27.61GHz, measurements were made to 20GHz, and the equivalent circuit model fitted to these was used to generate an S-parameter data file for the higher frequency range. Measurements must be carried out at the dc bias point chosen for the oscillator, not taken from data sheets. There are advantages to be gained from additionally deriving a non-linear FET model: 1) The S-parameter dependence on bias can be observed, so that the optimum bias can be estimated. 2) The model can be incorporated into a non-linear simulation program. 3) Amplitude dependent S parameters can be obtained. After the circuit is designed using small signal S-parameters, these large-signal S-parameters may be used in the design procedure to refine certain aspects such as maximum negative resistance and the correct Fmc. Five stages were involved in obtaining a large-signal model and consequently the large signal S-parameters: 1) measure the FET S-parameters at six bias points, 2) derive a non linear FET model using the non-linear equivalent circuit modelling program SOPnM 141, 3) incorporate this user model into the time domain simulation program ANAMC [4], 4) run ANAMC with large amplitude sinewaves applied to the FET, biased realistically, in a certain sequence, and 5) carry out a Fourier analysis on the input and output waveforms and derive S-parameters from the fundamental frequency components. resonator with feedback Figure 1. Oscillator model 1033 CH2725-0/89/ $01.OO EEE 1989 EEE M'T-S Digest

2 DESGN PROCEDURE The block schematic of a reflection stabilised oscillator is shown in Figure 1. Steps 1 to 7 below make use of any linear CAD program such as TOUCHSTONETM. Step 1) Design the 'FET with feedback' sub-circuit shown in Figure 1. Feedback is applied to the FET, and optimised for maximum negative resistance, Rfec Step 2) Plot the input and output stability circles of this block at F,. rr and ZOlp must lie in the potentially unstable areas on the Smith chart to obtain negative resistance at both ports.... Rule Step 3) Design a resonator circuit with 1, according to rule 1. 1 For start-up... Rule 2 and arg (r,) = arg [ $1... Rule 3 Therefore, if the resonator has a high Q, it will control the oscillator frequency. After start-up Win will increase until UTin = rr. lrrl should be as high as possible. Step 4) Design the output matchmg circuit to transform R, to Zo,p given by:... Rule 4 After start-up the negative resistance Rfet will decrease until Rfet = -ROip. Rule 4 gives maximum power transfer to the load assuming that the magnitude of the negative conductance decreases' linearly with increasing amplitude [5]. This approximation has been found to give good results in practice. Step 5) UTin changes with ZdP, so it is now necessary to iteratively repeat steps 3) and 4) a few times until Rules 1 to 4 are met simultaneously. This simply involves using the 'tune' facility to adjust the resonator and output circuit. Step 6) Test for oscillator stability at frequencies close to Fa,, [6] by displaying Win and rr on a Smith chart. l/rin(q and rr(q should pass in opposite directions on the Smith chart, to ensure that the above conditions for oscillation apply at only one spot frequency.... Rule 5 Step 7) Check that the oscillation conditions do not occur at any frequency other than Fm, from near DC to as high in frequency as the simulator can be trusted, in order to complete this stability analysis. This is best done by checking through a table of reflection coefficients and impedances.... Rule 6 Step 8) (Optional) f a non-linear model has been derived, then the oscillator can be simulated by a non-linear analysis program. This checks frequency and output power. t is also possible to use such a program to plot the predicted UTin dependency upon amplitude and identify the angle of intersection between l/rin(v,f) and r,(q on the Smith chart. This should be 90' to minimise AM to PM noise conversion [6]. Although this is computationally intensive, it is more practical than measurements at 27.61GHz. PRACTCAL DESGN EXAMPLE The circuit of the series feedback reflection stabilised DRO is shown in Figure 2. The following are the steps taken to design this circuit: Step 1) The model of the FET is in the form of an S-parameter data file, and series feedback is added by a reactance in the common (source) lead. This is provided in this case by the source bias filter, and at this step the length 'a' is optimised. 50Q dielectric resonator coupled to microstrip line m a mm NE673 k Vd "/4 coupled microstrip v, Figure 2. Circuit of DRO 1034

3 Step 2) The stability circles of the FET with feedback are plotted in Figure 3. The shaded region represents stability, so Zo,p and rr must lie between the stability circles and the perimeter of the Smith chart. Step 3) The dielectric resonator, DR, coupled to a microstrip line is modelled by a parallel LCR circuit in series with the matched gate line. The unloaded Q and the coupling are chosen to meet Rule 2, and the length b adjusted to meet Rule 3. Step 4) The output circuit is designed to meet Rule 4 by optimising lengths c and d. Step 6) Figure 4 shows a plot of UTin and rr from 25GHz to 29GHz. t can be seen that the trajectories are opposite and parallel in the region of F,,, - the ideal situation. Step 7) Figure 5 shows the results table produced by TOUCHSTONETM. t can be seen that rules 1-4 are met at 27.61GHz. but not at any other frequency, hence stable oscillations are predicted. The circuit is fabricated in microstrip on an alumina substrate and includes a thin-film nichrome 50n resistor, R,. A photograph of the assembled oscillator is shown in Figure 6. The dielectric resonator is fabricated from Murata U-type material with a dielectric constant of The required temperature coefficient, Tf, of the DR was identified by temperature cycling the DRO with a Oppm/OC DR. The oscillator then exhibited a drift of -1Oppml C. The DRO was temperature cycled in a test Fire with two different DRs of Tf = +4~pm/~C and +8p~m/~C, respectively. The results are shown in Figure 7. The DRO fitted with the DR of Tf = +8ppm/ C exhibited a frequency drift within +/-OSMHz from -20 to +4OoC and was therefore chosen for the final version., S1 NPUT + S1 NVERSE =r Figure 3. Stability circles at the FET gate and drain ports, with feedback fl: f Figure 4. Plot of -and r, near F, rl =r.ooooo oooo oooo e ,- rule 2 -, film1 ( oJ rule 31 rule Figure 5. DRO equivalent circuit and TOUCHSTONE printout 1035

4 A % Figure 6. Photograph of hybrid DRO khz from carrier of the method lies in its simplicity, speed and intuitive feel. n order to take greater advantage of the FET saturated output RESULTS Eight DROs have been made, and Figure 8 shows the range of powers obtained. Typical output power is in excess of +3dBm. Phase noise is -7SdBclHz at 1OkHz off-carrier, as shown in Figure 9. When placed in the receiver housing the frequency stability was an acceptable +/-2MHz from -20 to +40 'C. Acknowledgement is made to the Director of Research and Technology of British Telecom for permission to publish this paper. REFERENCES [1] P.G. Wilson and B.C. Barnes, "Millimetre-wave Downconverter using Monolithic Technology for High Volume Application", EEE MTT-S nternational Microwave Symposium Digest, [2] TJ. Brazil and J.O. Scanlon, "A non-linear design and optimisation procedure for GaAs MESFET oscillators", EEE MTT-S nternational Microwave Symposium Digest, pp , [3] V. Rizzoli, A. Neri and A. Costanzo, "Microwave oscillator design by state of the art non-linear CAD techniques", 18th European Microwave Conference, pp , [4] ANAMC and SOPTM, Sobhy and Jastrzebski Microwave Consultants. power, dbm Q GHz Figure 8. Powers obtained from 8 oscillators 1036 [S G. Gonzalez, "Microwave Transistor Amplifiers", Prentice Hall, p196, [6] J.W. Bowles, "The Oscillator as a Reflection Amplifier: an intuitive approach to oscillator Design", Microwave Journal, p83-98, June 1986.

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