Quanta LX6, LX7 - Schematics.

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1 P STK UP L is. LYER : TOP LYER : SGN LYER : IN(High) LYER : IN(Low) LYER : SV LYER : OT R III SMR_VTERM and GPU.V/.V(RTG) PGE TTERY SELETOR PGE SYSTEM HRGER(P) PGE R-SOIMM LX/ (Liverpool) LOK IGRM PGE R-SOIMM PGE ST - st H PGE ST - nd H PGE ST - -ROM PGE E-ST/US Port () PGE ccelerometer HPLTR PGE SPI ROM PGE R,, MT/s R,, MT/s ST M/s ST M/s ST M/s ST M/s SMUS MI*.KHz Intel larksfield rrandale LP PU Watt Watt ore ( rpg ) LKM MIM PM PGE - PH.Watt Platform ontroller Hub PGE -.KHz PI-Express Gen X US. M VRM R* (Mb,Gb,Gb) PGE - M PIE M LK M PIE M OT REF LK TI Park XT (bit) Madison Pro (bit) (FG) p Xmm PGE - MHz LOK GEN LRS PGE Fingerprint US. Port luetooth Webcam w/ Mic US. Port PGE PGE PGE PGE ard Reader Form " PI-E M Realtek PGE zalia RTS X X half size PGE LN mini-card Realtek (Wireless LN udio PIE-LN Shirley Peak -in- flash media RTL().a/b/g/n) slot(s/ms/mm/ ITH PGE GigaLN PGE PGE X/MSP) PGE HMI RT LVS.MHz HMI ON (*) PGE RT LVS igpu HMI Mux PGE, L ONN for dual channel (.",") PGE US. Port X POWER LE H LE RT PGE ual hannel LVS Form " PGE HMI US. Port POWER LE H LE Form " PGE Touchscreen PGE HMI Level Shifter PGE SYSTEM POWER RT PGE.V_VTT and GPU.V/V(VT) PGE Keyboard Touch Pad Light Sensor PGE GMT GPU SYSTEM FN PGE ENE K K PGE mplifier TP PGE MHz RJ PGE VP.V/.V(RT) PGE IOS (SYSTEM IOS) PGE VGORE/VI(RT/RT) PGE PU ORE (P) PGE MI PGE udio Jack (Headphone/MI) PGE Jack to Speaker PGE Jack to Sub-Woofer PGE PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N LOK IGRM ustom ate: Tuesday, February,

2 m m V VORE_LK Y.V VIO_LK V VSE_LK L XTL_IN XTL_OUT V L L.U/.V_.U/V_.U/.V_ HKF-T_ HKF-T_.U/V_ HKF-T_.U/V_.U/V_.MHZ U/.V_S.U/V_.U/V_ *U/.V_S.U/V_ P/V_ P/V_ m R *K/F_ Place each.uf cap close to pin Place each.uf cap close to pin Place each.uf cap close to pin PU_SEL R K/F_ VSE_LK VORE_LK VIO_LK U V_L PU- V_REF PU-# V_US PU- V_SR PU-# V_PU V_PU_IO V_SR_IO LRS OTT_LPR OT_LPR LK_UF_LK_P_R LK_UF_LK_N_R LK_UF_REFLK_R LK_UF_REFLK#_R Place within." of /G RP _PR_ RP _PR_ LK_UF_LK_P LK_UF_LK_N LK_UF_REFLK LK_UF_REFLK# PU_SEL PU/=MHz (default) V PU/=MHz,,,, GT_SM,,,, GLK_SM V R K/F_ LK_IH_M LK_IH_M R _ PU_SEL *P/V_ K_PWRG_R Place R within." of /G XTL_OUT XTL_IN ST SR- SLK SR-# PU_STOP# ST REF_/PU_SEL ST# K_PWRG/P#_. MHz_nonSS MHz_SS XOUT XIN QFN GN VSS_ST VSS_REF VSS_US VSS_PU VSS_L VSS_SR LK_UF_PIE_GPLL_R LK_UF_PIE_GPLL#_R LK_UF_REFSSLK_R LK_UF_REFSSLK#_R LK_VG_M_NOSS LK_VG_M_SS RP _PR_ RP _PR_ R _ R _ FOR SG/IS LK_UF_PIE_GPLL LK_UF_PIE_GPLL# LK_UF_REFSSLK LK_UF_REFSSLK# LK_M_NONSS LK_M_SS VR_PWRG_LKEN# R K/F_ K_PWRG_R Q NE R K/F_ LRS.V,,,,,,.V, V,,,,,,,,,,,,,,,,,,,,,,,, HOLE PU H H *H-TP H H H-P H-P H H H *H-TP H GPU *H-TP H *H-TP H *H-TP *H-TP *H-TP *H-TP H H *H-TP H *H-TP H H *H-TP H H *H-TP H H *H-TP H *H-TP P P *H-TP *H-TP *H-TP *H-TP *pad-rexnp SP-REXNP *pad-rexnp SP-REXNP PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N lock Gen(LRS)/HOLES ustom ate: Tuesday, February,

3 R R U PEG_OMP R./F_ PEG_IOMPI PEG_IOMPO MI_TXN MI_RX#[] PEG_ROMPO MI_TXN PEG_RIS R /F_ MI_RX#[] PEG_RIS MI_TXN MI_RX#[] PEG_RX#[..] MI_TXN K PEG_RX# U MI_RX#[] PEG_RX#[] J PEG_RX# R /F_ H_OMP T PEG_RX#[] MI_TXP J PEG_RX# R /F_ H_OMP OMP T MI_RX[] PEG_RX#[] MI_TXP PEG_RX# R./F_ H_OMP OMP G G MI_RX[] PEG_RX#[] MI_TXP G PEG_RX# R./F_ H_OMP OMP MIS T MI_RX[] PEG_RX#[] PEG_RX# OMP MI_TXP F H MI_RX[] PEG_RX#[] PEG_RX# SKTO# F PEG_RX#[] MI_RXN PEG_RX# MI_TX#[] PEG_RX#[] MI_RXN G MI E PEG_RX# H_TERR# K MI_TX#[] PEG_RX#[] PEG_RX# TERR# MI_RXN F H_PEI T MI_TX#[] PEG_RX#[] PEG_RX# PEI MI_RXN H, H_PROHOT# N MI_TX#[] PEG_RX#[] PEG_RX# PROHOT# THERML, PM_THRMTRIP# K PEG_RX#[] MI_RXP PEG_RX# THERMTRIP# MI_TX[] PEG_RX#[] MI_RXP F PEG_RX# *.U/V_ MI_TX[] PEG_RX#[] MI_RXP E PEG_RX# MI_TX[] PEG_RX#[] T P MI_RXP PEG_RX# RESET_OS# G PM_SYN L MI_TX[] PEG_RX#[] PM_SYN PEG_RX[..] N PEG_RX VPWRGOO_ J H_PWRGOO N PEG_RX[].GT/s data rate PEG_RX VPWRGOO_ H PM_RM_PWRG K PEG_RX[] PEG_RX SM_RMPWROK FI_TXN[:] H FI_TXN PEG_RX[] E F PEG_RX FI_TXN FI_TX#[] PEG_RX[] T M PEG_RX TPPWRGOO G FI_TXN FI_TX#[] PEG_RX[] E PEG_RX H_VTTPWRG M FI_TXN FI_TX#[] PEG_RX[] PEG_RX,,,, PLTRST# PU_PLTRST# VTTPWRGOO F L FI_TXN FI_TX#[] PEG_RX[] G PEG_RX R.K/F_ RSTIN# FI_TXN FI_TX#[] PEG_RX[] E F PEG_RX FI_TXN FI_TX#[] PEG_RX[] F PEG_RX R /F_ FI_TXN FI_TX#[] PEG_RX[] PWR MNGEMENT G PEG_RX FI_TX#[] PEG_RX[] PEG_RX PEG_RX[] PEG_RX FI_TXP[:] FI_TXP PEG_RX[] PEG_RX FI_TXP FI_TX[] PEG_RX[] PEG_RX J FI_TXP FI_TX[] PEG_RX[] PEG_RX PM#[] K FI_TXP FI_TX[] PEG_RX[] PM#[] PEG_TX#[..] K FI_TXP FI_TX[] G L _PEG_TX#.U/V_ PEG_TX# PM#[] J FI_TXP FI_TX[] PEG_TX#[] E M _PEG_TX#.U/V_ PEG_TX# PM#[] J FI_TXP FI_TX[] PEG_TX#[] F M _PEG_TX#.U/V_ PEG_TX# PM#[] H FI_TXP FI_TX[] PEG_TX#[] G M _PEG_TX#.U/V_ PEG_TX# PM#[] K FI_TX[] PEG_TX#[] L _PEG_TX#.U/V_ PEG_TX# PM#[] H PEG_TX#[] _PEG_TX# PEG_TX# FI_FSYN F K.U/V_ PM#[] FI_FSYN[] PEG_TX#[] _PEG_TX# PEG_TX# FI_FSYN E M.U/V_ I,U_F_rPG,RP FI_FSYN[] PEG_TX#[] J _PEG_TX#.U/V_ PEG_TX# PEG_TX#[] FI_INT K _PEG_TX#.U/V_ PEG_TX# FI_INT PEG_TX#[] H _PEG_TX#.U/V_ PEG_TX# PEG_TX#[] _PEG_TX# PEG_TX# FI_LSYN F H.U/V_ FI_LSYN[] PEG_TX#[] _PEG_TX# PEG_TX# FI_LSYN F.U/V_ FI_LSYN[] PEG_TX#[] E _PEG_TX#.U/V_ PEG_TX# PEG_TX#[] _PEG_TX#.U/V_ PEG_TX# PEG_TX#[] _PEG_TX#.U/V_ PEG_TX# PEG_TX#[] _PEG_TX#.U/V_ PEG_TX# PEG_TX#[] PEG_TX[..] L _PEG_TX.U/V_ PEG_TX V PEG_TX[] M _PEG_TX.U/V_ PEG_TX PEG_TX[] M _PEG_TX.U/V_ PEG_TX U PEG_TX[] L _PEG_TX.U/V_ PEG_TX PEG_TX[] M _PEG_TX.U/V_ PEG_TX MVHGFTG R PEG_TX[] K _PEG_TX.U/V_ PEG_TX HWPG_ PEG_TX[] M _PEG_TX.U/V_ PEG_TX HWPG K/F_ PEG_TX[] H _PEG_TX.U/V_ PEG_TX PEG_TX[] K _PEG_TX.U/V_ PEG_TX PEG_TX[] G _PEG_TX.U/V_ PEG_TX PEG_TX[] G _PEG_TX.U/V_ PEG_TX PEG_TX[] F _PEG_TX.U/V_ PEG_TX PEG_TX[] E _PEG_TX.U/V_ PEG_TX PEG_TX[] _PEG_TX.U/V_ PEG_TX PEG_TX[] _PEG_TX.U/V_ PEG_TX PEG_TX[] _PEG_TX.U/V_ PEG_TX PEG_TX[] FOR IS ONLY K/F_ K/F_ R R R FI_FSYN can gang all these signals together and tie them with only one K resistor to GN ( heck list. ). *_ *_ *_ FI_INT FI_FSYN FI_FSYN FI_LSYN FI_LSYN Intel(R) FI I,U_F_rPG,RP PI EXPRESS -- GRPHIS FOR SG/IS MV Modify SI el R,R,R,R,R,Q,Q,Q,,,,,,.VSUS_L R *.K/F_ R *K/F_ HWPG MV hange U *MVHGFTG PM_RM_PWRG VS IS Ra Rb N ohm N Rc ohm N LOKS R MIS JTG & PM R *.K/F_ R.K/F_ R /F_ SM_RMRST# SM_ROMP[] SM_ROMP[] SM_ROMP[] H_VTTPWRG SI Modidy HWPG_ SG/UM ohm LK LK# LK_ITP LK_ITP# PEG_LK PEG_LK# PLL_REF_SSLK PLL_REF_SSLK# PM_EXT_TS#[] PM_EXT_TS#[] R K/F_ PRY# PREQ# TK TMS TRST# TI TO TI_M TO_M R# R T E F L M N N P T P N P T T R R P N LK_PIE_GPLL LK_PIE_GPLL# Rc R *_ REFSSLK_R Ra R _PR_ REFSSLK REFSSLK# Rb REFSSLK#_R R *_ R_RMRST#_ R_RMRST#_ SM_ROMP_ SM_ROMP_ SM_ROMP_ PM_EXT_TS# PM_EXT_TS# XP_PREQ# XP_TLK XP_TMS XP_TRST# XP_TI_R XP_TO_R XP_TI_M XP_TO_M LK_PU_LK LK_PU_LK# R R R R R R R XP_TO_R H_TERR# H_PROHOT# PU_PLTRST# XP_TMS XP_TI_R XP_PREQ# XP_TLK H_PROHOT# Scan hain (efault) PU Only GMH Only T T T T T T T T /F_./F_ /F_ K/J_ */short_ */short_ K/J_ XP_RESET# R R R R R R R R XP_TRST# /F_./F_./F_ */J_ */J_ */J_ */J_ */J_ P/V_.V_VTT PM_EXTTS# PM_EXTTS#,.V_VTT.V_VTT JTG MPPING R /F_ STUFF -> Ra, Rc, Re NO STUFF -> Rb, Rd STUFF -> Ra, Rb NO STUFF -> Rc, Rd, Re STUFF -> Rd, Re NO STUFF -> Ra, Rb, Rc MV dd V,,,,,,,,,,,,,,,,,,,,,,,,.V_VTT,,,,,,.VSUS_L, VS,,,, PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N PROESSER /(HOST&PEX) ustom ate: Tuesday, February,

4 UURNLE/LRKSFIEL PROESSOR (R) M Q[:] M Q M Q M Q M Q M Q M Q M Q E M Q M Q M Q F M Q E M Q F M Q E M Q M Q E M Q M Q H M Q G M Q K M Q J M Q G M Q G M Q J M Q J M Q L M Q M M Q M M Q L M Q L M Q K M Q N M Q P M Q H M Q F M Q K M Q K M Q F M Q G M Q J M Q J M Q J M Q J M Q L M Q K M Q K M Q L M Q K M Q L M Q N M QM M Q R M Q L M Q M M Q N M Q T M Q P M QM M Q N M QM M Q T M Q T M Q L M Q R M Q P U S_Q[] S_K[] S_Q[] S_K#[] S_Q[] S_KE[] S_Q[] S_Q[] S_K[] S_Q[] S_K#[] S_Q[] S_KE[] S_Q[] S_Q[] S_S#[] S_Q[] S_S#[] S_Q[] S_Q[] S_OT[] S_Q[] S_OT[] S_Q[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] R SYSTEM MEMORY P Y Y P E E F M M M M H M M M M M G M M M M M N M M N M M M QS# F M QS# J M QS# N M QS# H M QS# K M QS# P M QS# T M QS# M QS F M QS H M QS M M QS H M QS K M QS N M QS R M QS Y M W M M M V M M V M T M Y M U M M T M U M G M T M V M M LK M LK# M KE M LK M LK# M KE M S# M S# M OT M OT M M[:] M QS#[:] M QS[:] M [:] M Q[:] M signals are not present on larkfield processor. ll M signal can be left as N on larkfield and connect directly to GN on So-IMM side for larkfield design only M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q E F F F F G H G J J G G J J J K L M K K M N F G J K G G J H K K M N K K M M P N T N N N T T N P P T T P R T U S_Q[] S_K[] S_Q[] S_K#[] S_Q[] S_KE[] S_Q[] S_Q[] S_K[] S_Q[] S_K#[] S_Q[] S_KE[] S_Q[] S_Q[] S_S#[] S_Q[] S_S#[] S_Q[] S_Q[] S_OT[] S_Q[] S_OT[] S_Q[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_QS#[] S_Q[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_QS[] S_Q[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_M[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] S_Q[] R SYSTEM MEMORY W W M V V M M M E M M H M M K M M H M M L M M R M M T M M M QS# F M QS# J M QS# L M QS# H M QS# L M QS# R M QS# R M QS# M QS E M QS H M QS M M QS G M QS L M QS P M QS R M QS U M V M T M V M R M T M R M R M R M R M M P M R M F M P M N M M LK M LK# M KE M LK M LK# M KE M S# M S# M OT M OT M M[:] M signals are not present on larkfield processor. ll M signal can be left as N on larkfield and connect directly to GN on So-IMM side for larkfield design only M QS#[:] M QS[:] M [:] M S# M S# M S# U S_S[] S_S[] S_S[] M S# M S# M S# W R S_S[] S_S[] S_S[] M S# M RS# M WE# E E S_S# S_RS# S_WE# M S# M RS# M WE# Y S_S# S_RS# S_WE# I,U_F_rPG,RP I,U_F_rPG,RP PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N PROESSER /(R) ustom ate: Tuesday, February,

5 VORE U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_.U/V_.U/V_ G G G G G G G G G G F F F F F F F F F F Y Y Y Y Y Y Y Y Y Y V V V V V V V V V V U U U U U U U U U U R R R R R R R R R R P P P P P P P P P P UF V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V PU ORE SUPPLY POWER.V RIL POWER SENSE LINES PU VIS VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ PSI# VI[] VI[] VI[] VI[] VI[] VI[] VI[] PRO_PRSLPVR VTT_SELET ISENSE VTT_SENSE VSS_SENSE_VTT V_SENSE VSS_SENSE H H H H J J H H G G G G F F F F E E F E Y W U T J J J J N K K K L L M M M G U/.V_S U/.V_S.V_VTT H_PSI# PU_VI PU_VI PU_VI PU_VI PU_VI PU_VI PU_VI PRSLPVR H_VTTVI I_MON.V_VTT VTT Rail Values are uburndal VTT=.V larksfield VTT=.V H_VTTVI=Low,.V H_VTTVI=High,.V N J J R R U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_S U/.V_S U/.V_S VTT_SENSE VSS_SENSE_VTT /F_ /F_ VGORE_IGPU VORE VSENSE VSSSENSE Please note that V_GFX_ORE should be.v in uburndale Ra Rb.V_VTT IS ohm N.V_VTT U/.V_S U/.V_S U/.V_ U/.V_ Rb SG/UM N STUFF R Ra *_ U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S T T T T R R R R P P P P N N N N M M M M L L L L K K K K J J J J H H H H J J H K J J J H G G G F E E UG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VXG VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ GRPHIS POWER FI PEG & MI I,U_F_rPG,RP SENSE LINES GRPHIS VIs R -.V RILS.V.V VXG_SENSE VSSXG_SENSE GFX_VI[] GFX_VI[] GFX_VI[] GFX_VI[] GFX_VI[] GFX_VI[] GFX_VI[] GFX_VR_EN GFX_PRSLPVR GFX_IMON VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VPLL VPLL VPLL R T M P N P M P N R T M J F E E Y W W U T T P N N L H P N L K J J J H H H L L M Rc Rd Re Rf GFX_VR_EN Rd Re Rf Rc IS N N N N U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_S U/.V_S U/.V_ U/.V_ U/.V_S U/.V_S U/.V_S.U/.V_.U/.V_ U/.V_ U/.V_ PV dd SG/UM ohm ohm N R _ R _ R _ R *K/J_ U_.V_ u_.v_.vsus_l V_XG_SENSE VSS_XG_SENSE GFXVR_VI_ GFXVR_VI_ GFXVR_VI_ GFXVR_VI_ GFXVR_VI_ GFXVR_VI_ GFXVR_VI_ SI change.v_vtt.v GFXVR_EN GFXVR_PRSLPVR GFXVR_IMON MIN SI el OM.VSUS Q ONL G MIN S *.U/V_.VSUS_L PU_VI PU_VI PU_VI PU_VI PU_VI PU_VI PU_VI PRSLPVR H_PSI# R R R R R R R R R R R R R R R R R R.U/V_ K/J_ *K/J_ K/J_ *K/J_ K/J_ *K/J_ *K/J_ K/J_ *K/J_ K/J_ K/J_ *K/J_ *K/J_ K/J_ K/J_ *K/J_ *K/J_ K/J_ HFM_VI : Max.V LFM_VI : Min.V.U/V_ SI dd.vsus.u/v_.v_vtt.u/v_ I,U_F_rPG,RP,.VSUS_L VORE,,,,,,.V_VTT,,,,.VSUS,,,,.V PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N PROESSER /(POWER) ustom ate: Tuesday, February,

6 UURNLE/LRKSFIEL PROESSOR (GN) UURNLE/LRKSFIEL PROESSOR( RESERVE, FG) T T R R R R R R R R R R R R P P P P P P P N N N N N M M M M M M M M M M L L L L L L L L L K K K K K J J J J J J J J J H H H H H H H H H H H H H H H H G F F F E UH VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS I,U_F_rPG,RP VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS E E E E E E E E E E Y Y Y W W W W W W W W W W W V U U U T T T T T T T T T T T R P P P N N N N N N N N N N N M L L L L L L K K K K K K K J J J J H H H H H H H H H H H H H G G G G G G F F F F F F E E E E E E E E E E E T T R UI VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS_NTF VSS_NTF VSS_NTF VSS_NTF VSS_NTF VSS_NTF VSS_NTF I,U_F_rPG,RP NTF R_VREF_Q J R_VREF_Q H FG M M P FG L FG L M N FG M K K K J N N J J J K H P L L L J G M L G G E E R *_ TP_RSV_R R *_ TP_RSV_R U T J J J J H K L R J J P UE S_IMM_VREF RSV_NTF_ S_IMM_VREF RSV_NTF_ RSV_NTF_ FG[] RSV FG[] RSV FG[] RSV FG[] RSV FG[] RSV FG[] RSV FG[] FG[] RSV FG[] RSV FG[] RSV FG[] RSV_NTF_ FG[] RSV_NTF_ FG[] RSV_NTF_ FG[] RSV_NTF_ FG[] RSV FG[] RSV_TP_ FG[] RSV_TP_ FG[] RSV_TP_ KEY RSV RSV RSV RSV RSV RSV RSV RSV RSV_TP_ RSV RSV_TP_ RSV RSV_TP_ RSV RSV_TP_ RSV RSV_TP_ RESERVE RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV_NTF_ RSV_NTF_ RSV RSV RSV_NTF_ RSV_NTF_ RSV_NTF_ RSV_NTF_ RSV RSV RSV RSV RSV RSV_NTF_ RSV RSV RSV_NTF_ I,U_F_rPG,RP RSV_TP_ RSV_TP_ RSV_TP_ RSV_TP_ RSV_TP_ RSV_TP_ RSV_TP_ RSV_TP_ RSV_TP_ RSV_TP_ RSV_TP_ RSV_TP_ RSV_TP_ RSV_TP_ RSV_TP_ VSS T T R L L P P L T T P R T T P R R E F J RSV_R R H RSV_R R R R G E V V N W W N E P FG R FG R FG R FG R *_ *_ *.K_N.K/F_ *.K_N *.K/F_ UM SG/IS R R N N N.K R N N R N N The larkfield processor's PI Express interface may not meet PI Express. jitter specifications. Intel recommends placing a.k /- % pull down resistor to VSS on FG[] pin for both rpg and G components. This pull down resistor should be removed when this issue is fixed. FG (isplay Port Presence) FG (PI-Epress onfiguration Select) FG (PI-Epress Static Lane Reversal) isabled; No Physical isplay Port attached to Embedded iplay Port Single PEG Normal Operation Enabled; n external isplay port device is connected to the Embedded isplay port ifurcation enabled Lane Numbers Reversed ->, -> FG[ : ] - PI_Epress onfiguration Select * = x PEG * = x PEG PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N PROESSER / (GN) ustom Tuesday, February, ate:

7 INTVRMEN - Integrated SUS.V VRM Enable High - Enable Internal VRs LFRME#_ L_ L_ L_ L_ RT_ELL GPIO_E,.V Y P/V_.KHZ P/V_ R Z_SPKR Z_SIN PV hange to Short Pad R RT_RST# SRT_RST# SM_INTRUER# PH_INVRMEN Z_LK Z_SYN Z_RST# Z_SOUT *_/S GPIO short R _ PH_JTG_TK R R R R K/J_ TP R M/J_ *_PH_JTG_TMS *_PH_JTG_TI *_PH_JTG_TO *_PH_JTG_RST# SPI_LK_R SPI_S#_R SPI_S# SPI_SI_R SPI_SO IEX PEK-M (H,JTG,ST) RT_X RT_X P G F E F H J M K K J J V Y Y V U RTX RTX RTRST# SRTRST# INTRUER# INTVRMEN IbexPeak-M_Rev_ Ibex-M OF RT H_LK H_SYN SPKR H_RST# H_SIN H_SIN H_SIN H_SIN H_SO H_OK_EN# / GPIO H_OK_RST# / GPIO JTG_TK JTG_TMS JTG_TI JTG_TO TRST# SPI_LK SPI_S# SPI_S# SPI_MOSI SPI_MISO IH JTG SPI (V) (V_S) LP (V) (V) (V_S) FWH / L FWH / L FWH / L FWH / L FWH / LFRME# LRQ# LRQ# / GPIO SERIRQ ST STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STRXN STRXP STTXN STTXP STIOMPO STIOMPI STLE# STGP / GPIO STGP / GPIO F K K K K H H H H F F F F H H F F F F T Y V R ST_TXN_ ST_TXP_ ST_TXN_ ST_TXP_ ST_RXN_ ST_RXP_ ST_TXN_ ST_TXP_ ST_RXN_ ST_RXP_ ST_TXN_ ST_TXP_ ST_OMP ST_LE# GT_STOP# GT_RESET *P/V_ L_, L_, L_, L_, LFRME#_, K/J_ V SERIRQ ST_RXN_ ST_RXP_ ST_RXN_ ST_RXP_.U/V_.U/V_ R *P/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_./F_ ST_LE# GT_STOP# GT_RESET *P/V_ ST_TXN ST_TXP ST_TXN ST_TXP ST_RXN_ ST_RXP_ ST H ST_TXN ST_TXP ST_RXN_ ST_RXP_ ST_TXN ST_TXP.V The STLE# signal is open-collector and requires a weak external pull-up (. k to k ) to V.. H O *P/V_ SI dd *P/V_ UM RT,LVS&HMI signals IEX PEK-M (LVS,I) V E-ST PH_LVS_LON PH_ISP_ON PH_PST_PWM PH_EILK PH_EIT PH_RT_ PH_RT_G PH_RT_R PH_LK PH_T R R R PH_L_LK# PH_L_LK PH_L_TN PH_L_TN PH_L_TN PH_L_TP PH_L_TP PH_L_TP PH_HSYN PH_VSYN TP PH_L_LK# PH_L_LK PH_L_TN PH_L_TN PH_L_TN PH_L_TP PH_L_TP PH_L_TP R K/F_ K/F_.K/F_ R R R L_TRL_LK L_TRL_T LVS_IG LVS_VG K/F_ /F_ /F_ /F IREF T T Y Y V P P T T V V Y V Y V P P Y T U T Y T U T V V Y Y U L_KLTEN L_V_EN L_KLTTL L LK L T L_TRL_LK L_TRL_T LV_IG LV_VG LV_VREFH LV_VREFL LVS_LK# LVS_LK LVS-- LVS_T# LVS_T# LVS_T# LVS_T# LVS_T LVS_T LVS_T LVS_T LVS_LK# LVS_LK LVS-- LVS_T# LVS_T# LVS_T# LVS_T# LVS_T LVS_T LVS_T LVS_T RT_LUE RT_GREEN RT_RE RT LK RT T RT_HSYN RT_VSYN _IREF RT_IRTN IbexPeak-M_Rev_ RT Ibex-M SVO_TVLKINN OF SVO_TVLKINP SVO igital isplay Interface ISPLY PORT ISPLY PORT ISPLY PORT SVO_STLLN SVO_STLLP SVO_INTN SVO_INTP SVO_TRLLK SVO_TRLT P_UXN P_UXP P_HP P_N P_P P_N P_P P_N P_P P_N P_P P_TRLLK P_TRLT P_UXN P_UXP P_HP P_N P_P P_N P_P P_N P_P P_N P_P P_TRLLK P_TRLT P_UXN P_UXP P_HP P_N P_P P_N P_P P_N P_P P_N P_P J G J G F H T T G J U J G W Y E V E F H U U T J G J G F H E P_TRL_LK P_TRL_T P_HP_Q P_LNE_N P_LNE_P P_LNE_N P_LNE_P P_LNE_N P_LNE_P P_LNE_N P_LNE_P R K/J_ ST_LE# V R R K/J_ K/J_ GT_STOP# GT_RESET R K/J_ GPIO_E SI UM HMI signals V P_TRL_LK P_TRL_T P_LNE_N P_LNE_P P_LNE_N P_LNE_P P_LNE_N P_LNE_P P_LNE_N P_LNE_P R R *_ *_ *.U/V_ *.U/V_ *.U/V_ *.U/V_ *.U/V_ *.U/V_ *.U/V_ *.U/V_ SVO_LK SVO_T IN_# IN_ IN_# IN_ IN_# IN_ IN_LK# IN_LK P_HP_Q R *K/F_ R Q *NK *_ HMI_HP_ON,,,,,,.V,,,,,,,,,,,,,,,,,,,,,,,, V,,,,,,,,,, VPU RT_ELL For UIO RT m RT_ELL M byte SPI ROM Z_RST#_UIO Z_SOUT_UIO Z_SYN_UIO IT_LK_UIO R _ Z_RST# R _ Z_SOUT *P/V_ R _ Z_SYN *P/V_ R _ Z_LK *P/V_ VPU RV- VRT_ RV- R R R R R U/.V_ K/F_ RT_RST# U/.V_ J *SHORT_ P K/F_ SRT_RST# U/.V_ J *SHORT_ P M_ SM_INTRUER# T V R PV change short pad U SPI_S# R *_/S SPI_S#_R V E# SPI_LK R short *_/S SPI_LK_R SK SPI_SI R short *_/S SPI_SI_R SPI_HOL# SI SPI_SO_R short SPI_SO K/F_ SO R *_/S HOL# short.u/v_ SPI_WP# R K/F_ VSS WP# V WQVSSIG Socket: G MXI KEFPZ WINON KEPN PROJET : LX_LX Quanta omputer Inc. R K/F_ VRT_ T_ONN Size ocument Number Rev N PH / (ST,H,LP) ustom ate: Tuesday, February,

8 IEX PEK-M (GN) UI Y H VSS[] VSS[] H VSS[] VSS[] J VSS[] VSS[] K VSS[] VSS[] K VSS[] VSS[] K VSS[] VSS[] K VSS[] VSS[] L VSS[] VSS[] L VSS[] VSS[] L VSS[] VSS[] L VSS[] VSS[] G L VSS[] VSS[] L VSS[] VSS[] L VSS[] VSS[] L VSS[] VSS[] M VSS[] VSS[] M VSS[] VSS[] M VSS[] VSS[] N VSS[] VSS[] M VSS[] VSS[] M VSS[] VSS[] M VSS[] VSS[] M VSS[] VSS[] M VSS[] VSS[] M VSS[] VSS[] M VSS[] VSS[] N VSS[] VSS[] P VSS[] VSS[] VSS[] VSS[] P VSS[] VSS[] P VSS[] VSS[] P VSS[] VSS[] H P VSS[] VSS[] P VSS[] VSS[] P VSS[] VSS[] P VSS[] VSS[] E R VSS[] VSS[] E R VSS[] VSS[] E T VSS[] VSS[] E T VSS[] VSS[] E T VSS[] VSS[] E T VSS[] VSS[] E T VSS[] VSS[] E T VSS[] VSS[] E U VSS[] VSS[] E U VSS[] VSS[] E U VSS[] VSS[] E U VSS[] VSS[] E P VSS[] VSS[] F V VSS[] VSS[] F P VSS[] VSS[] F V VSS[] VSS[] G V VSS[] VSS[] G V VSS[] VSS[] G V VSS[] VSS[] G V VSS[] VSS[] H V VSS[] VSS[] H V VSS[] VSS[] H V VSS[] VSS[] H V VSS[] VSS[] H V VSS[] VSS[] H V VSS[] VSS[] H V VSS[] VSS[] H V VSS[] VSS[] H V VSS[] VSS[] H V VSS[] VSS[] V VSS[] VSS[] V VSS[] VSS[] W VSS[] VSS[] E W VSS[] VSS[] E Y VSS[] VSS[] E Y VSS[] VSS[] E Y VSS[] VSS[] E Y VSS[] VSS[] E Y VSS[] VSS[] E Y VSS[] VSS[] E Y VSS[] VSS[] E Y VSS[] VSS[] E Y VSS[] VSS[] E Y VSS[] VSS[] E Y VSS[] VSS[] F Y VSS[] VSS[] F P VSS[] VSS[] G Y VSS[] VSS[] G Y VSS[] VSS[] G Y VSS[] VSS[] G P VSS[] VSS[] G T VSS[] VSS[] G VSS[] VSS[] G T VSS[] VSS[] G VSS[] VSS[] G Y VSS[] VSS[] G T VSS[] VSS[] F M VSS[] VSS[] H T VSS[] VSS[] H M VSS[] VSS[] H K VSS[] VSS[] H K VSS[] VSS[] H V VSS[] VSS[] H VSS[] IbexPeak-M_Rev_ LK_OE# LK_OE# PIE_LK_REQ# PIE_LK_REQ# PIE_LK_REQ# PIE_LK_REQ#_R PIE_LK_REQ# PEG_LKREQ# SM_LK_ME SM_T_ME PT_SM PLK_SM Q V Q Q V [WLN] [LN] V R K/J_ R K/J_ VS R K/J_ R K/J_ R K/J_ R K/J_ R K/J_ R K/J_ MiniWLN LN NE MLK,, MT,, NE NE GT_SM,,,, R K/F_ R K/F_ Q NE GLK_SM,,,, PIE_RXN PIE_RXP PIE_TXN PIE_TXP PIE_RXN_LN PIE_RXP_LN PIE_TXN_LN PIE_TXP_LN LK_PIE_WLN# LK_PIE_WLN LK_OE# PIE_LK_REQ# LK_PIE_LN# LK_PIE_LN PIE_LK_REQ# PIE_RXN PIE_RXP.U/V_ PIE_TXN_.U/V_ PIE_TXP_ PIE_RXN_LN PIE_RXP_LN.U/V_ PIE_TXN_.U/V_ PIE_TXP_ T T T T PIE_LK_REQ# LK_OE# PIE_LK_REQ# PIE_LK_REQ# PIE_LK_REQ#_R IEX PEK-M (PI-E,SMUS,LK) G J F H W U T U V E F H G J W T U U V G J G J K K P M M U M M N H H M M M J J H K K U Ibex-M PERN OF PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP SMus (V_S) SMLERT# / GPIO SMLK SMT (V_S) SMLLERT# / GPIO SMLLK SMLT (V_S) SMLLERT# / GPIO (V_S) SMLLK / GPIO (V_S) SMLT / GPIO ontroller Link PERN PERP PETN PETP PI-E* PEG PERN PERP (V_S) PEG LKRQ# / GPIO PETN LKOUT_PEG N PETP LKOUT_PEG P LKOUT_MI_N PERN LKOUT_MI_P PERP PETN PETP LKOUT_P_N / LKOUT_LK_N LKOUT_P_P / LKOUT_LK_P PERN PERP PETN LKIN_MI_N PETP LKIN_MI_P LKOUT_PIEN LKOUT_PIEP LKIN_LK_N PIELKRQ# / GPIO (V_S) LKIN_LK_P LKOUT_PIEN LKOUT_PIEP LKIN_OT_N PIELKRQ# / GPIO (V) LKIN_OT_P LKOUT_PIEN LKOUT_PIEP PIELKRQ# / GPIO (V) LKOUT_PIEN LKOUT_PIEP PIELKRQ# / GPIO (V_S) LKOUT_PIEN LKOUT_PIEP PIELKRQ# / GPIO (V_S) LKOUT_PIEN LKOUT_PIEP (V_S) PIELKRQ# / GPIO LKOUT_PEG N LKOUT_PEG P P PEG LKRQ# / GPIO (V_S) IbexPeak-M_Rev_ XTL_IN XTL_OUT,,,,,,.V,,,, VS,,,,,,,,,,,,,,,,,,,,,,,, V From LK UFFER L_LK L_T L_RST# LKIN_ST_N / KSS_N LKIN_ST_P / KSS_P REFLKIN (V) LKOUTFLEX / GPIO (V) LKOUTFLEX / GPIO (V) LKOUTFLEX / GPIO (V) LKOUTFLEX / GPIO SMLERT# H PLK_SM PT_SM J SMLLERT# SM_LK_ME G SM_T_ME M SMLLERT# E SM_LK_ME G SM_T_ME T T T H PEG_LKREQ# N N T T W P P F E H H P K/F_.K_.K_ K/F_.K_.K_ K/F_.K_.K_ VS R R R R R R R R R LK_PIE_VG# LK_PIE_VG LK_PIE_GPLL# LK_PIE_GPLL REFSSLK# REFSSLK LK_UF_PIE_GPLL# LK_UF_PIE_GPLL LK_UF_LK_N LK_UF_LK_P LK_UF_REFLK# LK_UF_REFLK LK_UF_REFSSLK# LK_UF_REFSSLK SI el L LK_IH_M *.P/V_ LK_PI_F LKIN_PILOOPK J LK_PI_F XTL_IN R *_ XTL_IN H IS only H XTL_OUT XTL_OUT XLK_ROMP XLK_ROMP F.V R./F_ T LK_FLEX T P LK_FLEX T T LK_FLEX T N LK_FLEX LK_M_R R _ lock Flex PV hange to P FOR UM/SG P/V_ R Y M/F_ MHZ P/V_ SI hange footprint PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N PH / (PIE, SMUS, K) ustom ate: Tuesday, February,

9 VS V V PI_IRY# PI_STOP# PI_PIRQ# PI_PIRQ# US_O# US_O# US_O# US_O# REQ# PI_EVSEL# PI_TRY# INTH# LK_M_EUG LK_M_K LK_PI_F RP PR-.K RP PR-.K RP PR-.K,,,, T_OMO_EN# GNT# GNT# GNT# INTH# PI_SERR# TP PLTRST# R _ R _ PI_PIRQ# PI_SERR# T_OMO_EN# PI_FRME# US_O# US_O# US_O# US_O# V PI_PLOK# PI_PERR# REQ# PI_PIRQ# R _ VS V PI_PIRQ# PI_PIRQ# PI_PIRQ# PI_PIRQ# REQ# T_OMO_EN# REQ# REQ# PI_GNT# PIRQE# PIRQF# PIRQG# INTH# PI_SERR# PI_PERR# PI_IRY# PI_EVSEL# PI_FRME# PI_PLOK# PI_STOP# PI_TRY# PME# PLTRST# LK_M_EUG_R LK_M_K_R LK_PI_F_ IEX PEK-M (PI,US,NVRM) H N J E H E M M F M M J K F K M J K L F J G F M H J G H G G H F M F K F H K K E E H F M N P P P P UE /E# /E# /E# /E# PIRQ# PIRQ# PIRQ# PIRQ# Ibex-M OF PI REQ# REQ# / GPIO (V) REQ# / GPIO (V) REQ# / GPIO (V) GNT# GNT# / GPIO (V) GNT# / GPIO (V) GNT# / GPIO (V) PIRQE# / GPIO (V) PIRQF# / GPIO (V) PIRQG# / GPIO (V) PIRQH# / GPIO (V) PIRST# SERR# PERR# IRY# PR EVSEL# FRME# PLOK# STOP# TRY# PME# PLTRST# LKOUT_PI LKOUT_PI LKOUT_PI LKOUT_PI LKOUT_PI IbexPeak-M_Rev_ NVRM US (V_S) O# / GPIO (V_S) O# / GPIO (V_S) O# / GPIO (V_S) O# / GPIO (V_S) O# / GPIO (V_S) O# / GPIO (V_S) O# / GPIO (V_S) O# / GPIO NV_E# NV_E# NV_E# NV_E# NV_QS NV_QS NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_LE NV_LE NV_ROMP NV_R# NV_WR#_RE# NV_WR#_RE# NV_WE#_K NV_WE#_K USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USRIS# USRIS Y P V G P P T T V E J J G Y U V Y Y V F H J N P J L F G M N H J E F G H L M N J F L E G F T NV_ROMP US_IS US_O# US_O# US_O# US_O# US_O# US_O# US_O# US_O# R R NV_LE NV_LE./F_ USP- USP USP- USP USP- USP USP- USP USP- USP USP- USP USP- USP USP- USP USP- USP USP- USP USP- USP./F_ Left_US E-Sata Fingerprint Touchscreen Webcam GPU_SELET# EI_SELET# PWM_SELET# IMVP_PWRG, EPWROK, XP_RESET# PM_RM_PWRG RSMRST# Right_US "/ST LE Right_US "/ST LE WLN Right_US " ard Reaer lue tooth.v NSWON# PIE_WKE# PM_SYN MI_RXN MI_RXN MI_RXN MI_RXN MI_RXP MI_RXP MI_RXP MI_RXP MI_TXN MI_TXN MI_TXN MI_TXN MI_TXP MI_TXP MI_TXP MI_TXP R R _ R *_ FOR SG ONLY R _ R _ R _ REQ# REQ# PI_GNT# MI_OMP./F_ PH_PWROK RSV_IH_LN_RST# R PM_RI# */short_ LKRUN# XP_RESET# RSMRST# RSV_IH_LN_RST# PH_PWROK PLTRST# IEX PEK-M (MI,FI,GPIO) J W J G G E F E H H F T M K P F J J U MIRXN MIRXN MIRXN MIRXN MIRXP MIRXP MIRXP MIRXP MITXN MITXN MITXN MITXN MITXP MITXP MITXP MITXP MI_ZOMP MI_IROMP SYS_RESET# SYS_PWROK PWROK MEPWROK LN_RST# RMPWROK RSMRST# PWRTN# RI# WKE# PMSYNH IbexPeak-M_Rev_ R R MI V Ibex-M OF FI System Power Management.K/F_ K/J_ (V_S) SUS_PWR_N_K / GPIO (V_S) PRESENT / GPIO (V) LKRUN# / GPIO (V_S) SUS_STT# / GPIO (V_S) SUSLK / GPIO (V_S) SLP_S# / GPIO (V_S) TLOW# / GPIO REQ# PIRQE# PIRQF# PIRQG# SUS_PWR_K _PRESENT FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_INT FI_FSYN FI_FSYN FI_LSYN FI_LSYN SLP_S# SLP_S# SLP_M# TP (V_S) SLP_LN# / GPIO R R R R H J E F G W J F H J G SLP_M# SLP_S# PM_TLOW#.K/F_.K/F_.K/F_.K/F_ R K/J_ PM_RI# R K/J_ R K/F_ PM_TLOW# R K/J_ R K/J_ PIE_WKE# R K/J_ R K/F_ R R R _ STGP, GPU_PWR_EN STGP R _ TH GPU_PWROK,,, TH R _ STGP GPU_HOL_RST# STGP P H K N M P Y P F E F K/J_ K/J_ V VS TP TP TP FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_INT FI_FSYN FI_FSYN FI_LSYN FI_LSYN SUS# SUS# SUS_PWR_K _PRESENT LKRUN# PROJET : LX_LX Quanta omputer Inc.,,,,,,.V,,,,,,,,,,,,,,,,,,,,,,,, V,,,, VS Size ocument Number Rev N PH / (PI,ONFI,US,MI) ustom ate: Tuesday, February,

10 ,, LN_ISLE# R_ORL SIO_EXT_SMI# SIO_EXT_SI# R_ORL IOS_RE R IOS REOVERY HIGH : ISLE LOW : ENLE T_OFF# LE_EN R RF_OFF# STGP TH STGP L_K TP STGP.U/V_ SI dd *_ K/F_ MUSY# LE_EN LN_ISLE_R# STGP TH IOS_RE GPIO TP_PH_GPIO STGP PH_GPIO L_K SV_SET_UP OR_I OR_I OR_I OR_I OR_I OR_I V IEX PEK-M (GPIO,VSS_NTF,RSV) Y J F K T F Y V P F H H F M V V E E F F H UF MUSY# / GPIO TH / GPIO TH / GPIO TH / GPIO GPIO (V_S) (V) (V) (V) (V) LN_PHY_PWR_TRL / GPIO GPIO (V_S) STGP / GPIO (V) TH / GPIO (V) SLOK / GPIO (V) GPIO (V_S) GPIO (V_S) STGP / GPIO STGP / GPIO STOUT / GPIO PIELKRQ# / GPIO STOUT / GPIO STGP / GPIO (V) (V) (V) (V_S) (V) (V) GPIO (V_S) PIELKRQ# / GPIO (V_S) GPIO (V_S) STP_PI# / GPIO (V) STLKREQ# / GPIO (V) SLO / GPIO (V) VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ IbexPeak-M_Rev_ Ibex-M OF GPIO MIS (V_S) NTF PU RSV LKOUT_PIEN LKOUT_PIEP LKOUT_PIEN LKOUT_PIEP GTE LKOUT_LK_N/LKOUT_PIEN LKOUT_LK_P/LKOUT_PIEP PEI RIN# PROPWRG THRMTRIP# TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP N_ N_ N_ N_ N_ INIT_V# TP VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ VSS_NTF_ H H F F U M M G T E H H H J J J J J J J J E E PH_PEI_R R PH_THRMTRIP#_R R.V_VTT W R Y Y V V F M N J K K M N M N H T P SI hange */short_./f_ RIN# GTE TH STGP STGP MUSY# SIO_EXT_SMI# SIO_EXT_SI# T_OFF# L_K PH_GPIO STGP LE_EN RF_OFF# LN_ISLE_R# R_ORL TP_PH_GPIO GTE LK_PU_LK# LK_PU_LK H_PEI MV dd P/V_./F_ RIN# H_PWRGOO PM_THRMTRIP#, PV dd FOR UM/IS SG R N P/V_ R R R R R R R R R R R UM/IS K ohm R SI el OM R R R R R K/F_ K/F_ K/F_ K/F_ K/F_ K/F_ K/F_ K/F_ K/F_ K/F_ K/F_ *K/F_ K/F_ K/F_ K/F_ K/F_ K/F_ V V VS IEX PEK-M (GN) UH VSS[] VSS[] K VSS[] VSS[] K VSS[] VSS[] K VSS[] VSS[] K M K VSS[] VSS[] VSS[] VSS[] K VSS[] VSS[] K K VSS[] VSS[] VSS[] VSS[] K VSS[] VSS[] K VSS[] VSS[] K VSS[] VSS[] L VSS[] VSS[] L VSS[] VSS[] M VSS[] VSS[] VSS[] VSS[] VSS[] VSS[] M M VSS[] VSS[] VSS[] VSS[] M M VSS[] VSS[] VSS[] VSS[] M VSS[] VSS[] M VSS[] VSS[] VSS[] VSS[] M M VSS[] VSS[] VSS[] VSS[] M VSS[] VSS[] M VSS[] VSS[] M M VSS[] VSS[] VSS[] VSS[] M VSS[] VSS[] U VSS[] VSS[] M U V VSS[] VSS[] VSS[] VSS[] M VSS[] VSS[] M VSS[] VSS[] VSS[] VSS[] E N VSS[] VSS[] E VSS[] VSS[] N F VSS[] VSS[] N Y VSS[] VSS[] P H VSS[] VSS[] P U P VSS[] VSS[] F VSS[] VSS[] P P P VSS[] VSS[] N VSS[] VSS[] P F VSS[] VSS[] R F VSS[] VSS[] R F VSS[] VSS[] T F VSS[] VSS[] F VSS[] VSS[] H G VSS[] VSS[] T G VSS[] VSS[] T H T VSS[] VSS[] H VSS[] VSS[] T H T VSS[] VSS[] H VSS[] VSS[] V H V VSS[] VSS[] V VSS[] VSS[] V H VSS[] VSS[] V H VSS[] VSS[] V H VSS[] VSS[] V J V VSS[] VSS[] J VSS[] VSS[] V J V VSS[] VSS[] J VSS[] VSS[] V J VSS[] VSS[] V J VSS[] VSS[] V J VSS[] VSS[] W J W VSS[] VSS[] J VSS[] VSS[] W T VSS[] VSS[] F J VSS[] VSS[] W K VSS[] VSS[] W M VSS[] VSS[] W N VSS[] VSS[] W K VSS[] VSS[] Y K VSS[] VSS[] Y K Y VSS[] VSS[] K VSS[] GNT# R *K/F_ swap override Strap/Top-lock Swap Override jumper Low = swap override/top-lock GNT# Swap Override enabled High = efault SV_SET_UP R K/F_ V SV_SET_UP -X High = Strong (efault) GNT# GNT# R *K/F_ GNT# GNT# R *K/F_ oot IOS Strap PI_GNT# GNT# oot IOS Location LP (NN) PI SPI R *K/F_ NV_LE.V R *K/F_ NV_LE anbury Technology Enabled High = Enable NV_LE Low = isable MI Termination Voltage Set to Vcc when LOW NV_LE Set to Vcc/ when HIGH No Reboot Strap IbexPeak-M_Rev_, Z_SPKR R *K/F_ V OR I SETTING oard I T T T T T T T I I I I I I R () R () R () R () R () R () R () R () R () RU () RU () R () R () R () R () R () RU () RU () R () R () R () RU () R () R () R () R () R () RU () R () RU () R () R () R () RU () RU () R () R () R () R () RU () RU () RU () oard I LX LX iscrete UM SG I I I I I I V VS RU R *K/F_ OR_I RU R K/F_ OR_I RU R K/F_ OR_I RU R *K/F_ OR_I RU R *K/F_ OR_I RU R *K/F_ OR_I R R K/F_ R R *K/F_ R R *K/F_ R R K/F_ R R K/F_ R R K/F_ V,,,,,,,,,,,,,,,,,,,,,,,,.V,,,, VS,,,,.V_VTT,,,,,, PROJET : LX_LX Quanta omputer Inc. LX_No Subwoofer PV dd option Size ocument Number Rev N PH / (GPIO & Strap) ustom ate: Tuesday, February,

11 V.LN_VPLL_EXP V.LN_VPLL_FI VLK VSST PSUSYP V.LN_INT_VSUS VRTEXT V.LN_VPLL.V,,,, VS,,,, V,,,,,,,,,,,,,,,,,,,,,,,,.V_VTT,,,,,,.V,,,,,, VS V,,,,,,,,,, RT_ELL V V.V.V_VTT.V.V V.V.V.V V.V VS.V.V V.V_VTT VS.V VS VS VS.V RT_ELL.V.V V.V V.V V_LO V V.V V V_LO.V.V.V Size ocument Number Rev ate: Quanta omputer Inc. PROJET : LX_LX N PH / (POWER) ustom Tuesday, February, Size ocument Number Rev ate: Quanta omputer Inc. PROJET : LX_LX N PH / (POWER) ustom Tuesday, February, Size ocument Number Rev ate: Quanta omputer Inc. PROJET : LX_LX N PH / (POWER) ustom Tuesday, February, >m. >m..... >m... m. m.. Rc Rd Ra Rb UM/SG N N ohm Rc Rd ohm Ra Rb IS SG/UM ohm ohm N N IS ONLY. PV EMI Request PV EMI Request U/.V_ U/.V_.U/V_.U/V_.U/V_.U/V_ RV- RV-.U/V_.U/V_ U/.V_ U/.V_ *.U/V_ *.U/V_ U/.V_ U/.V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_ U/.V_ U/.V_ POWER V ORE MI PI E* RT LVS FI NN / SPI HVMOS Ibex-M OF UG IbexPeak-M_Rev_ POWER V ORE MI PI E* RT LVS FI NN / SPI HVMOS Ibex-M OF UG IbexPeak-M_Rev_ VORE[] VORE[] VORE[] VORE[] VORE[] VORE[] F VORE[] F VORE[] F VORE[] F VORE[] H VORE[] H VORE[] H VORE[] H VORE[] J VORE[] J VPNN[] K VPNN[] K VIO[] N VIO[] N VIO[] N VIO[] N VIO[] N VIO[] N VIO[] T VIO[] T VIO[] U VIO[] U VIO[] V VIO[] V VIO[] W VIO[] W VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] E VIO[] E VIO[] G VIO[] G VIO[] H VIO[] J VIO[] J V[] E V[] E VTX_LVS[] P VTX_LVS[] P VLVS H VVRM[] T VVRM[] T VPLLEXP J VFIPLL J VPNN[] K VPNN[] K VPNN[] M VPNN[] M VIO[] K VTX_LVS[] T VTX_LVS[] T VSS_[] F VSS_LVS H VSS_[] F VIO[] M V_[] V_[] V_[] V_[] N VME_[] M VME_[] M VME_[] P VME_[] P VPNN[] K VPNN[] M VPNN[] M VMI[] T VMI[] U VIO[] N VIO[] N U/.V_ U/.V_ U/.V_ U/.V_ TP TP.U/V_.U/V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_.U/V_.U/V_ U/.V_S U/.V_S RV- RV- U/.V_ U/.V_ TP TP.U/V_.U/V_ TP TP U/.V_ U/.V_.U/V_.U/V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ R *_ R *_.U/V_.U/V_ U/.V_ U/.V_.U/V_.U/V_ U/.V_S U/.V_S.U/V_.U/V_.U/V_.U/V_ U/.V_ U/.V_.U/V_.U/V_.U/V_.U/V_ U/.V_ U/.V_ U/.V_ U/.V_.U/V_.U/V_ U/.V_ U/.V_.U/V_.U/V_.U/.V_.U/.V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_ TP TP.U/V_.U/V_ R *_ R *_ POWER ST US lock and Miscellaneous H PU PI/GPIO/LP RT PI/GPIO/LP Ibex-M OF UJ IbexPeak-M_Rev_ POWER ST US lock and Miscellaneous H PU PI/GPIO/LP RT PI/GPIO/LP Ibex-M OF UJ IbexPeak-M_Rev_ PSUSYP Y VME[] VME[] VME[] VME[] F VME[] F VSUSH L VSUS_[] U VIO[] V VIO[] VIO[] F VIO[] F VME[] V VME[] V VME[] V VME[] Y VME[] Y VME[] Y VREF K V_[] J V_[] L V_[] M V_[] N V_[] P V_[] U VRT VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] VSUS_[] E VSUS_[] E VSUS_[] F VSUS_[] F VSUS_[] G VSUS_[] G VSUS_[] H VSUS_[] H VSUS_[] J VSUS_[] J VSUS_[] L VSUS_[] L VSUS_[] M VSUS_[] M VSUS_[] N VSUS_[] N VSUS_[] P VSUS_[] P VSUS_[] U VSUS_[] U VSUS_[] U VSUS_[] V VIO[] VIO[] VIO[] H VPLL[] VPLL[] VIO[] J VREF_SUS F VIO[] H VIO[] VIO[] VIO[] VIO[] F V_[] VIO[] H VVRM[] T PSUS Y VIO[] F VIO[] H VLN[] F VLN[] F VPLL[] VPLL[] VVRM[] U VLK[] P VLK[] P PRT V VIO[] F VME[] F VIO[] H VIO[] H PSST V VSTPLL[] K VSTPLL[] K VME[] VME[] Y VME[] Y VME[] V_[] V V_[] V V_[] Y VSUS_[] P VSUS_[] U VSUS_[] U VSUS_[] U VIO[] V VIO[] V VIO[] Y VIO[] Y V_PU_IO[] T V_PU_IO[] U R /F_ R /F_ R _ R _ U/.V_S U/.V_S R _ R _ U/.V_ U/.V_.U/V_.U/V_ R /F_ R /F_ U/.V_ U/.V_ U GTU U GTU Vin Vout GN R *_ R *_.U/V_.U/V_ U/.V_ U/.V_.U/V_.U/V_ U/.V_S U/.V_S.U/V_.U/V_.U/V_.U/V_

12 M [:] SO-IMM SP ddress is X SO-IMM TS ddress is X,,,,,,,, M S# M S# M S# M S# M S# M LK M LK# M LK M LK# M KE M KE M S# M RS# M WE# R R GLK_SM GT_SM M OT M OT M M[:] M QS[:] M QS#[:] M M M M M M M M M M M M M M M M K/F_ IMM_S K/F_ IMM_S M M M M M M M M M M M M M M M M M QS M QS M QS M QS M QS M QS M QS M QS M QS# M QS# M QS# M QS# M QS# M QS# M QS# M QS# JIM Q Q Q Q Q Q Q Q Q Q /P Q Q /# Q Q Q Q Q Q Q Q S# Q S# Q K Q K# Q K Q K# Q KE Q KE Q S# Q RS# Q WE# Q S Q S Q SL Q S Q Q OT Q OT Q Q M Q M Q M Q M Q M Q M Q M Q M Q Q QS Q QS Q QS Q QS Q QS Q QS Q QS Q QS Q QS# Q QS# Q QS# Q QS# Q QS# Q QS# Q QS# Q QS# Q P R SRM SO-IMM (P) M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q[:].VSUS V PM_EXTTS# PM_EXTTS# R_RMRST#.VSUS R K/F_ R_VREF_Q FOR IS R *_ SMR_VREF_Q SMR_VREF_IMM R *K/F_ JIM V V V V V V V V V V V V V V V V V V VSP N N NTEST EVENT# RESET# VREF_Q VREF_ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS R-IMM P R SRM SO-IMM (P) VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VTT VTT GN GN FOR IS R_VREF_Q SMR_VREF_Q Q *O R_ORL.VSUS R K/F_ SMR_VREF_Q R K/F_.U/V_ FOR SG/UM.V_R_VTT R *_ R_RMRST#_ R_RMRST#_ R_RMRST# R-IMM R K/F_ Q SS R_ORL, Place these aps near So-imm. SMR_VREF_IMM Some Projects replace UF by.uf It can cost down % PV hange to Short pad.vsus U P/V_ R */s.v_r_vtt R_VTTREF.U/V_ U/.V_S,, MLK MLK V U/.V_S U/.V_ SLK V R_THERM R *K/F N.VSUS U/.V_S U/.V_,, MT MT R *K/F N U/.V_ XP U/.V_S S Q U/.V_S U/.V_ PM_EXTTS# U/.V_S *U/.V_ XN LERT# MMT--F,,.V_R_VTT.U/V_ *U/.V_, PM_EXTTS# PM_EXTTS#,,,,.VSUS U/.V_S GN P/V_.U/V_ OVERT#,,,,,,,,,,,,,,,,,,,,,,,, V.U/V_ R_THERM.U/V_ GPU.U/V_ SMR_VREF_Q RESS: H.U/V_ V.U/.V_.U/.V_.U/V_ PV EMI request SMR_VREF_IMM.U/V_.U/.V_ Place these U near So-imm(JIM). Size ocument Number Rev N R IMM- ustom PROJET : LX_LX Quanta omputer Inc. Tuesday, February, ate:

13 M [:],,,,,,,, SO-IMM SP ddress is X SO-IMM TS ddress is X M S# M S# M S# M S# M S# M LK M LK# M LK M LK# M KE M KE M S# M RS# M WE# R V R GLK_SM GT_SM M OT M OT M M[:] M QS[:] M QS#[:] M M M M M M M M M M M M M M M M K/F_ IMM_S K/F_ IMM_S M M M M M M M M M M M M M M M M M QS M QS M QS M QS M QS M QS M QS M QS M QS# M QS# M QS# M QS# M QS# M QS# M QS# M QS# JIM Q Q Q Q Q Q Q Q Q Q /P Q Q /# Q Q Q Q Q Q Q Q S# Q S# Q K Q K# Q K Q K# Q KE Q KE Q S# Q RS# Q WE# Q S Q S Q SL Q S Q Q OT Q OT Q Q M Q M Q M Q M Q M Q M Q M Q M Q Q QS Q QS Q QS Q QS Q QS Q QS Q QS Q QS Q QS# Q QS# Q QS# Q QS# Q QS# Q QS# Q QS# Q QS# Q P R SRM SO-IMM (P) M Q[:] M Q.VSUS M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q V M Q M Q M Q M Q M Q M Q, PM_EXTTS# M Q R_RMRST# M Q M Q M Q R_VREF_Q R_VREF_Q R *_ SMR_VREF_Q M Q SMR_VREF_IMM M Q M Q M Q R M Q *K/F_ M Q M Q M Q M Q M Q FOR IS M Q M Q M Q M Q M Q FOR SG/UM M Q M Q.VSUS M Q M Q M Q M Q M Q R M Q K/F_ M Q M Q SMR_VREF_Q M Q M Q M Q M Q R K/F_.U/V_ JIM V V V V V V V V V V V V V V V V V V VSP N N NTEST EVENT# RESET# VREF_Q VREF_ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS R-IMM P R SRM SO-IMM (P) VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VTT VTT GN GN.V_R_VTT R-IMM Place these aps near So-imm. Some Projects replace UF by.uf It can cost down %.VSUS.V_R_VTT FOR IS R_VREF_Q SMR_VREF_Q Q *O V U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S.U/V_.U/V_.U/V_.U/V_.U/V_.U/.V_ *.U/V_ U/.V_ U/.V_ U/.V_ U/.V_ *U/.V_ U/.V_S U/.V_S SMR_VREF_IMM.U/V_.U/.V_ SMR_VREF_Q.U/V_.U/.V_ for S power reduction R_ORL,,,.V_R_VTT,,,,.VSUS,,,,,,,,,,,,,,,,,,,,,,,, V PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N R IMM- ustom ate: Tuesday, February,

14 PEG_TX PEG_TX# PEG_TX PEG_TX# PEG_TX PEG_TX# PEG_TX PEG_TX# U PEG_TX PEG_TX# PIE_RXP Y PIE_RXN PEG_TX Y PEG_TX# PIE_RXP W PIE_RXN PEG_TX W PEG_TX# PIE_RXP V PIE_RXN PEG_TX V PEG_TX# PIE_RXP U PIE_RXN PIE_TXP Y PIE_TXN Y PIE_TXP W PIE_TXN W PIE_TXP U PIE_TXN U PIE_TXP U PIE_TXN U _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_ PEG_RX PEG_RX# PEG_RX PEG_RX# PEG_RX PEG_RX# PEG_RX PEG_RX#.V_P_V.V_P_V UH P / POWER P P_V# P P_V# P P_V# T P_V# N P_VSSR# P P_VSSR# P P_VSSR# W P_VSSR# W P_VSSR# P / POWER P_V# N P_V# P P_V# P P_V# P P_VSSR# N P_VSSR# P P_VSSR# P W P_VSSR# P_VSSR# W.V_P_V ( P/_V :.V@mm).V_VG L.V_P_V LMPGSN(,.)_ U/.V_ U/.V_.U/V_ PEG_TX PEG_TX# PEG_TX PEG_TX# PEG_TX PEG_TX# PEG_TX PEG_TX# PEG_TX PEG_TX# PEG_TX PEG_TX# PEG_TX PEG_TX# PEG_TX PEG_TX# PEG_TX PEG_TX# PEG_TX PEG_TX# PEG_TX U PEG_TX# PIE_RXP T PIE_RXN PEG_TX T PEG_TX# PIE_RXP R PIE_RXN PEG_TX R PEG_TX# PIE_RXP P PIE_RXN PEG_TX P PEG_TX# PIE_RXP N PIE_RXN PEG_TX N PEG_TX# PIE_RXP M PIE_RXN PEG_TX M PEG_TX# PIE_RXP L PIE_RXN PEG_TX L PEG_TX# PIE_RXP K PIE_RXN PEG_TX K PEG_TX# PIE_RXP J PIE_RXN PEG_TX J PEG_TX# PIE_RXP H PIE_RXN PEG_TX H PEG_TX# PIE_RXP G PIE_RXN PI EXPRESS INTERFE PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN T T T T P P P P N N N N L L L L K K J J _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_ PEG_RX PEG_RX# PEG_RX PEG_RX# PEG_RX PEG_RX# PEG_RX PEG_RX# PEG_RX PEG_RX# PEG_RX PEG_RX# PEG_RX PEG_RX# PEG_RX PEG_RX# PEG_RX PEG_RX# PEG_RX PEG_RX#.V_P_V P P_V# P P_V#.V_P_V P P_V# P P_V# N P_VSSR# P P_VSSR# P P_VSSR# W P_VSSR# W P_VSSR# R /F_P_LR W P_LR P E/F POWER H.V_PE_V PE_V# J PE_V# L.V_PE_V PE_V# M PE_V# N PE_VSSR# P PE_VSSR# R PE_VSSR# U PE_VSSR# P.V_P_V P_V# P_V# P P_V# N P P_V# N P_VSSR# P_VSSR# P P_VSSR# P P_VSSR# W P_VSSR# W P_LR P_LR W R /F_ P PLL POWER P_PV U P_PVSS V ( P/_PV :.V@mm).V_VG L.V_P_PV P_PV V P_PVSS R LMPGSN(,.)_ U/.V_ U/.V_.U/V_ P_PV U P_PVSS V ( P/_PV:.V@mm).V_VG PEG_TX PEG_TX# PEG_TX PEG_TX# PEG_TX G PEG_TX# PIE_RXP F PIE_RXN PEG_TX F PEG_TX# PIE_RXP E PIE_RXN PIE_TXP K PIE_TXN K PIE_TXP H PIE_TXN H _PEG_RXP _PEG_RXN _PEG_RXP _PEG_RXN.U/V_.U/V_.U/V_.U/V_ PEG_RX PEG_RX# PEG_RX PEG_RX#.V_PE_V F PF_V# G PF_V# P_PV V P_PVSS R PE_PV M PE_PVSS N.V_P_PV LK_PIE_VG LK_PIE_VG# LOK LK_PIE_VG LK_PIE_VG# PIE_REFLKP PIE_REFLKN J N# K PWRGOO_UF N# H PWRGOO LIRTION PIE_LRP Y PIE_LRN Y PIE_LRP PIE_LRN R R.K/F_ K/F_.V_VG.V_PE_V K PF_V# K PF_V# F PF_VSSR# H PF_VSSR# K PF_VSSR# L PF_VSSR# M PF_VSSR# N_PF_PV L N_PF_PVSS M U/.V_ ( PE/F_PV.V@mm).V_VG L.V_PE_PV LMPGSN(,.)_.U/V_.U/V_ R K/F_ R */svg_rst# PEGX_RST# PERST PV hange to Short Pad Park Pro/Madison_M R /F_ PEF_LR M PEF_LR Park Pro/Madison_M ( PE/F_V :.V@mm) L.V_PE_V.V_VG SI el R,R,.V_VG.V_VG.V_VG.U/V_.U/V_.U/V_ MV EMI Request ( V M.V/M.V) ( PE/F_V :.V@mm ).V_VG L.V_PE_V LMPGSN(,.)_ U/.V_ U/.V_.U/V_ ( P/_V :.V@mm).V_VG.V_P_V LMPGSN(,.)_ U/.V_ U/.V_.U/V_ ( P/_V :.V@mm).V_VG L.V_P_V LMPGSN(,.)_ U/.V_S U/.V_.U/V_ SI hange.v_vg ( P/_V :.V@mm).V_P_V V,,,,,,,,,,,,,,,,,,,,,,,,,.V_VG,,,.V_VG,,, PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N TI M-M (PIE I/F) / ustom ate: Tuesday, February,

15 .V_VG Ra R./F_ R Rb /F_.V_VG.U/V_.V_VG R Ra./F_ R /F_ Rb.U/V_ VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q MVREF MVREFS /F_ R */F_ R /F_ R */F_ R /F_ R /F_ R MEM_LRNP MEM_LRNP MEM_LRNP U R GR/GR R Q_/Q_ Q_/Q_ Q_/Q_ E Q_/Q_ G Q_/Q_ Q_/Q_ F Q_/Q_ E Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ E Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ E Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ E Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ E Q_/Q_ F Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ F Q_/Q_ Q_/Q_ Q_/Q_ G Q_/Q_ H Q_/Q_ J Q_/Q_ H Q_/Q_ G Q_/Q_ G Q_/Q_ K Q_/Q_ K Q_/Q_ G Q_/Q_ Q_/Q_ Q_/Q_ E Q_/Q_ Q_/Q_ Q_/Q_ E Q_/Q_ Q_/Q_ L MVREF L MVREFS L MEM_LRN N MEM_LRN G MEM_LRN M MEM_LRP M MEM_LRP H MEM_LRP L RSV Park Pro/Madison_M For PRK G M_/M_ VM_M M_/M_ J VM_M M_/M_ H VM_M M_/M_ J VM_M M_/M_ H VM_M M_/M_ J VM_M M_/M_ H VM_M M_/M_ G VM_M M_/M_ H VM_M M_/M_ H VM_M L M_/M_ VM_M M_/M_ G VM_M J M_/M_ VM_M M_/M H VM_ M_/M J VM_ H M_/M VM_ VM_M WK_/QM_ VM_M WK_/QM_ VM_M WK_/QM_ VM_M WK_/QM_ E VM_M WK_/QM_ VM_M WK_/QM_ VM_M WK_/QM_ E VM_M WK_/QM_ GR/R/GR VM_RQS E_/QS_/RQS_ VM_RQS E_/QS_/RQS_ VM_RQS E_/QS_/RQS_ VM_RQS E_/QS_/RQS_ E E VM_RQS E_/QS_/RQS_ VM_RQS E_/QS_/RQS_ E VM_RQS E_/QS_/RQS_ J VM_RQS E_/QS_/RQS_ VM_WQS I_/QS_/WQS_ VM_WQS I_/QS_/WQS_ E E VM_WQS I_/QS_/WQS_ VM_WQS I_/QS_/WQS_ VM_WQS I_/QS_/WQS_ VM_WQS I_/QS_/WQS_ VM_WQS I_/QS_/WQS_ J F VM_WQS I_/QS_/WQS_ I/OT J VM_OT I/OT G VM_OT LK H VM_LK LK G VM_LK# J LK VM_LK LK H VM_LK# RS K VM_RS# RS K VM_RS# S K VM_S# S K VM_S# S_ K VM_S# S_ K M S_ VM_S# S_ K KE K VM_KE KE J VM_KE WE K VM_WE# WE L VM_WE# M_ H VM_M J M_ an support G - SI- Stage For Madison VM_Q[..] VM_M[..] stuff VM_WQS[..] MEMORY INTERFE R GR/GR R stuff VM_RQS[..] stuff GR.V_VG R Ra./F_ R Rb /F_.V_VG R Ra./F_ R Rb /F_ R/GR Memory Stuff Option Park, MM Use hannel Memory Interface Only U R GR/GR R VM_Q VM_Q Q_/Q_ VM_Q Q_/Q_ E VM_Q Q_/Q_ E VM_Q Q_/Q_ F VM_Q Q_/Q_ F VM_Q Q_/Q_ F VM_Q Q_/Q_ G VM_Q Q_/Q_ H VM_Q Q_/Q_ H VM_Q Q_/Q_ J VM_Q Q_/Q_ K VM_Q Q_/Q_ K VM_Q Q_/Q_ L VM_Q Q_/Q_ M VM_Q Q_/Q_ M VM_Q Q_/Q_ M VM_Q Q_/Q_ M VM_Q Q_/Q_ N VM_Q Q_/Q_ P VM_Q Q_/Q_ P VM_Q Q_/Q_ R VM_Q Q_/Q_ T VM_Q Q_/Q_ T VM_Q Q_/Q_ U VM_Q Q_/Q_ V VM_Q Q_/Q_ V VM_Q Q_/Q_ V VM_Q Q_/Q_ Y VM_Q Q_/Q_ Y VM_Q Q_/Q_ Y VM_Q Q_/Q_ Y VM_Q Q_/Q_ VM_Q Q_/Q_ VM_Q Q_/Q_ VM_Q Q_/Q_ VM_Q Q_/Q_ VM_Q Q_/Q_ VM_Q Q_/Q_ VM_Q Q_/Q_ VM_Q Q_/Q_ F VM_Q Q_/Q_ F VM_Q Q_/Q_ F VM_Q Q_/Q_ G VM_Q Q_/Q_ H VM_Q Q_/Q_ H VM_Q Q_/Q_ J VM_Q Q_/Q_ K VM_Q Q_/Q_ F VM_Q Q_/Q_ F VM_Q Q_/Q_ G VM_Q Q_/Q_ G VM_Q Q_/Q_ K VM_Q Q_/Q_ L VM_Q Q_/Q_ M VM_Q Q_/Q_ M VM_Q Q_/Q_ K VM_Q Q_/Q_ L VM_Q Q_/Q_ M VM_Q Q_/Q_ M VM_Q Q_/Q_ N VM_Q Q_/Q_ P VM_Q Q_/Q_ P VM_Q Q_/Q_ P Q_/Q_ MVREF Y MVREFS MVREF MVREFS V_VG SI dd.u/v_ TESTEN TESTEN TEST_MLK K R TEST_YLK LKTEST L LKTEST *K/F_ *.U/V_ *.U/V_ Park Pro/Madison_M R R R K/F_ */F_ */F_ MEMORY INTERFE VM_Q[..] MV del R add R in OM.U/V_ VM_M[..] VM_WQS[..] VM_RQS[..],,,,.V_VG GR R K/F_ Ra a R GR/GR R M_/M_ P VM_M M_/M_ T VM_M M_/M_ P VM_M M_/M_ N VM_M M_/M_ N VM_M M_/M_ N VM_M M_/M_ U VM_M M_/M_ U VM_M M_/M_ Y VM_M W M_/M_ VM_M M_/M_ VM_M M_/M_ VM_M M_/M_ VM_M M_/ VM_ Y M_/ VM_ M_/ VM_ VM_M WK_/QM_ H VM_M WK_/QM_ H VM_M WK_/QM_ T T VM_M WK_/QM_ VM_M WK_/QM_ E VM_M WK_/QM_ F VM_M WK_/QM_ K K VM_M WK_/QM_ GR/R/GR VM_RQS E_/QS_/RQS_ F VM_RQS E_/QS_/RQS_ K VM_RQS E_/QS_/RQS_ P V VM_RQS E_/QS_/RQS_ VM_RQS E_/QS_/RQS_ VM_RQS E_/QS_/RQS_ H VM_RQS E_/QS_/RQS_ J VM_RQS E_/QS_/RQS_ M VM_WQS I_/QS_/WQS_ G K VM_WQS I_/QS_/WQS_ VM_WQS I_/QS_/WQS_ P VM_WQS I_/QS_/WQS_ W VM_WQS I_/QS_/WQS_ VM_WQS I_/QS_/WQS_ H J VM_WQS I_/QS_/WQS_ VM_WQS I_/QS_/WQS_ M I/OT T VM_OT W I/OT VM_OT L LK VM_LK LK L VM_LK# LK VM_LK LK VM_LK# RS T VM_RS# RS Y VM_RS# S W VM_S# S VM_S# S_ P VM_S# S_ L S_ VM_S# S_ KE U VM_KE KE VM_KE WE N VM_WE# WE VM_WE# T M_ VM_M M_ W R Rc *.K_.V_VG RM_RST H VM_RST#, R /F_ Rb SI- hange P/V_ esignator For Mannhatton Ra K Rb R Rc NI GR GR R a pf.v_vg.v.v/.v Ra.R.R.V.R PROJET : LX_LX Quanta omputer Inc. Rb R R R Size ocument Number Rev N TI M-M (MEM I/F) / ustom ate: Tuesday, February,

16 U UG R K/F_ TXP_PP U TXM_PN V LVS ONTROL VRY_L K IGON J GPU_PST_PWM GPU_ISP_ON GPU_PST_PWM GPU_ISP_ON MUTI GFX P TXP_PP T TXM_PN R TXP_PP U TXM_PN V R TXLK_UP_PFP K TXLK_UN_PFN L K/F_ GPU_TXULKOUT GPU_TXULKOUT- SI dd for M request V_VG R R LK_M_NONSS R *K/F_ *K/F_ *_ MV del in OM.V_VG GPIO_TRST GPIO_TMS GPIO_TK R R R R N on PRK K/F_ *K/F_ *K/F_ *K/F_ N on PRK MEM_I MEM_I MEM_I MEM_I R U P W R R U U W P W U R W U T V N V T R W U P V T R W U P VPNTL_MVP_ VPNTL_MVP_ VPNTL_ VPNTL_ VPNTL_ VPLK VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ VPT_ P P P TXP_PP T TXM_PN R TXP_PP R TXM_PN T TXP_PP V TXM_PN U TXP_PP R TXM_PN T TXP_PP T TXM_PN U TXP_PP U TXM_PN V TXP_PP T TXM_PN R TXP_PP U TXM_PN V TXP_PP T TXM_PN R TXP_PP U TXM_PN T TXP_PP T TXM_PN R TXP_PP U TXM_PN V N_TX_HMI N_TX_HMI- N_TX_HMI N_TX_HMI- N_TX_HMI N_TX_HMI- N_TX_HMI N_TX_HMI- GPU_RT_R R GPU_RT_G R /F_ /F_ TXOUT_UP_PFP J TXOUT_UN_PFN K TXOUT_UP_PFP H TXOUT_UN_PFN J TXOUT_UP_PFP G TXOUT_UN_PFN H TXOUT_UP F TXOUT_UN G LVTMP TXLK_LP_PEP P TXLK_LN_PEN R TXOUT_LP_PEP W TXOUT_LN_PEN U TXOUT_LP_PEP R TXOUT_LN_PEN U TXOUT_LP_PEP P TXOUT_LN_PEN R TXOUT_LP N TXOUT_LN P Park Pro/Madison_M GPU_TXUOUT GPU_TXUOUT- GPU_TXUOUT GPU_TXUOUT- GPU_TXUOUT GPU_TXUOUT- GPU_TXLLKOUT GPU_TXLLKOUT- GPU_TXLOUT GPU_TXLOUT- GPU_TXLOUT GPU_TXLOUT- GPU_TXLOUT GPU_TXLOUT- SI- dd V_VG R *K/F_ R *K/F_ VG_GPIO VG_GPIO VG_GPIO MV dd in OM GPU_PROHOT GPU_LVS_LON VG_GPIO VG_GPIO VG_GPIO VG_GPIO VG_GPIO GFX_ORE_NTRL LK_M_SS R, VG_LERT GPU_EILK GPU_EIT GFX_ORE_NTRL VG_GPIO TP TP TP TP TP TP GENERI TMS_HP R _.V_VG VG_GPIO VG_GPIO */s M_SSIN VG_GPIO_EN GPIO_TRST GPIO_TI GPIO_TK GPIO_TMS GPIO_TO K J H H N H J H J K J H J K L M M M K G N M L J K N M N K L M J K J K J H H K SL S I GENERL PURPOSE I/O GPIO_ GPIO_ GPIO_ GPIO SMT GPIO SMLK GPIO TT GPIO_ GPIO LON GPIO ROMSO GPIO ROMSI GPIO ROMSK GPIO_ GPIO_ GPIO_ GPIO HP GPIO PWRNTL_ GPIO SSIN GPIO THERML_INT GPIO HP GPIO TF GPIO PWRNTL_ GPIO EN GPIO ROMS GPIO LKREQ JTG_TRST JTG_TI JTG_TK JTG_TMS JTG_TO GENERI GENERI GENERI GENERI GENERIE_HP GENERIF GENERIG HP GPU_RT_ TXP_PP T R /F_ TXM_PN R GPU_RT_R R GPU_RT_R R GPU_RT_G G E GPU_RT_G G GPU_RT_ F GPU_RT_ E VG STRPS HSYN GPU_HSYN, VSYN GPU_VSYN, R _RSET /F_ RSET V.V_V VSSQ E V VI VSSI R R G G F F Y OMP F VG STRPS HSYN HSYN_ VSYN VSYN_ G V VI.V_VG VSSI G.V_VG L LMPGSN(,.)_.V_V (_V:.V@mm) ( VQ:.V@m) L.V_VQ LMPGSN(,.)_ U/.V_.U/V_.V_VG (_VI:.V@m) L V LMPGSN(,.)_ U/.V_S U/.V_.U/V_ SI dd PLL_V M.V/M.V.V_VG (.V@m PLL_PV) L LMPGSN(,.)_.VPLL_PV U/.V_ U/.V_.U/V_.V_VG (.V@m PLL_V) L LMPGSN(,.)_.VPLL_V U/.V_ U/.V_.U/V_.V_VG (.V@m TSV) L LMPGSN(,.)_.V_TSV U/.V_ U/.V_ PLE VREFG IVIER N P LOSE TO SI R /F_ R /F_ VG_VREFG H VREFG.U/V_ V V G VQ VSSQ F _RSET RSET R /F_ V_VG.V_VQ.VPLL_PV GN Option If XO_IN/XO_IN not used.vpll_v For M, XO_IN and XO_IN should be grounded LK_M_NONSS XTLIN XTLOUT R *M/F_ SI el OM GFX_THM GFX_THM- Y *MHZ *P/V_ *P/V_.V_TSV PLL/LOK M PLL_PV N PLL_PVSS N PLL_V W XO_IN W XO_IN V XTLIN U XTLOUT F PLUS G THERML MINUS K TS_FO J TSV J TSVSS Park Pro/Madison_M /UX LK M T N UXP M UXN L LK M T L UXP N UXN M LK_UXP L T_UXN M LK_UXP L T_UXN M LK_UXP N T_UXN M LK J T J N_LK_UXP K N_T_UXN K HMI_SL HMI_S GPIO Low Low High High GPU_LK GPU_T GPIO VGORE Low.V High.V Low.V High.V GPIO VI High.V Low.V MEM_I[:] Vendor Type Vendor P/N,,,,,,,,,,,.V_VG.V_VG V_VG Hinyx *-MHZ HTQGFR- Samsung *-MHZ KWGE-H Samsung *-MHZ KWGE-H PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N TI M-M (ISPLY) / ustom ate: Tuesday, February,

17 UF PIE_VSS# E PIE_VSS# F PIE_VSS# F PIE_VSS# G PIE_VSS# G PIE_VSS# H PIE_VSS# H PIE_VSS# H PIE_VSS# J PIE_VSS# J PIE_VSS# K PIE_VSS# K PIE_VSS# K PIE_VSS# L PIE_VSS# L PIE_VSS# M PIE_VSS# M PIE_VSS# N PIE_VSS# N PIE_VSS# P PIE_VSS# P PIE_VSS# P PIE_VSS# R PIE_VSS# T PIE_VSS# T PIE_VSS# T PIE_VSS# U PIE_VSS# U PIE_VSS# V PIE_VSS# V PIE_VSS# W PIE_VSS# W PIE_VSS# Y PIE_VSS# Y PIE_VSS# F F F F F F F F F F F F G G H J J J J K K L L L L L L M M M N N N N N N N R R R R R R R R T T T T T T T U U U U U U U U V V V V V V W W Y Y Y Y Y Y U V GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# Park Pro/Madison_M GN GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN/PX_EN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# GN# VSS_MEH# VSS_MEH# VSS_MEH# E E F F F F G G G G G G H J J J J J K K K L L L L L L L L L L L M M M N N N N N P P P R E E F F W W,,,,,, VG_GPIO VG_GPIO VG_GPIO VG_GPIO VG_GPIO VG_GPIO VG_GPIO VG_GPIO GENERI VG_GPIO GPU_VSYN GPU_HSYN VSYN_ HSYN_ M M M M M G G G MLK MT STRPS Memory perture size fix M GPIO IOSROM V_VG V_VG M_LK M_T V_VG GPIO GPIO GPIO ROMIFG ROMIFG ROMIFG It is a shared pin strap with ONFIG[:] if IOS_ROM_EN is set to. R R R R R R R R R R R R R R K/J_ K/J_ *K/J_ *K/J_ *K/J_ *K/J_ *K/J_ K/J_ *K/J_ *K/J_ K/J_ K/J_ *K/J_ *K/J_ Q NEPT_S Q NEPT_S V_VG, RSV IF_VG_IS RSV V_VG VG_LERT VG_LERT M_LK M_T,,,,, LLOW FOR PULLUP PS FOR THESE STRPS N IF THESE GPIOS RE USE, THEY MUST NOT ONFLIT URING RESET TX_PWRS_EN TX_EEMPH_EN IF_GEN_EN_ VIP_EVIE_STRP_EN RSV U[] U[] STRPS IOS_ROM_EN ROMIFG(:) R HSYN ONFIGURTION STRPS PIN GPIO GPIO GPIO GPIO GPIO GPIO GPIO ROMS GPIO[:] VSYN GENERI HSYN VSYN GENERI GPIO EN V_VG VG ENLE ESRIPTION OF EFULT SETTINGS Transmitter Power Savings Enable : % Tx output swing for mobile mode : full Tx output swing (efault setting for esktop) PI Express Transmitter e-emphasis Enable : Tx de-emphasis disabled for mobile mode : Tx de-emphasis enabled (efault setting for esktop) = dvertises the PI-E device as. GT/s capable at power-on. = dvertises the PI-E device as. GT/s capable at power-on.. GT/s capability will be controlled by software. ENLE EXTERNL IOS ROM SERIL ROM TYPE OR MEMORY PERTURE SIZE SELET IGNORE VIP EVIE STRPS U[] U[] No audio function udio for isplayport and HMI if dongle is detected udio for isplayport only udio for both isplayport and HMI M RESERVE ONFIGURTION STRPS LLOW FOR PULLUP PS FOR THESE STRPS N IF THESE GPIOS RE USE, THEY MUST NOT ONFLIT URING RESET PULLUP PS RE NOT REQUIRE FOR THESE STRPS UT IF THESE GPIOS RE USE, THEY MUST NOT ONFLIT URING RESET R R K/F_ K/F_ K/F_ Thermal Sensor SMLK SMT -LT GN G-P@EV U I RESS: H V XP XN -OVT -_V -VGTHRM R R /F_.U/V_ GFX_THM P/V_ GFX_THM- K/F_ V_VG GFX_THM w/s / GFX_THM- V_VG REOMMENE SETTINGS = O NOT INSTLL RESISTOR = INSTLL K RESISTOR X = ESIGN EPENNT N = NOT PPLILE PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N TI M(GN&Str&Ther)/ ustom ate: Tuesday, February,

18 .V_VG ) MEM I/O PIE VR# PIE_VR# VR# PIE_VR# F VR# PIE_VR# G.U/V_.U/V_.U/V_ U/.V_.U/V_.U/V_.U/V_ VR# PIE_VR# J VR# PIE_VR# K VR# PIE_VR# L VR# PIE_VR# G VR# PIE_VR# G VR# G VR# G VR# PIE_V# G VR# PIE_V# G.U/V_.U/V_.U/V_.U/V_ VR# PIE_V# G VR# PIE_V# H VR# PIE_V# J VR# PIE_V# J VR# PIE_V# SI dd K VR# PIE_V# K VR# PIE_V# K VR# PIE_V# L VR# PIE_V# L U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ VR# PIE_V# L VR# L VR# L VR# ORE V# L VR# V# SI dd M VR# V# N VR# V# P VR# V# R VR# V# U VR# V# U VR# V# Y VR# V# Y VR# V# V#.V_VG V# V# SI hange OM.V_V_T LEVEL V# (.V@m V_T) TRNSLTION V# L LMPGSN(,.)_ V# F V_T# V# F VR V_T# V# G V_T# V# G L LMPGSN(,.)_ U/.V_ U/.V_.U/V_ V_T# V# V# I/O V# V# SI hange OM (.V@m VR) F VR# V# V_VG F U/.V_S U/.V_.U/V_ VR# V# G VR# V# G VR VR# V# MPV U/.V_ U/.V_ V# V# F L LMPGSN(,.)_ VR# V# VR for VPT[..] F VR# V# G VR# V# G VR VR# V# SI hange OM U/.V_ V# V# (VR_ :.V@/m) U/.V_S.U/V_ VR# V# F VR# V# VR for VPT[..] F VR# V# G VR# V# V# SPV V# V# L LMPGSN(,.)_ V# M N_VRH V# M N_VSSRH V# V# SI hange OM V# V U/.V_ U/.V_.U/V_ N_VRH V# U N_VSSRH V# V# V# V# (.V@m PIE_PV) PLL V# L LMPGSN(,.)_ PIE_PV V# PIE_PV V# MPV V# H SI hange OM MPV# V# H U/.V_ U/.V_ U/.V_ MPV# V# SPV (SPV :.V@m) M SPV.V_VG L LMPGSN(,.)_ SPV VI# N SPV VI# VI# N SPVSS VI# SI hange OM U/.V_ U/.V_.U/V_ VI# VI# VI# VOLTGE VI# SENESE VI# VI# VI# F F_V VI# VI# VI# G F_VI ISOLTE VI# ORE I/O VI# VI# H F_GN VI# VI# VI# VI# VI# SI el R u_.v_ u_.v_ UE Park Pro/Madison_M POWER V W W Y G G H H J J L M N R T U F F F G G G H H H M N N R R R R T T T T T U U U U U V V V V V Y Y Y Y Y Y M M M M N N N N N R R R T T V Y.V_VG (.V@m PIE_VR).V_PIE_VR L.U/V_.U/V_.U/V_.U/V_ U/.V_S U/.V_ u_.v_ U/.V_S SI MOIFY SI SI MOIFY (For MP,.V@ VI). VGORE VI L UPT-Y-N(,M,)_ SI hange OM.U/.V_.U/.V_.U/.V_ U/.V_.U/.V_.U/V_ U/.V_ U/.V_ U/.V_,,,.V_VG VGORE,,,,.V_VG,,,.V_VG,,,,, V_VG SI MOIFY and U/.V_ u_.v_ U/.V_ U/.V_ u_.v_ SI hange OM U/.V_.V_VG (.V@m PIE_V) U/.V_ U/.V_.U/.V_.U/.V_ U/.V_ Size ocument Number Rev N TI M-M (POWER) / ustom ate: Tuesday, February, LMPGSN(,.)_ LMPGSN(,.)_ VGORE.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_ U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S SI PROJET : LX_LX Quanta omputer Inc.

19 VREF_VM VREF_VM VREF_VM VREF_VM VM_ZQ VM_LK_OMM VM_LK VM_LK# VREF_VM VREF_VM VREF_VM VREF_VM VM_LK_OMM VM_LK VM_LK# VM_ZQ VM_ZQ VM_ZQ VREF_VM VREF_VM VM_OT VM_M VM_M VM_RQS VM_RQS VM_WQS VM_WQS VM_WQS VM_ VM_ VM_ VM_KE VM_WE# VM_OT VM_LK VM_LK# VM_S# VM_RST# VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VREF_VM VREF_VM VM_M VM_S# VM_RS# VM_RQS VM_RQS VM_WQS VM_RST# VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VREF_VM VREF_VM VM_OT VM_M VM_M VM_ VM_ VM_ VM_RQS VM_RQS VM_WQS VM_WQS VM_RST# VM_OT VM_LK VM_LK# VREF_VM VREF_VM VM_KE VM_WE# VM_S# VM_S# VM_RS# VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_ VM_ VM_ VM_RQS VM_RQS VM_WQS VM_WQS VM_Q VM_Q VM_Q VM_M VM_M VM_M VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_WE# VM_S# VM_LK# VM_LK VM_KE VM_ VM_ VM_ VM_S# VM_RS# VM_RST#, VM_Q[..] VM_M[..] VM_WQS[..] VM_RQS[..] VM_WE# VM_S# VM_LK VM_LK# VM_KE VM_S# VM_RS# VM_M.V_VG,,,, VM_OT VM_OT.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG Size ocument Number Rev ate: Quanta omputer Inc. PROJET : LX_LX N L ONN/HMI/Lid ustom Tuesday, February, Size ocument Number Rev ate: Quanta omputer Inc. PROJET : LX_LX N L ONN/HMI/Lid ustom Tuesday, February, Size ocument Number Rev ate: Quanta omputer Inc. PROJET : LX_LX N L ONN/HMI/Lid ustom Tuesday, February, Should be Ohms -% HNNEL : M/M R Should be Ohms -% Should be Ohms -% Should be Ohms -% U/.V_ U/.V_ U/.V_ U/.V_ R./F_ R./F_.U/V_.U/V_ R /F_ R /F_ U/.V_ U/.V_ R.K/F_ R.K/F_ -LL SRM R U KWGE-H -LL SRM R U KWGE-H WE L RS J S K S /S L KE/KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N/OT J V# V# VQ# VQ# VQ# VQ# N/S L N/E J VQ#E E ZQ/ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT/OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T / M M VREFQ H N/ZQ L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# N N T N N T U/.V_ U/.V_.U/V_.U/V_ U/.V_S U/.V_S U/.V_ U/.V_ U/.V_ U/.V_ R.K/F_ R.K/F_ R /F_ R /F_ U/.V_ U/.V_ U/.V_ U/.V_ R.K/F_ R.K/F_ U/.V_ U/.V_ -LL SRM R U KWGE-H -LL SRM R U KWGE-H WE L RS J S K S /S L KE/KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N/OT J V# V# VQ# VQ# VQ# VQ# N/S L N/E J VQ#E E ZQ/ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT/OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T / M M VREFQ H N/ZQ L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# N N T N N T U/.V_ U/.V_.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_ -LL SRM R U KWGE-H -LL SRM R U KWGE-H WE L RS J S K S /S L KE/KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N/OT J V# V# VQ# VQ# VQ# VQ# N/S L N/E J VQ#E E ZQ/ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT/OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T / M M VREFQ H N/ZQ L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# N N T N N T R.K/F_ R.K/F_ U/.V_ U/.V_ R.K/F_ R.K/F_ U/.V_ U/.V_.U/V_.U/V_ U/.V_S U/.V_S -LL SRM R U KWGE-H -LL SRM R U KWGE-H WE L RS J S K S /S L KE/KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N/OT J V# V# VQ# VQ# VQ# VQ# N/S L N/E J VQ#E E ZQ/ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT/OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T / M M VREFQ H N/ZQ L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# N N T N N T U/.V_ U/.V_ R./F_ R./F_ U/.V_ U/.V_ U/.V_ U/.V_.U/V_.U/V_ R.K/F_ R.K/F_ R.K/F_ R.K/F_ R.K/F_ R.K/F_ R./F_ R./F_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ R /F_ R /F_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ R.K/F_ R.K/F_ U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S U/.V_S R.K/F_ R.K/F_ R.K/F_ R.K/F_ U/.V_ U/.V_ R.K/F_ R.K/F_ U/.V_ U/.V_ U/.V_S U/.V_S R /F_ R /F_.U/V_.U/V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_S U/.V_S U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_S U/.V_S R.K/F_ R.K/F_ U/.V_S U/.V_S R.K/F_ R.K/F_.U/V_.U/V_ U/.V_ U/.V_ U/.V_S U/.V_S R./F_ R./F_.U/V_.U/V_ U/.V_ U/.V_ R.K/F_ R.K/F_ R.K/F_ R.K/F_ U/.V_ U/.V_

20 VM_RST# VM_WQS VM_RST# VREF_VM VREF_VM VREF_VM VREF_VM VM_ VM_ VM_ VM_OT VM_LK VM_LK# VREF_VM VREF_VM VM_KE VM_WE# VM_S# VM_S# VM_RS# VM_OT VM_KE VM_WE# VREF_VM VREF_VM VM_OT VM_LK VM_LK# VM_S# VM_RST# VREF_VM VREF_VM VM_OT VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VREF_VM VREF_VM VM_M VM_ZQ VM_S# VM_RS# VM_LK_OMM VM_LK VM_LK# VM_RQS VREF_VM VREF_VM VM_RQS VREF_VM VREF_VM VM_LK_OMM VM_LK VM_LK# VM_ZQ VM_ZQ VM_WQS VM_RQS VM_RQS VM_WQS VM_WQS VM_ZQ VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_ VM_ VM_ VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_ VM_ VM_ VM_M VM_M VM_WQS VM_WQS VM_RQS VM_RQS VM_M VM_M VM_RQS VM_WQS VM_RQS VM_WQS VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_M VM_M VM_M VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q VM_Q[..] VM_M[..] VM_WQS[..] VM_RQS[..] VM_KE VM_RST#, VM_S# VM_S# VM_RS# VM_RS# VM_WE# VM_S# VM_WE# VM_S# VM_LK VM_LK# VM_LK# VM_LK VM_KE VM_ VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_M VM_ VM_ VM_M.V_VG,,,, VM_OT VM_OT.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG.V_VG Size ocument Number Rev ate: Quanta omputer Inc. PROJET : LX_LX N L ONN/HMI/Lid ustom Tuesday, February, Size ocument Number Rev ate: Quanta omputer Inc. PROJET : LX_LX N L ONN/HMI/Lid ustom Tuesday, February, Size ocument Number Rev ate: Quanta omputer Inc. PROJET : LX_LX N L ONN/HMI/Lid ustom Tuesday, February, Should be Ohms -% HNNEL : M/M R Should be Ohms -% Should be Ohms -% Should be Ohms -% U/.V_ U/.V_ U/.V_ U/.V_ U/.V_S U/.V_S R.K/F_ R.K/F_ U/.V_ U/.V_ U/.V_ U/.V_ R.K/F_ R.K/F_ R.K/F_ R.K/F_ U/.V_ U/.V_ U/.V_S U/.V_S U/.V_ U/.V_ R.K/F_ R.K/F_ U/.V_ U/.V_ U/.V_ U/.V_.U/V_.U/V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_S U/.V_S -LL SRM R U KWGE-H -LL SRM R U KWGE-H WE L RS J S K S /S L KE/KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N/OT J V# V# VQ# VQ# VQ# VQ# N/S L N/E J VQ#E E ZQ/ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT/OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T / M M VREFQ H N/ZQ L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# N N T N N T R.K/F_ R.K/F_ U/.V_ U/.V_.U/V_.U/V_ U/.V_ U/.V_ U/.V_S U/.V_S -LL SRM R U KWGE-H -LL SRM R U KWGE-H WE L RS J S K S /S L KE/KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N/OT J V# V# VQ# VQ# VQ# VQ# N/S L N/E J VQ#E E ZQ/ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT/OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T / M M VREFQ H N/ZQ L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# N N T N N T.U/V_.U/V_ U/.V_ U/.V_ R /F_ R /F_ R.K/F_ R.K/F_ U/.V_ U/.V_ R.K/F_ R.K/F_.U/V_.U/V_ R.K/F_ R.K/F_ R./F_ R./F_.U/V_.U/V_ U/.V_ U/.V_ R.K/F_ R.K/F_.U/V_.U/V_ U/.V_ U/.V_.U/V_.U/V_ R /F_ R /F_ R.K/F_ R.K/F_ R.K/F_ R.K/F_ R /F_ R /F_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ R /F_ R /F_ R.K/F_ R.K/F_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_ R./F_ R./F_ U/.V_ U/.V_ -LL SRM R U KWGE-H -LL SRM R U KWGE-H WE L RS J S K S /S L KE/KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N/OT J V# V# VQ# VQ# VQ# VQ# N/S L N/E J VQ#E E ZQ/ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT/OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T / M M VREFQ H N/ZQ L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# N N T N N T R.K/F_ R.K/F_.U/V_.U/V_ U/.V_S U/.V_S R.K/F_ R.K/F_ U/.V_S U/.V_S U/.V_ U/.V_ U/.V_S U/.V_S R.K/F_ R.K/F_.U/V_.U/V_ U/.V_ U/.V_ U/.V_ U/.V_ U/.V_S U/.V_S U/.V_ U/.V_ U/.V_ U/.V_ U/.V_S U/.V_S R./F_ R./F_ R.K/F_ R.K/F_ -LL SRM R U KWGE-H -LL SRM R U KWGE-H WE L RS J S K S /S L KE/KE K K J K K QSU M N P N P P R R T R /P L R QL E QL F QL F QL F QL H QL H QL G QL H VSSQ# VSS# VSS#E E VSS# N/OT J V# V# VQ# VQ# VQ# VQ# N/S L N/E J VQ#E E ZQ/ZQ L RESET T QSL F MU ML E VSSQ# VSSQ# VSSQ# VSSQ#E E QSU VSSQ#E E QSL G VQ#F F VSSQ#F F VSSQ#G G VQ#H H VQ#H H VSSQ#G G VREF M VSS#G G V#G G OT/OT K N P V#K K / N VSS#J J V#K K QU QU QU QU QU QU QU QU T T / M M VREFQ H N/ZQ L V#N N V#N N V#R R V#R R VSS#J J VSS#M M VSS#M M VSS#P P VSS#P P VSS#T T VSS#T T VQ# N N T N N T.U/V_.U/V_ U/.V_ U/.V_ R./F_ R./F_ U/.V_ U/.V_ U/.V_S U/.V_S

21 E.V LVS hannel Switch PH_LVS_LON R K/F_ V PST ontrol PH_ISP_ON R K/F_ GPU_LVS_LON R *K/F_ U.U/V_.U/V_.U/V_.U/V_.U/V_ V SEL PWM_SELET# FOR IS ONLY GPU_PST_PWM IN_ PST_PWM SEL FUNTION(OM) U PH_PST_PWM IN_ GN LOW IN_ to GPU_TXLLKOUT R *_ PWM_VJ GPU_TXLLKOUT- LVS/RT Switch HIGH IN_ to *NLSFTG GPU_TXLOUT GPU_TXLOUT- PV del in OM U GPU_TXLOUT To LVS onn. SEL FUNTION(OM) GPU_EILK I GPU_TXLOUT- PH_EILK I LOW IN_ to GPU_EIT I Y EILK GPU_TXLOUT TXLLKOUT PH_EIT I Y EIT GPU_TXLOUT- TXLLKOUT- HIGH IN_ to GPU_LK Pericom I Y LK_OM PH_LK I Y T_OM GPU_T I PIPIE-ZHE PH_T I TXLOUT V EI_SELET# SEL V V TXLOUT- U /E GN PH_L_LK PH_L_LK# GPU_SELET# V SEL T.U/V_ PH_L_TP LVS_LON TXLOUT PH_LVS_LON IN_ LVS_LON PH_L_TN TXLOUT- GPU_LVS_LON GPU_LVS_LON IN_ GN PH_L_TP PH_L_TN NLSFTG TXLOUT PH_L_TP TXLOUT- PH_L_TN VG SWITH U GPU_RT_R RT_R_ON GPU_SELET# R.K/F_ LVS_SW_SEL I Y SEL GPU_RT_G I Y RT_G_ON GPU_RT_ RT ON LVcc control I Y, GPU_HSYN HSYN_OM R I Y, GPU_VSYN IE YE VSYN_OM SEL FUNTION K/F_ V PH_RT_R LOW GPU (N to ) PIPIE-ZHE I PH_RT_G GPU_SELET# U I SEL.V PH_RT_ HIGH IGPU (N to ) GPU_SELET# I PH_HSYN.U/V_ V SEL I V PH_VSYN PH_ISP_ON ISP_ON IE IN_ ISP_ON GPU_ISP_ON GPU_ISP_ON GN V U *PIPIE-ZHE IN_ GN GN V GN V GPU_TXULKOUT GN V GPU_TXULKOUT- NLSFTG GPU_TXUOUT PIV.U/V_.U/V_ GPU_TXUOUT- GPU_TXUOUT GPU_TXUOUT- FOR UM ONLY PV EMI request GPU_TXUOUT TXULKOUT OPTION SIGNL FROM N to LVS for UM GPU_TXUOUT- Pericom TXULKOUT- PH_L_LK RP *_PR_ TXLLKOUT PH_L_LK# TXLLKOUT- PH_L_TP RP *_PR_ TXLOUT PIPIE-ZHE PH_L_TN TXLOUT- TXUOUT FOR IS ONLY PH_L_TP RP *_PR_ TXLOUT TXUOUT- OPTION SIGNL FROM N to LVS for IS PH_L_LK PH_L_TN TXLOUT- PH_L_LK# PH_L_TP RP TXLOUT GPU_TXLLKOUT RP *_PR_ TXLLKOUT *_PR_ PH_L_TN TXLOUT- GPU_TXLLKOUT- TXLLKOUT- PH_L_TP GPU_TXLOUT RP TXLOUT TXUOUT *_PR_ PH_L_TN GPU_TXLOUT- TXLOUT- TXUOUT- OPTION ack Light SIGNL FROM N to LVS for UM GPU_TXLOUT RP *_PR_ TXLOUT PH_L_TP GPU_TXLOUT- TXLOUT- PH_L_TN GPU_TXLOUT RP *_PR_ TXLOUT RP *_PR_ GPU_TXLOUT- TXLOUT- TXUOUT PH_L_TP PH_LVS_LON LVS_LON TXUOUT- PH_L_TN PH_ISP_ON ISP_ON OPTION ack Light SIGNL FROM N to LVS for IS RP *_PR_ PH_EILK EILK RP *_PR_ PH_EIT EIT GPU_LVS_LON LVS_LON GPU_SELET# R *.K/F_LVS_SW_SEL GPU_ISP_ON ISP_ON SEL OPTION SIGNL FROM N to LVS for UM OPTION SIGNL FROM N to LVS for IS PH_L_LK RP *_PR_ TXULKOUT PH_L_LK# TXULKOUT- OPTION SIGNL FROM N to RT for IS OPTION SIGNL FROM N to RT for UM PH_L_TP RP *_PR_ TXUOUT PH_L_TN TXUOUT- GPU_RT_R R *_ RT_R_ON PH_RT_R R *_ RT_R_ON PH_L_TP RP *_PR_ TXUOUT PH_L_TN TXUOUT- GPU_RT_G R *_ RT_G_ON PH_RT_G R *_ RT_G_ON PH_L_TP RP *_PR_ TXUOUT PH_L_TN TXUOUT- FOR "IS ONLY GPU_RT_ R *_ RT ON PH_RT_ R *_ RT ON GPU_TXULKOUT RP *_PR_ TXULKOUT RP *_PR_ RP *_PR_ GPU_TXULKOUT- TXULKOUT- GPU_HSYN HSYN_OM PH_HSYN HSYN_OM GPU_TXUOUT RP *_PR_ TXUOUT GPU_VSYN VSYN_OM PH_VSYN VSYN_OM GPU_TXUOUT- TXUOUT- GPU_TXUOUT RP *_PR_ TXUOUT GPU_TXUOUT- TXUOUT- PH_PST_PWM R _ PST_PWM GPU_TXUOUT RP *_PR_ TXUOUT GPU_TXUOUT- TXUOUT- GPU_LK GPU_T FOR IS ONLY OPTION SIGNL FROM N to RT for IS RP *_PR_ R *K/F_ LK_OM T_OM GN-THERML GN-THERML V V V V V V V V GN GN GN GN GN GN GN GN GN V V V V V V V V GN GN GN GN GN GN GN GN GN PH_LK PH_T To LVS onn. FOR " SG ONLY FOR UM ONLY OPTION SIGNL FROM N to RT for UM RP *_PR_ LK_OM T_OM FOR "UM ONLY FOR UM/SG V,,,,,,,,,,,,,,,,,,,,,,,, V,,,,,,,,,,.V,,,, GPU_EILK GPU_EIT GPU_PST_PWM RP R *_ *_PR_ PST_PWM EILK EIT PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N SWITHLE ustom ate: Tuesday, February, E

22 ISP_ON Q TEU R K/F_ VLW.v R K_ VSUS Q O LONG R K/F_ Q NE.U/V_ LON# V.U/V_ VL L R _ LISHG Q NE VL_ON HKF-T SI dd OM *.U/V_.U/V_ U/.V_ V R.K_ EILK R.K_ EIT IGITL_ IGITL_LK P/V_ P/V_ lose to N V R /F_ VIN_LIGHT V IGITL_ IGITL_LK P/V_ PST_PWM VL_ON EILK EIT TXLOUT- TXLOUT P/V_ TXLOUT- TXLOUT TXLOUT- TXLOUT TXLLKOUT- TXLLKOUT TXUOUT- TXUOUT TXUOUT- TXUOUT TXUOUT- TXUOUT TXULKOUT- TXULKOUT LOGO_PWR L SKT-Y-N IGITL_LK_L.V_M USP- USP- USP USP L *WM- LON_ON VIN_LIGHT *.U/.V_ P/V_ N GS--F VIN L UPT-Y-N VIN_LIGHT R K/F_.U/V_.U/V_.U/V_.U/V_ *U/V_ P/V_ RV- PN_LON LON_ON R K_ VPU LVS_LON R K/F_ RV- LI_E#, EMI Request R K/F_ L_K Q *TEU VPU VIN VIN VIN.U/V_ *.U/V_ *.U/V_ *.U/V_ V.V_M U VIN VOUT PV EMI request MV EMI Request U/.V_, EPWROK SHN R R *K/F_ U/.V_.U/V_ GN SET TH-.KER R R *K/F_ Vout=.(R/R),,,,,,,,,,,,,,,,,,,,,,,, V,,,,,,,,,, V,,,,,,,, VIN,,,,,,,,,, VPU,,, VLW PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N L ONN/LI function ustom ate: Tuesday, February,

23 RT_R_ON RT_G_ON RT ON RT_R_ON RT_G_ON RT ON R /F_ R /F_ R /F_ V SI hange VRT F mils VRT FUSEV_POLY SSM spec is V L KLL(.,)_ L KLL(.,)_ L KLL(.,)_.P/V_.P/V_.P/V_.P/V_.U/V_ MIL RT_R RT_G RT_.P/V_.P/V_ RT PORT RT ONN N SI EMI Request R _ RTVSYN_ V V.U/V_.U/V_ ES PROTETION R _ R R *_/S short *_/S short RTHSYN_ LK T RT_R RT_G RT_ V_SYN V_VIEO VIEO_ VIEO_ VIEO_ GN V_ YP U SYN_OUT SYN_IN SYN_OUT SYN_IN _OUT _IN _IN _OUT RTVSYN_ VSYN_OM RTHSYN_ HSYN_OM LK LK_OM T_OM T VSYN_OM HSYN_OM LK_OM T_OM *P/V_ P/V_ *P/V_ SI EMI Request P/V_ SI EMI Request.U/.V_ M R.K_ R.K_ VRT RV- V_RT V,,,,,,,,,,,,,,,,,,,,,,,, V,,,,,,,,,, PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N RT/HMI onn ustom ate: Tuesday, February,

24 LK_M_R R *_/S XTLO XTL control pin for Mhz crystal or Mhz clk in VSUS_RTS R *_/S X_# SP S_# SP R.K/F_ RREF SI del R,R USP- M USP P *.P/V_ XTLO R Y *K_ *MHz XTLI *.P/V_ reserve XTL_TR GPIO EEO EES EESK EEI X_# S_WP S_# MS_ S_T/X_ MS_ RREF M P MHZ_XTLO MHZ_XTLI U X_LE X_E# X_LE S_T/X_RE# S_T/X_WE# X_RY S_T/X_WP#/MS_ S_M S_T/X_/MS_ S_LK/X_/MS_LK S_T/X_/MS_ N MS_INS# S_T/X_/MS_ S_T/X_/MS_ X_/MS_ X_/MS_S V_PLL_IN VREG_OUT V_IN N V_ IN V_IN SP SP SP SP SP SP SP S_M_R SP SP SP MS_# SP SP SP SP.U/V_ VREG VSUS_RTS.U/V_ S_LK_MS_LK R *_/S SP lose to hipset SP *P/V_ VSUS_RTS U/.V_ R *_/S V short Without memory card m suspend current u.u/v_.u/.v_ VSUS_RTS Note: S/MM MS X SP SP X_# SP S_WP SP S_# SP S_T X_ SP MS_S X_ SP MS_ X_ SP S_T MS_ X_ SP S_T MS_ X_ SP MS_INS# SP S_T MS_ X_ SP S_LK MS_SLK X_ SP S_T X_ SP S_T X_WP# SP X_R/# SP S_T X_WE# SP S_T X_RE# SP X_LE SP X_E# SP X_LE MOE_SEL R *_/S MOE_SEL N R_V_OUT.U/V_ *.U/.V_ VR VR VSUS_RTS R *K/F RST# RST# G G_PLL GN GN U/.V_ SI el OM U/.V_ Realtek RTS RTS max output current for.. X card m S/MM m MS/MSPRO m *.U/V_ *.U/V_ *.U/V_ X,MM/S,MS/MSP IN R REER VR VR VR LOSE N VR R *K/F_ VR *P/V_ SP SP SP SP SP SP SP SP SP SP S_M_R S_LK_MS_LK SP MS_# SP SP SP N X-R/ X-RE X-E X-LE X-LE X-WE X-WP X- X- S-T S-T S-M IN-GN MS-V MS-SLK MS-T MS-INS MS-T MS-T MS-T MS-S IN-GN S-V S-LK S-T X- X- X- S-T X- X- X- X-V X--SW S-WP-SW S--SW SHIEL-GN SHIEL-GN OS OS SP SP S_LK_MS_LK SP SP SP SP SP SP SP SP X_# SP S_# V,,,,,,,,,,,,,,,,,,,,,,,, R REER SOKET.U/.V_ R K/F_.U/V_.U/V_.U/V_ IN R-REER (PUSH-PUSH) Support S/S PRO/MM/MS/MS PRO/x ards PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N RTS & R SOKET ustom ate: Tuesday, February,

25 V VOLMUTE# IT_GPIO MUTE_LE#,,,,,,,,,,,,,,,,,,,,,,,, V.VV,,,,,,,,,, V MUTE_LE_R _VREG GN High-->un-Mute R K/F_ T R *K/F_ Q NE VREG V-.U/.V_ igital VREFFILT P U/.V_S MONO_OUT _VREFFILT U/.V_S _P GN GN GN U/.V_ lose to OE.VV V U V_V L.VV Vout Vin >mils trace HK-T YP lose to OE.U/.V_.U/V_ U/.V_.U/V_ U/.V_ GN EN.U/V_ U/.V_.U/V_ V_V_ORE U/.V_ TPS V U/.V_S U/.V_.U/V_ el L GN GN GN R K_ V U/.V_S Vset=.V U/.V_.U/V_ U GN V V_ORE V lose to OE >mils trace V V V SENSE_ PV R.K/F_ V_V V_IO PV GN P/V_ IT_LK_UIO R *_/S H_LK.U/V_ H_ITLK U/.V_.U/V_ U/.V_S SENSE_ R K/F_ V_V R _ H_SIN SENSE_ Z_SIN H_SI SENSE_ SENSE_ GN Z_SOUT_UIO R *_/S H_SOUT SENSE_ H_SO SENSE_ *P/V_ *P/V_ H us Z_SYN_UIO R *_/S H_SYN GN *P/V_ H_SYN Z_RST#_UIO MI_L H_RST# HP_PORT L MI_L MI_R HP_PORT R MI_R TO udio Jack MI VREFOUT_ VREFOUT or_f VREFOUT_ P/V_ SI el R,R GN SHIEL IGITL_LK R /F_ MI_LK_R HPOUT_L HPOUT_L TO igital MI IGITL_ MI MI_LK/GPIO HP_PORT L R *_/S MI/GPIO GN SHIEL TO Headphone jack HPOUT_R HP_PORT R HPOUT_R P/V_ GN SHIEL IT_GPIO MI/GPIO/SPIF_OUT_ PORT L V R K/F_ SPIF_OUT_ PORT R VOLMUTE# _EP# VREFOUT_ EP L_SPK SPKR_PORT L PV hange V to V_V RV- L_SPK- VSS SPKR_PORT L- _EP# TO Internal Speakers R_SPK- V_V P- SPKR_PORT R- R_SPK SPKR_PORT R P- lose to OE PORT_E_L hanged by IT recommend.u/.v_ PORT_E_R close, and IT_LK_UIO Z_SIN P P nalog R K/F_ PORT_F_L close hip VSS PORT_F_R VSS.U/V_.U/V_ VSS MP_EEP MP_EEP_L MP_EEP_R P_EEP R K_ PVSS P/V_ P/V_ PV el R,R, P R FOR EMI K/F_ Z_SPKR, R _ H.U/V_ GN NE Q / R _ SS_OUT SS_OUT R close R R _ GN GN R _ MUTE_LE V Low -->MUTE _V- L_SPK L_SPK- R_SPK- R_SPK EMI Request L L L L SKT-Y-N SKT-Y-N SKT-Y-N SKT-Y-N L_SPK_R L_SPK-_R R_SPK-_R R_SPK_R SI dd for subwoofer noies INT. SPEKER INT SPEKER ONN N GN E R R */s */s PV EMI Request P/V_ P/V_ P/V_ GN P/V_ PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev ustom N zalia H Tuesday, February, ate: E

26 GN SHIEL GN SHIEL GN SHIEL HPOUT_L HPOUT_R HPOUT_L HPOUT_R SI- hange R _ R _ HPOUT_L HPOUT_R L L SKT-Y-N SKT-Y-N HPOUT_L HPOUT_R Line out N V R K_ R K/F_ Q MNK- SENSE_ SENSE_ PV IT Request P/V_ P/V_ GN.U/V_.U/V_ GN HP-JK-GREEN Normal lose SENSE_PHONE SENSE_PHONE GN VREFOUT_ VREFOUT_ R.K_ R.K_ U/.V_ P/V_ MI V R K_ R Q MNK-.K/F_ SENSE_ MI_L MI_R MI_L MI_R.U/.V_.U/.V_ GN MI_L L MI_R L GN SKT-Y-N MI_IN_L SKT-Y-N MI_IN_R GN P/V_ GN SENSE_MI N MI-JK-PINK Normal lose SENSE_MI GN ccelerometer Sensor V SGT-LISLTR interrupt pin default is low / active Hi, IOS need to programming h to change status from active Hi to low U HPLTR Vdd_IO V *U/.V_.U/V_.U/V_ INTH# INT INT,,,, GT_SM,,,, GLK_SM V R *K/F_ SO S/SI/SO SL/SP S GN GN GN GN Pin : Low Pin : unconnected/floating hex hex PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N udio Jack/ccelerometer ustom ate: Tuesday, February,

27 VREF_R R SI hange *K/F_.VV OUT_Y EQ FOR SUWOOFER R *_.VV SI hange *U/.V_S R *.U/V_ *K/F_ GN HPOUT *P/V_ OUT_S R *.K/F NS *.U/V_ VREF_R IN-_S *P/V_ *.U/V_ R R *K/F_ GN - OUT_S U *TLVPWRG *.K/F R *K/F_ VREF_R SS_OUT HPOUTL_EQ R *U/V/R R VREF_R *P/V_ *K/F_ *K/F_ - U *TLVPWRG *U/V/R R GN NS *.U/V_ OUT_S VREF_R IN-_S - *P/V_ U *TLVPWRG *.U/V_ *.K/F R *.K/F R *K/F_ GN hange EQ to EQ R EQ_S *K/F_ *P/V_ EQ_S - U *TLVPWRG *P/V_ R *K/F_ *U/V/R SU_OUT PV hange for HP request Sub-Woofer power PV PV R *K_ VIN PV R *_/S short PV change to short pad V PV remove OM V R *K/F EP# R *K_ R _EP# *K_ U S FULT PVL PVL *u_v_ *.U/V_ *P/V_ N_ N_ SN_ OUTN_ *.U/V_ SU_GN PV R R *_ *_ GIN GIN PGN OUTN_ SU_GN L *PYT-Y(,)_ N SU_GN SU_GN R R *_ *U/V_ SU_GN *.K/F_ *U/V_ R *U/V_ *.K/F_ *U/V_ *U/V_ V GN GV PLIMIT INN INP N_ SN_ SP_ OUTP_ PGN OUTP_ SP_ PV *.U/V_ *.U/V_ SU_GN *.U/V_ L *PYT-Y(,)_ PV R *_ *P/V_ SU_GN SU_OUT SU_OUT- *-L *P/V_ -L-p-r SU_OUT GN SU_GN PV R *K_ V *HP GN SU_GN PV *u_v_ *.U/V_ *P/V_ L * R R */s *_ EMI Request SU_GN SU_GN PV el R,R,R GN R * SU_GN GIN GIN d. V,,,,,,,,,,,,,,,,,,,,,,,,.VV VIN,,,,,,,, PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N SUWOOFER (EQ & MP.) ustom ate: Tuesday, February,

28 LUETOOTH RIGHT SIE USX for " T_OFF# N LUE TOOTH ONN --P-L TON_P LUELE USP- USP VPU_T VPU R.K/F_ PV hange T LUELE, USP- USP USP USP- USP USP- VSUS RP _PR_ Q MET SI el R,R FOR " ONLY mil *P/V_ *P/V_ PV dd for US VPU_T N Q TEU U/.V_ *U/.V_.U/V_ VPU lose to N.U/V_ VPU lose to N PV EMI request.u/v_ VPU L *WM- USP USP PV EMI request USP- USP- US_ENLE# L *WM- USP_R USP_R USP-_R USP-_R N US ONN US_ENLE# ST_LE# LE_EN PWR_LE#, PWR_LE# V N UL US ONN.U/V_ PV dd for US VPU N lose to N.U/V_ VPU PV EMI request L *WM- USP USP- L *WM- USP USP- US_ENLE# ST_LE# LE_EN PWR_LE# V N *UL US ONN USP_R USP-_R RIGHT SIE US for " PV new dd *-L *-L US fingerprint ON. USP-. USP V. V USP-. SYSTEM GN USP V. SYSTEM GN V.U/V_ U IO Vin V IO Gnd *PJSR FINGER PRINTER ONN N E-ST VPU US_ENLE# U/.V_ U VIN VIN EN GN GFPU OUT OUT OUT O mils (Iout=) P/V_ VSUS_USP.U/V_ u_.v_ ST_RXN_ ST_RXP_ USP- USP US & EST EMI Request N L VSUS_USP USP-_E US Vcc USP_E - WM- GN GN Shield ST_TXP ST_TXN - Shield.U/V_ ST_RXN GN ST_RXP - Shield.U/V_ GN Shield US_EST_OMO LEFT US PORT Touch screen for " N USP USP- USP- USP EMI Request L VSUS_USP USP-_U USP_U WM-.U/V_ N GN GN GN GN US ONN USP USP- L *WM- *PJSTS USP USP- GT_STOP# GT_STOP# GT_RESET GT_RESET V *PJSTS FWE GN TS-FF-connect PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N T/W/FT/Touchscreen ustom ate: Tuesday, February,

29 T : Stuffed for RTLL(//) for RTLL useclose Pin, TRLV TRLV U/.V_.U/V_ V_LN SI del R Remove R,R R and R are used in RTLL, remove R if switching regulator is enable, Remove R external power is used. VLNV SI del R.U/V_.U/V_ V_LN lose to PIN.U/V_.U/V_ XTL Y XTL MHZ P/V_ TRLV P/V_ R TRLV.K/F_ LNRSET TRL ENSWREG V_LN V_LN LN_TX# V_LN V_LN V R *K/F_ ISOLTE if ISOLTE pin pull-low,the LN chip will not drive it's PI-E outputs ( excluding PIE_WKE# pin ) R /F_ LN_ISLE#, L RTLL-GR U.U/V_ V_ LN_MT TT MT MI LN_MX T MX MI- LN_MX- T- MX-.U/V_ V_ LN_MT TT MT MI LN_MX T MX MI- LN_MX- T- MX-.U/V_ V_ LN_MT TT MT MI LN_MX T MX MI- LN_MX- T- MX-.U/V_ V_ LN_MT TT MT MI LN_MX T MX R.U/V_ R.U/V_ R.U/V_ R.U/V_ /F_ /F_ /F_ /F_ LN_MTG V_LN V_LN V_LN V_LN MI MI- MI MI- MI MI- V_LN MI MI- VTRL/SROUT GN RSET VTRVSR N/VSR N/ENSWREG KTL KTL N/V N/LV_PLL LE V U V V MIP LE/EESK MIN LE/EEI N/F LE/EEO MIP EES MIN GN GN RTLL-V-GR V N/MIP V N/MIN ISOLTE V/V PERST N/MIP LNWKE N/MIN LKREQ V GN HSIP HSIN REFLK_P REFLK_N EV HSOP HSON EGN N/GPO N/N LN_GLINK# LN_GLINK# EES T ISOLTE PLTRST# PIE_WKE# PIE_LK_REQ# R V_LN V_LN.K_ V_LN V_LN PLTRST#,,,, PIE_WKE#, PIE_LK_REQ# R *RV- K/F_ MI- T- NS MX- LN_MX- P/KV_ V_LN PIE_TXP_LN PIE_RXN_LN_L.U/V_ PIE_TXP_LN PIE_RXN_LN PIE_TXN_LN PIE_TXN_LN LK_PIE_LN PIE_RXP_LN_L.U/V_ LK_PIE_LN PIE_RXP_LN LK_PIE_LN# LK_PIE_LN# EV LN_GLINK# LN_TX# LN_GLE# LN_YLE# Link P/V_ P/V_ NS:GIGIT >mil TRL L.UH_ Power trace Layout 寬寬 > mil >mil TRL_L EV lose to L V pins-- V_LN R /F_ P/V_ RJ N L RTLL ( Gaga lan ) use.uh power choke >m tolerance ±% U/.V_.U/V_ U/V_ U/V_ V_LN LN_YLE LN_YLE# LN_MX LN_MX- LN_MX- LN_MX- LN_MX LN_MX LN_MX LN_MX- FOR EMI LE_GRE_P LE_GRE_N RX- RX RX- TX- TX RX TX- GN TX GN V_LN R /F_ LN_GLE LN_GLE# LE_YEL_P LE_YEL_N.U/V_.U/V_.U/V_.U/V_.U/V_ P/V_ RJ_ONN lose to L V pins--,,,,. PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N E/RJ ustom ate: Tuesday, February,

30 ST H ONNETOR ST -ROM V_O U/.V_S.U/V_ mils.u/v_.u/v_.u/v_ E V FHMR urrent rating:. U/.V_ mils U/.V_.U/.V_.U/V_ N ST H(ST) N Main H V_H ST_RXN V ST_RXP V: ( Pin) V: ( Pin) Gnd : ( Pin) ST_TXP ST_TXN.U/V_.U/V_ ST_RXN_ ST_RXP_ ST_TXP ST_TXN ST_RXN_ ST_RXP_ V V_O R *_.U/V_ ST_RXN.U/V_ ST_RXP R V_O K/F_ O_EJET# V V_H R *_ ST O SI chenage footprint mils V ST_ ONNETOR FOR." SI dd V PV modify R *K/F_ *U/.V_ *.U/.V_ *.U/V_ *U/.V_ O_EJET# _ R EJET# VLW V V.U/V_ *U/.V_ PV EMI request N Main H ST_RXN ST_RXP ST_TXP ST_TXN *.U/V_ *.U/V_ V V ST_RXN_ ST_RXP_ High : O power down Low : O power on O_P R K_ Q NE O I current. Q O.U/V_.U/V_ V_O R _ Q NE *nd ST H(ST) SI chenage footprint V,,,,,,,,,,,,,,,,,,,,,,,, V,,,,,,,,,, VLW,,, PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N O/H/NT ustom ate: Tuesday, February, E

31 V L *FMKF-T For UM HMI function SI EMI Request V_LS *.U/V_ *P/V_ *U/.V_ *P/V_ *U/.V_ *.U/V_ *P/V_ *U/.V_ *P/V_ *U/.V_ IN_LK IN_LK# IN_ V IN_# IN_ IN_# for UM U V V V V V V V V IN_ IN_- IN_ IN_- IN_ IN_- POWER OUT_ OUT_- OUT_ OUT_- OUT_ OUT_- MV el R,R TX_HMI TX_HMI- TX_HMI TX_HMI- TX_HMI TX_HMI- for UM lose to HMI(N) onnector TX_HMI *_PR_ RP _TX_HMI TX_HMI- _TX_HMI- L WM- TX_HMI *_PR_ RP _TX_HMI TX_HMI- _TX_HMI- L TX_HMI *_PR_ WM- RP _TX_HMI TX_HMI- _TX_HMI- L R *.K_ R *.K_ IN_ IN_# SVO_LK SVO_T IN_ IN_- SL S OUT_ OUT_- SL_SINK S_SINK TX_HMI TX_HMI- HMI_SLK_R HMI_ST_R TX_HMI TX_HMI- *_PR_ WM- RP L _TX_HMI _TX_HMI- SVO_T SVO_LK EQULIZTION SETTING P:P=: d P:P=: d Recommanded P:P=: d P:P=: d SLZ/SZ Low-level input/output Voltage FG:FG=: VIL:<.V VOL:.V (efault) GF:GF=: VIL:<.V VOL:.V GF:GF=: VIL:<.V VOL:.V GF:GF=: VIL:<.V VOL:.V HMI_HP_ON V R *.K/F_ HMI_FG _EN P P HMI_FG RT_EN# HMI_OE# REXT HP HP_SINK _EN P GN P GN UF_EN GN FG GN GN GN RT_EN# GN OE# GN REXT GN GN GN ONTROL EP *PS TMS_HP for SG/IS V_VG HMI_SLK_R *PR-S- HMI_ST_R V_VG WM- RP HMI_SLK HMI_ST lose to HMI(N) onnector V_VG V_VG Signals P HMI_FG HMI_FG REXT P HMI_OE# V Vendor:PT P/N:L Vendor:HR P/N:L Vendor:PIM P/N:LPLS REXT RT_EN# Ra Rb Rc Rd Re HMI_OE# PT N N N P P HMI_FG HMI_FG HR.K N N.K N N.K.K N PIM N Rf N.K N.K P Rg.K.K.K R R R R Rg Ra Rb Rc *.K_ *.K_ *.K_ *.K_ R R R Rd Rf *_ U for UM */F_ *.K_ R R R R Re *_ *_ *_ *_ V Q NE R K/F_.U/V_ PV EMI Request R /F TX_HMI R /F TX_HMI- R /F TX_HMI R /F TX_HMI- R /F TX_HMI R /F TX_HMI- R /F TX_HMI R /F TX_HMI- for is/sg lose to HMI(N) onnector SI el Q,R,R,R HMI_SL MV hange V_HMV RV- MV el R,R R.K_ R.K_ HMI_SLK Q NE V_HMV HMI_SLK HMI_ST V R F FUSEV_POLY Q K/F_ V MMT--F HMI_ET_P HMI_ET R */s TMS_HP R *K/F_ R PV hange to short pad K/F_ RV- R.K_.U/V_ R.K_ HMI_S Q _TX_HMI _TX_HMI- _TX_HMI _TX_HMI- _TX_HMI _TX_HMI- _TX_HMI _TX_HMI- HMI_SLK HMI_ST V_HMV N_TX_HMI.U/V TX_HMI N_TX_HMI-.U/V TX_HMI- N_TX_HMI.U/V TX_HMI N_TX_HMI-.U/V TX_HMI- N_TX_HMI.U/V TX_HMI N_TX_HMI-.U/V TX_HMI- N_TX_HMI.U/V TX_HMI N_TX_HMI-.U/V TX_HMI- V V_VG V_VG.U/V_ *.U/V_.U/V_ MV EMI Request HMI_ST NE N SHELL Shield - Shield - Shield - K K Shield K- E Remote N LK T GN V HP ET SHELL HMI ONN HMI_ET HMI_ET FHMR PV el R,R,R OM for UM/IS/SG PROJET : LX_LX Quanta omputer Inc. V,,,,,,,,,, V,,,,,,,,,,,,,,,,,,,,,,,, Size ocument Number Rev V_VG,,,,, N K/POWER ONN ustom ate: Tuesday, February,

32 ,,,,, PV hange SERIRQ R LFRME#_ R L_ R L_ R L_ R L_ LK_M_K,,,, PLTRST# LKRUN# SERIRQ *_/SLFRME# *_/SL *_/SL *_/SL *_/SL LKRUN# SI# GTE RIN# _RST# MX MX MX MX MX MX MX MX MY MY MY MY MY MY MY MY MY MY MY MY MY MY MY MY MY MY TEMP_MT _TYPE _IR SYS_I PWM_VJ K_LE_EN SUS# SLPTN# PSLK/GPIO GPIO SUS# E_GPX PWR_LE# PST/GPIO GPIO, PWR_LE# GPIO_E IN PSLK/GPIO GPIO GPIO_E SI IN NSWON# TPLK PST/GPIO GPIO NSWON# TPT PSLK/GPIOE GPIO PST/GPIOF GPIO E_EUG IOS_R# GPIO EJET# KSMI# IOS_WR# R GPIO IOS_S# WR SI dd VRON SELMEM/SPIS GPIO VRON PI_SERR# GPIO SELIO/GPIO GPIO GPU_PR_EN_E SELIO/GPIO E_GPX /GPX /GPX GPU_PROHOT PV dd to VG SUS_PWR_K PU_TEMP_LERT# /GPX T R *_ STGP R K/F_ /GPX IR_RX/GPIO VPU R *K/F_ RF_LINK# VPU LUELE /GPX GPIO /GPX GPIO R K/F_ NSWON# HMI_ET KEYLE_N /GPX GPIO PSLE# KEYLE_N /GPX GPIO PSLE# SI dd MV dd US_ENLE# US_ENLE# GPIO EPWROK EPWROK,, SUSON SUSON /GPX GPIO RSMRST# RSMRST#,,,,, MINON MINON /GPX GPIO VOLMUTE# VOLMUTE# LN_POWER LN_POWER /GPX GPIO IOS_SPI_LK IOS_SPI_LK_I S_ON S_ON /GPX GPIO R _ LI_E# /GPX GPIO LI_E#, /GPX, LN_ISLE# /GPX RY /GPX XLKO P/V_ T P/V_ MTLE# /GPX _LE_ON# /GPX RY WIRELESS_ON# /GPX XLKI Y WIRELESS_OFF#.KHZ /GPX _PRESENT R *_ GN GN GN P/V_ VR GN GN GN.U/V_.U/.V_ KQF,,,, SI# MV Modify NSWON# KSMI# GPU_PWROK GPU_PR_EN GTE RIN# MX MX MX MX MX MX MX MX MY MY MY MY MY MY MY MY MY MY MY MY MY MY MY MY MY MY FOR SG/IS FOR UM ONLY MV Modify hange to R as urrent loss R _ R _ RV- RV- RV- U SERIRQ LFRME L L L L PILK PIRST/GPIO LKRUN SI/GPIOE G/GPIO KRST/GPIO ERST KSI/GPIO KSI/GPIO KSI/GPIO KSI/GPIO KSI/GPIO KSI/GPIO KSI/GPIO KSI/GPIO KSO/GPIO KSO/GPIO KSO/GPIO KSO/GPIO KSO/GPIO KSO/GPIO KSO/GPIO KSO/GPIO KSO/GPIO KSO/GPIO KSO/GPIO KSO/GPIO KSO/GPIO KSO/GPIO KSO/GPIOE KSO/GPIOF KSO/GPIO KSO/GPIO E_GPX GPU_PR_EN_E R K/F_ SIO_EXT_SI# NSWON# SIO_EXT_SMI# V V V V V V V /GPI /GPI /GPI /GPI /GPO /GPO /GPOE /GPOF PWM/GPIOE PWM/GPIO FNPWM/GPIO FNPWM/GPIO FNF/GPIO FNF/GPIO SL/GPIO S/GPIO SL/GPIO S/GPIO GPIO GPIO GPIO VPU VFN /# FNSIG MLK MT MLK MT SUS# HWPG PU_PROHOT VPU VPU_E Socket:.U/V_.U/V_.U/V_.U/V_.U/V_.U/V_ *U/.V_.U/V_ T T IOS_S# IOS_SPI_LK_I IOS_WR# IOS_R# TEMP_MT _IR SYS_I VFN /# PWM_VJ K_LE_EN FNSIG O_P SI dd MLK MT MLK,, MT,, SUS# HWPG,,,,,, WINON KEZNN R T T MIT KEZN SPI_P K/F_ VPU_E SPI_P R VPU for attery charge/charge and cap board for GPU PU thermal K byte SPI E ROM G MXI KEKZP U E# SK SI SO WP# V HOL# VSS.U/.V_ L PYT-Y-N *U/.V_ VOUT NR/F *TPS Q *NEPT_S VPU.U/V_ K/F_ U VIN SHN GN VG_LERT, VPU *U/.V_ VPU V VPU V IN VPU LK_M_K Hi ==> W for EMI E_GPX TOUH P ONNETOR & ON/OFF OTTOM GPIO TPT TPLK VPU PU_TEMP_LERT# LUELE NSWON# SLPTN# MLK _RST# MT MLK MT adapter select for E Low ==> W/W VSUS VSUS PU_PROHOT_ PU_PROHOT GPU_PWR_EN, LUELE, TPT- TPLK- close conn _TYPE TPLK TPT present: _IN-->high, PU_PROHOT-->low, H_PROHOT#-->high Remove : _IN-->low, PU_PROHOT-->low, H_PROHOT#-->low thermal shutdown circuit VPU Size ocument Number Rev N K/ROM/TP ustom ate: Tuesday, February, _RST# H_PROHOT#,.V_VTT PV hange PM_THRMTRIP#, PROJET : LX_LX Quanta omputer Inc. Remove and re-cove prochot: _IN-->low, PU_PROHOT--> high, H_PROHOT#--> high R R R R R R R R R R R PV hange OM R FOR IS ONLY R R *K/F_ *_ R IS K N R K/F_ *_ K/F_ K/F_ K/F_.K/F_.K/F_.K/F_.K/F_ K/F_ K_ *_ PQ R SG/UM N K L L *NEPT_S *P/V_ PV dd K/F_ PYT-Y-N PYT-Y-N.U/V_ P/V_ R R.U/V_ P/V_.U/V_.K/F_.K/F_ PQ NEPT_S Q N PWR TN ONN R _ R *MMT--F R PQ NEPT_S SS R.K/F_ *.K/F_ SI HNGE POWER PV Remove OM adapter Type check /F_ P/V_ P/V I

33 Mini PI-E ard WLN FOR K EUG V.V.V V E R *_ MINIE_V V E debug pin E_EUG PIE_TXP PIE_TXP PIE_TXN PIE_TXN PIE_RXP PIE_RXP PIE_RXN PIE_RXN LK_M_EUG PLTRST# LK_PIE_WLN LK_PIE_WLN LK_PIE_WLN# LK_PIE_WLN# MV dd PIE_LK_REQ# R *_ T_OMO_EN_M T_OMO_EN# MINIR_PME# T_T,T_HLK,LKREQ# internal pull-own k ohm N GN PETp PETn GN GN PERp PERn GN GN REFLK REFLK- GN LKREQ# T_HLK T_T WKE#.V GN.V LE_WPN# LE_WLN# LE_WWN# GN US_ US_- GN SM_T SM_LK.V GN.Vaux PERST# W_ISLE# GN.V GN.V MINI PIE H=. FHMS MIPI-FGXPL-P-N MINI_LE R RF_LINK# R PLTRST# L_ L_ L_ L_ LFRME#_ PV hange *_ LUELE LUELE, RF_LINK# K/F_ V USP USP- GT_SM,,,, GLK_SM,,,, PLTRST#,,,, RF_OFF# L_, L_, L_, L_, LFRME#_,.U/V_.U/V_ INTEL WLN R PIN W_ISLE# have internal pull-up k ohm U/.V_S.U/V_.U/V_, PIE_WKE#.U/V_ U/.V_S VSUS R Q *TEU *K/F_ MINIR_PME# LK_M_EUG R *_ *P/V_ for EMI request V,,,,,,,,,,,,,,,,,,,,,,,, V,,,,,,,,,,.V VPU,,,,,,,,,, PU FN POWER OTTON ONNET V R.K/F_ FNSIG N V_FN FN ONN.U/.V_.U/V_ FHMR FNPWR =.*VSET U V VIN VO R K/F_ THERM_OVER# GN V /FON GN GN VFN VSET GN MIL V_FN NSWON# G *SHORT_ P LI_E#.U/V_ NSWON#.U/V_ PWR_LE#.U/V_ VPU, LI_E# NSWON#, PWR_LE#.U/V_ PWR_LE#. VPU(LISWITH PWR). VPU(LISWITH PWR). LISWITH. NSWON#. PWRLE#. GN N PWR TN ONN V GPV U/.V_ Gnd shape G layout notice PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev N MINI PIE ONN/FN ustom ate: Tuesday, February, E

34 KEYOR PULL-UP RP MY MY MY MY MY MY MY MY VPU PR-.K RP MY MY MY MY MY MY MY MY PR-.K R.K/F_ R.K/F_ MY MY clear S resin for key cap. LEs for. (total LE current m) LEs for (Total LE current m) MX P/V_ MY P/V_ MY P/V_ MX P/V_ MY P/V_ MY P/V_ MX P/V_ MY P/V_ MY P/V_ MX P/V_ MY P/V_ MY P/V_ MY P/V_ MY P/V_ MX P/V_ MY P/V_ MY P/V_ MX P/V_ MY P/V_ MY P/V_ MX P/V_ MY P/V_ MY P/V_ MX P/V_ MY P/V_ MY P/V_ V V SI dd PV hange OM PV hange OM R R K/F_ K/F_ R */F_ R */F_ WIRELESS_ON_R WIRELESS_OFF_R WIRELESS_ON# WIRELESS_OFF# Q Q PTEU PTEU MY[..] MX[..] MUTE_LE# PSLE# R KEYLE_N MY[..] MX[..] MX MX MX MY MX MX MY MX MX MY MY MX MY MY MY MY MY MY MY MY MY MY MY MY MY MY WIRELESS_ON_R WIRELESS_OFF_R R _ R _ V K/F_ KEYLE_N_R K ONN R K/F_.U/V_ N MV dd K backlight for " V VLW R R M_ K_LE_EN K/F_.U/V_ Q O Q NE.U/V_.U/V_ m N V_LE_KLIGHT K LIGHT ONN FFFR --p-l.lev. LEV. GN. GN.V_VG.V_VG.V_VG R R R *.K_ GPU_POK *P/V_ *.K_ GPU_POK *P/V_.K_ GPU_POK *P/V_ GPU_PGOK- Q *MMT--F Q *MMT--F R *_/S short Q MMT--F V_VG V R.K_ R.K_ Q MMT--F *P/V_ R K/F_ FOR IS ONLY PLTRST# R *_ GPU_PWROK,,, PEGX_RST# FOR SG ONLY U MVHGFTG,,,, PLTRST# GPU_HOL_RST# R /F_ GPU_HIN_RST# GPU_PGOK- Q *MMT--F V.U/V_ PEGX_RST# R K/F_ V,,,,,,,,,,,,,,,,,,,,,,,, V,,,,,,,,,, VPU,,,,,,,,,, V_VG,,,,, VLW,,,.V_VG,,,.V_VG,,,,.V_VG,,, PROJET : LX_LX Quanta omputer Inc. Size ocument Number Rev ustom N K ate: Tuesday, February,