Microsoft Word - AP1511A_B_V1.2-CN.doc

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1 with one-shot output for IR-Cut Removable (ICR) ANAPEX TECHNOLOGY INC. 3F-1, No. 87-1, Guangming 6th Rd., Jhubei City, Hsinchu 30268, Taiwan, R.O.C. Agent: Tel: Fax: Version: 1.2 May. 7, 2012 This article is subject to change without notice. Preliminary 1

2 FEATURES 1.8V 输入电平 PIN CONFIGURATION 低饱和电压 低待机电流 (<10uA) 操作电压 2.5V 至 5.5V 6 管脚 SOT-26 包装 只需单一输入即可控制 APPLICATIONS IR-Cut Removable (ICR) 专用驱动 IC. DESCRIPTION AP1511 是一款专为 IR-Cut Removable (ICR) 设计的驱动 IC 用来开关红外线滤光片. AP1511 具有一个低饱和电压双向的 H-bridge 驱动电路. 内建保护二极管疏通 ICR 所产生的反馈电流, 以及防止 ESD 的破坏. AP1511 内的双向 H-bridge 驱动电路其内阻小于 3 奥姆, 所以 ICR 模块所需的电流决定于其线圈的阻抗. 以工作电源 5 伏特为例, 当 ICR 内部线圈流过 300mA 电流时, AP1511 内的 H-bridge 驱动电路会产生 0.73V 的压降. AP1511A 提供单线控制与双线控制, 而 AP1511B 以单线控制并且提供单步操作 ( One-Shot ) 的功能. Pin # Mnemonic I/O Description 1 ENB I Low-active enable CE I External capacitor 2 GND - Ground 3 FBC I Forward/Backward control 4 OUT1 O Driver output 1 5 VDD - Power supply 6 OUT2 O Driver output 2 ORDERING INFORMATION MODEL AP1511A AP1511B PACKAGE SOT-26 SOT-26 Preliminary 2

3 Absolute Maximum Ratings (unless otherwise specified, Temperature=25 ) Characteristic Symbol Rating Unit Supply Voltage VDD 5.5 V Input Voltage VIN VDD+0.4V V Output Current ( Continue ) IOUT 500 ma ( Pulse, 50% duty ) 600 ma Operating Temperature Range TOPR -40~125 Storage Temperature Range TSTO -65~150 Electrical Characteristics (unless otherwise specified, Temperature=25 & VDD=5.0V) Characteristic Sym. Condition Limit Min. Typ. Max. Unit Supply Voltage VDD V Supply Current ISTB(A) ISTB(B) Steady state or standby state version A μa Steady state or standby state version B μa IDD Transit state ma Driver input control ENB/FBC Input High H VIH VDD+0.4 V Input High L VIL *VDD V Driver output OUT1/OUT2 Output Voltage VOUT1 I OUT = 200 ma V (upper + lower) VOUT2 I OUT = 300 ma V VOUT3 I OUT = 400 ma V Rise transition time TR From 0.1*VDD to 0.9*VDD ns Fall transition time TF From 0.9*VDD to 0.1*VDD ns Preliminary 3

4 Characteristic Sym. Condition Limit Unit Propagation Delay Time ENB OUT1 / 2 t plh ns ( L to H ) ENB OUT1 / 2 t phl ns ( H to L ) VDD = 5V, Load = 18 Pulse Width of ENB t PW ns Maximum frequency of ENB f MAX MHz Propagation delay time between ENB and OUT1/2 PWM waveform for ENB Preliminary 4

5 Typical Application ( AP1511A ) Truth Table and Diagram of Controls Preliminary 5

6 Typical Application ( AP1511B ) Truth Table and Diagram of Controls T One-Shot 的长度是由接在 CE 管脚上的外部电容所决定. 其关系式为 T one-shot = 1.3 x 10 6 x C CE ( second ) 当外部电容容值固定时, IC 温度每上升 1, T one-shot 会减少 0.2 %. 事实上一般的电容容值也会随温度变化, 25 时电容值为最大, 偏离 25 后电容值会减小. 因此建议将 T one-shot 设定为 ICR 所需时间的两倍, 使得在任意温度下皆可以正常动作. Preliminary 6

7 上图为一个 AP1511A/B 的应用线路图. 光敏电阻 CdS R5 与 R6 组成光感测电路, 其输出接至延迟电路 R5 以及 C2. Vin 的电压大小即为目前的环境亮度. 史密特触发电路 ( Q1, Q2 and ~R4 ) 用来判断目前为白天或是晚上并且控制 AP1511A/B FBC 管脚的方向. 这样 ICR 模块中红外线绿光片的位置就会根据环境的亮度来做变动. 延迟电路的作用是为了确保亮度信号稳定, 不会因为环境亮度瞬间改变所干扰. 当 R5 = 200k 以及 C2 = 22uF 时延迟时间约为 3 秒. 所以当环境亮度变化后必须超过 3 秒, AP1511 才会动作, 否则将视为干扰 AP1511 不会动作. 史密特触发电路利用两个临界电压 ( V IH 与 V IL ) 来得到较好的噪声容忍度以避免环境干扰. 当 Vin 低于 V IL 时, 史密特触发电路将送出低电平至 FBC 管脚. 当 Vin 高于 V IH 时, 史密特触发电路将送出高电平至 FBC 管脚. Vin 电压如果介于 V IH 与 V IL 时, 史密特触发电路输出电平不会改变. 此一特性可以提高噪声容忍度并且消除干扰. 临界电压可以由 ~R4 电阻阻值来决定. 可以利用安沛科技所提供的应用程序 Schmitt Trigger Calculator 来做计算. Preliminary 7

8 VCC Rb C1 Sensor - + OP1 Vo AP1511 FBC VCC Vcmp R3 Vcom + OP2 R2 C2 R4 - R2 Vcmp _ H = Vcc + Vcom ( Vo = Vcc ) R2 Vcmp _ L = 0 + Vcom = Vcom ( Vo = GND ) Vo Vo Vm Vm Vcc Vcc GND Vcmp_L Vcmp_H Vcmp GND Vth Vcmp Vth = Vm = R2 2( ) ( Vcmp _ H + Vcmp _ L) / 2 = Vcc + Vcom R2 2( ) ( Vcmp _ H Vcmp _ L) / 2 = Vcc 上列公式说明 OPAMP 组成之史密特触发电路的 Vth 以及 Vm 如何计算, 其电压值可以由 与 R2 决定. 当输入讯号高于 Vcmp_H 或低于 Vcmp_L 时, 史密特触发电路的输出会改变. 此一特性可以提高噪声容忍度并且消除干扰. Preliminary 8

9 AP1511 的 ENB 与 FBC 管脚为高阻抗输入, 没有内含提升电阻. 大部分的情况下, AP1511 由 MCU 或 HOST CPU 的 GPIO 所控制. GPIO 有两种形式三态输出 ( tri-states output ) 与开汲极输出 ( open-drain output ). HOST CPU VDD AP1511 HOST CPU CORE Input Buffer Drive Circuit HOST CPU with tri-state output buffer 因为 tri-state output 可以送出高电平 VDD 与低电平 GND. 所以此一种 GPIO 直接接到 AP1511 的 ENB 与 FBC 管脚即可. HOST CPU VDD VDD AP1511 Rp HOST CPU CORE Input Buffer Drive Circuit Host CPU with open-drain output buffer 若是 open-drain output 其只能输出低电平 GND, 所以必须在 GPIO 上加一个提升电阻 Rp 来产生高电平 VDD. 此一提升电阻 Rp 的阻值约在数百 k 即可. 较小的提升电阻可以得到较快得上升时间, 但是当 GPIO 输出低电平时会较耗电. Preliminary 9

10 OUTLINE DIMENSION (SOT-26) SYMBOLS DIMENSION (MM) DIMENSION (MIL) MIN NOM MAX MIN NOM MAX A A b C D E E e G L θ Preliminary 10

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